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From: "Allen-KH Cheng (程冠勳)" <Allen-KH.Cheng@mediatek.com>
To: "matthias.bgg@gmail.com" <matthias.bgg@gmail.com>,
	"chunkuang.hu@kernel.org" <chunkuang.hu@kernel.org>,
	"angelogioacchino.delregno@collabora.com"
	<angelogioacchino.delregno@collabora.com>,
	"Moudy Ho (何宗原)" <Moudy.Ho@mediatek.com>,
	"robh+dt@kernel.org" <robh+dt@kernel.org>,
	"krzysztof.kozlowski+dt@linaro.org"
	<krzysztof.kozlowski+dt@linaro.org>
Cc: "linux-arm-kernel@lists.infradead.org"
	<linux-arm-kernel@lists.infradead.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"linux-mediatek@lists.infradead.org"
	<linux-mediatek@lists.infradead.org>,
	"Roy-CW Yeh (葉中瑋)" <Roy-CW.Yeh@mediatek.com>,
	"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
	Project_Global_Chrome_Upstream_Group
	<Project_Global_Chrome_Upstream_Group@mediatek.com>
Subject: Re: [PATCH v1 2/6] dts: arm64: mt8195: add MMSYS and MUTEX configuration for VPPSYS
Date: Tue, 4 Oct 2022 11:46:53 +0000	[thread overview]
Message-ID: <c80af435ec4fec9419c47a73c0bda112ef62c76d.camel@mediatek.com> (raw)
In-Reply-To: <20221004093319.5069-3-moudy.ho@mediatek.com>

Hi Moudy,

On Tue, 2022-10-04 at 17:33 +0800, Moudy Ho wrote:
> From: "Roy-CW.Yeh" <roy-cw.yeh@mediatek.com>
> 
> Compatible names of VPPSYS0 and VPPSYS1 should be renamed to
> "mediatek,mt8195-mmsys" to match the description of the binding file.
> Also, add two nodes for MT8195 VPPSYS0/1 MUTEX.
> 
> Signed-off-by: Roy-CW.Yeh <roy-cw.yeh@mediatek.com>
> ---
>  arch/arm64/boot/dts/mediatek/mt8195.dtsi | 22 ++++++++++++++++++++--
>  1 file changed, 20 insertions(+), 2 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/mediatek/mt8195.dtsi
> b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
> index 905d1a90b406..7f54fa7d0185 100644
> --- a/arch/arm64/boot/dts/mediatek/mt8195.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
> @@ -1477,11 +1477,20 @@
>  		};
>  
>  		vppsys0: clock-controller@14000000 {
> -			compatible = "mediatek,mt8195-vppsys0";
> +			compatible = "mediatek,mt8195-mmsys";
>  			reg = <0 0x14000000 0 0x1000>;
> +			mediatek,gce-client-reg = <&gce1
> SUBSYS_1400XXXX 0 0x1000>;
>  			#clock-cells = <1>;
>  		};
>  

I run "ARCH=arm64 make dtbs check" and some of the tests failed.

The node name should be 'syscon' from mediatek/mediatek,mmsys.yaml.


> +		vpp0-mutex@1400f000 {
> +			compatible = "mediatek,mt8195-vpp-mutex";
> +			reg = <0 0x1400f000 0 0x1000>;
> +			mediatek,gce-client-reg = <&gce1
> SUBSYS_1400XXXX 0xf000 0x1000>;
> +			clocks = <&vppsys0 CLK_VPP0_MUTEX>;
> +			power-domains = <&spm
> MT8195_POWER_DOMAIN_VPPSYS0>;
> +		};
> +

'interrupts' is a required property from mediatek/mediatek,mutex.yaml


>  		smi_sub_common_vpp0_vpp1_2x1: smi@14010000 {
>  			compatible = "mediatek,mt8195-smi-sub-common";
>  			reg = <0 0x14010000 0 0x1000>;
> @@ -1582,11 +1591,20 @@
>  		};
>  
>  		vppsys1: clock-controller@14f00000 {
> -			compatible = "mediatek,mt8195-vppsys1";
> +			compatible = "mediatek,mt8195-mmsys";
>  			reg = <0 0x14f00000 0 0x1000>;
> +			mediatek,gce-client-reg = <&gce1
> SUBSYS_14f0XXXX 0 0x1000>;

Node name: syscon.

>  			#clock-cells = <1>;
>  		};
>  
> +		vpp1-mutex@14f01000 {
> +			compatible = "mediatek,mt8195-vpp-mutex";
> +			reg = <0 0x14f01000 0 0x1000>;
> +			mediatek,gce-client-reg = <&gce1
> SUBSYS_14f0XXXX 0x1000 0x1000>;
> +			clocks = <&vppsys1 CLK_VPP1_DISP_MUTEX>;
> +			power-domains = <&spm
> MT8195_POWER_DOMAIN_VPPSYS1>;
> +		};
> +

'interrupts' is a required property

Thanks,
Allen

>  		larb5: larb@14f02000 {
>  			compatible = "mediatek,mt8195-smi-larb";
>  			reg = <0 0x14f02000 0 0x1000>;




WARNING: multiple messages have this Message-ID (diff)
From: "Allen-KH Cheng (程冠勳)" <Allen-KH.Cheng@mediatek.com>
To: "matthias.bgg@gmail.com" <matthias.bgg@gmail.com>,
	"chunkuang.hu@kernel.org" <chunkuang.hu@kernel.org>,
	"angelogioacchino.delregno@collabora.com"
	<angelogioacchino.delregno@collabora.com>,
	"Moudy Ho (何宗原)" <Moudy.Ho@mediatek.com>,
	"robh+dt@kernel.org" <robh+dt@kernel.org>,
	"krzysztof.kozlowski+dt@linaro.org"
	<krzysztof.kozlowski+dt@linaro.org>
Cc: "linux-arm-kernel@lists.infradead.org"
	<linux-arm-kernel@lists.infradead.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"linux-mediatek@lists.infradead.org"
	<linux-mediatek@lists.infradead.org>,
	"Roy-CW Yeh (葉中瑋)" <Roy-CW.Yeh@mediatek.com>,
	"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
	Project_Global_Chrome_Upstream_Group
	<Project_Global_Chrome_Upstream_Group@mediatek.com>
Subject: Re: [PATCH v1 2/6] dts: arm64: mt8195: add MMSYS and MUTEX configuration for VPPSYS
Date: Tue, 4 Oct 2022 11:46:53 +0000	[thread overview]
Message-ID: <c80af435ec4fec9419c47a73c0bda112ef62c76d.camel@mediatek.com> (raw)
In-Reply-To: <20221004093319.5069-3-moudy.ho@mediatek.com>

Hi Moudy,

On Tue, 2022-10-04 at 17:33 +0800, Moudy Ho wrote:
> From: "Roy-CW.Yeh" <roy-cw.yeh@mediatek.com>
> 
> Compatible names of VPPSYS0 and VPPSYS1 should be renamed to
> "mediatek,mt8195-mmsys" to match the description of the binding file.
> Also, add two nodes for MT8195 VPPSYS0/1 MUTEX.
> 
> Signed-off-by: Roy-CW.Yeh <roy-cw.yeh@mediatek.com>
> ---
>  arch/arm64/boot/dts/mediatek/mt8195.dtsi | 22 ++++++++++++++++++++--
>  1 file changed, 20 insertions(+), 2 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/mediatek/mt8195.dtsi
> b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
> index 905d1a90b406..7f54fa7d0185 100644
> --- a/arch/arm64/boot/dts/mediatek/mt8195.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
> @@ -1477,11 +1477,20 @@
>  		};
>  
>  		vppsys0: clock-controller@14000000 {
> -			compatible = "mediatek,mt8195-vppsys0";
> +			compatible = "mediatek,mt8195-mmsys";
>  			reg = <0 0x14000000 0 0x1000>;
> +			mediatek,gce-client-reg = <&gce1
> SUBSYS_1400XXXX 0 0x1000>;
>  			#clock-cells = <1>;
>  		};
>  

I run "ARCH=arm64 make dtbs check" and some of the tests failed.

The node name should be 'syscon' from mediatek/mediatek,mmsys.yaml.


> +		vpp0-mutex@1400f000 {
> +			compatible = "mediatek,mt8195-vpp-mutex";
> +			reg = <0 0x1400f000 0 0x1000>;
> +			mediatek,gce-client-reg = <&gce1
> SUBSYS_1400XXXX 0xf000 0x1000>;
> +			clocks = <&vppsys0 CLK_VPP0_MUTEX>;
> +			power-domains = <&spm
> MT8195_POWER_DOMAIN_VPPSYS0>;
> +		};
> +

'interrupts' is a required property from mediatek/mediatek,mutex.yaml


>  		smi_sub_common_vpp0_vpp1_2x1: smi@14010000 {
>  			compatible = "mediatek,mt8195-smi-sub-common";
>  			reg = <0 0x14010000 0 0x1000>;
> @@ -1582,11 +1591,20 @@
>  		};
>  
>  		vppsys1: clock-controller@14f00000 {
> -			compatible = "mediatek,mt8195-vppsys1";
> +			compatible = "mediatek,mt8195-mmsys";
>  			reg = <0 0x14f00000 0 0x1000>;
> +			mediatek,gce-client-reg = <&gce1
> SUBSYS_14f0XXXX 0 0x1000>;

Node name: syscon.

>  			#clock-cells = <1>;
>  		};
>  
> +		vpp1-mutex@14f01000 {
> +			compatible = "mediatek,mt8195-vpp-mutex";
> +			reg = <0 0x14f01000 0 0x1000>;
> +			mediatek,gce-client-reg = <&gce1
> SUBSYS_14f0XXXX 0x1000 0x1000>;
> +			clocks = <&vppsys1 CLK_VPP1_DISP_MUTEX>;
> +			power-domains = <&spm
> MT8195_POWER_DOMAIN_VPPSYS1>;
> +		};
> +

'interrupts' is a required property

Thanks,
Allen

>  		larb5: larb@14f02000 {
>  			compatible = "mediatek,mt8195-smi-larb";
>  			reg = <0 0x14f02000 0 0x1000>;



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  reply	other threads:[~2022-10-04 11:47 UTC|newest]

Thread overview: 34+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-10-04  9:33 [PATCH v1 0/6] add support for MT8195 VPPSYS on MMSYS and MUTEX Moudy Ho
2022-10-04  9:33 ` Moudy Ho
2022-10-04  9:33 ` [PATCH v1 1/6] dt-bindings: soc: mediatek: Add support for MT8195 VPPSYS Moudy Ho
2022-10-04  9:33   ` Moudy Ho
2022-10-05  7:58   ` Krzysztof Kozlowski
2022-10-05  7:58     ` Krzysztof Kozlowski
2022-10-04  9:33 ` [PATCH v1 2/6] dts: arm64: mt8195: add MMSYS and MUTEX configuration for VPPSYS Moudy Ho
2022-10-04  9:33   ` Moudy Ho
2022-10-04 11:46   ` Allen-KH Cheng (程冠勳) [this message]
2022-10-04 11:46     ` Allen-KH Cheng (程冠勳)
2022-10-05  1:53     ` moudy ho
2022-10-05  1:53       ` moudy ho
2022-10-05  7:57   ` Krzysztof Kozlowski
2022-10-05  7:57     ` Krzysztof Kozlowski
2022-10-04  9:33 ` [PATCH v1 3/6] soc: mediatek: mmsys: add support for MT8195 VPPSYS Moudy Ho
2022-10-04  9:33   ` Moudy Ho
2022-10-04 12:17   ` AngeloGioacchino Del Regno
2022-10-04 12:17     ` AngeloGioacchino Del Regno
2022-10-05  2:43     ` moudy ho
2022-10-05  2:43       ` moudy ho
2022-10-04  9:33 ` [PATCH v1 4/6] soc: mediatek: mmsys: add config api for RSZ switching and DCM Moudy Ho
2022-10-04  9:33   ` Moudy Ho
2022-10-04 12:17   ` AngeloGioacchino Del Regno
2022-10-04 12:17     ` AngeloGioacchino Del Regno
2022-10-05  1:48     ` moudy ho
2022-10-05  1:48       ` moudy ho
2022-10-04  9:33 ` [PATCH v1 5/6] soc: mediatek: mutex: Add mtk_mutex_set_mod support to set MOD1 Moudy Ho
2022-10-04  9:33   ` Moudy Ho
2022-10-04 12:38   ` AngeloGioacchino Del Regno
2022-10-04 12:38     ` AngeloGioacchino Del Regno
2022-10-05  2:59     ` moudy ho
2022-10-05  2:59       ` moudy ho
2022-10-04  9:33 ` [PATCH v1 6/6] soc: mediatek: mutex: support MT8195 VPPSYS Moudy Ho
2022-10-04  9:33   ` Moudy Ho

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