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From: "Souza, Jose" <jose.souza@intel.com>
To: "intel-gfx@lists.freedesktop.org"
	<intel-gfx@lists.freedesktop.org>,
	"De Marchi, Lucas" <lucas.demarchi@intel.com>
Subject: Re: [PATCH 12/28] drm/i915/tgl: Add TRANSCODER_A_VDSC power domain
Date: Thu, 27 Jun 2019 19:30:27 +0000	[thread overview]
Message-ID: <caa5fcb163176090d5aab8b501a806e7ec603ef4.camel@intel.com> (raw)
In-Reply-To: <c4b390a80e43f115937263fb7d3314a1312cf7eb.camel@intel.com>

On Thu, 2019-06-27 at 12:28 -0700, José Roberto de Souza wrote:
> On Tue, 2019-06-25 at 10:54 -0700, Lucas De Marchi wrote:
> > From: José Roberto de Souza <jose.souza@intel.com>
> > 
> > On TGL the special EDP transcoder is gone and it should be handled
> > by
> > transcoder A. Add POWER_DOMAIN_TRANSCODER_A_VDSC to make this
> > distinction clear and update vdsc code path.
> > 
> > Cc: Imre Deak <imre.deak@intel.com>
> > Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
> > Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
> > ---
> >  drivers/gpu/drm/i915/display/intel_display_power.c |  2 ++
> >  drivers/gpu/drm/i915/display/intel_display_power.h |  1 +
> >  drivers/gpu/drm/i915/display/intel_vdsc.c          | 11 ++++++++
> > ---
> >  3 files changed, 11 insertions(+), 3 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c
> > b/drivers/gpu/drm/i915/display/intel_display_power.c
> > index 0c7d4a363deb..15582841fefc 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display_power.c
> > +++ b/drivers/gpu/drm/i915/display/intel_display_power.c
> > @@ -58,6 +58,8 @@ intel_display_power_domain_str(struct
> > drm_i915_private *i915,
> >  		return "TRANSCODER_EDP";
> >  	case POWER_DOMAIN_TRANSCODER_EDP_VDSC:
> >  		return "TRANSCODER_EDP_VDSC";
> > +	case POWER_DOMAIN_TRANSCODER_A_VDSC:
> > +		return "TRANSCODER_A_VDSC";
> >  	case POWER_DOMAIN_TRANSCODER_DSI_A:
> >  		return "TRANSCODER_DSI_A";
> >  	case POWER_DOMAIN_TRANSCODER_DSI_C:
> > diff --git a/drivers/gpu/drm/i915/display/intel_display_power.h
> > b/drivers/gpu/drm/i915/display/intel_display_power.h
> > index 79262a5bceb4..7761b493608a 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display_power.h
> > +++ b/drivers/gpu/drm/i915/display/intel_display_power.h
> > @@ -29,6 +29,7 @@ enum intel_display_power_domain {
> >  	POWER_DOMAIN_TRANSCODER_D,
> >  	POWER_DOMAIN_TRANSCODER_EDP,
> >  	POWER_DOMAIN_TRANSCODER_EDP_VDSC,
> > +	POWER_DOMAIN_TRANSCODER_A_VDSC,
> >  	POWER_DOMAIN_TRANSCODER_DSI_A,
> >  	POWER_DOMAIN_TRANSCODER_DSI_C,
> >  	POWER_DOMAIN_PORT_DDI_A_LANES,
> > diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.c
> > b/drivers/gpu/drm/i915/display/intel_vdsc.c
> > index ffec807b8960..0c75b408d6ba 100644
> > --- a/drivers/gpu/drm/i915/display/intel_vdsc.c
> > +++ b/drivers/gpu/drm/i915/display/intel_vdsc.c
> > @@ -459,16 +459,21 @@ int intel_dp_compute_dsc_params(struct
> > intel_dp
> > *intel_dp,
> >  enum intel_display_power_domain
> >  intel_dsc_power_domain(const struct intel_crtc_state *crtc_state)
> >  {
> > +	struct drm_i915_private *dev_priv = to_i915(crtc_state-
> > > base.state->dev);
> >  	enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
> >  
> >  	/*
> > -	 * On ICL VDSC/joining for eDP transcoder uses a separate power
> > well PW2
> > -	 * This requires POWER_DOMAIN_TRANSCODER_EDP_VDSC power domain.
> > +	 * On ICL+ VDSC/joining for eDP/A transcoder uses a separate
> > power well
> > +	 * PW2. This requires
> > +	 *
> > POWER_DOMAIN_TRANSCODER_EDP_VDSC/POWER_DOMAIN_TRANSCODER_A_VDSC
> > power
> > +	 * domain.
> >  	 * For any other transcoder, VDSC/joining uses the power well
> > associated
> >  	 * with the pipe/transcoder in use. Hence another reference on
> > the
> >  	 * transcoder power domain will suffice.
> >  	 */
> > -	if (cpu_transcoder == TRANSCODER_EDP)
> > +	if (INTEL_GEN(dev_priv) >= 12 && cpu_transcoder ==
> > TRANSCODER_A)
> > +		return POWER_DOMAIN_TRANSCODER_A_VDSC;
> > +	else if (cpu_transcoder == TRANSCODER_EDP)
> >  		return POWER_DOMAIN_TRANSCODER_EDP_VDSC;
> >  	else
> >  		return POWER_DOMAIN_TRANSCODER(cpu_transcoder);
> 
> This is missing the change adding POWER_DOMAIN_TRANSCODER_EDP_VDSC to
> TGL_PW_2_POWER_DOMAINS.


* TRANSCODER_A_VDSC *
Missing the change adding TRANSCODER_A_VDSC to TGL_PW_2_POWER_DOMAINS
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  reply	other threads:[~2019-06-27 19:30 UTC|newest]

Thread overview: 61+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-06-25 17:54 [PATCH 00/28] Initial support for Tiger Lake Lucas De Marchi
2019-06-25 17:54 ` [PATCH 01/28] drm/i915: Add modular FIA Lucas De Marchi
2019-06-26 15:50   ` Ville Syrjälä
2019-06-26 17:48     ` Lucas De Marchi
2019-06-26 17:56       ` Ville Syrjälä
2019-06-25 17:54 ` [PATCH 02/28] drm/i915: rework reading pipe disable fuses Lucas De Marchi
2019-06-26 15:51   ` Ville Syrjälä
2019-06-25 17:54 ` [PATCH 03/28] drm/i915: Add 4th pipe and transcoder Lucas De Marchi
2019-07-08 13:00   ` Ville Syrjälä
2019-06-25 17:54 ` [PATCH 04/28] drm/i915/tgl: add initial Tiger Lake definitions Lucas De Marchi
2019-06-26 17:40   ` Srivatsa, Anusha
2019-06-25 17:54 ` [PATCH 05/28] drm/i915/tgl: Introduce Tiger Lake PCH Lucas De Marchi
2019-07-07 10:49   ` Gupta, Anshuman
2019-07-08 10:59     ` Gupta, Anshuman
2019-06-25 17:54 ` [PATCH 06/28] drm/i915/tgl: Add TGL PCH detection in virtualized environment Lucas De Marchi
2019-06-26 18:27   ` Srivatsa, Anusha
2019-06-25 17:54 ` [PATCH 07/28] drm/i915/tgl: Add TGL PCI IDs Lucas De Marchi
2019-07-08 10:55   ` Gupta, Anshuman
2019-07-08 13:31     ` Lucas De Marchi
2019-06-25 17:54 ` [PATCH 08/28] x86/gpu: add TGL stolen memory support Lucas De Marchi
2019-07-09 12:03   ` Rodrigo Vivi
2019-06-25 17:54 ` [PATCH 09/28] drm/i915/tgl: Check if pipe D is fused Lucas De Marchi
2019-06-26 21:24   ` Srivatsa, Anusha
2019-06-25 17:54 ` [PATCH 10/28] drm/i915/tgl: Add power well support Lucas De Marchi
2019-06-27 19:15   ` Manasi Navare
2019-06-27 20:23     ` Lucas De Marchi
2019-06-27 19:31   ` Souza, Jose
2019-06-27 20:22     ` Lucas De Marchi
2019-06-25 17:54 ` [PATCH 11/28] drm/i915/tgl: Add power well to support 4th pipe Lucas De Marchi
2019-07-01 17:54   ` Ville Syrjälä
2019-06-25 17:54 ` [PATCH 12/28] drm/i915/tgl: Add TRANSCODER_A_VDSC power domain Lucas De Marchi
2019-06-27 19:16   ` Manasi Navare
2019-06-27 19:28   ` Souza, Jose
2019-06-27 19:30     ` Souza, Jose [this message]
2019-06-27 19:33     ` Manasi Navare
2019-06-28  9:55   ` Ville Syrjälä
2019-06-28 16:31     ` Lucas De Marchi
2019-07-01 17:32       ` Ville Syrjälä
2019-07-01 17:36         ` Ville Syrjälä
2019-07-08 21:05         ` Lucas De Marchi
2019-06-25 17:54 ` [PATCH 13/28] drm/i915/tgl: Add new pll ids Lucas De Marchi
2019-06-26 23:12   ` Srivatsa, Anusha
2019-06-25 17:54 ` [PATCH 14/28] drm/i915/tgl: Add pll manager Lucas De Marchi
2019-06-25 17:54 ` [PATCH 15/28] drm/i915/tgl: Add additional ports for Tiger Lake Lucas De Marchi
2019-06-25 17:54 ` [PATCH 16/28] drm/i915/tgl: update ddi/tc clock_off bits Lucas De Marchi
2019-06-25 17:54 ` [PATCH 17/28] drm/i915/tgl: Add gmbus gpio pin to port mapping Lucas De Marchi
2019-06-25 17:54 ` [PATCH 18/28] drm/i915/tgl: port to ddc pin mapping Lucas De Marchi
2019-06-25 17:54 ` [PATCH 19/28] drm/i915/tgl: select correct bit for port select Lucas De Marchi
2019-06-25 17:54 ` [PATCH 20/28] drm/i915/tgl: Add third combophy offset Lucas De Marchi
2019-06-25 17:54 ` [PATCH 21/28] drm/i915/tgl: extend intel_port_is_combophy/tc Lucas De Marchi
2019-06-25 17:54 ` [PATCH 22/28] drm/i915/tgl: init ddi port A-C for Tiger Lake Lucas De Marchi
2019-06-25 17:54 ` [PATCH 23/28] drm/i915/tgl: Add vbt value mapping for DDC Bus pin Lucas De Marchi
2019-06-25 17:54 ` [PATCH 24/28] drm/i915/tgl: apply Display WA #1178 to fix type C dongles Lucas De Marchi
2019-06-25 17:54 ` [PATCH 25/28] drm/i915/gen12: MBUS B credit change Lucas De Marchi
2019-06-25 17:54 ` [PATCH 26/28] drm/i915/tgl: skip setting PORT_CL_DW12_* on initialization Lucas De Marchi
2019-06-25 17:54 ` [PATCH 27/28] drm/i915/tgl: Add DPLL registers Lucas De Marchi
2019-06-25 17:54 ` [PATCH 28/28] drm/i915/tgl: Update DPLL clock reference register Lucas De Marchi
2019-06-26  0:00 ` ✗ Fi.CI.CHECKPATCH: warning for Initial support for Tiger Lake Patchwork
2019-06-26  0:54 ` ✓ Fi.CI.BAT: success " Patchwork
2019-06-26  1:43 ` [PATCH 00/28] " Souza, Jose
2019-06-26  5:10 ` ✓ Fi.CI.IGT: success for " Patchwork

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