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From: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
To: Bjorn Helgaas <bhelgaas@google.com>
Cc: linuxarm@huawei.com, mauro.chehab@huawei.com,
	"Mauro Carvalho Chehab" <mchehab+huawei@kernel.org>,
	"Krzysztof Wilczyński" <kw@linux.com>,
	"Binghui Wang" <wangbinghui@hisilicon.com>,
	"Rob Herring" <robh@kernel.org>,
	"Xiaowei Song" <songxiaowei@hisilicon.com>,
	linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org,
	linux-phy@lists.infradead.org
Subject: [PATCH v12 00/11] Add support for Hikey 970 PCIe
Date: Tue, 28 Sep 2021 09:34:10 +0200	[thread overview]
Message-ID: <cover.1632814194.git.mchehab+huawei@kernel.org> (raw)

The pcie-kirin PCIe driver contains internally a PHY interface for
Kirin 960, but it misses support for Kirin 970.

Patch1 contains a PHY for Kirin 970 PCIe.

The remaining patches add support for Kirin 970 at the pcie-kirin driver, and
add the needed logic to compile it as module and to allow to dynamically
remove the driver in runtime.

Tested on HiKey970:

  # lspci -D -PP
  0000:00:00.0 PCI bridge: Huawei Technologies Co., Ltd. Device 3670 (rev 01)
  0000:00:00.0/01:00.0 PCI bridge: PLX Technology, Inc. PEX 8606 6 Lane, 6 Port PCI Express Gen 2 (5.0 GT/s) Switch (rev ba)
  0000:00:00.0/01:00.0/02:01.0 PCI bridge: PLX Technology, Inc. PEX 8606 6 Lane, 6 Port PCI Express Gen 2 (5.0 GT/s) Switch (rev ba)
  0000:00:00.0/01:00.0/02:04.0 PCI bridge: PLX Technology, Inc. PEX 8606 6 Lane, 6 Port PCI Express Gen 2 (5.0 GT/s) Switch (rev ba)
  0000:00:00.0/01:00.0/02:05.0 PCI bridge: PLX Technology, Inc. PEX 8606 6 Lane, 6 Port PCI Express Gen 2 (5.0 GT/s) Switch (rev ba)
  0000:00:00.0/01:00.0/02:07.0 PCI bridge: PLX Technology, Inc. PEX 8606 6 Lane, 6 Port PCI Express Gen 2 (5.0 GT/s) Switch (rev ba)
  0000:00:00.0/01:00.0/02:09.0 PCI bridge: PLX Technology, Inc. PEX 8606 6 Lane, 6 Port PCI Express Gen 2 (5.0 GT/s) Switch (rev ba)
  0000:00:00.0/01:00.0/02:01.0/03:00.0 Non-Volatile memory controller: Samsung Electronics Co Ltd Device a809
  0000:00:00.0/01:00.0/02:07.0/06:00.0 Ethernet controller: Realtek Semiconductor Co., Ltd. RTL8111/8168/8411 PCI Express Gigabit Ethernet Controller (rev 07)

Tested on HiKey960:

  # lspci -D 
  0000:00:00.0 PCI bridge: Huawei Technologies Co., Ltd. Device 3660 (rev 01)

---

v12:
  - Change a comment at patch 1 to not use c99 style.

v11:
  - patch 5 changed to use the right PCIe topology
  - all other patches are identical to v10.

v10:
  - patch 1: dropped magic numbers from PHY driver
  - patch 5: allow pcie child nodes without reset-gpios
  - all other patches are identical to v9.

v9:
  - Did some cleanups at patches 1 and 5



Mauro Carvalho Chehab (11):
  phy: HiSilicon: Add driver for Kirin 970 PCIe PHY
  PCI: kirin: Reorganize the PHY logic inside the driver
  PCI: kirin: Add support for a PHY layer
  PCI: kirin: Use regmap for APB registers
  PCI: kirin: Add support for bridge slot DT schema
  PCI: kirin: Add Kirin 970 compatible
  PCI: kirin: Add MODULE_* macros
  PCI: kirin: Allow building it as a module
  PCI: kirin: Add power_off support for Kirin 960 PHY
  PCI: kirin: fix poweroff sequence
  PCI: kirin: Allow removing the driver

 drivers/pci/controller/dwc/Kconfig      |   2 +-
 drivers/pci/controller/dwc/pcie-kirin.c | 644 +++++++++++++-----
 drivers/phy/hisilicon/Kconfig           |  10 +
 drivers/phy/hisilicon/Makefile          |   1 +
 drivers/phy/hisilicon/phy-hi3670-pcie.c | 845 ++++++++++++++++++++++++
 5 files changed, 1354 insertions(+), 148 deletions(-)
 create mode 100644 drivers/phy/hisilicon/phy-hi3670-pcie.c

-- 
2.31.1



WARNING: multiple messages have this Message-ID
From: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
To: Bjorn Helgaas <bhelgaas@google.com>
Cc: linuxarm@huawei.com, mauro.chehab@huawei.com,
	"Mauro Carvalho Chehab" <mchehab+huawei@kernel.org>,
	"Krzysztof Wilczyński" <kw@linux.com>,
	"Binghui Wang" <wangbinghui@hisilicon.com>,
	"Rob Herring" <robh@kernel.org>,
	"Xiaowei Song" <songxiaowei@hisilicon.com>,
	linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org,
	linux-phy@lists.infradead.org
Subject: [PATCH v12 00/11] Add support for Hikey 970 PCIe
Date: Tue, 28 Sep 2021 09:34:10 +0200	[thread overview]
Message-ID: <cover.1632814194.git.mchehab+huawei@kernel.org> (raw)

The pcie-kirin PCIe driver contains internally a PHY interface for
Kirin 960, but it misses support for Kirin 970.

Patch1 contains a PHY for Kirin 970 PCIe.

The remaining patches add support for Kirin 970 at the pcie-kirin driver, and
add the needed logic to compile it as module and to allow to dynamically
remove the driver in runtime.

Tested on HiKey970:

  # lspci -D -PP
  0000:00:00.0 PCI bridge: Huawei Technologies Co., Ltd. Device 3670 (rev 01)
  0000:00:00.0/01:00.0 PCI bridge: PLX Technology, Inc. PEX 8606 6 Lane, 6 Port PCI Express Gen 2 (5.0 GT/s) Switch (rev ba)
  0000:00:00.0/01:00.0/02:01.0 PCI bridge: PLX Technology, Inc. PEX 8606 6 Lane, 6 Port PCI Express Gen 2 (5.0 GT/s) Switch (rev ba)
  0000:00:00.0/01:00.0/02:04.0 PCI bridge: PLX Technology, Inc. PEX 8606 6 Lane, 6 Port PCI Express Gen 2 (5.0 GT/s) Switch (rev ba)
  0000:00:00.0/01:00.0/02:05.0 PCI bridge: PLX Technology, Inc. PEX 8606 6 Lane, 6 Port PCI Express Gen 2 (5.0 GT/s) Switch (rev ba)
  0000:00:00.0/01:00.0/02:07.0 PCI bridge: PLX Technology, Inc. PEX 8606 6 Lane, 6 Port PCI Express Gen 2 (5.0 GT/s) Switch (rev ba)
  0000:00:00.0/01:00.0/02:09.0 PCI bridge: PLX Technology, Inc. PEX 8606 6 Lane, 6 Port PCI Express Gen 2 (5.0 GT/s) Switch (rev ba)
  0000:00:00.0/01:00.0/02:01.0/03:00.0 Non-Volatile memory controller: Samsung Electronics Co Ltd Device a809
  0000:00:00.0/01:00.0/02:07.0/06:00.0 Ethernet controller: Realtek Semiconductor Co., Ltd. RTL8111/8168/8411 PCI Express Gigabit Ethernet Controller (rev 07)

Tested on HiKey960:

  # lspci -D 
  0000:00:00.0 PCI bridge: Huawei Technologies Co., Ltd. Device 3660 (rev 01)

---

v12:
  - Change a comment at patch 1 to not use c99 style.

v11:
  - patch 5 changed to use the right PCIe topology
  - all other patches are identical to v10.

v10:
  - patch 1: dropped magic numbers from PHY driver
  - patch 5: allow pcie child nodes without reset-gpios
  - all other patches are identical to v9.

v9:
  - Did some cleanups at patches 1 and 5



Mauro Carvalho Chehab (11):
  phy: HiSilicon: Add driver for Kirin 970 PCIe PHY
  PCI: kirin: Reorganize the PHY logic inside the driver
  PCI: kirin: Add support for a PHY layer
  PCI: kirin: Use regmap for APB registers
  PCI: kirin: Add support for bridge slot DT schema
  PCI: kirin: Add Kirin 970 compatible
  PCI: kirin: Add MODULE_* macros
  PCI: kirin: Allow building it as a module
  PCI: kirin: Add power_off support for Kirin 960 PHY
  PCI: kirin: fix poweroff sequence
  PCI: kirin: Allow removing the driver

 drivers/pci/controller/dwc/Kconfig      |   2 +-
 drivers/pci/controller/dwc/pcie-kirin.c | 644 +++++++++++++-----
 drivers/phy/hisilicon/Kconfig           |  10 +
 drivers/phy/hisilicon/Makefile          |   1 +
 drivers/phy/hisilicon/phy-hi3670-pcie.c | 845 ++++++++++++++++++++++++
 5 files changed, 1354 insertions(+), 148 deletions(-)
 create mode 100644 drivers/phy/hisilicon/phy-hi3670-pcie.c

-- 
2.31.1



-- 
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy

             reply	other threads:[~2021-09-28  7:34 UTC|newest]

Thread overview: 32+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-09-28  7:34 Mauro Carvalho Chehab [this message]
2021-09-28  7:34 ` Mauro Carvalho Chehab
2021-09-28  7:34 ` [PATCH v12 01/11] phy: HiSilicon: Add driver for Kirin 970 PCIe PHY Mauro Carvalho Chehab
2021-09-28  7:34   ` Mauro Carvalho Chehab
2021-10-01  8:12   ` Vinod Koul
2021-10-01  8:12     ` Vinod Koul
2021-09-28  7:34 ` [PATCH v12 02/11] PCI: kirin: Reorganize the PHY logic inside the driver Mauro Carvalho Chehab
2021-09-28  7:34 ` [PATCH v12 03/11] PCI: kirin: Add support for a PHY layer Mauro Carvalho Chehab
2021-10-05 20:31   ` Pali Rohár
2021-10-05 22:33     ` Mauro Carvalho Chehab
2021-09-28  7:34 ` [PATCH v12 04/11] PCI: kirin: Use regmap for APB registers Mauro Carvalho Chehab
2021-09-28  7:34 ` [PATCH v12 05/11] PCI: kirin: Add support for bridge slot DT schema Mauro Carvalho Chehab
2021-09-28  7:34 ` [PATCH v12 06/11] PCI: kirin: Add Kirin 970 compatible Mauro Carvalho Chehab
2021-09-28  7:34 ` [PATCH v12 07/11] PCI: kirin: Add MODULE_* macros Mauro Carvalho Chehab
2021-09-28  7:34 ` [PATCH v12 08/11] PCI: kirin: Allow building it as a module Mauro Carvalho Chehab
2021-09-28  7:34 ` [PATCH v12 09/11] PCI: kirin: Add power_off support for Kirin 960 PHY Mauro Carvalho Chehab
2021-09-28  7:34 ` [PATCH v12 10/11] PCI: kirin: fix poweroff sequence Mauro Carvalho Chehab
2021-09-28  7:34 ` [PATCH v12 11/11] PCI: kirin: Allow removing the driver Mauro Carvalho Chehab
2021-10-05  9:24 ` [PATCH v12 00/11] Add support for Hikey 970 PCIe Mauro Carvalho Chehab
2021-10-05  9:24   ` Mauro Carvalho Chehab
2021-10-05 18:23   ` Bjorn Helgaas
2021-10-05 18:23     ` Bjorn Helgaas
2021-10-07 14:41     ` Lorenzo Pieralisi
2021-10-07 14:41       ` Lorenzo Pieralisi
2021-10-08 10:55       ` Mauro Carvalho Chehab
2021-10-08 10:55         ` Mauro Carvalho Chehab
2021-10-08 17:34         ` Lorenzo Pieralisi
2021-10-08 17:34           ` Lorenzo Pieralisi
2021-10-09  1:44 Songxiaowei (Kirin_DRV)
2021-10-09  1:44 ` Songxiaowei (Kirin_DRV)
2021-10-12 13:06 ` Lorenzo Pieralisi
2021-10-12 13:06   ` Lorenzo Pieralisi

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