[PATCH v2 00/11] drm/edid: constify EDID parsing, with some fixes

[PATCH v2 00/11] drm/edid: constify EDID parsing, with some fixes

[Jani Nikula]

v2 of https://patchwork.freedesktop.org/series/101787/ addressing some
review comments from Ville.

Jani Nikula (11):
  drm/edid: don't modify EDID while parsing
  drm/edid: fix reduced blanking support check
  drm/edid: slightly restructure timing and non-timing descriptor
    structs
  drm/edid: pass a timing pointer to is_display_descriptor()
  drm/edid: use struct detailed_timing member access in is_rb()
  drm/edid: use struct detailed_data_monitor_range member access in gtf2
    functions
  drm/edid: constify struct detailed_timing in lower level parsing
  drm/edid: constify struct detailed_timing in parsing callbacks
  drm/edid: constify struct edid passed to detailed blocks
  drm/edid: constify struct edid passed around in callbacks and closure
  drm/edid: add more general struct edid constness in the interfaces

 .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c |   6 +-
 drivers/gpu/drm/drm_edid.c                    | 287 ++++++++++--------
 include/drm/drm_edid.h                        |  19 +-
 3 files changed, 174 insertions(+), 138 deletions(-)

-- 
2.30.2

[Intel-gfx] [PATCH v2 00/11] drm/edid: constify EDID parsing, with some fixes

[Jani Nikula]

v2 of https://patchwork.freedesktop.org/series/101787/ addressing some
review comments from Ville.

Jani Nikula (11):
  drm/edid: don't modify EDID while parsing
  drm/edid: fix reduced blanking support check
  drm/edid: slightly restructure timing and non-timing descriptor
    structs
  drm/edid: pass a timing pointer to is_display_descriptor()
  drm/edid: use struct detailed_timing member access in is_rb()
  drm/edid: use struct detailed_data_monitor_range member access in gtf2
    functions
  drm/edid: constify struct detailed_timing in lower level parsing
  drm/edid: constify struct detailed_timing in parsing callbacks
  drm/edid: constify struct edid passed to detailed blocks
  drm/edid: constify struct edid passed around in callbacks and closure
  drm/edid: add more general struct edid constness in the interfaces

 .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c |   6 +-
 drivers/gpu/drm/drm_edid.c                    | 287 ++++++++++--------
 include/drm/drm_edid.h                        |  19 +-
 3 files changed, 174 insertions(+), 138 deletions(-)

-- 
2.30.2

[PATCH v2 01/11] drm/edid: don't modify EDID while parsing

[Jani Nikula]

We'll want to keep the EDID immutable while parsing. Stop modifying the
EDID because of the quirks.

In theory, this does have userspace implications, but the userspace is
supposed to use the modes exposed via KMS API, not by parsing the EDID
directly.

Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/drm_edid.c | 18 +++++++++---------
 1 file changed, 9 insertions(+), 9 deletions(-)

diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index cc7bd58369df..1b552fe54f38 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -2740,9 +2740,9 @@ static struct drm_display_mode *drm_mode_detailed(struct drm_device *dev,
 		return NULL;
 
 	if (quirks & EDID_QUIRK_135_CLOCK_TOO_HIGH)
-		timing->pixel_clock = cpu_to_le16(1088);
-
-	mode->clock = le16_to_cpu(timing->pixel_clock) * 10;
+		mode->clock = 1088 * 10;
+	else
+		mode->clock = le16_to_cpu(timing->pixel_clock) * 10;
 
 	mode->hdisplay = hactive;
 	mode->hsync_start = mode->hdisplay + hsync_offset;
@@ -2763,14 +2763,14 @@ static struct drm_display_mode *drm_mode_detailed(struct drm_device *dev,
 	drm_mode_do_interlace_quirk(mode, pt);
 
 	if (quirks & EDID_QUIRK_DETAILED_SYNC_PP) {
-		pt->misc |= DRM_EDID_PT_HSYNC_POSITIVE | DRM_EDID_PT_VSYNC_POSITIVE;
+		mode->flags |= DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC;
+	} else {
+		mode->flags |= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ?
+			DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC;
+		mode->flags |= (pt->misc & DRM_EDID_PT_VSYNC_POSITIVE) ?
+			DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC;
 	}
 
-	mode->flags |= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ?
-		DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC;
-	mode->flags |= (pt->misc & DRM_EDID_PT_VSYNC_POSITIVE) ?
-		DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC;
-
 set_size:
 	mode->width_mm = pt->width_mm_lo | (pt->width_height_mm_hi & 0xf0) << 4;
 	mode->height_mm = pt->height_mm_lo | (pt->width_height_mm_hi & 0xf) << 8;
-- 
2.30.2

[Intel-gfx] [PATCH v2 01/11] drm/edid: don't modify EDID while parsing

[Jani Nikula]

We'll want to keep the EDID immutable while parsing. Stop modifying the
EDID because of the quirks.

In theory, this does have userspace implications, but the userspace is
supposed to use the modes exposed via KMS API, not by parsing the EDID
directly.

Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/drm_edid.c | 18 +++++++++---------
 1 file changed, 9 insertions(+), 9 deletions(-)

diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index cc7bd58369df..1b552fe54f38 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -2740,9 +2740,9 @@ static struct drm_display_mode *drm_mode_detailed(struct drm_device *dev,
 		return NULL;
 
 	if (quirks & EDID_QUIRK_135_CLOCK_TOO_HIGH)
-		timing->pixel_clock = cpu_to_le16(1088);
-
-	mode->clock = le16_to_cpu(timing->pixel_clock) * 10;
+		mode->clock = 1088 * 10;
+	else
+		mode->clock = le16_to_cpu(timing->pixel_clock) * 10;
 
 	mode->hdisplay = hactive;
 	mode->hsync_start = mode->hdisplay + hsync_offset;
@@ -2763,14 +2763,14 @@ static struct drm_display_mode *drm_mode_detailed(struct drm_device *dev,
 	drm_mode_do_interlace_quirk(mode, pt);
 
 	if (quirks & EDID_QUIRK_DETAILED_SYNC_PP) {
-		pt->misc |= DRM_EDID_PT_HSYNC_POSITIVE | DRM_EDID_PT_VSYNC_POSITIVE;
+		mode->flags |= DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC;
+	} else {
+		mode->flags |= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ?
+			DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC;
+		mode->flags |= (pt->misc & DRM_EDID_PT_VSYNC_POSITIVE) ?
+			DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC;
 	}
 
-	mode->flags |= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ?
-		DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC;
-	mode->flags |= (pt->misc & DRM_EDID_PT_VSYNC_POSITIVE) ?
-		DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC;
-
 set_size:
 	mode->width_mm = pt->width_mm_lo | (pt->width_height_mm_hi & 0xf0) << 4;
 	mode->height_mm = pt->height_mm_lo | (pt->width_height_mm_hi & 0xf) << 8;
-- 
2.30.2

[PATCH v2 02/11] drm/edid: fix reduced blanking support check

[Jani Nikula]

The reduced blanking bit is valid only for CVT, indicated by display
range limits flags 0x04.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/drm_edid.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index 1b552fe54f38..13d05062d68c 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -2408,7 +2408,7 @@ is_rb(struct detailed_timing *t, void *data)
 	if (!is_display_descriptor(r, EDID_DETAIL_MONITOR_RANGE))
 		return;
 
-	if (r[15] & 0x10)
+	if (r[10] == DRM_EDID_CVT_SUPPORT_FLAG && r[15] & 0x10)
 		*(bool *)data = true;
 }
 
-- 
2.30.2

[Intel-gfx] [PATCH v2 02/11] drm/edid: fix reduced blanking support check

[Jani Nikula]

The reduced blanking bit is valid only for CVT, indicated by display
range limits flags 0x04.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/drm_edid.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index 1b552fe54f38..13d05062d68c 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -2408,7 +2408,7 @@ is_rb(struct detailed_timing *t, void *data)
 	if (!is_display_descriptor(r, EDID_DETAIL_MONITOR_RANGE))
 		return;
 
-	if (r[15] & 0x10)
+	if (r[10] == DRM_EDID_CVT_SUPPORT_FLAG && r[15] & 0x10)
 		*(bool *)data = true;
 }
 
-- 
2.30.2

[PATCH v2 03/11] drm/edid: slightly restructure timing and non-timing descriptor structs

[Jani Nikula]

The pixel clock is conceptually part of the detailed timings, while it's
just zero padding for display descriptors. Modify the structures to
reflect this. Rename struct detailed_non_pixel to
edid_display_descriptor to better reflect spec while at it. (Further
struct renames are left for follow-up work.)

Suggested-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c |  6 +++---
 drivers/gpu/drm/drm_edid.c                        | 12 ++++++------
 include/drm/drm_edid.h                            |  9 +++++----
 3 files changed, 14 insertions(+), 13 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index b30656959fd8..e477f4b42b6b 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -11537,7 +11537,7 @@ void amdgpu_dm_update_freesync_caps(struct drm_connector *connector,
 {
 	int i = 0;
 	struct detailed_timing *timing;
-	struct detailed_non_pixel *data;
+	struct edid_display_descriptor *data;
 	struct detailed_data_monitor_range *range;
 	struct amdgpu_dm_connector *amdgpu_dm_connector =
 			to_amdgpu_dm_connector(connector);
@@ -11592,7 +11592,7 @@ void amdgpu_dm_update_freesync_caps(struct drm_connector *connector,
 			for (i = 0; i < 4; i++) {
 
 				timing	= &edid->detailed_timings[i];
-				data	= &timing->data.other_data;
+				data	= &timing->data.descriptor;
 				range	= &data->data.range;
 				/*
 				 * Check if monitor has continuous frequency mode
@@ -11629,7 +11629,7 @@ void amdgpu_dm_update_freesync_caps(struct drm_connector *connector,
 		i = parse_hdmi_amd_vsdb(amdgpu_dm_connector, edid, &vsdb_info);
 		if (i >= 0 && vsdb_info.freesync_supported) {
 			timing  = &edid->detailed_timings[i];
-			data    = &timing->data.other_data;
+			data    = &timing->data.descriptor;
 
 			amdgpu_dm_connector->min_vfreq = vsdb_info.min_refresh_rate_hz;
 			amdgpu_dm_connector->max_vfreq = vsdb_info.max_refresh_rate_hz;
diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index 13d05062d68c..ac80681d64f6 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -2742,7 +2742,7 @@ static struct drm_display_mode *drm_mode_detailed(struct drm_device *dev,
 	if (quirks & EDID_QUIRK_135_CLOCK_TOO_HIGH)
 		mode->clock = 1088 * 10;
 	else
-		mode->clock = le16_to_cpu(timing->pixel_clock) * 10;
+		mode->clock = le16_to_cpu(pt->pixel_clock) * 10;
 
 	mode->hdisplay = hactive;
 	mode->hsync_start = mode->hdisplay + hsync_offset;
@@ -2984,7 +2984,7 @@ static void
 do_inferred_modes(struct detailed_timing *timing, void *c)
 {
 	struct detailed_mode_closure *closure = c;
-	struct detailed_non_pixel *data = &timing->data.other_data;
+	struct edid_display_descriptor *data = &timing->data.descriptor;
 	struct detailed_data_monitor_range *range = &data->data.range;
 
 	if (!is_display_descriptor((const u8 *)timing, EDID_DETAIL_MONITOR_RANGE))
@@ -3117,7 +3117,7 @@ static void
 do_standard_modes(struct detailed_timing *timing, void *c)
 {
 	struct detailed_mode_closure *closure = c;
-	struct detailed_non_pixel *data = &timing->data.other_data;
+	struct edid_display_descriptor *data = &timing->data.descriptor;
 	struct drm_connector *connector = closure->connector;
 	struct edid *edid = closure->edid;
 	int i;
@@ -3187,7 +3187,7 @@ static int drm_cvt_modes(struct drm_connector *connector,
 	for (i = 0; i < 4; i++) {
 		int width, height;
 
-		cvt = &(timing->data.other_data.data.cvt[i]);
+		cvt = &(timing->data.descriptor.data.cvt[i]);
 
 		if (!memcmp(cvt->code, empty, 3))
 			continue;
@@ -4494,7 +4494,7 @@ monitor_name(struct detailed_timing *t, void *data)
 	if (!is_display_descriptor((const u8 *)t, EDID_DETAIL_MONITOR_NAME))
 		return;
 
-	*(u8 **)data = t->data.other_data.data.str.str;
+	*(u8 **)data = t->data.descriptor.data.str.str;
 }
 
 static int get_monitor_name(struct edid *edid, char name[13])
@@ -5223,7 +5223,7 @@ void get_monitor_range(struct detailed_timing *timing,
 		       void *info_monitor_range)
 {
 	struct drm_monitor_range_info *monitor_range = info_monitor_range;
-	const struct detailed_non_pixel *data = &timing->data.other_data;
+	const struct edid_display_descriptor *data = &timing->data.descriptor;
 	const struct detailed_data_monitor_range *range = &data->data.range;
 
 	if (!is_display_descriptor((const u8 *)timing, EDID_DETAIL_MONITOR_RANGE))
diff --git a/include/drm/drm_edid.h b/include/drm/drm_edid.h
index 144c495b99c4..8e322ef173a8 100644
--- a/include/drm/drm_edid.h
+++ b/include/drm/drm_edid.h
@@ -68,6 +68,7 @@ struct std_timing {
 
 /* If detailed data is pixel timing */
 struct detailed_pixel_timing {
+	__le16 pixel_clock; /* non-zero, need to multiply by 10 KHz */
 	u8 hactive_lo;
 	u8 hblank_lo;
 	u8 hactive_hblank_hi;
@@ -142,8 +143,9 @@ struct cvt_timing {
 	u8 code[3];
 } __attribute__((packed));
 
-struct detailed_non_pixel {
-	u8 pad1;
+struct edid_display_descriptor {
+	u16 pad0; /* 0 for Display Descriptor */
+	u8 pad1; /* 0 for Display Descriptor */
 	u8 type; /* ff=serial, fe=string, fd=monitor range, fc=monitor name
 		    fb=color point data, fa=standard timing data,
 		    f9=undefined, f8=mfg. reserved */
@@ -168,10 +170,9 @@ struct detailed_non_pixel {
 #define EDID_DETAIL_MONITOR_SERIAL 0xff
 
 struct detailed_timing {
-	__le16 pixel_clock; /* need to multiply by 10 KHz */
 	union {
 		struct detailed_pixel_timing pixel_data;
-		struct detailed_non_pixel other_data;
+		struct edid_display_descriptor descriptor;
 	} data;
 } __attribute__((packed));
 
-- 
2.30.2

[Intel-gfx] [PATCH v2 03/11] drm/edid: slightly restructure timing and non-timing descriptor structs

[Jani Nikula]

The pixel clock is conceptually part of the detailed timings, while it's
just zero padding for display descriptors. Modify the structures to
reflect this. Rename struct detailed_non_pixel to
edid_display_descriptor to better reflect spec while at it. (Further
struct renames are left for follow-up work.)

Suggested-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c |  6 +++---
 drivers/gpu/drm/drm_edid.c                        | 12 ++++++------
 include/drm/drm_edid.h                            |  9 +++++----
 3 files changed, 14 insertions(+), 13 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index b30656959fd8..e477f4b42b6b 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -11537,7 +11537,7 @@ void amdgpu_dm_update_freesync_caps(struct drm_connector *connector,
 {
 	int i = 0;
 	struct detailed_timing *timing;
-	struct detailed_non_pixel *data;
+	struct edid_display_descriptor *data;
 	struct detailed_data_monitor_range *range;
 	struct amdgpu_dm_connector *amdgpu_dm_connector =
 			to_amdgpu_dm_connector(connector);
@@ -11592,7 +11592,7 @@ void amdgpu_dm_update_freesync_caps(struct drm_connector *connector,
 			for (i = 0; i < 4; i++) {
 
 				timing	= &edid->detailed_timings[i];
-				data	= &timing->data.other_data;
+				data	= &timing->data.descriptor;
 				range	= &data->data.range;
 				/*
 				 * Check if monitor has continuous frequency mode
@@ -11629,7 +11629,7 @@ void amdgpu_dm_update_freesync_caps(struct drm_connector *connector,
 		i = parse_hdmi_amd_vsdb(amdgpu_dm_connector, edid, &vsdb_info);
 		if (i >= 0 && vsdb_info.freesync_supported) {
 			timing  = &edid->detailed_timings[i];
-			data    = &timing->data.other_data;
+			data    = &timing->data.descriptor;
 
 			amdgpu_dm_connector->min_vfreq = vsdb_info.min_refresh_rate_hz;
 			amdgpu_dm_connector->max_vfreq = vsdb_info.max_refresh_rate_hz;
diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index 13d05062d68c..ac80681d64f6 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -2742,7 +2742,7 @@ static struct drm_display_mode *drm_mode_detailed(struct drm_device *dev,
 	if (quirks & EDID_QUIRK_135_CLOCK_TOO_HIGH)
 		mode->clock = 1088 * 10;
 	else
-		mode->clock = le16_to_cpu(timing->pixel_clock) * 10;
+		mode->clock = le16_to_cpu(pt->pixel_clock) * 10;
 
 	mode->hdisplay = hactive;
 	mode->hsync_start = mode->hdisplay + hsync_offset;
@@ -2984,7 +2984,7 @@ static void
 do_inferred_modes(struct detailed_timing *timing, void *c)
 {
 	struct detailed_mode_closure *closure = c;
-	struct detailed_non_pixel *data = &timing->data.other_data;
+	struct edid_display_descriptor *data = &timing->data.descriptor;
 	struct detailed_data_monitor_range *range = &data->data.range;
 
 	if (!is_display_descriptor((const u8 *)timing, EDID_DETAIL_MONITOR_RANGE))
@@ -3117,7 +3117,7 @@ static void
 do_standard_modes(struct detailed_timing *timing, void *c)
 {
 	struct detailed_mode_closure *closure = c;
-	struct detailed_non_pixel *data = &timing->data.other_data;
+	struct edid_display_descriptor *data = &timing->data.descriptor;
 	struct drm_connector *connector = closure->connector;
 	struct edid *edid = closure->edid;
 	int i;
@@ -3187,7 +3187,7 @@ static int drm_cvt_modes(struct drm_connector *connector,
 	for (i = 0; i < 4; i++) {
 		int width, height;
 
-		cvt = &(timing->data.other_data.data.cvt[i]);
+		cvt = &(timing->data.descriptor.data.cvt[i]);
 
 		if (!memcmp(cvt->code, empty, 3))
 			continue;
@@ -4494,7 +4494,7 @@ monitor_name(struct detailed_timing *t, void *data)
 	if (!is_display_descriptor((const u8 *)t, EDID_DETAIL_MONITOR_NAME))
 		return;
 
-	*(u8 **)data = t->data.other_data.data.str.str;
+	*(u8 **)data = t->data.descriptor.data.str.str;
 }
 
 static int get_monitor_name(struct edid *edid, char name[13])
@@ -5223,7 +5223,7 @@ void get_monitor_range(struct detailed_timing *timing,
 		       void *info_monitor_range)
 {
 	struct drm_monitor_range_info *monitor_range = info_monitor_range;
-	const struct detailed_non_pixel *data = &timing->data.other_data;
+	const struct edid_display_descriptor *data = &timing->data.descriptor;
 	const struct detailed_data_monitor_range *range = &data->data.range;
 
 	if (!is_display_descriptor((const u8 *)timing, EDID_DETAIL_MONITOR_RANGE))
diff --git a/include/drm/drm_edid.h b/include/drm/drm_edid.h
index 144c495b99c4..8e322ef173a8 100644
--- a/include/drm/drm_edid.h
+++ b/include/drm/drm_edid.h
@@ -68,6 +68,7 @@ struct std_timing {
 
 /* If detailed data is pixel timing */
 struct detailed_pixel_timing {
+	__le16 pixel_clock; /* non-zero, need to multiply by 10 KHz */
 	u8 hactive_lo;
 	u8 hblank_lo;
 	u8 hactive_hblank_hi;
@@ -142,8 +143,9 @@ struct cvt_timing {
 	u8 code[3];
 } __attribute__((packed));
 
-struct detailed_non_pixel {
-	u8 pad1;
+struct edid_display_descriptor {
+	u16 pad0; /* 0 for Display Descriptor */
+	u8 pad1; /* 0 for Display Descriptor */
 	u8 type; /* ff=serial, fe=string, fd=monitor range, fc=monitor name
 		    fb=color point data, fa=standard timing data,
 		    f9=undefined, f8=mfg. reserved */
@@ -168,10 +170,9 @@ struct detailed_non_pixel {
 #define EDID_DETAIL_MONITOR_SERIAL 0xff
 
 struct detailed_timing {
-	__le16 pixel_clock; /* need to multiply by 10 KHz */
 	union {
 		struct detailed_pixel_timing pixel_data;
-		struct detailed_non_pixel other_data;
+		struct edid_display_descriptor descriptor;
 	} data;
 } __attribute__((packed));
 
-- 
2.30.2

[PATCH v2 04/11] drm/edid: pass a timing pointer to is_display_descriptor()

[Jani Nikula]

Use struct member access instead of direct offsets to avoid lots of
casts all over the place.

Use BUILD_BUG_ON() for sanity check.

Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/drm_edid.c | 27 ++++++++++++++++-----------
 1 file changed, 16 insertions(+), 11 deletions(-)

diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index ac80681d64f6..586b0ed3b3dc 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -2331,10 +2331,15 @@ struct drm_display_mode *drm_mode_find_dmt(struct drm_device *dev,
 }
 EXPORT_SYMBOL(drm_mode_find_dmt);
 
-static bool is_display_descriptor(const u8 d[18], u8 tag)
+static bool is_display_descriptor(const struct detailed_timing *descriptor, u8 tag)
 {
-	return d[0] == 0x00 && d[1] == 0x00 &&
-		d[2] == 0x00 && d[3] == tag;
+	BUILD_BUG_ON(offsetof(typeof(*descriptor), data.descriptor.pad0) != 0);
+	BUILD_BUG_ON(offsetof(typeof(*descriptor), data.descriptor.pad1) != 2);
+	BUILD_BUG_ON(offsetof(typeof(*descriptor), data.descriptor.type) != 3);
+
+	return descriptor->data.descriptor.pad0 == 0 &&
+		descriptor->data.descriptor.pad1 == 0 &&
+		descriptor->data.descriptor.type == tag;
 }
 
 static bool is_detailed_timing_descriptor(const u8 d[18])
@@ -2405,7 +2410,7 @@ is_rb(struct detailed_timing *t, void *data)
 {
 	u8 *r = (u8 *)t;
 
-	if (!is_display_descriptor(r, EDID_DETAIL_MONITOR_RANGE))
+	if (!is_display_descriptor(t, EDID_DETAIL_MONITOR_RANGE))
 		return;
 
 	if (r[10] == DRM_EDID_CVT_SUPPORT_FLAG && r[15] & 0x10)
@@ -2431,7 +2436,7 @@ find_gtf2(struct detailed_timing *t, void *data)
 {
 	u8 *r = (u8 *)t;
 
-	if (!is_display_descriptor(r, EDID_DETAIL_MONITOR_RANGE))
+	if (!is_display_descriptor(t, EDID_DETAIL_MONITOR_RANGE))
 		return;
 
 	if (r[10] == 0x02)
@@ -2987,7 +2992,7 @@ do_inferred_modes(struct detailed_timing *timing, void *c)
 	struct edid_display_descriptor *data = &timing->data.descriptor;
 	struct detailed_data_monitor_range *range = &data->data.range;
 
-	if (!is_display_descriptor((const u8 *)timing, EDID_DETAIL_MONITOR_RANGE))
+	if (!is_display_descriptor(timing, EDID_DETAIL_MONITOR_RANGE))
 		return;
 
 	closure->modes += drm_dmt_modes_for_range(closure->connector,
@@ -3067,7 +3072,7 @@ do_established_modes(struct detailed_timing *timing, void *c)
 {
 	struct detailed_mode_closure *closure = c;
 
-	if (!is_display_descriptor((const u8 *)timing, EDID_DETAIL_EST_TIMINGS))
+	if (!is_display_descriptor(timing, EDID_DETAIL_EST_TIMINGS))
 		return;
 
 	closure->modes += drm_est3_modes(closure->connector, timing);
@@ -3122,7 +3127,7 @@ do_standard_modes(struct detailed_timing *timing, void *c)
 	struct edid *edid = closure->edid;
 	int i;
 
-	if (!is_display_descriptor((const u8 *)timing, EDID_DETAIL_STD_MODES))
+	if (!is_display_descriptor(timing, EDID_DETAIL_STD_MODES))
 		return;
 
 	for (i = 0; i < 6; i++) {
@@ -3231,7 +3236,7 @@ do_cvt_mode(struct detailed_timing *timing, void *c)
 {
 	struct detailed_mode_closure *closure = c;
 
-	if (!is_display_descriptor((const u8 *)timing, EDID_DETAIL_CVT_3BYTE))
+	if (!is_display_descriptor(timing, EDID_DETAIL_CVT_3BYTE))
 		return;
 
 	closure->modes += drm_cvt_modes(closure->connector, timing);
@@ -4491,7 +4496,7 @@ drm_parse_hdmi_vsdb_audio(struct drm_connector *connector, const u8 *db)
 static void
 monitor_name(struct detailed_timing *t, void *data)
 {
-	if (!is_display_descriptor((const u8 *)t, EDID_DETAIL_MONITOR_NAME))
+	if (!is_display_descriptor(t, EDID_DETAIL_MONITOR_NAME))
 		return;
 
 	*(u8 **)data = t->data.descriptor.data.str.str;
@@ -5226,7 +5231,7 @@ void get_monitor_range(struct detailed_timing *timing,
 	const struct edid_display_descriptor *data = &timing->data.descriptor;
 	const struct detailed_data_monitor_range *range = &data->data.range;
 
-	if (!is_display_descriptor((const u8 *)timing, EDID_DETAIL_MONITOR_RANGE))
+	if (!is_display_descriptor(timing, EDID_DETAIL_MONITOR_RANGE))
 		return;
 
 	/*
-- 
2.30.2

[Intel-gfx] [PATCH v2 04/11] drm/edid: pass a timing pointer to is_display_descriptor()

[Jani Nikula]

Use struct member access instead of direct offsets to avoid lots of
casts all over the place.

Use BUILD_BUG_ON() for sanity check.

Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/drm_edid.c | 27 ++++++++++++++++-----------
 1 file changed, 16 insertions(+), 11 deletions(-)

diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index ac80681d64f6..586b0ed3b3dc 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -2331,10 +2331,15 @@ struct drm_display_mode *drm_mode_find_dmt(struct drm_device *dev,
 }
 EXPORT_SYMBOL(drm_mode_find_dmt);
 
-static bool is_display_descriptor(const u8 d[18], u8 tag)
+static bool is_display_descriptor(const struct detailed_timing *descriptor, u8 tag)
 {
-	return d[0] == 0x00 && d[1] == 0x00 &&
-		d[2] == 0x00 && d[3] == tag;
+	BUILD_BUG_ON(offsetof(typeof(*descriptor), data.descriptor.pad0) != 0);
+	BUILD_BUG_ON(offsetof(typeof(*descriptor), data.descriptor.pad1) != 2);
+	BUILD_BUG_ON(offsetof(typeof(*descriptor), data.descriptor.type) != 3);
+
+	return descriptor->data.descriptor.pad0 == 0 &&
+		descriptor->data.descriptor.pad1 == 0 &&
+		descriptor->data.descriptor.type == tag;
 }
 
 static bool is_detailed_timing_descriptor(const u8 d[18])
@@ -2405,7 +2410,7 @@ is_rb(struct detailed_timing *t, void *data)
 {
 	u8 *r = (u8 *)t;
 
-	if (!is_display_descriptor(r, EDID_DETAIL_MONITOR_RANGE))
+	if (!is_display_descriptor(t, EDID_DETAIL_MONITOR_RANGE))
 		return;
 
 	if (r[10] == DRM_EDID_CVT_SUPPORT_FLAG && r[15] & 0x10)
@@ -2431,7 +2436,7 @@ find_gtf2(struct detailed_timing *t, void *data)
 {
 	u8 *r = (u8 *)t;
 
-	if (!is_display_descriptor(r, EDID_DETAIL_MONITOR_RANGE))
+	if (!is_display_descriptor(t, EDID_DETAIL_MONITOR_RANGE))
 		return;
 
 	if (r[10] == 0x02)
@@ -2987,7 +2992,7 @@ do_inferred_modes(struct detailed_timing *timing, void *c)
 	struct edid_display_descriptor *data = &timing->data.descriptor;
 	struct detailed_data_monitor_range *range = &data->data.range;
 
-	if (!is_display_descriptor((const u8 *)timing, EDID_DETAIL_MONITOR_RANGE))
+	if (!is_display_descriptor(timing, EDID_DETAIL_MONITOR_RANGE))
 		return;
 
 	closure->modes += drm_dmt_modes_for_range(closure->connector,
@@ -3067,7 +3072,7 @@ do_established_modes(struct detailed_timing *timing, void *c)
 {
 	struct detailed_mode_closure *closure = c;
 
-	if (!is_display_descriptor((const u8 *)timing, EDID_DETAIL_EST_TIMINGS))
+	if (!is_display_descriptor(timing, EDID_DETAIL_EST_TIMINGS))
 		return;
 
 	closure->modes += drm_est3_modes(closure->connector, timing);
@@ -3122,7 +3127,7 @@ do_standard_modes(struct detailed_timing *timing, void *c)
 	struct edid *edid = closure->edid;
 	int i;
 
-	if (!is_display_descriptor((const u8 *)timing, EDID_DETAIL_STD_MODES))
+	if (!is_display_descriptor(timing, EDID_DETAIL_STD_MODES))
 		return;
 
 	for (i = 0; i < 6; i++) {
@@ -3231,7 +3236,7 @@ do_cvt_mode(struct detailed_timing *timing, void *c)
 {
 	struct detailed_mode_closure *closure = c;
 
-	if (!is_display_descriptor((const u8 *)timing, EDID_DETAIL_CVT_3BYTE))
+	if (!is_display_descriptor(timing, EDID_DETAIL_CVT_3BYTE))
 		return;
 
 	closure->modes += drm_cvt_modes(closure->connector, timing);
@@ -4491,7 +4496,7 @@ drm_parse_hdmi_vsdb_audio(struct drm_connector *connector, const u8 *db)
 static void
 monitor_name(struct detailed_timing *t, void *data)
 {
-	if (!is_display_descriptor((const u8 *)t, EDID_DETAIL_MONITOR_NAME))
+	if (!is_display_descriptor(t, EDID_DETAIL_MONITOR_NAME))
 		return;
 
 	*(u8 **)data = t->data.descriptor.data.str.str;
@@ -5226,7 +5231,7 @@ void get_monitor_range(struct detailed_timing *timing,
 	const struct edid_display_descriptor *data = &timing->data.descriptor;
 	const struct detailed_data_monitor_range *range = &data->data.range;
 
-	if (!is_display_descriptor((const u8 *)timing, EDID_DETAIL_MONITOR_RANGE))
+	if (!is_display_descriptor(timing, EDID_DETAIL_MONITOR_RANGE))
 		return;
 
 	/*
-- 
2.30.2

[PATCH v2 05/11] drm/edid: use struct detailed_timing member access in is_rb()

[Jani Nikula]

Use struct detailed_timing member access instead of direct offsets to
avoid casting.

Use BUILD_BUG_ON() for sanity check.

Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>

---

Note: Why can we use range.formula.cvt.flags directly in is_rb() while
gtf2 functions check for range.flags == 0x02 first to ensure it's gtf2?
---
 drivers/gpu/drm/drm_edid.c | 16 +++++++++++-----
 1 file changed, 11 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index 586b0ed3b3dc..242f074f60d9 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -2406,15 +2406,21 @@ drm_for_each_detailed_block(u8 *raw_edid, detailed_cb *cb, void *closure)
 }
 
 static void
-is_rb(struct detailed_timing *t, void *data)
+is_rb(struct detailed_timing *descriptor, void *data)
 {
-	u8 *r = (u8 *)t;
+	bool *res = data;
 
-	if (!is_display_descriptor(t, EDID_DETAIL_MONITOR_RANGE))
+	if (!is_display_descriptor(descriptor, EDID_DETAIL_MONITOR_RANGE))
 		return;
 
-	if (r[10] == DRM_EDID_CVT_SUPPORT_FLAG && r[15] & 0x10)
-		*(bool *)data = true;
+	BUILD_BUG_ON(offsetof(typeof(*descriptor),
+			      data.descriptor.data.range.flags) != 10);
+	BUILD_BUG_ON(offsetof(typeof(*descriptor),
+			      data.descriptor.data.range.formula.cvt.flags) != 15);
+
+	if (descriptor->data.descriptor.data.range.flags == DRM_EDID_CVT_SUPPORT_FLAG &&
+	    descriptor->data.descriptor.data.range.formula.cvt.flags & 0x10)
+		*res = true;
 }
 
 /* EDID 1.4 defines this explicitly.  For EDID 1.3, we guess, badly. */
-- 
2.30.2

[Intel-gfx] [PATCH v2 05/11] drm/edid: use struct detailed_timing member access in is_rb()

[Jani Nikula]

Use struct detailed_timing member access instead of direct offsets to
avoid casting.

Use BUILD_BUG_ON() for sanity check.

Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>

---

Note: Why can we use range.formula.cvt.flags directly in is_rb() while
gtf2 functions check for range.flags == 0x02 first to ensure it's gtf2?
---
 drivers/gpu/drm/drm_edid.c | 16 +++++++++++-----
 1 file changed, 11 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index 586b0ed3b3dc..242f074f60d9 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -2406,15 +2406,21 @@ drm_for_each_detailed_block(u8 *raw_edid, detailed_cb *cb, void *closure)
 }
 
 static void
-is_rb(struct detailed_timing *t, void *data)
+is_rb(struct detailed_timing *descriptor, void *data)
 {
-	u8 *r = (u8 *)t;
+	bool *res = data;
 
-	if (!is_display_descriptor(t, EDID_DETAIL_MONITOR_RANGE))
+	if (!is_display_descriptor(descriptor, EDID_DETAIL_MONITOR_RANGE))
 		return;
 
-	if (r[10] == DRM_EDID_CVT_SUPPORT_FLAG && r[15] & 0x10)
-		*(bool *)data = true;
+	BUILD_BUG_ON(offsetof(typeof(*descriptor),
+			      data.descriptor.data.range.flags) != 10);
+	BUILD_BUG_ON(offsetof(typeof(*descriptor),
+			      data.descriptor.data.range.formula.cvt.flags) != 15);
+
+	if (descriptor->data.descriptor.data.range.flags == DRM_EDID_CVT_SUPPORT_FLAG &&
+	    descriptor->data.descriptor.data.range.formula.cvt.flags & 0x10)
+		*res = true;
 }
 
 /* EDID 1.4 defines this explicitly.  For EDID 1.3, we guess, badly. */
-- 
2.30.2

[PATCH v2 06/11] drm/edid: use struct detailed_data_monitor_range member access in gtf2 functions

[Jani Nikula]

Use struct struct detailed_data_monitor_range member access instead of
direct offsets to avoid casting.

Use BUILD_BUG_ON() for sanity check.

v2:
- Rename timing to descriptor (Ville)
- Return and use struct detailed_data_monitor_range

Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/drm_edid.c | 63 ++++++++++++++++++++++++++------------
 1 file changed, 43 insertions(+), 20 deletions(-)

diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index 242f074f60d9..4d63f3412672 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -2438,61 +2438,84 @@ drm_monitor_supports_rb(struct edid *edid)
 }
 
 static void
-find_gtf2(struct detailed_timing *t, void *data)
+find_gtf2(struct detailed_timing *descriptor, void *data)
 {
-	u8 *r = (u8 *)t;
+	struct detailed_data_monitor_range **res = data;
 
-	if (!is_display_descriptor(t, EDID_DETAIL_MONITOR_RANGE))
+	if (!is_display_descriptor(descriptor, EDID_DETAIL_MONITOR_RANGE))
 		return;
 
-	if (r[10] == 0x02)
-		*(u8 **)data = r;
+	BUILD_BUG_ON(offsetof(typeof(*descriptor), data.descriptor.data.range.flags) != 10);
+
+	if (descriptor->data.descriptor.data.range.flags ==
+	    DRM_EDID_SECONDARY_GTF_SUPPORT_FLAG)
+		*res = &descriptor->data.descriptor.data.range;
 }
 
 /* Secondary GTF curve kicks in above some break frequency */
 static int
 drm_gtf2_hbreak(struct edid *edid)
 {
-	u8 *r = NULL;
+	struct detailed_data_monitor_range *range = NULL;
+
+	drm_for_each_detailed_block((u8 *)edid, find_gtf2, &range);
 
-	drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
-	return r ? (r[12] * 2) : 0;
+	BUILD_BUG_ON(offsetof(struct detailed_timing, data.descriptor.data.range) +
+		     offsetof(typeof(*range), formula.gtf2.hfreq_start_khz) != 12);
+
+	return range ? range->formula.gtf2.hfreq_start_khz * 2 : 0;
 }
 
 static int
 drm_gtf2_2c(struct edid *edid)
 {
-	u8 *r = NULL;
+	struct detailed_data_monitor_range *range = NULL;
+
+	drm_for_each_detailed_block((u8 *)edid, find_gtf2, &range);
+
+	BUILD_BUG_ON(offsetof(struct detailed_timing, data.descriptor.data.range) +
+		     offsetof(typeof(*range), formula.gtf2.c) != 13);
 
-	drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
-	return r ? r[13] : 0;
+	return range ? range->formula.gtf2.c : 0;
 }
 
 static int
 drm_gtf2_m(struct edid *edid)
 {
-	u8 *r = NULL;
+	struct detailed_data_monitor_range *range = NULL;
 
-	drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
-	return r ? (r[15] << 8) + r[14] : 0;
+	drm_for_each_detailed_block((u8 *)edid, find_gtf2, &range);
+
+	BUILD_BUG_ON(offsetof(struct detailed_timing, data.descriptor.data.range) +
+		     offsetof(typeof(*range), formula.gtf2.m) != 14);
+
+	return range ? le16_to_cpu(range->formula.gtf2.m) : 0;
 }
 
 static int
 drm_gtf2_k(struct edid *edid)
 {
-	u8 *r = NULL;
+	struct detailed_data_monitor_range *range = NULL;
+
+	drm_for_each_detailed_block((u8 *)edid, find_gtf2, &range);
 
-	drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
-	return r ? r[16] : 0;
+	BUILD_BUG_ON(offsetof(struct detailed_timing, data.descriptor.data.range) +
+		     offsetof(typeof(*range), formula.gtf2.k) != 16);
+
+	return range ? range->formula.gtf2.k : 0;
 }
 
 static int
 drm_gtf2_2j(struct edid *edid)
 {
-	u8 *r = NULL;
+	struct detailed_data_monitor_range *range = NULL;
+
+	drm_for_each_detailed_block((u8 *)edid, find_gtf2, &range);
+
+	BUILD_BUG_ON(offsetof(struct detailed_timing, data.descriptor.data.range) +
+		     offsetof(typeof(*range), formula.gtf2.j) != 17);
 
-	drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
-	return r ? r[17] : 0;
+	return range ? range->formula.gtf2.j : 0;
 }
 
 /**
-- 
2.30.2

[Intel-gfx] [PATCH v2 06/11] drm/edid: use struct detailed_data_monitor_range member access in gtf2 functions

[Jani Nikula]

Use struct struct detailed_data_monitor_range member access instead of
direct offsets to avoid casting.

Use BUILD_BUG_ON() for sanity check.

v2:
- Rename timing to descriptor (Ville)
- Return and use struct detailed_data_monitor_range

Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/drm_edid.c | 63 ++++++++++++++++++++++++++------------
 1 file changed, 43 insertions(+), 20 deletions(-)

diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index 242f074f60d9..4d63f3412672 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -2438,61 +2438,84 @@ drm_monitor_supports_rb(struct edid *edid)
 }
 
 static void
-find_gtf2(struct detailed_timing *t, void *data)
+find_gtf2(struct detailed_timing *descriptor, void *data)
 {
-	u8 *r = (u8 *)t;
+	struct detailed_data_monitor_range **res = data;
 
-	if (!is_display_descriptor(t, EDID_DETAIL_MONITOR_RANGE))
+	if (!is_display_descriptor(descriptor, EDID_DETAIL_MONITOR_RANGE))
 		return;
 
-	if (r[10] == 0x02)
-		*(u8 **)data = r;
+	BUILD_BUG_ON(offsetof(typeof(*descriptor), data.descriptor.data.range.flags) != 10);
+
+	if (descriptor->data.descriptor.data.range.flags ==
+	    DRM_EDID_SECONDARY_GTF_SUPPORT_FLAG)
+		*res = &descriptor->data.descriptor.data.range;
 }
 
 /* Secondary GTF curve kicks in above some break frequency */
 static int
 drm_gtf2_hbreak(struct edid *edid)
 {
-	u8 *r = NULL;
+	struct detailed_data_monitor_range *range = NULL;
+
+	drm_for_each_detailed_block((u8 *)edid, find_gtf2, &range);
 
-	drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
-	return r ? (r[12] * 2) : 0;
+	BUILD_BUG_ON(offsetof(struct detailed_timing, data.descriptor.data.range) +
+		     offsetof(typeof(*range), formula.gtf2.hfreq_start_khz) != 12);
+
+	return range ? range->formula.gtf2.hfreq_start_khz * 2 : 0;
 }
 
 static int
 drm_gtf2_2c(struct edid *edid)
 {
-	u8 *r = NULL;
+	struct detailed_data_monitor_range *range = NULL;
+
+	drm_for_each_detailed_block((u8 *)edid, find_gtf2, &range);
+
+	BUILD_BUG_ON(offsetof(struct detailed_timing, data.descriptor.data.range) +
+		     offsetof(typeof(*range), formula.gtf2.c) != 13);
 
-	drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
-	return r ? r[13] : 0;
+	return range ? range->formula.gtf2.c : 0;
 }
 
 static int
 drm_gtf2_m(struct edid *edid)
 {
-	u8 *r = NULL;
+	struct detailed_data_monitor_range *range = NULL;
 
-	drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
-	return r ? (r[15] << 8) + r[14] : 0;
+	drm_for_each_detailed_block((u8 *)edid, find_gtf2, &range);
+
+	BUILD_BUG_ON(offsetof(struct detailed_timing, data.descriptor.data.range) +
+		     offsetof(typeof(*range), formula.gtf2.m) != 14);
+
+	return range ? le16_to_cpu(range->formula.gtf2.m) : 0;
 }
 
 static int
 drm_gtf2_k(struct edid *edid)
 {
-	u8 *r = NULL;
+	struct detailed_data_monitor_range *range = NULL;
+
+	drm_for_each_detailed_block((u8 *)edid, find_gtf2, &range);
 
-	drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
-	return r ? r[16] : 0;
+	BUILD_BUG_ON(offsetof(struct detailed_timing, data.descriptor.data.range) +
+		     offsetof(typeof(*range), formula.gtf2.k) != 16);
+
+	return range ? range->formula.gtf2.k : 0;
 }
 
 static int
 drm_gtf2_2j(struct edid *edid)
 {
-	u8 *r = NULL;
+	struct detailed_data_monitor_range *range = NULL;
+
+	drm_for_each_detailed_block((u8 *)edid, find_gtf2, &range);
+
+	BUILD_BUG_ON(offsetof(struct detailed_timing, data.descriptor.data.range) +
+		     offsetof(typeof(*range), formula.gtf2.j) != 17);
 
-	drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
-	return r ? r[17] : 0;
+	return range ? range->formula.gtf2.j : 0;
 }
 
 /**
-- 
2.30.2

[PATCH v2 07/11] drm/edid: constify struct detailed_timing in lower level parsing

[Jani Nikula]

Start constifying the struct detailed_timing pointers being passed
around from bottom up.

Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/drm_edid.c | 40 +++++++++++++++++++-------------------
 1 file changed, 20 insertions(+), 20 deletions(-)

diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index 4d63f3412672..60eee683be3f 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -2566,7 +2566,7 @@ static int drm_mode_hsync(const struct drm_display_mode *mode)
  */
 static struct drm_display_mode *
 drm_mode_std(struct drm_connector *connector, struct edid *edid,
-	     struct std_timing *t)
+	     const struct std_timing *t)
 {
 	struct drm_device *dev = connector->dev;
 	struct drm_display_mode *m, *mode = NULL;
@@ -2684,7 +2684,7 @@ drm_mode_std(struct drm_connector *connector, struct edid *edid,
  */
 static void
 drm_mode_do_interlace_quirk(struct drm_display_mode *mode,
-			    struct detailed_pixel_timing *pt)
+			    const struct detailed_pixel_timing *pt)
 {
 	int i;
 	static const struct {
@@ -2728,11 +2728,11 @@ drm_mode_do_interlace_quirk(struct drm_display_mode *mode,
  */
 static struct drm_display_mode *drm_mode_detailed(struct drm_device *dev,
 						  struct edid *edid,
-						  struct detailed_timing *timing,
+						  const struct detailed_timing *timing,
 						  u32 quirks)
 {
 	struct drm_display_mode *mode;
-	struct detailed_pixel_timing *pt = &timing->data.pixel_data;
+	const struct detailed_pixel_timing *pt = &timing->data.pixel_data;
 	unsigned hactive = (pt->hactive_hblank_hi & 0xf0) << 4 | pt->hactive_lo;
 	unsigned vactive = (pt->vactive_vblank_hi & 0xf0) << 4 | pt->vactive_lo;
 	unsigned hblank = (pt->hactive_hblank_hi & 0xf) << 8 | pt->hblank_lo;
@@ -2827,7 +2827,7 @@ static struct drm_display_mode *drm_mode_detailed(struct drm_device *dev,
 
 static bool
 mode_in_hsync_range(const struct drm_display_mode *mode,
-		    struct edid *edid, u8 *t)
+		    struct edid *edid, const u8 *t)
 {
 	int hsync, hmin, hmax;
 
@@ -2844,7 +2844,7 @@ mode_in_hsync_range(const struct drm_display_mode *mode,
 
 static bool
 mode_in_vsync_range(const struct drm_display_mode *mode,
-		    struct edid *edid, u8 *t)
+		    struct edid *edid, const u8 *t)
 {
 	int vsync, vmin, vmax;
 
@@ -2860,7 +2860,7 @@ mode_in_vsync_range(const struct drm_display_mode *mode,
 }
 
 static u32
-range_pixel_clock(struct edid *edid, u8 *t)
+range_pixel_clock(struct edid *edid, const u8 *t)
 {
 	/* unspecified */
 	if (t[9] == 0 || t[9] == 255)
@@ -2876,10 +2876,10 @@ range_pixel_clock(struct edid *edid, u8 *t)
 
 static bool
 mode_in_range(const struct drm_display_mode *mode, struct edid *edid,
-	      struct detailed_timing *timing)
+	      const struct detailed_timing *timing)
 {
 	u32 max_clock;
-	u8 *t = (u8 *)timing;
+	const u8 *t = (const u8 *)timing;
 
 	if (!mode_in_hsync_range(mode, edid, t))
 		return false;
@@ -2922,7 +2922,7 @@ static bool valid_inferred_mode(const struct drm_connector *connector,
 
 static int
 drm_dmt_modes_for_range(struct drm_connector *connector, struct edid *edid,
-			struct detailed_timing *timing)
+			const struct detailed_timing *timing)
 {
 	int i, modes = 0;
 	struct drm_display_mode *newmode;
@@ -2957,7 +2957,7 @@ void drm_mode_fixup_1366x768(struct drm_display_mode *mode)
 
 static int
 drm_gtf_modes_for_range(struct drm_connector *connector, struct edid *edid,
-			struct detailed_timing *timing)
+			const struct detailed_timing *timing)
 {
 	int i, modes = 0;
 	struct drm_display_mode *newmode;
@@ -2986,7 +2986,7 @@ drm_gtf_modes_for_range(struct drm_connector *connector, struct edid *edid,
 
 static int
 drm_cvt_modes_for_range(struct drm_connector *connector, struct edid *edid,
-			struct detailed_timing *timing)
+			const struct detailed_timing *timing)
 {
 	int i, modes = 0;
 	struct drm_display_mode *newmode;
@@ -3018,8 +3018,8 @@ static void
 do_inferred_modes(struct detailed_timing *timing, void *c)
 {
 	struct detailed_mode_closure *closure = c;
-	struct edid_display_descriptor *data = &timing->data.descriptor;
-	struct detailed_data_monitor_range *range = &data->data.range;
+	const struct edid_display_descriptor *data = &timing->data.descriptor;
+	const struct detailed_data_monitor_range *range = &data->data.range;
 
 	if (!is_display_descriptor(timing, EDID_DETAIL_MONITOR_RANGE))
 		return;
@@ -3068,11 +3068,11 @@ add_inferred_modes(struct drm_connector *connector, struct edid *edid)
 }
 
 static int
-drm_est3_modes(struct drm_connector *connector, struct detailed_timing *timing)
+drm_est3_modes(struct drm_connector *connector, const struct detailed_timing *timing)
 {
 	int i, j, m, modes = 0;
 	struct drm_display_mode *mode;
-	u8 *est = ((u8 *)timing) + 6;
+	const u8 *est = ((const u8 *)timing) + 6;
 
 	for (i = 0; i < 6; i++) {
 		for (j = 7; j >= 0; j--) {
@@ -3151,7 +3151,7 @@ static void
 do_standard_modes(struct detailed_timing *timing, void *c)
 {
 	struct detailed_mode_closure *closure = c;
-	struct edid_display_descriptor *data = &timing->data.descriptor;
+	const struct edid_display_descriptor *data = &timing->data.descriptor;
 	struct drm_connector *connector = closure->connector;
 	struct edid *edid = closure->edid;
 	int i;
@@ -3160,7 +3160,7 @@ do_standard_modes(struct detailed_timing *timing, void *c)
 		return;
 
 	for (i = 0; i < 6; i++) {
-		struct std_timing *std = &data->data.timings[i];
+		const struct std_timing *std = &data->data.timings[i];
 		struct drm_display_mode *newmode;
 
 		newmode = drm_mode_std(connector, edid, std);
@@ -3209,12 +3209,12 @@ add_standard_modes(struct drm_connector *connector, struct edid *edid)
 }
 
 static int drm_cvt_modes(struct drm_connector *connector,
-			 struct detailed_timing *timing)
+			 const struct detailed_timing *timing)
 {
 	int i, j, modes = 0;
 	struct drm_display_mode *newmode;
 	struct drm_device *dev = connector->dev;
-	struct cvt_timing *cvt;
+	const struct cvt_timing *cvt;
 	const int rates[] = { 60, 85, 75, 60, 50 };
 	const u8 empty[3] = { 0, 0, 0 };
 
-- 
2.30.2

[Intel-gfx] [PATCH v2 07/11] drm/edid: constify struct detailed_timing in lower level parsing

[Jani Nikula]

Start constifying the struct detailed_timing pointers being passed
around from bottom up.

Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/drm_edid.c | 40 +++++++++++++++++++-------------------
 1 file changed, 20 insertions(+), 20 deletions(-)

diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index 4d63f3412672..60eee683be3f 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -2566,7 +2566,7 @@ static int drm_mode_hsync(const struct drm_display_mode *mode)
  */
 static struct drm_display_mode *
 drm_mode_std(struct drm_connector *connector, struct edid *edid,
-	     struct std_timing *t)
+	     const struct std_timing *t)
 {
 	struct drm_device *dev = connector->dev;
 	struct drm_display_mode *m, *mode = NULL;
@@ -2684,7 +2684,7 @@ drm_mode_std(struct drm_connector *connector, struct edid *edid,
  */
 static void
 drm_mode_do_interlace_quirk(struct drm_display_mode *mode,
-			    struct detailed_pixel_timing *pt)
+			    const struct detailed_pixel_timing *pt)
 {
 	int i;
 	static const struct {
@@ -2728,11 +2728,11 @@ drm_mode_do_interlace_quirk(struct drm_display_mode *mode,
  */
 static struct drm_display_mode *drm_mode_detailed(struct drm_device *dev,
 						  struct edid *edid,
-						  struct detailed_timing *timing,
+						  const struct detailed_timing *timing,
 						  u32 quirks)
 {
 	struct drm_display_mode *mode;
-	struct detailed_pixel_timing *pt = &timing->data.pixel_data;
+	const struct detailed_pixel_timing *pt = &timing->data.pixel_data;
 	unsigned hactive = (pt->hactive_hblank_hi & 0xf0) << 4 | pt->hactive_lo;
 	unsigned vactive = (pt->vactive_vblank_hi & 0xf0) << 4 | pt->vactive_lo;
 	unsigned hblank = (pt->hactive_hblank_hi & 0xf) << 8 | pt->hblank_lo;
@@ -2827,7 +2827,7 @@ static struct drm_display_mode *drm_mode_detailed(struct drm_device *dev,
 
 static bool
 mode_in_hsync_range(const struct drm_display_mode *mode,
-		    struct edid *edid, u8 *t)
+		    struct edid *edid, const u8 *t)
 {
 	int hsync, hmin, hmax;
 
@@ -2844,7 +2844,7 @@ mode_in_hsync_range(const struct drm_display_mode *mode,
 
 static bool
 mode_in_vsync_range(const struct drm_display_mode *mode,
-		    struct edid *edid, u8 *t)
+		    struct edid *edid, const u8 *t)
 {
 	int vsync, vmin, vmax;
 
@@ -2860,7 +2860,7 @@ mode_in_vsync_range(const struct drm_display_mode *mode,
 }
 
 static u32
-range_pixel_clock(struct edid *edid, u8 *t)
+range_pixel_clock(struct edid *edid, const u8 *t)
 {
 	/* unspecified */
 	if (t[9] == 0 || t[9] == 255)
@@ -2876,10 +2876,10 @@ range_pixel_clock(struct edid *edid, u8 *t)
 
 static bool
 mode_in_range(const struct drm_display_mode *mode, struct edid *edid,
-	      struct detailed_timing *timing)
+	      const struct detailed_timing *timing)
 {
 	u32 max_clock;
-	u8 *t = (u8 *)timing;
+	const u8 *t = (const u8 *)timing;
 
 	if (!mode_in_hsync_range(mode, edid, t))
 		return false;
@@ -2922,7 +2922,7 @@ static bool valid_inferred_mode(const struct drm_connector *connector,
 
 static int
 drm_dmt_modes_for_range(struct drm_connector *connector, struct edid *edid,
-			struct detailed_timing *timing)
+			const struct detailed_timing *timing)
 {
 	int i, modes = 0;
 	struct drm_display_mode *newmode;
@@ -2957,7 +2957,7 @@ void drm_mode_fixup_1366x768(struct drm_display_mode *mode)
 
 static int
 drm_gtf_modes_for_range(struct drm_connector *connector, struct edid *edid,
-			struct detailed_timing *timing)
+			const struct detailed_timing *timing)
 {
 	int i, modes = 0;
 	struct drm_display_mode *newmode;
@@ -2986,7 +2986,7 @@ drm_gtf_modes_for_range(struct drm_connector *connector, struct edid *edid,
 
 static int
 drm_cvt_modes_for_range(struct drm_connector *connector, struct edid *edid,
-			struct detailed_timing *timing)
+			const struct detailed_timing *timing)
 {
 	int i, modes = 0;
 	struct drm_display_mode *newmode;
@@ -3018,8 +3018,8 @@ static void
 do_inferred_modes(struct detailed_timing *timing, void *c)
 {
 	struct detailed_mode_closure *closure = c;
-	struct edid_display_descriptor *data = &timing->data.descriptor;
-	struct detailed_data_monitor_range *range = &data->data.range;
+	const struct edid_display_descriptor *data = &timing->data.descriptor;
+	const struct detailed_data_monitor_range *range = &data->data.range;
 
 	if (!is_display_descriptor(timing, EDID_DETAIL_MONITOR_RANGE))
 		return;
@@ -3068,11 +3068,11 @@ add_inferred_modes(struct drm_connector *connector, struct edid *edid)
 }
 
 static int
-drm_est3_modes(struct drm_connector *connector, struct detailed_timing *timing)
+drm_est3_modes(struct drm_connector *connector, const struct detailed_timing *timing)
 {
 	int i, j, m, modes = 0;
 	struct drm_display_mode *mode;
-	u8 *est = ((u8 *)timing) + 6;
+	const u8 *est = ((const u8 *)timing) + 6;
 
 	for (i = 0; i < 6; i++) {
 		for (j = 7; j >= 0; j--) {
@@ -3151,7 +3151,7 @@ static void
 do_standard_modes(struct detailed_timing *timing, void *c)
 {
 	struct detailed_mode_closure *closure = c;
-	struct edid_display_descriptor *data = &timing->data.descriptor;
+	const struct edid_display_descriptor *data = &timing->data.descriptor;
 	struct drm_connector *connector = closure->connector;
 	struct edid *edid = closure->edid;
 	int i;
@@ -3160,7 +3160,7 @@ do_standard_modes(struct detailed_timing *timing, void *c)
 		return;
 
 	for (i = 0; i < 6; i++) {
-		struct std_timing *std = &data->data.timings[i];
+		const struct std_timing *std = &data->data.timings[i];
 		struct drm_display_mode *newmode;
 
 		newmode = drm_mode_std(connector, edid, std);
@@ -3209,12 +3209,12 @@ add_standard_modes(struct drm_connector *connector, struct edid *edid)
 }
 
 static int drm_cvt_modes(struct drm_connector *connector,
-			 struct detailed_timing *timing)
+			 const struct detailed_timing *timing)
 {
 	int i, j, modes = 0;
 	struct drm_display_mode *newmode;
 	struct drm_device *dev = connector->dev;
-	struct cvt_timing *cvt;
+	const struct cvt_timing *cvt;
 	const int rates[] = { 60, 85, 75, 60, 50 };
 	const u8 empty[3] = { 0, 0, 0 };
 
-- 
2.30.2

[PATCH v2 08/11] drm/edid: constify struct detailed_timing in parsing callbacks

[Jani Nikula]

Moving one level higher, constify struct detailed_timing pointers in
callbacks.

Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/drm_edid.c | 40 ++++++++++++++++++++------------------
 1 file changed, 21 insertions(+), 19 deletions(-)

diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index 60eee683be3f..95c48485794c 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -2347,7 +2347,7 @@ static bool is_detailed_timing_descriptor(const u8 d[18])
 	return d[0] != 0x00 || d[1] != 0x00;
 }
 
-typedef void detailed_cb(struct detailed_timing *timing, void *closure);
+typedef void detailed_cb(const struct detailed_timing *timing, void *closure);
 
 static void
 cea_for_each_detailed_block(u8 *ext, detailed_cb *cb, void *closure)
@@ -2406,7 +2406,7 @@ drm_for_each_detailed_block(u8 *raw_edid, detailed_cb *cb, void *closure)
 }
 
 static void
-is_rb(struct detailed_timing *descriptor, void *data)
+is_rb(const struct detailed_timing *descriptor, void *data)
 {
 	bool *res = data;
 
@@ -2438,9 +2438,9 @@ drm_monitor_supports_rb(struct edid *edid)
 }
 
 static void
-find_gtf2(struct detailed_timing *descriptor, void *data)
+find_gtf2(const struct detailed_timing *descriptor, void *data)
 {
-	struct detailed_data_monitor_range **res = data;
+	const struct detailed_data_monitor_range **res = data;
 
 	if (!is_display_descriptor(descriptor, EDID_DETAIL_MONITOR_RANGE))
 		return;
@@ -2456,7 +2456,7 @@ find_gtf2(struct detailed_timing *descriptor, void *data)
 static int
 drm_gtf2_hbreak(struct edid *edid)
 {
-	struct detailed_data_monitor_range *range = NULL;
+	const struct detailed_data_monitor_range *range = NULL;
 
 	drm_for_each_detailed_block((u8 *)edid, find_gtf2, &range);
 
@@ -2469,7 +2469,7 @@ drm_gtf2_hbreak(struct edid *edid)
 static int
 drm_gtf2_2c(struct edid *edid)
 {
-	struct detailed_data_monitor_range *range = NULL;
+	const struct detailed_data_monitor_range *range = NULL;
 
 	drm_for_each_detailed_block((u8 *)edid, find_gtf2, &range);
 
@@ -2482,7 +2482,7 @@ drm_gtf2_2c(struct edid *edid)
 static int
 drm_gtf2_m(struct edid *edid)
 {
-	struct detailed_data_monitor_range *range = NULL;
+	const struct detailed_data_monitor_range *range = NULL;
 
 	drm_for_each_detailed_block((u8 *)edid, find_gtf2, &range);
 
@@ -2495,7 +2495,7 @@ drm_gtf2_m(struct edid *edid)
 static int
 drm_gtf2_k(struct edid *edid)
 {
-	struct detailed_data_monitor_range *range = NULL;
+	const struct detailed_data_monitor_range *range = NULL;
 
 	drm_for_each_detailed_block((u8 *)edid, find_gtf2, &range);
 
@@ -2508,7 +2508,7 @@ drm_gtf2_k(struct edid *edid)
 static int
 drm_gtf2_2j(struct edid *edid)
 {
-	struct detailed_data_monitor_range *range = NULL;
+	const struct detailed_data_monitor_range *range = NULL;
 
 	drm_for_each_detailed_block((u8 *)edid, find_gtf2, &range);
 
@@ -3015,7 +3015,7 @@ drm_cvt_modes_for_range(struct drm_connector *connector, struct edid *edid,
 }
 
 static void
-do_inferred_modes(struct detailed_timing *timing, void *c)
+do_inferred_modes(const struct detailed_timing *timing, void *c)
 {
 	struct detailed_mode_closure *closure = c;
 	const struct edid_display_descriptor *data = &timing->data.descriptor;
@@ -3097,7 +3097,7 @@ drm_est3_modes(struct drm_connector *connector, const struct detailed_timing *ti
 }
 
 static void
-do_established_modes(struct detailed_timing *timing, void *c)
+do_established_modes(const struct detailed_timing *timing, void *c)
 {
 	struct detailed_mode_closure *closure = c;
 
@@ -3148,7 +3148,7 @@ add_established_modes(struct drm_connector *connector, struct edid *edid)
 }
 
 static void
-do_standard_modes(struct detailed_timing *timing, void *c)
+do_standard_modes(const struct detailed_timing *timing, void *c)
 {
 	struct detailed_mode_closure *closure = c;
 	const struct edid_display_descriptor *data = &timing->data.descriptor;
@@ -3261,7 +3261,7 @@ static int drm_cvt_modes(struct drm_connector *connector,
 }
 
 static void
-do_cvt_mode(struct detailed_timing *timing, void *c)
+do_cvt_mode(const struct detailed_timing *timing, void *c)
 {
 	struct detailed_mode_closure *closure = c;
 
@@ -3290,7 +3290,7 @@ add_cvt_modes(struct drm_connector *connector, struct edid *edid)
 static void fixup_detailed_cea_mode_clock(struct drm_display_mode *mode);
 
 static void
-do_detailed_mode(struct detailed_timing *timing, void *c)
+do_detailed_mode(const struct detailed_timing *timing, void *c)
 {
 	struct detailed_mode_closure *closure = c;
 	struct drm_display_mode *newmode;
@@ -4523,17 +4523,19 @@ drm_parse_hdmi_vsdb_audio(struct drm_connector *connector, const u8 *db)
 }
 
 static void
-monitor_name(struct detailed_timing *t, void *data)
+monitor_name(const struct detailed_timing *timing, void *data)
 {
-	if (!is_display_descriptor(t, EDID_DETAIL_MONITOR_NAME))
+	const char **res = data;
+
+	if (!is_display_descriptor(timing, EDID_DETAIL_MONITOR_NAME))
 		return;
 
-	*(u8 **)data = t->data.descriptor.data.str.str;
+	*res = timing->data.descriptor.data.str.str;
 }
 
 static int get_monitor_name(struct edid *edid, char name[13])
 {
-	char *edid_name = NULL;
+	const char *edid_name = NULL;
 	int mnl;
 
 	if (!edid || !name)
@@ -5253,7 +5255,7 @@ static void drm_parse_cea_ext(struct drm_connector *connector,
 }
 
 static
-void get_monitor_range(struct detailed_timing *timing,
+void get_monitor_range(const struct detailed_timing *timing,
 		       void *info_monitor_range)
 {
 	struct drm_monitor_range_info *monitor_range = info_monitor_range;
-- 
2.30.2

[Intel-gfx] [PATCH v2 08/11] drm/edid: constify struct detailed_timing in parsing callbacks

[Jani Nikula]

Moving one level higher, constify struct detailed_timing pointers in
callbacks.

Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/drm_edid.c | 40 ++++++++++++++++++++------------------
 1 file changed, 21 insertions(+), 19 deletions(-)

diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index 60eee683be3f..95c48485794c 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -2347,7 +2347,7 @@ static bool is_detailed_timing_descriptor(const u8 d[18])
 	return d[0] != 0x00 || d[1] != 0x00;
 }
 
-typedef void detailed_cb(struct detailed_timing *timing, void *closure);
+typedef void detailed_cb(const struct detailed_timing *timing, void *closure);
 
 static void
 cea_for_each_detailed_block(u8 *ext, detailed_cb *cb, void *closure)
@@ -2406,7 +2406,7 @@ drm_for_each_detailed_block(u8 *raw_edid, detailed_cb *cb, void *closure)
 }
 
 static void
-is_rb(struct detailed_timing *descriptor, void *data)
+is_rb(const struct detailed_timing *descriptor, void *data)
 {
 	bool *res = data;
 
@@ -2438,9 +2438,9 @@ drm_monitor_supports_rb(struct edid *edid)
 }
 
 static void
-find_gtf2(struct detailed_timing *descriptor, void *data)
+find_gtf2(const struct detailed_timing *descriptor, void *data)
 {
-	struct detailed_data_monitor_range **res = data;
+	const struct detailed_data_monitor_range **res = data;
 
 	if (!is_display_descriptor(descriptor, EDID_DETAIL_MONITOR_RANGE))
 		return;
@@ -2456,7 +2456,7 @@ find_gtf2(struct detailed_timing *descriptor, void *data)
 static int
 drm_gtf2_hbreak(struct edid *edid)
 {
-	struct detailed_data_monitor_range *range = NULL;
+	const struct detailed_data_monitor_range *range = NULL;
 
 	drm_for_each_detailed_block((u8 *)edid, find_gtf2, &range);
 
@@ -2469,7 +2469,7 @@ drm_gtf2_hbreak(struct edid *edid)
 static int
 drm_gtf2_2c(struct edid *edid)
 {
-	struct detailed_data_monitor_range *range = NULL;
+	const struct detailed_data_monitor_range *range = NULL;
 
 	drm_for_each_detailed_block((u8 *)edid, find_gtf2, &range);
 
@@ -2482,7 +2482,7 @@ drm_gtf2_2c(struct edid *edid)
 static int
 drm_gtf2_m(struct edid *edid)
 {
-	struct detailed_data_monitor_range *range = NULL;
+	const struct detailed_data_monitor_range *range = NULL;
 
 	drm_for_each_detailed_block((u8 *)edid, find_gtf2, &range);
 
@@ -2495,7 +2495,7 @@ drm_gtf2_m(struct edid *edid)
 static int
 drm_gtf2_k(struct edid *edid)
 {
-	struct detailed_data_monitor_range *range = NULL;
+	const struct detailed_data_monitor_range *range = NULL;
 
 	drm_for_each_detailed_block((u8 *)edid, find_gtf2, &range);
 
@@ -2508,7 +2508,7 @@ drm_gtf2_k(struct edid *edid)
 static int
 drm_gtf2_2j(struct edid *edid)
 {
-	struct detailed_data_monitor_range *range = NULL;
+	const struct detailed_data_monitor_range *range = NULL;
 
 	drm_for_each_detailed_block((u8 *)edid, find_gtf2, &range);
 
@@ -3015,7 +3015,7 @@ drm_cvt_modes_for_range(struct drm_connector *connector, struct edid *edid,
 }
 
 static void
-do_inferred_modes(struct detailed_timing *timing, void *c)
+do_inferred_modes(const struct detailed_timing *timing, void *c)
 {
 	struct detailed_mode_closure *closure = c;
 	const struct edid_display_descriptor *data = &timing->data.descriptor;
@@ -3097,7 +3097,7 @@ drm_est3_modes(struct drm_connector *connector, const struct detailed_timing *ti
 }
 
 static void
-do_established_modes(struct detailed_timing *timing, void *c)
+do_established_modes(const struct detailed_timing *timing, void *c)
 {
 	struct detailed_mode_closure *closure = c;
 
@@ -3148,7 +3148,7 @@ add_established_modes(struct drm_connector *connector, struct edid *edid)
 }
 
 static void
-do_standard_modes(struct detailed_timing *timing, void *c)
+do_standard_modes(const struct detailed_timing *timing, void *c)
 {
 	struct detailed_mode_closure *closure = c;
 	const struct edid_display_descriptor *data = &timing->data.descriptor;
@@ -3261,7 +3261,7 @@ static int drm_cvt_modes(struct drm_connector *connector,
 }
 
 static void
-do_cvt_mode(struct detailed_timing *timing, void *c)
+do_cvt_mode(const struct detailed_timing *timing, void *c)
 {
 	struct detailed_mode_closure *closure = c;
 
@@ -3290,7 +3290,7 @@ add_cvt_modes(struct drm_connector *connector, struct edid *edid)
 static void fixup_detailed_cea_mode_clock(struct drm_display_mode *mode);
 
 static void
-do_detailed_mode(struct detailed_timing *timing, void *c)
+do_detailed_mode(const struct detailed_timing *timing, void *c)
 {
 	struct detailed_mode_closure *closure = c;
 	struct drm_display_mode *newmode;
@@ -4523,17 +4523,19 @@ drm_parse_hdmi_vsdb_audio(struct drm_connector *connector, const u8 *db)
 }
 
 static void
-monitor_name(struct detailed_timing *t, void *data)
+monitor_name(const struct detailed_timing *timing, void *data)
 {
-	if (!is_display_descriptor(t, EDID_DETAIL_MONITOR_NAME))
+	const char **res = data;
+
+	if (!is_display_descriptor(timing, EDID_DETAIL_MONITOR_NAME))
 		return;
 
-	*(u8 **)data = t->data.descriptor.data.str.str;
+	*res = timing->data.descriptor.data.str.str;
 }
 
 static int get_monitor_name(struct edid *edid, char name[13])
 {
-	char *edid_name = NULL;
+	const char *edid_name = NULL;
 	int mnl;
 
 	if (!edid || !name)
@@ -5253,7 +5255,7 @@ static void drm_parse_cea_ext(struct drm_connector *connector,
 }
 
 static
-void get_monitor_range(struct detailed_timing *timing,
+void get_monitor_range(const struct detailed_timing *timing,
 		       void *info_monitor_range)
 {
 	struct drm_monitor_range_info *monitor_range = info_monitor_range;
-- 
2.30.2

[PATCH v2 09/11] drm/edid: constify struct edid passed to detailed blocks

[Jani Nikula]

Constify the first level of struct edid in detailed timing parsing. Also
switch to struct edid instead of u8.

Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/drm_edid.c | 48 ++++++++++++++++++--------------------
 1 file changed, 23 insertions(+), 25 deletions(-)

diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index 95c48485794c..4542f8b8c8f0 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -2350,38 +2350,37 @@ static bool is_detailed_timing_descriptor(const u8 d[18])
 typedef void detailed_cb(const struct detailed_timing *timing, void *closure);
 
 static void
-cea_for_each_detailed_block(u8 *ext, detailed_cb *cb, void *closure)
+cea_for_each_detailed_block(const u8 *ext, detailed_cb *cb, void *closure)
 {
 	int i, n;
 	u8 d = ext[0x02];
-	u8 *det_base = ext + d;
+	const u8 *det_base = ext + d;
 
 	if (d < 4 || d > 127)
 		return;
 
 	n = (127 - d) / 18;
 	for (i = 0; i < n; i++)
-		cb((struct detailed_timing *)(det_base + 18 * i), closure);
+		cb((const struct detailed_timing *)(det_base + 18 * i), closure);
 }
 
 static void
-vtb_for_each_detailed_block(u8 *ext, detailed_cb *cb, void *closure)
+vtb_for_each_detailed_block(const u8 *ext, detailed_cb *cb, void *closure)
 {
 	unsigned int i, n = min((int)ext[0x02], 6);
-	u8 *det_base = ext + 5;
+	const u8 *det_base = ext + 5;
 
 	if (ext[0x01] != 1)
 		return; /* unknown version */
 
 	for (i = 0; i < n; i++)
-		cb((struct detailed_timing *)(det_base + 18 * i), closure);
+		cb((const struct detailed_timing *)(det_base + 18 * i), closure);
 }
 
 static void
-drm_for_each_detailed_block(u8 *raw_edid, detailed_cb *cb, void *closure)
+drm_for_each_detailed_block(const struct edid *edid, detailed_cb *cb, void *closure)
 {
 	int i;
-	struct edid *edid = (struct edid *)raw_edid;
 
 	if (edid == NULL)
 		return;
@@ -2389,8 +2388,8 @@ drm_for_each_detailed_block(u8 *raw_edid, detailed_cb *cb, void *closure)
 	for (i = 0; i < EDID_DETAILED_TIMINGS; i++)
 		cb(&(edid->detailed_timings[i]), closure);
 
-	for (i = 1; i <= raw_edid[0x7e]; i++) {
-		u8 *ext = raw_edid + (i * EDID_LENGTH);
+	for (i = 1; i <= edid->extensions; i++) {
+		const u8 *ext = (const u8 *)edid + (i * EDID_LENGTH);
 
 		switch (*ext) {
 		case CEA_EXT:
@@ -2430,7 +2429,7 @@ drm_monitor_supports_rb(struct edid *edid)
 	if (edid->revision >= 4) {
 		bool ret = false;
 
-		drm_for_each_detailed_block((u8 *)edid, is_rb, &ret);
+		drm_for_each_detailed_block(edid, is_rb, &ret);
 		return ret;
 	}
 
@@ -2458,7 +2457,7 @@ drm_gtf2_hbreak(struct edid *edid)
 {
 	const struct detailed_data_monitor_range *range = NULL;
 
-	drm_for_each_detailed_block((u8 *)edid, find_gtf2, &range);
+	drm_for_each_detailed_block(edid, find_gtf2, &range);
 
 	BUILD_BUG_ON(offsetof(struct detailed_timing, data.descriptor.data.range) +
 		     offsetof(typeof(*range), formula.gtf2.hfreq_start_khz) != 12);
@@ -2471,7 +2470,7 @@ drm_gtf2_2c(struct edid *edid)
 {
 	const struct detailed_data_monitor_range *range = NULL;
 
-	drm_for_each_detailed_block((u8 *)edid, find_gtf2, &range);
+	drm_for_each_detailed_block(edid, find_gtf2, &range);
 
 	BUILD_BUG_ON(offsetof(struct detailed_timing, data.descriptor.data.range) +
 		     offsetof(typeof(*range), formula.gtf2.c) != 13);
@@ -2484,7 +2483,7 @@ drm_gtf2_m(struct edid *edid)
 {
 	const struct detailed_data_monitor_range *range = NULL;
 
-	drm_for_each_detailed_block((u8 *)edid, find_gtf2, &range);
+	drm_for_each_detailed_block(edid, find_gtf2, &range);
 
 	BUILD_BUG_ON(offsetof(struct detailed_timing, data.descriptor.data.range) +
 		     offsetof(typeof(*range), formula.gtf2.m) != 14);
@@ -2497,7 +2496,7 @@ drm_gtf2_k(struct edid *edid)
 {
 	const struct detailed_data_monitor_range *range = NULL;
 
-	drm_for_each_detailed_block((u8 *)edid, find_gtf2, &range);
+	drm_for_each_detailed_block(edid, find_gtf2, &range);
 
 	BUILD_BUG_ON(offsetof(struct detailed_timing, data.descriptor.data.range) +
 		     offsetof(typeof(*range), formula.gtf2.k) != 16);
@@ -2510,7 +2509,7 @@ drm_gtf2_2j(struct edid *edid)
 {
 	const struct detailed_data_monitor_range *range = NULL;
 
-	drm_for_each_detailed_block((u8 *)edid, find_gtf2, &range);
+	drm_for_each_detailed_block(edid, find_gtf2, &range);
 
 	BUILD_BUG_ON(offsetof(struct detailed_timing, data.descriptor.data.range) +
 		     offsetof(typeof(*range), formula.gtf2.j) != 17);
@@ -3061,8 +3060,7 @@ add_inferred_modes(struct drm_connector *connector, struct edid *edid)
 	};
 
 	if (version_greater(edid, 1, 0))
-		drm_for_each_detailed_block((u8 *)edid, do_inferred_modes,
-					    &closure);
+		drm_for_each_detailed_block(edid, do_inferred_modes, &closure);
 
 	return closure.modes;
 }
@@ -3141,8 +3139,8 @@ add_established_modes(struct drm_connector *connector, struct edid *edid)
 	}
 
 	if (version_greater(edid, 1, 0))
-		    drm_for_each_detailed_block((u8 *)edid,
-						do_established_modes, &closure);
+		drm_for_each_detailed_block(edid, do_established_modes,
+					    &closure);
 
 	return modes + closure.modes;
 }
@@ -3200,7 +3198,7 @@ add_standard_modes(struct drm_connector *connector, struct edid *edid)
 	}
 
 	if (version_greater(edid, 1, 0))
-		drm_for_each_detailed_block((u8 *)edid, do_standard_modes,
+		drm_for_each_detailed_block(edid, do_standard_modes,
 					    &closure);
 
 	/* XXX should also look for standard codes in VTB blocks */
@@ -3280,7 +3278,7 @@ add_cvt_modes(struct drm_connector *connector, struct edid *edid)
 	};
 
 	if (version_greater(edid, 1, 2))
-		drm_for_each_detailed_block((u8 *)edid, do_cvt_mode, &closure);
+		drm_for_each_detailed_block(edid, do_cvt_mode, &closure);
 
 	/* XXX should also look for CVT codes in VTB blocks */
 
@@ -3340,7 +3338,7 @@ add_detailed_modes(struct drm_connector *connector, struct edid *edid,
 		closure.preferred =
 		    (edid->features & DRM_EDID_FEATURE_PREFERRED_TIMING);
 
-	drm_for_each_detailed_block((u8 *)edid, do_detailed_mode, &closure);
+	drm_for_each_detailed_block(edid, do_detailed_mode, &closure);
 
 	return closure.modes;
 }
@@ -4541,7 +4539,7 @@ static int get_monitor_name(struct edid *edid, char name[13])
 	if (!edid || !name)
 		return 0;
 
-	drm_for_each_detailed_block((u8 *)edid, monitor_name, &edid_name);
+	drm_for_each_detailed_block(edid, monitor_name, &edid_name);
 	for (mnl = 0; edid_name && mnl < 13; mnl++) {
 		if (edid_name[mnl] == 0x0a)
 			break;
@@ -5287,7 +5285,7 @@ void drm_get_monitor_range(struct drm_connector *connector,
 	if (!version_greater(edid, 1, 1))
 		return;
 
-	drm_for_each_detailed_block((u8 *)edid, get_monitor_range,
+	drm_for_each_detailed_block(edid, get_monitor_range,
 				    &info->monitor_range);
 
 	DRM_DEBUG_KMS("Supported Monitor Refresh rate range is %d Hz - %d Hz\n",
-- 
2.30.2

[Intel-gfx] [PATCH v2 09/11] drm/edid: constify struct edid passed to detailed blocks

[Jani Nikula]

Constify the first level of struct edid in detailed timing parsing. Also
switch to struct edid instead of u8.

Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/drm_edid.c | 48 ++++++++++++++++++--------------------
 1 file changed, 23 insertions(+), 25 deletions(-)

diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index 95c48485794c..4542f8b8c8f0 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -2350,38 +2350,37 @@ static bool is_detailed_timing_descriptor(const u8 d[18])
 typedef void detailed_cb(const struct detailed_timing *timing, void *closure);
 
 static void
-cea_for_each_detailed_block(u8 *ext, detailed_cb *cb, void *closure)
+cea_for_each_detailed_block(const u8 *ext, detailed_cb *cb, void *closure)
 {
 	int i, n;
 	u8 d = ext[0x02];
-	u8 *det_base = ext + d;
+	const u8 *det_base = ext + d;
 
 	if (d < 4 || d > 127)
 		return;
 
 	n = (127 - d) / 18;
 	for (i = 0; i < n; i++)
-		cb((struct detailed_timing *)(det_base + 18 * i), closure);
+		cb((const struct detailed_timing *)(det_base + 18 * i), closure);
 }
 
 static void
-vtb_for_each_detailed_block(u8 *ext, detailed_cb *cb, void *closure)
+vtb_for_each_detailed_block(const u8 *ext, detailed_cb *cb, void *closure)
 {
 	unsigned int i, n = min((int)ext[0x02], 6);
-	u8 *det_base = ext + 5;
+	const u8 *det_base = ext + 5;
 
 	if (ext[0x01] != 1)
 		return; /* unknown version */
 
 	for (i = 0; i < n; i++)
-		cb((struct detailed_timing *)(det_base + 18 * i), closure);
+		cb((const struct detailed_timing *)(det_base + 18 * i), closure);
 }
 
 static void
-drm_for_each_detailed_block(u8 *raw_edid, detailed_cb *cb, void *closure)
+drm_for_each_detailed_block(const struct edid *edid, detailed_cb *cb, void *closure)
 {
 	int i;
-	struct edid *edid = (struct edid *)raw_edid;
 
 	if (edid == NULL)
 		return;
@@ -2389,8 +2388,8 @@ drm_for_each_detailed_block(u8 *raw_edid, detailed_cb *cb, void *closure)
 	for (i = 0; i < EDID_DETAILED_TIMINGS; i++)
 		cb(&(edid->detailed_timings[i]), closure);
 
-	for (i = 1; i <= raw_edid[0x7e]; i++) {
-		u8 *ext = raw_edid + (i * EDID_LENGTH);
+	for (i = 1; i <= edid->extensions; i++) {
+		const u8 *ext = (const u8 *)edid + (i * EDID_LENGTH);
 
 		switch (*ext) {
 		case CEA_EXT:
@@ -2430,7 +2429,7 @@ drm_monitor_supports_rb(struct edid *edid)
 	if (edid->revision >= 4) {
 		bool ret = false;
 
-		drm_for_each_detailed_block((u8 *)edid, is_rb, &ret);
+		drm_for_each_detailed_block(edid, is_rb, &ret);
 		return ret;
 	}
 
@@ -2458,7 +2457,7 @@ drm_gtf2_hbreak(struct edid *edid)
 {
 	const struct detailed_data_monitor_range *range = NULL;
 
-	drm_for_each_detailed_block((u8 *)edid, find_gtf2, &range);
+	drm_for_each_detailed_block(edid, find_gtf2, &range);
 
 	BUILD_BUG_ON(offsetof(struct detailed_timing, data.descriptor.data.range) +
 		     offsetof(typeof(*range), formula.gtf2.hfreq_start_khz) != 12);
@@ -2471,7 +2470,7 @@ drm_gtf2_2c(struct edid *edid)
 {
 	const struct detailed_data_monitor_range *range = NULL;
 
-	drm_for_each_detailed_block((u8 *)edid, find_gtf2, &range);
+	drm_for_each_detailed_block(edid, find_gtf2, &range);
 
 	BUILD_BUG_ON(offsetof(struct detailed_timing, data.descriptor.data.range) +
 		     offsetof(typeof(*range), formula.gtf2.c) != 13);
@@ -2484,7 +2483,7 @@ drm_gtf2_m(struct edid *edid)
 {
 	const struct detailed_data_monitor_range *range = NULL;
 
-	drm_for_each_detailed_block((u8 *)edid, find_gtf2, &range);
+	drm_for_each_detailed_block(edid, find_gtf2, &range);
 
 	BUILD_BUG_ON(offsetof(struct detailed_timing, data.descriptor.data.range) +
 		     offsetof(typeof(*range), formula.gtf2.m) != 14);
@@ -2497,7 +2496,7 @@ drm_gtf2_k(struct edid *edid)
 {
 	const struct detailed_data_monitor_range *range = NULL;
 
-	drm_for_each_detailed_block((u8 *)edid, find_gtf2, &range);
+	drm_for_each_detailed_block(edid, find_gtf2, &range);
 
 	BUILD_BUG_ON(offsetof(struct detailed_timing, data.descriptor.data.range) +
 		     offsetof(typeof(*range), formula.gtf2.k) != 16);
@@ -2510,7 +2509,7 @@ drm_gtf2_2j(struct edid *edid)
 {
 	const struct detailed_data_monitor_range *range = NULL;
 
-	drm_for_each_detailed_block((u8 *)edid, find_gtf2, &range);
+	drm_for_each_detailed_block(edid, find_gtf2, &range);
 
 	BUILD_BUG_ON(offsetof(struct detailed_timing, data.descriptor.data.range) +
 		     offsetof(typeof(*range), formula.gtf2.j) != 17);
@@ -3061,8 +3060,7 @@ add_inferred_modes(struct drm_connector *connector, struct edid *edid)
 	};
 
 	if (version_greater(edid, 1, 0))
-		drm_for_each_detailed_block((u8 *)edid, do_inferred_modes,
-					    &closure);
+		drm_for_each_detailed_block(edid, do_inferred_modes, &closure);
 
 	return closure.modes;
 }
@@ -3141,8 +3139,8 @@ add_established_modes(struct drm_connector *connector, struct edid *edid)
 	}
 
 	if (version_greater(edid, 1, 0))
-		    drm_for_each_detailed_block((u8 *)edid,
-						do_established_modes, &closure);
+		drm_for_each_detailed_block(edid, do_established_modes,
+					    &closure);
 
 	return modes + closure.modes;
 }
@@ -3200,7 +3198,7 @@ add_standard_modes(struct drm_connector *connector, struct edid *edid)
 	}
 
 	if (version_greater(edid, 1, 0))
-		drm_for_each_detailed_block((u8 *)edid, do_standard_modes,
+		drm_for_each_detailed_block(edid, do_standard_modes,
 					    &closure);
 
 	/* XXX should also look for standard codes in VTB blocks */
@@ -3280,7 +3278,7 @@ add_cvt_modes(struct drm_connector *connector, struct edid *edid)
 	};
 
 	if (version_greater(edid, 1, 2))
-		drm_for_each_detailed_block((u8 *)edid, do_cvt_mode, &closure);
+		drm_for_each_detailed_block(edid, do_cvt_mode, &closure);
 
 	/* XXX should also look for CVT codes in VTB blocks */
 
@@ -3340,7 +3338,7 @@ add_detailed_modes(struct drm_connector *connector, struct edid *edid,
 		closure.preferred =
 		    (edid->features & DRM_EDID_FEATURE_PREFERRED_TIMING);
 
-	drm_for_each_detailed_block((u8 *)edid, do_detailed_mode, &closure);
+	drm_for_each_detailed_block(edid, do_detailed_mode, &closure);
 
 	return closure.modes;
 }
@@ -4541,7 +4539,7 @@ static int get_monitor_name(struct edid *edid, char name[13])
 	if (!edid || !name)
 		return 0;
 
-	drm_for_each_detailed_block((u8 *)edid, monitor_name, &edid_name);
+	drm_for_each_detailed_block(edid, monitor_name, &edid_name);
 	for (mnl = 0; edid_name && mnl < 13; mnl++) {
 		if (edid_name[mnl] == 0x0a)
 			break;
@@ -5287,7 +5285,7 @@ void drm_get_monitor_range(struct drm_connector *connector,
 	if (!version_greater(edid, 1, 1))
 		return;
 
-	drm_for_each_detailed_block((u8 *)edid, get_monitor_range,
+	drm_for_each_detailed_block(edid, get_monitor_range,
 				    &info->monitor_range);
 
 	DRM_DEBUG_KMS("Supported Monitor Refresh rate range is %d Hz - %d Hz\n",
-- 
2.30.2

[PATCH v2 10/11] drm/edid: constify struct edid passed around in callbacks and closure

[Jani Nikula]

Finalize detailed timing parsing constness by making struct edid also
const in callbacks and closure.

Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/drm_edid.c | 48 +++++++++++++++++++-------------------
 1 file changed, 24 insertions(+), 24 deletions(-)

diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index 4542f8b8c8f0..0c4b95fb6bd9 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -97,7 +97,7 @@ static int oui(u8 first, u8 second, u8 third)
 
 struct detailed_mode_closure {
 	struct drm_connector *connector;
-	struct edid *edid;
+	const struct edid *edid;
 	bool preferred;
 	u32 quirks;
 	int modes;
@@ -2424,7 +2424,7 @@ is_rb(const struct detailed_timing *descriptor, void *data)
 
 /* EDID 1.4 defines this explicitly.  For EDID 1.3, we guess, badly. */
 static bool
-drm_monitor_supports_rb(struct edid *edid)
+drm_monitor_supports_rb(const struct edid *edid)
 {
 	if (edid->revision >= 4) {
 		bool ret = false;
@@ -2453,7 +2453,7 @@ find_gtf2(const struct detailed_timing *descriptor, void *data)
 
 /* Secondary GTF curve kicks in above some break frequency */
 static int
-drm_gtf2_hbreak(struct edid *edid)
+drm_gtf2_hbreak(const struct edid *edid)
 {
 	const struct detailed_data_monitor_range *range = NULL;
 
@@ -2466,7 +2466,7 @@ drm_gtf2_hbreak(struct edid *edid)
 }
 
 static int
-drm_gtf2_2c(struct edid *edid)
+drm_gtf2_2c(const struct edid *edid)
 {
 	const struct detailed_data_monitor_range *range = NULL;
 
@@ -2479,7 +2479,7 @@ drm_gtf2_2c(struct edid *edid)
 }
 
 static int
-drm_gtf2_m(struct edid *edid)
+drm_gtf2_m(const struct edid *edid)
 {
 	const struct detailed_data_monitor_range *range = NULL;
 
@@ -2492,7 +2492,7 @@ drm_gtf2_m(struct edid *edid)
 }
 
 static int
-drm_gtf2_k(struct edid *edid)
+drm_gtf2_k(const struct edid *edid)
 {
 	const struct detailed_data_monitor_range *range = NULL;
 
@@ -2505,7 +2505,7 @@ drm_gtf2_k(struct edid *edid)
 }
 
 static int
-drm_gtf2_2j(struct edid *edid)
+drm_gtf2_2j(const struct edid *edid)
 {
 	const struct detailed_data_monitor_range *range = NULL;
 
@@ -2521,7 +2521,7 @@ drm_gtf2_2j(struct edid *edid)
  * standard_timing_level - get std. timing level(CVT/GTF/DMT)
  * @edid: EDID block to scan
  */
-static int standard_timing_level(struct edid *edid)
+static int standard_timing_level(const struct edid *edid)
 {
 	if (edid->revision >= 2) {
 		if (edid->revision >= 4 && (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF))
@@ -2564,7 +2564,7 @@ static int drm_mode_hsync(const struct drm_display_mode *mode)
  * and convert them into a real mode using CVT/GTF/DMT.
  */
 static struct drm_display_mode *
-drm_mode_std(struct drm_connector *connector, struct edid *edid,
+drm_mode_std(struct drm_connector *connector, const struct edid *edid,
 	     const struct std_timing *t)
 {
 	struct drm_device *dev = connector->dev;
@@ -2726,7 +2726,7 @@ drm_mode_do_interlace_quirk(struct drm_display_mode *mode,
  * return a new struct drm_display_mode.
  */
 static struct drm_display_mode *drm_mode_detailed(struct drm_device *dev,
-						  struct edid *edid,
+						  const struct edid *edid,
 						  const struct detailed_timing *timing,
 						  u32 quirks)
 {
@@ -2826,7 +2826,7 @@ static struct drm_display_mode *drm_mode_detailed(struct drm_device *dev,
 
 static bool
 mode_in_hsync_range(const struct drm_display_mode *mode,
-		    struct edid *edid, const u8 *t)
+		    const struct edid *edid, const u8 *t)
 {
 	int hsync, hmin, hmax;
 
@@ -2843,7 +2843,7 @@ mode_in_hsync_range(const struct drm_display_mode *mode,
 
 static bool
 mode_in_vsync_range(const struct drm_display_mode *mode,
-		    struct edid *edid, const u8 *t)
+		    const struct edid *edid, const u8 *t)
 {
 	int vsync, vmin, vmax;
 
@@ -2859,7 +2859,7 @@ mode_in_vsync_range(const struct drm_display_mode *mode,
 }
 
 static u32
-range_pixel_clock(struct edid *edid, const u8 *t)
+range_pixel_clock(const struct edid *edid, const u8 *t)
 {
 	/* unspecified */
 	if (t[9] == 0 || t[9] == 255)
@@ -2874,7 +2874,7 @@ range_pixel_clock(struct edid *edid, const u8 *t)
 }
 
 static bool
-mode_in_range(const struct drm_display_mode *mode, struct edid *edid,
+mode_in_range(const struct drm_display_mode *mode, const struct edid *edid,
 	      const struct detailed_timing *timing)
 {
 	u32 max_clock;
@@ -2920,7 +2920,7 @@ static bool valid_inferred_mode(const struct drm_connector *connector,
 }
 
 static int
-drm_dmt_modes_for_range(struct drm_connector *connector, struct edid *edid,
+drm_dmt_modes_for_range(struct drm_connector *connector, const struct edid *edid,
 			const struct detailed_timing *timing)
 {
 	int i, modes = 0;
@@ -2955,7 +2955,7 @@ void drm_mode_fixup_1366x768(struct drm_display_mode *mode)
 }
 
 static int
-drm_gtf_modes_for_range(struct drm_connector *connector, struct edid *edid,
+drm_gtf_modes_for_range(struct drm_connector *connector, const struct edid *edid,
 			const struct detailed_timing *timing)
 {
 	int i, modes = 0;
@@ -2984,7 +2984,7 @@ drm_gtf_modes_for_range(struct drm_connector *connector, struct edid *edid,
 }
 
 static int
-drm_cvt_modes_for_range(struct drm_connector *connector, struct edid *edid,
+drm_cvt_modes_for_range(struct drm_connector *connector, const struct edid *edid,
 			const struct detailed_timing *timing)
 {
 	int i, modes = 0;
@@ -3052,7 +3052,7 @@ do_inferred_modes(const struct detailed_timing *timing, void *c)
 }
 
 static int
-add_inferred_modes(struct drm_connector *connector, struct edid *edid)
+add_inferred_modes(struct drm_connector *connector, const struct edid *edid)
 {
 	struct detailed_mode_closure closure = {
 		.connector = connector,
@@ -3114,7 +3114,7 @@ do_established_modes(const struct detailed_timing *timing, void *c)
  * (defined above).  Tease them out and add them to the global modes list.
  */
 static int
-add_established_modes(struct drm_connector *connector, struct edid *edid)
+add_established_modes(struct drm_connector *connector, const struct edid *edid)
 {
 	struct drm_device *dev = connector->dev;
 	unsigned long est_bits = edid->established_timings.t1 |
@@ -3151,7 +3151,7 @@ do_standard_modes(const struct detailed_timing *timing, void *c)
 	struct detailed_mode_closure *closure = c;
 	const struct edid_display_descriptor *data = &timing->data.descriptor;
 	struct drm_connector *connector = closure->connector;
-	struct edid *edid = closure->edid;
+	const struct edid *edid = closure->edid;
 	int i;
 
 	if (!is_display_descriptor(timing, EDID_DETAIL_STD_MODES))
@@ -3178,7 +3178,7 @@ do_standard_modes(const struct detailed_timing *timing, void *c)
  * GTF or CVT. Grab them from @edid and add them to the list.
  */
 static int
-add_standard_modes(struct drm_connector *connector, struct edid *edid)
+add_standard_modes(struct drm_connector *connector, const struct edid *edid)
 {
 	int i, modes = 0;
 	struct detailed_mode_closure closure = {
@@ -3270,7 +3270,7 @@ do_cvt_mode(const struct detailed_timing *timing, void *c)
 }
 
 static int
-add_cvt_modes(struct drm_connector *connector, struct edid *edid)
+add_cvt_modes(struct drm_connector *connector, const struct edid *edid)
 {
 	struct detailed_mode_closure closure = {
 		.connector = connector,
@@ -3324,7 +3324,7 @@ do_detailed_mode(const struct detailed_timing *timing, void *c)
  * @quirks: quirks to apply
  */
 static int
-add_detailed_modes(struct drm_connector *connector, struct edid *edid,
+add_detailed_modes(struct drm_connector *connector, const struct edid *edid,
 		   u32 quirks)
 {
 	struct detailed_mode_closure closure = {
@@ -4531,7 +4531,7 @@ monitor_name(const struct detailed_timing *timing, void *data)
 	*res = timing->data.descriptor.data.str.str;
 }
 
-static int get_monitor_name(struct edid *edid, char name[13])
+static int get_monitor_name(const struct edid *edid, char name[13])
 {
 	const char *edid_name = NULL;
 	int mnl;
-- 
2.30.2

[Intel-gfx] [PATCH v2 10/11] drm/edid: constify struct edid passed around in callbacks and closure

[Jani Nikula]

Finalize detailed timing parsing constness by making struct edid also
const in callbacks and closure.

Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/drm_edid.c | 48 +++++++++++++++++++-------------------
 1 file changed, 24 insertions(+), 24 deletions(-)

diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index 4542f8b8c8f0..0c4b95fb6bd9 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -97,7 +97,7 @@ static int oui(u8 first, u8 second, u8 third)
 
 struct detailed_mode_closure {
 	struct drm_connector *connector;
-	struct edid *edid;
+	const struct edid *edid;
 	bool preferred;
 	u32 quirks;
 	int modes;
@@ -2424,7 +2424,7 @@ is_rb(const struct detailed_timing *descriptor, void *data)
 
 /* EDID 1.4 defines this explicitly.  For EDID 1.3, we guess, badly. */
 static bool
-drm_monitor_supports_rb(struct edid *edid)
+drm_monitor_supports_rb(const struct edid *edid)
 {
 	if (edid->revision >= 4) {
 		bool ret = false;
@@ -2453,7 +2453,7 @@ find_gtf2(const struct detailed_timing *descriptor, void *data)
 
 /* Secondary GTF curve kicks in above some break frequency */
 static int
-drm_gtf2_hbreak(struct edid *edid)
+drm_gtf2_hbreak(const struct edid *edid)
 {
 	const struct detailed_data_monitor_range *range = NULL;
 
@@ -2466,7 +2466,7 @@ drm_gtf2_hbreak(struct edid *edid)
 }
 
 static int
-drm_gtf2_2c(struct edid *edid)
+drm_gtf2_2c(const struct edid *edid)
 {
 	const struct detailed_data_monitor_range *range = NULL;
 
@@ -2479,7 +2479,7 @@ drm_gtf2_2c(struct edid *edid)
 }
 
 static int
-drm_gtf2_m(struct edid *edid)
+drm_gtf2_m(const struct edid *edid)
 {
 	const struct detailed_data_monitor_range *range = NULL;
 
@@ -2492,7 +2492,7 @@ drm_gtf2_m(struct edid *edid)
 }
 
 static int
-drm_gtf2_k(struct edid *edid)
+drm_gtf2_k(const struct edid *edid)
 {
 	const struct detailed_data_monitor_range *range = NULL;
 
@@ -2505,7 +2505,7 @@ drm_gtf2_k(struct edid *edid)
 }
 
 static int
-drm_gtf2_2j(struct edid *edid)
+drm_gtf2_2j(const struct edid *edid)
 {
 	const struct detailed_data_monitor_range *range = NULL;
 
@@ -2521,7 +2521,7 @@ drm_gtf2_2j(struct edid *edid)
  * standard_timing_level - get std. timing level(CVT/GTF/DMT)
  * @edid: EDID block to scan
  */
-static int standard_timing_level(struct edid *edid)
+static int standard_timing_level(const struct edid *edid)
 {
 	if (edid->revision >= 2) {
 		if (edid->revision >= 4 && (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF))
@@ -2564,7 +2564,7 @@ static int drm_mode_hsync(const struct drm_display_mode *mode)
  * and convert them into a real mode using CVT/GTF/DMT.
  */
 static struct drm_display_mode *
-drm_mode_std(struct drm_connector *connector, struct edid *edid,
+drm_mode_std(struct drm_connector *connector, const struct edid *edid,
 	     const struct std_timing *t)
 {
 	struct drm_device *dev = connector->dev;
@@ -2726,7 +2726,7 @@ drm_mode_do_interlace_quirk(struct drm_display_mode *mode,
  * return a new struct drm_display_mode.
  */
 static struct drm_display_mode *drm_mode_detailed(struct drm_device *dev,
-						  struct edid *edid,
+						  const struct edid *edid,
 						  const struct detailed_timing *timing,
 						  u32 quirks)
 {
@@ -2826,7 +2826,7 @@ static struct drm_display_mode *drm_mode_detailed(struct drm_device *dev,
 
 static bool
 mode_in_hsync_range(const struct drm_display_mode *mode,
-		    struct edid *edid, const u8 *t)
+		    const struct edid *edid, const u8 *t)
 {
 	int hsync, hmin, hmax;
 
@@ -2843,7 +2843,7 @@ mode_in_hsync_range(const struct drm_display_mode *mode,
 
 static bool
 mode_in_vsync_range(const struct drm_display_mode *mode,
-		    struct edid *edid, const u8 *t)
+		    const struct edid *edid, const u8 *t)
 {
 	int vsync, vmin, vmax;
 
@@ -2859,7 +2859,7 @@ mode_in_vsync_range(const struct drm_display_mode *mode,
 }
 
 static u32
-range_pixel_clock(struct edid *edid, const u8 *t)
+range_pixel_clock(const struct edid *edid, const u8 *t)
 {
 	/* unspecified */
 	if (t[9] == 0 || t[9] == 255)
@@ -2874,7 +2874,7 @@ range_pixel_clock(struct edid *edid, const u8 *t)
 }
 
 static bool
-mode_in_range(const struct drm_display_mode *mode, struct edid *edid,
+mode_in_range(const struct drm_display_mode *mode, const struct edid *edid,
 	      const struct detailed_timing *timing)
 {
 	u32 max_clock;
@@ -2920,7 +2920,7 @@ static bool valid_inferred_mode(const struct drm_connector *connector,
 }
 
 static int
-drm_dmt_modes_for_range(struct drm_connector *connector, struct edid *edid,
+drm_dmt_modes_for_range(struct drm_connector *connector, const struct edid *edid,
 			const struct detailed_timing *timing)
 {
 	int i, modes = 0;
@@ -2955,7 +2955,7 @@ void drm_mode_fixup_1366x768(struct drm_display_mode *mode)
 }
 
 static int
-drm_gtf_modes_for_range(struct drm_connector *connector, struct edid *edid,
+drm_gtf_modes_for_range(struct drm_connector *connector, const struct edid *edid,
 			const struct detailed_timing *timing)
 {
 	int i, modes = 0;
@@ -2984,7 +2984,7 @@ drm_gtf_modes_for_range(struct drm_connector *connector, struct edid *edid,
 }
 
 static int
-drm_cvt_modes_for_range(struct drm_connector *connector, struct edid *edid,
+drm_cvt_modes_for_range(struct drm_connector *connector, const struct edid *edid,
 			const struct detailed_timing *timing)
 {
 	int i, modes = 0;
@@ -3052,7 +3052,7 @@ do_inferred_modes(const struct detailed_timing *timing, void *c)
 }
 
 static int
-add_inferred_modes(struct drm_connector *connector, struct edid *edid)
+add_inferred_modes(struct drm_connector *connector, const struct edid *edid)
 {
 	struct detailed_mode_closure closure = {
 		.connector = connector,
@@ -3114,7 +3114,7 @@ do_established_modes(const struct detailed_timing *timing, void *c)
  * (defined above).  Tease them out and add them to the global modes list.
  */
 static int
-add_established_modes(struct drm_connector *connector, struct edid *edid)
+add_established_modes(struct drm_connector *connector, const struct edid *edid)
 {
 	struct drm_device *dev = connector->dev;
 	unsigned long est_bits = edid->established_timings.t1 |
@@ -3151,7 +3151,7 @@ do_standard_modes(const struct detailed_timing *timing, void *c)
 	struct detailed_mode_closure *closure = c;
 	const struct edid_display_descriptor *data = &timing->data.descriptor;
 	struct drm_connector *connector = closure->connector;
-	struct edid *edid = closure->edid;
+	const struct edid *edid = closure->edid;
 	int i;
 
 	if (!is_display_descriptor(timing, EDID_DETAIL_STD_MODES))
@@ -3178,7 +3178,7 @@ do_standard_modes(const struct detailed_timing *timing, void *c)
  * GTF or CVT. Grab them from @edid and add them to the list.
  */
 static int
-add_standard_modes(struct drm_connector *connector, struct edid *edid)
+add_standard_modes(struct drm_connector *connector, const struct edid *edid)
 {
 	int i, modes = 0;
 	struct detailed_mode_closure closure = {
@@ -3270,7 +3270,7 @@ do_cvt_mode(const struct detailed_timing *timing, void *c)
 }
 
 static int
-add_cvt_modes(struct drm_connector *connector, struct edid *edid)
+add_cvt_modes(struct drm_connector *connector, const struct edid *edid)
 {
 	struct detailed_mode_closure closure = {
 		.connector = connector,
@@ -3324,7 +3324,7 @@ do_detailed_mode(const struct detailed_timing *timing, void *c)
  * @quirks: quirks to apply
  */
 static int
-add_detailed_modes(struct drm_connector *connector, struct edid *edid,
+add_detailed_modes(struct drm_connector *connector, const struct edid *edid,
 		   u32 quirks)
 {
 	struct detailed_mode_closure closure = {
@@ -4531,7 +4531,7 @@ monitor_name(const struct detailed_timing *timing, void *data)
 	*res = timing->data.descriptor.data.str.str;
 }
 
-static int get_monitor_name(struct edid *edid, char name[13])
+static int get_monitor_name(const struct edid *edid, char name[13])
 {
 	const char *edid_name = NULL;
 	int mnl;
-- 
2.30.2

[PATCH v2 11/11] drm/edid: add more general struct edid constness in the interfaces

[Jani Nikula]

With this, the remaining non-const parts are the ones that actually
modify the EDID, for example to fix corrupt EDID.

Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/drm_edid.c | 21 +++++++++++----------
 include/drm/drm_edid.h     | 10 +++++-----
 2 files changed, 16 insertions(+), 15 deletions(-)

diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index 0c4b95fb6bd9..114ccc712c71 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -2150,7 +2150,7 @@ static u32 edid_extract_panel_id(const struct edid *edid)
 
 u32 drm_edid_get_panel_id(struct i2c_adapter *adapter)
 {
-	struct edid *edid;
+	const struct edid *edid;
 	u32 panel_id;
 
 	edid = drm_do_get_edid_base_block(NULL, drm_do_probe_ddc_edid, adapter);
@@ -3670,7 +3670,7 @@ static bool drm_valid_hdmi_vic(u8 vic)
 }
 
 static int
-add_alternate_cea_modes(struct drm_connector *connector, struct edid *edid)
+add_alternate_cea_modes(struct drm_connector *connector, const struct edid *edid)
 {
 	struct drm_device *dev = connector->dev;
 	struct drm_display_mode *mode, *tmp;
@@ -4351,7 +4351,7 @@ static void drm_parse_y420cmdb_bitmap(struct drm_connector *connector,
 }
 
 static int
-add_cea_modes(struct drm_connector *connector, struct edid *edid)
+add_cea_modes(struct drm_connector *connector, const struct edid *edid)
 {
 	const u8 *cea = drm_find_cea_extension(edid);
 	const u8 *db, *hdmi = NULL, *video = NULL;
@@ -4557,7 +4557,7 @@ static int get_monitor_name(const struct edid *edid, char name[13])
  * @bufsize: The size of the name buffer (should be at least 14 chars.)
  *
  */
-void drm_edid_get_monitor_name(struct edid *edid, char *name, int bufsize)
+void drm_edid_get_monitor_name(const struct edid *edid, char *name, int bufsize)
 {
 	int name_length;
 	char buf[13];
@@ -4591,7 +4591,8 @@ static void clear_eld(struct drm_connector *connector)
  * Fill the ELD (EDID-Like Data) buffer for passing to the audio driver. The
  * HDCP and Port_ID ELD fields are left for the graphics driver to fill in.
  */
-static void drm_edid_to_eld(struct drm_connector *connector, struct edid *edid)
+static void drm_edid_to_eld(struct drm_connector *connector,
+			    const struct edid *edid)
 {
 	uint8_t *eld = connector->eld;
 	const u8 *cea;
@@ -4687,7 +4688,7 @@ static void drm_edid_to_eld(struct drm_connector *connector, struct edid *edid)
  *
  * Return: The number of found SADs or negative number on error.
  */
-int drm_edid_to_sad(struct edid *edid, struct cea_sad **sads)
+int drm_edid_to_sad(const struct edid *edid, struct cea_sad **sads)
 {
 	int count = 0;
 	int i, start, end, dbl;
@@ -4749,7 +4750,7 @@ EXPORT_SYMBOL(drm_edid_to_sad);
  * Return: The number of found Speaker Allocation Blocks or negative number on
  * error.
  */
-int drm_edid_to_speaker_allocation(struct edid *edid, u8 **sadb)
+int drm_edid_to_speaker_allocation(const struct edid *edid, u8 **sadb)
 {
 	int count = 0;
 	int i, start, end, dbl;
@@ -4844,7 +4845,7 @@ EXPORT_SYMBOL(drm_av_sync_delay);
  *
  * Return: True if the monitor is HDMI, false if not or unknown.
  */
-bool drm_detect_hdmi_monitor(struct edid *edid)
+bool drm_detect_hdmi_monitor(const struct edid *edid)
 {
 	const u8 *edid_ext;
 	int i;
@@ -4882,7 +4883,7 @@ EXPORT_SYMBOL(drm_detect_hdmi_monitor);
  *
  * Return: True if the monitor supports audio, false otherwise.
  */
-bool drm_detect_monitor_audio(struct edid *edid)
+bool drm_detect_monitor_audio(const struct edid *edid)
 {
 	const u8 *edid_ext;
 	int i, j;
@@ -5549,7 +5550,7 @@ static int add_displayid_detailed_1_modes(struct drm_connector *connector,
 }
 
 static int add_displayid_detailed_modes(struct drm_connector *connector,
-					struct edid *edid)
+					const struct edid *edid)
 {
 	const struct displayid_block *block;
 	struct displayid_iter iter;
diff --git a/include/drm/drm_edid.h b/include/drm/drm_edid.h
index 8e322ef173a8..5fe6e302a81f 100644
--- a/include/drm/drm_edid.h
+++ b/include/drm/drm_edid.h
@@ -373,8 +373,8 @@ struct drm_connector;
 struct drm_connector_state;
 struct drm_display_mode;
 
-int drm_edid_to_sad(struct edid *edid, struct cea_sad **sads);
-int drm_edid_to_speaker_allocation(struct edid *edid, u8 **sadb);
+int drm_edid_to_sad(const struct edid *edid, struct cea_sad **sads);
+int drm_edid_to_speaker_allocation(const struct edid *edid, u8 **sadb);
 int drm_av_sync_delay(struct drm_connector *connector,
 		      const struct drm_display_mode *mode);
 
@@ -570,8 +570,8 @@ int drm_add_edid_modes(struct drm_connector *connector, struct edid *edid);
 int drm_add_override_edid_modes(struct drm_connector *connector);
 
 u8 drm_match_cea_mode(const struct drm_display_mode *to_match);
-bool drm_detect_hdmi_monitor(struct edid *edid);
-bool drm_detect_monitor_audio(struct edid *edid);
+bool drm_detect_hdmi_monitor(const struct edid *edid);
+bool drm_detect_monitor_audio(const struct edid *edid);
 enum hdmi_quantization_range
 drm_default_rgb_quant_range(const struct drm_display_mode *mode);
 int drm_add_modes_noedid(struct drm_connector *connector,
@@ -583,7 +583,7 @@ int drm_edid_header_is_valid(const u8 *raw_edid);
 bool drm_edid_block_valid(u8 *raw_edid, int block, bool print_bad_edid,
 			  bool *edid_corrupt);
 bool drm_edid_is_valid(struct edid *edid);
-void drm_edid_get_monitor_name(struct edid *edid, char *name,
+void drm_edid_get_monitor_name(const struct edid *edid, char *name,
 			       int buflen);
 struct drm_display_mode *drm_mode_find_dmt(struct drm_device *dev,
 					   int hsize, int vsize, int fresh,
-- 
2.30.2

[Intel-gfx] [PATCH v2 11/11] drm/edid: add more general struct edid constness in the interfaces

[Jani Nikula]

With this, the remaining non-const parts are the ones that actually
modify the EDID, for example to fix corrupt EDID.

Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/drm_edid.c | 21 +++++++++++----------
 include/drm/drm_edid.h     | 10 +++++-----
 2 files changed, 16 insertions(+), 15 deletions(-)

diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index 0c4b95fb6bd9..114ccc712c71 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -2150,7 +2150,7 @@ static u32 edid_extract_panel_id(const struct edid *edid)
 
 u32 drm_edid_get_panel_id(struct i2c_adapter *adapter)
 {
-	struct edid *edid;
+	const struct edid *edid;
 	u32 panel_id;
 
 	edid = drm_do_get_edid_base_block(NULL, drm_do_probe_ddc_edid, adapter);
@@ -3670,7 +3670,7 @@ static bool drm_valid_hdmi_vic(u8 vic)
 }
 
 static int
-add_alternate_cea_modes(struct drm_connector *connector, struct edid *edid)
+add_alternate_cea_modes(struct drm_connector *connector, const struct edid *edid)
 {
 	struct drm_device *dev = connector->dev;
 	struct drm_display_mode *mode, *tmp;
@@ -4351,7 +4351,7 @@ static void drm_parse_y420cmdb_bitmap(struct drm_connector *connector,
 }
 
 static int
-add_cea_modes(struct drm_connector *connector, struct edid *edid)
+add_cea_modes(struct drm_connector *connector, const struct edid *edid)
 {
 	const u8 *cea = drm_find_cea_extension(edid);
 	const u8 *db, *hdmi = NULL, *video = NULL;
@@ -4557,7 +4557,7 @@ static int get_monitor_name(const struct edid *edid, char name[13])
  * @bufsize: The size of the name buffer (should be at least 14 chars.)
  *
  */
-void drm_edid_get_monitor_name(struct edid *edid, char *name, int bufsize)
+void drm_edid_get_monitor_name(const struct edid *edid, char *name, int bufsize)
 {
 	int name_length;
 	char buf[13];
@@ -4591,7 +4591,8 @@ static void clear_eld(struct drm_connector *connector)
  * Fill the ELD (EDID-Like Data) buffer for passing to the audio driver. The
  * HDCP and Port_ID ELD fields are left for the graphics driver to fill in.
  */
-static void drm_edid_to_eld(struct drm_connector *connector, struct edid *edid)
+static void drm_edid_to_eld(struct drm_connector *connector,
+			    const struct edid *edid)
 {
 	uint8_t *eld = connector->eld;
 	const u8 *cea;
@@ -4687,7 +4688,7 @@ static void drm_edid_to_eld(struct drm_connector *connector, struct edid *edid)
  *
  * Return: The number of found SADs or negative number on error.
  */
-int drm_edid_to_sad(struct edid *edid, struct cea_sad **sads)
+int drm_edid_to_sad(const struct edid *edid, struct cea_sad **sads)
 {
 	int count = 0;
 	int i, start, end, dbl;
@@ -4749,7 +4750,7 @@ EXPORT_SYMBOL(drm_edid_to_sad);
  * Return: The number of found Speaker Allocation Blocks or negative number on
  * error.
  */
-int drm_edid_to_speaker_allocation(struct edid *edid, u8 **sadb)
+int drm_edid_to_speaker_allocation(const struct edid *edid, u8 **sadb)
 {
 	int count = 0;
 	int i, start, end, dbl;
@@ -4844,7 +4845,7 @@ EXPORT_SYMBOL(drm_av_sync_delay);
  *
  * Return: True if the monitor is HDMI, false if not or unknown.
  */
-bool drm_detect_hdmi_monitor(struct edid *edid)
+bool drm_detect_hdmi_monitor(const struct edid *edid)
 {
 	const u8 *edid_ext;
 	int i;
@@ -4882,7 +4883,7 @@ EXPORT_SYMBOL(drm_detect_hdmi_monitor);
  *
  * Return: True if the monitor supports audio, false otherwise.
  */
-bool drm_detect_monitor_audio(struct edid *edid)
+bool drm_detect_monitor_audio(const struct edid *edid)
 {
 	const u8 *edid_ext;
 	int i, j;
@@ -5549,7 +5550,7 @@ static int add_displayid_detailed_1_modes(struct drm_connector *connector,
 }
 
 static int add_displayid_detailed_modes(struct drm_connector *connector,
-					struct edid *edid)
+					const struct edid *edid)
 {
 	const struct displayid_block *block;
 	struct displayid_iter iter;
diff --git a/include/drm/drm_edid.h b/include/drm/drm_edid.h
index 8e322ef173a8..5fe6e302a81f 100644
--- a/include/drm/drm_edid.h
+++ b/include/drm/drm_edid.h
@@ -373,8 +373,8 @@ struct drm_connector;
 struct drm_connector_state;
 struct drm_display_mode;
 
-int drm_edid_to_sad(struct edid *edid, struct cea_sad **sads);
-int drm_edid_to_speaker_allocation(struct edid *edid, u8 **sadb);
+int drm_edid_to_sad(const struct edid *edid, struct cea_sad **sads);
+int drm_edid_to_speaker_allocation(const struct edid *edid, u8 **sadb);
 int drm_av_sync_delay(struct drm_connector *connector,
 		      const struct drm_display_mode *mode);
 
@@ -570,8 +570,8 @@ int drm_add_edid_modes(struct drm_connector *connector, struct edid *edid);
 int drm_add_override_edid_modes(struct drm_connector *connector);
 
 u8 drm_match_cea_mode(const struct drm_display_mode *to_match);
-bool drm_detect_hdmi_monitor(struct edid *edid);
-bool drm_detect_monitor_audio(struct edid *edid);
+bool drm_detect_hdmi_monitor(const struct edid *edid);
+bool drm_detect_monitor_audio(const struct edid *edid);
 enum hdmi_quantization_range
 drm_default_rgb_quant_range(const struct drm_display_mode *mode);
 int drm_add_modes_noedid(struct drm_connector *connector,
@@ -583,7 +583,7 @@ int drm_edid_header_is_valid(const u8 *raw_edid);
 bool drm_edid_block_valid(u8 *raw_edid, int block, bool print_bad_edid,
 			  bool *edid_corrupt);
 bool drm_edid_is_valid(struct edid *edid);
-void drm_edid_get_monitor_name(struct edid *edid, char *name,
+void drm_edid_get_monitor_name(const struct edid *edid, char *name,
 			       int buflen);
 struct drm_display_mode *drm_mode_find_dmt(struct drm_device *dev,
 					   int hsize, int vsize, int fresh,
-- 
2.30.2

Re: [PATCH v2 03/11] drm/edid: slightly restructure timing and non-timing descriptor structs

[Jani Nikula]

On Mon, 28 Mar 2022, Jani Nikula <jani.nikula@intel.com> wrote:
> The pixel clock is conceptually part of the detailed timings, while it's
> just zero padding for display descriptors. Modify the structures to
> reflect this. Rename struct detailed_non_pixel to
> edid_display_descriptor to better reflect spec while at it. (Further
> struct renames are left for follow-up work.)
>
> Suggested-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>

This one's missing:

Cc: Harry Wentland <harry.wentland@amd.com>
Cc: Leo Li <sunpeng.li@amd.com>
Cc: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Cc: amd-gfx@lists.freedesktop.org

> ---
>  drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c |  6 +++---
>  drivers/gpu/drm/drm_edid.c                        | 12 ++++++------
>  include/drm/drm_edid.h                            |  9 +++++----
>  3 files changed, 14 insertions(+), 13 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> index b30656959fd8..e477f4b42b6b 100644
> --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> @@ -11537,7 +11537,7 @@ void amdgpu_dm_update_freesync_caps(struct drm_connector *connector,
>  {
>  	int i = 0;
>  	struct detailed_timing *timing;
> -	struct detailed_non_pixel *data;
> +	struct edid_display_descriptor *data;
>  	struct detailed_data_monitor_range *range;
>  	struct amdgpu_dm_connector *amdgpu_dm_connector =
>  			to_amdgpu_dm_connector(connector);
> @@ -11592,7 +11592,7 @@ void amdgpu_dm_update_freesync_caps(struct drm_connector *connector,
>  			for (i = 0; i < 4; i++) {
>  
>  				timing	= &edid->detailed_timings[i];
> -				data	= &timing->data.other_data;
> +				data	= &timing->data.descriptor;
>  				range	= &data->data.range;
>  				/*
>  				 * Check if monitor has continuous frequency mode
> @@ -11629,7 +11629,7 @@ void amdgpu_dm_update_freesync_caps(struct drm_connector *connector,
>  		i = parse_hdmi_amd_vsdb(amdgpu_dm_connector, edid, &vsdb_info);
>  		if (i >= 0 && vsdb_info.freesync_supported) {
>  			timing  = &edid->detailed_timings[i];
> -			data    = &timing->data.other_data;
> +			data    = &timing->data.descriptor;
>  
>  			amdgpu_dm_connector->min_vfreq = vsdb_info.min_refresh_rate_hz;
>  			amdgpu_dm_connector->max_vfreq = vsdb_info.max_refresh_rate_hz;
> diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
> index 13d05062d68c..ac80681d64f6 100644
> --- a/drivers/gpu/drm/drm_edid.c
> +++ b/drivers/gpu/drm/drm_edid.c
> @@ -2742,7 +2742,7 @@ static struct drm_display_mode *drm_mode_detailed(struct drm_device *dev,
>  	if (quirks & EDID_QUIRK_135_CLOCK_TOO_HIGH)
>  		mode->clock = 1088 * 10;
>  	else
> -		mode->clock = le16_to_cpu(timing->pixel_clock) * 10;
> +		mode->clock = le16_to_cpu(pt->pixel_clock) * 10;
>  
>  	mode->hdisplay = hactive;
>  	mode->hsync_start = mode->hdisplay + hsync_offset;
> @@ -2984,7 +2984,7 @@ static void
>  do_inferred_modes(struct detailed_timing *timing, void *c)
>  {
>  	struct detailed_mode_closure *closure = c;
> -	struct detailed_non_pixel *data = &timing->data.other_data;
> +	struct edid_display_descriptor *data = &timing->data.descriptor;
>  	struct detailed_data_monitor_range *range = &data->data.range;
>  
>  	if (!is_display_descriptor((const u8 *)timing, EDID_DETAIL_MONITOR_RANGE))
> @@ -3117,7 +3117,7 @@ static void
>  do_standard_modes(struct detailed_timing *timing, void *c)
>  {
>  	struct detailed_mode_closure *closure = c;
> -	struct detailed_non_pixel *data = &timing->data.other_data;
> +	struct edid_display_descriptor *data = &timing->data.descriptor;
>  	struct drm_connector *connector = closure->connector;
>  	struct edid *edid = closure->edid;
>  	int i;
> @@ -3187,7 +3187,7 @@ static int drm_cvt_modes(struct drm_connector *connector,
>  	for (i = 0; i < 4; i++) {
>  		int width, height;
>  
> -		cvt = &(timing->data.other_data.data.cvt[i]);
> +		cvt = &(timing->data.descriptor.data.cvt[i]);
>  
>  		if (!memcmp(cvt->code, empty, 3))
>  			continue;
> @@ -4494,7 +4494,7 @@ monitor_name(struct detailed_timing *t, void *data)
>  	if (!is_display_descriptor((const u8 *)t, EDID_DETAIL_MONITOR_NAME))
>  		return;
>  
> -	*(u8 **)data = t->data.other_data.data.str.str;
> +	*(u8 **)data = t->data.descriptor.data.str.str;
>  }
>  
>  static int get_monitor_name(struct edid *edid, char name[13])
> @@ -5223,7 +5223,7 @@ void get_monitor_range(struct detailed_timing *timing,
>  		       void *info_monitor_range)
>  {
>  	struct drm_monitor_range_info *monitor_range = info_monitor_range;
> -	const struct detailed_non_pixel *data = &timing->data.other_data;
> +	const struct edid_display_descriptor *data = &timing->data.descriptor;
>  	const struct detailed_data_monitor_range *range = &data->data.range;
>  
>  	if (!is_display_descriptor((const u8 *)timing, EDID_DETAIL_MONITOR_RANGE))
> diff --git a/include/drm/drm_edid.h b/include/drm/drm_edid.h
> index 144c495b99c4..8e322ef173a8 100644
> --- a/include/drm/drm_edid.h
> +++ b/include/drm/drm_edid.h
> @@ -68,6 +68,7 @@ struct std_timing {
>  
>  /* If detailed data is pixel timing */
>  struct detailed_pixel_timing {
> +	__le16 pixel_clock; /* non-zero, need to multiply by 10 KHz */
>  	u8 hactive_lo;
>  	u8 hblank_lo;
>  	u8 hactive_hblank_hi;
> @@ -142,8 +143,9 @@ struct cvt_timing {
>  	u8 code[3];
>  } __attribute__((packed));
>  
> -struct detailed_non_pixel {
> -	u8 pad1;
> +struct edid_display_descriptor {
> +	u16 pad0; /* 0 for Display Descriptor */
> +	u8 pad1; /* 0 for Display Descriptor */
>  	u8 type; /* ff=serial, fe=string, fd=monitor range, fc=monitor name
>  		    fb=color point data, fa=standard timing data,
>  		    f9=undefined, f8=mfg. reserved */
> @@ -168,10 +170,9 @@ struct detailed_non_pixel {
>  #define EDID_DETAIL_MONITOR_SERIAL 0xff
>  
>  struct detailed_timing {
> -	__le16 pixel_clock; /* need to multiply by 10 KHz */
>  	union {
>  		struct detailed_pixel_timing pixel_data;
> -		struct detailed_non_pixel other_data;
> +		struct edid_display_descriptor descriptor;
>  	} data;
>  } __attribute__((packed));

-- 
Jani Nikula, Intel Open Source Graphics Center

Re: [Intel-gfx] [PATCH v2 03/11] drm/edid: slightly restructure timing and non-timing descriptor structs

[Jani Nikula]

On Mon, 28 Mar 2022, Jani Nikula <jani.nikula@intel.com> wrote:
> The pixel clock is conceptually part of the detailed timings, while it's
> just zero padding for display descriptors. Modify the structures to
> reflect this. Rename struct detailed_non_pixel to
> edid_display_descriptor to better reflect spec while at it. (Further
> struct renames are left for follow-up work.)
>
> Suggested-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>

This one's missing:

Cc: Harry Wentland <harry.wentland@amd.com>
Cc: Leo Li <sunpeng.li@amd.com>
Cc: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Cc: amd-gfx@lists.freedesktop.org

> ---
>  drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c |  6 +++---
>  drivers/gpu/drm/drm_edid.c                        | 12 ++++++------
>  include/drm/drm_edid.h                            |  9 +++++----
>  3 files changed, 14 insertions(+), 13 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> index b30656959fd8..e477f4b42b6b 100644
> --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> @@ -11537,7 +11537,7 @@ void amdgpu_dm_update_freesync_caps(struct drm_connector *connector,
>  {
>  	int i = 0;
>  	struct detailed_timing *timing;
> -	struct detailed_non_pixel *data;
> +	struct edid_display_descriptor *data;
>  	struct detailed_data_monitor_range *range;
>  	struct amdgpu_dm_connector *amdgpu_dm_connector =
>  			to_amdgpu_dm_connector(connector);
> @@ -11592,7 +11592,7 @@ void amdgpu_dm_update_freesync_caps(struct drm_connector *connector,
>  			for (i = 0; i < 4; i++) {
>  
>  				timing	= &edid->detailed_timings[i];
> -				data	= &timing->data.other_data;
> +				data	= &timing->data.descriptor;
>  				range	= &data->data.range;
>  				/*
>  				 * Check if monitor has continuous frequency mode
> @@ -11629,7 +11629,7 @@ void amdgpu_dm_update_freesync_caps(struct drm_connector *connector,
>  		i = parse_hdmi_amd_vsdb(amdgpu_dm_connector, edid, &vsdb_info);
>  		if (i >= 0 && vsdb_info.freesync_supported) {
>  			timing  = &edid->detailed_timings[i];
> -			data    = &timing->data.other_data;
> +			data    = &timing->data.descriptor;
>  
>  			amdgpu_dm_connector->min_vfreq = vsdb_info.min_refresh_rate_hz;
>  			amdgpu_dm_connector->max_vfreq = vsdb_info.max_refresh_rate_hz;
> diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
> index 13d05062d68c..ac80681d64f6 100644
> --- a/drivers/gpu/drm/drm_edid.c
> +++ b/drivers/gpu/drm/drm_edid.c
> @@ -2742,7 +2742,7 @@ static struct drm_display_mode *drm_mode_detailed(struct drm_device *dev,
>  	if (quirks & EDID_QUIRK_135_CLOCK_TOO_HIGH)
>  		mode->clock = 1088 * 10;
>  	else
> -		mode->clock = le16_to_cpu(timing->pixel_clock) * 10;
> +		mode->clock = le16_to_cpu(pt->pixel_clock) * 10;
>  
>  	mode->hdisplay = hactive;
>  	mode->hsync_start = mode->hdisplay + hsync_offset;
> @@ -2984,7 +2984,7 @@ static void
>  do_inferred_modes(struct detailed_timing *timing, void *c)
>  {
>  	struct detailed_mode_closure *closure = c;
> -	struct detailed_non_pixel *data = &timing->data.other_data;
> +	struct edid_display_descriptor *data = &timing->data.descriptor;
>  	struct detailed_data_monitor_range *range = &data->data.range;
>  
>  	if (!is_display_descriptor((const u8 *)timing, EDID_DETAIL_MONITOR_RANGE))
> @@ -3117,7 +3117,7 @@ static void
>  do_standard_modes(struct detailed_timing *timing, void *c)
>  {
>  	struct detailed_mode_closure *closure = c;
> -	struct detailed_non_pixel *data = &timing->data.other_data;
> +	struct edid_display_descriptor *data = &timing->data.descriptor;
>  	struct drm_connector *connector = closure->connector;
>  	struct edid *edid = closure->edid;
>  	int i;
> @@ -3187,7 +3187,7 @@ static int drm_cvt_modes(struct drm_connector *connector,
>  	for (i = 0; i < 4; i++) {
>  		int width, height;
>  
> -		cvt = &(timing->data.other_data.data.cvt[i]);
> +		cvt = &(timing->data.descriptor.data.cvt[i]);
>  
>  		if (!memcmp(cvt->code, empty, 3))
>  			continue;
> @@ -4494,7 +4494,7 @@ monitor_name(struct detailed_timing *t, void *data)
>  	if (!is_display_descriptor((const u8 *)t, EDID_DETAIL_MONITOR_NAME))
>  		return;
>  
> -	*(u8 **)data = t->data.other_data.data.str.str;
> +	*(u8 **)data = t->data.descriptor.data.str.str;
>  }
>  
>  static int get_monitor_name(struct edid *edid, char name[13])
> @@ -5223,7 +5223,7 @@ void get_monitor_range(struct detailed_timing *timing,
>  		       void *info_monitor_range)
>  {
>  	struct drm_monitor_range_info *monitor_range = info_monitor_range;
> -	const struct detailed_non_pixel *data = &timing->data.other_data;
> +	const struct edid_display_descriptor *data = &timing->data.descriptor;
>  	const struct detailed_data_monitor_range *range = &data->data.range;
>  
>  	if (!is_display_descriptor((const u8 *)timing, EDID_DETAIL_MONITOR_RANGE))
> diff --git a/include/drm/drm_edid.h b/include/drm/drm_edid.h
> index 144c495b99c4..8e322ef173a8 100644
> --- a/include/drm/drm_edid.h
> +++ b/include/drm/drm_edid.h
> @@ -68,6 +68,7 @@ struct std_timing {
>  
>  /* If detailed data is pixel timing */
>  struct detailed_pixel_timing {
> +	__le16 pixel_clock; /* non-zero, need to multiply by 10 KHz */
>  	u8 hactive_lo;
>  	u8 hblank_lo;
>  	u8 hactive_hblank_hi;
> @@ -142,8 +143,9 @@ struct cvt_timing {
>  	u8 code[3];
>  } __attribute__((packed));
>  
> -struct detailed_non_pixel {
> -	u8 pad1;
> +struct edid_display_descriptor {
> +	u16 pad0; /* 0 for Display Descriptor */
> +	u8 pad1; /* 0 for Display Descriptor */
>  	u8 type; /* ff=serial, fe=string, fd=monitor range, fc=monitor name
>  		    fb=color point data, fa=standard timing data,
>  		    f9=undefined, f8=mfg. reserved */
> @@ -168,10 +170,9 @@ struct detailed_non_pixel {
>  #define EDID_DETAIL_MONITOR_SERIAL 0xff
>  
>  struct detailed_timing {
> -	__le16 pixel_clock; /* need to multiply by 10 KHz */
>  	union {
>  		struct detailed_pixel_timing pixel_data;
> -		struct detailed_non_pixel other_data;
> +		struct edid_display_descriptor descriptor;
>  	} data;
>  } __attribute__((packed));

-- 
Jani Nikula, Intel Open Source Graphics Center

Re: [PATCH v2 03/11] drm/edid: slightly restructure timing and non-timing descriptor structs

[Jani Nikula]

On Mon, 28 Mar 2022, Jani Nikula <jani.nikula@intel.com> wrote:
> The pixel clock is conceptually part of the detailed timings, while it's
> just zero padding for display descriptors. Modify the structures to
> reflect this. Rename struct detailed_non_pixel to
> edid_display_descriptor to better reflect spec while at it. (Further
> struct renames are left for follow-up work.)
>
> Suggested-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>

This one's missing:

Cc: Harry Wentland <harry.wentland@amd.com>
Cc: Leo Li <sunpeng.li@amd.com>
Cc: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Cc: amd-gfx@lists.freedesktop.org

> ---
>  drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c |  6 +++---
>  drivers/gpu/drm/drm_edid.c                        | 12 ++++++------
>  include/drm/drm_edid.h                            |  9 +++++----
>  3 files changed, 14 insertions(+), 13 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> index b30656959fd8..e477f4b42b6b 100644
> --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> @@ -11537,7 +11537,7 @@ void amdgpu_dm_update_freesync_caps(struct drm_connector *connector,
>  {
>  	int i = 0;
>  	struct detailed_timing *timing;
> -	struct detailed_non_pixel *data;
> +	struct edid_display_descriptor *data;
>  	struct detailed_data_monitor_range *range;
>  	struct amdgpu_dm_connector *amdgpu_dm_connector =
>  			to_amdgpu_dm_connector(connector);
> @@ -11592,7 +11592,7 @@ void amdgpu_dm_update_freesync_caps(struct drm_connector *connector,
>  			for (i = 0; i < 4; i++) {
>  
>  				timing	= &edid->detailed_timings[i];
> -				data	= &timing->data.other_data;
> +				data	= &timing->data.descriptor;
>  				range	= &data->data.range;
>  				/*
>  				 * Check if monitor has continuous frequency mode
> @@ -11629,7 +11629,7 @@ void amdgpu_dm_update_freesync_caps(struct drm_connector *connector,
>  		i = parse_hdmi_amd_vsdb(amdgpu_dm_connector, edid, &vsdb_info);
>  		if (i >= 0 && vsdb_info.freesync_supported) {
>  			timing  = &edid->detailed_timings[i];
> -			data    = &timing->data.other_data;
> +			data    = &timing->data.descriptor;
>  
>  			amdgpu_dm_connector->min_vfreq = vsdb_info.min_refresh_rate_hz;
>  			amdgpu_dm_connector->max_vfreq = vsdb_info.max_refresh_rate_hz;
> diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
> index 13d05062d68c..ac80681d64f6 100644
> --- a/drivers/gpu/drm/drm_edid.c
> +++ b/drivers/gpu/drm/drm_edid.c
> @@ -2742,7 +2742,7 @@ static struct drm_display_mode *drm_mode_detailed(struct drm_device *dev,
>  	if (quirks & EDID_QUIRK_135_CLOCK_TOO_HIGH)
>  		mode->clock = 1088 * 10;
>  	else
> -		mode->clock = le16_to_cpu(timing->pixel_clock) * 10;
> +		mode->clock = le16_to_cpu(pt->pixel_clock) * 10;
>  
>  	mode->hdisplay = hactive;
>  	mode->hsync_start = mode->hdisplay + hsync_offset;
> @@ -2984,7 +2984,7 @@ static void
>  do_inferred_modes(struct detailed_timing *timing, void *c)
>  {
>  	struct detailed_mode_closure *closure = c;
> -	struct detailed_non_pixel *data = &timing->data.other_data;
> +	struct edid_display_descriptor *data = &timing->data.descriptor;
>  	struct detailed_data_monitor_range *range = &data->data.range;
>  
>  	if (!is_display_descriptor((const u8 *)timing, EDID_DETAIL_MONITOR_RANGE))
> @@ -3117,7 +3117,7 @@ static void
>  do_standard_modes(struct detailed_timing *timing, void *c)
>  {
>  	struct detailed_mode_closure *closure = c;
> -	struct detailed_non_pixel *data = &timing->data.other_data;
> +	struct edid_display_descriptor *data = &timing->data.descriptor;
>  	struct drm_connector *connector = closure->connector;
>  	struct edid *edid = closure->edid;
>  	int i;
> @@ -3187,7 +3187,7 @@ static int drm_cvt_modes(struct drm_connector *connector,
>  	for (i = 0; i < 4; i++) {
>  		int width, height;
>  
> -		cvt = &(timing->data.other_data.data.cvt[i]);
> +		cvt = &(timing->data.descriptor.data.cvt[i]);
>  
>  		if (!memcmp(cvt->code, empty, 3))
>  			continue;
> @@ -4494,7 +4494,7 @@ monitor_name(struct detailed_timing *t, void *data)
>  	if (!is_display_descriptor((const u8 *)t, EDID_DETAIL_MONITOR_NAME))
>  		return;
>  
> -	*(u8 **)data = t->data.other_data.data.str.str;
> +	*(u8 **)data = t->data.descriptor.data.str.str;
>  }
>  
>  static int get_monitor_name(struct edid *edid, char name[13])
> @@ -5223,7 +5223,7 @@ void get_monitor_range(struct detailed_timing *timing,
>  		       void *info_monitor_range)
>  {
>  	struct drm_monitor_range_info *monitor_range = info_monitor_range;
> -	const struct detailed_non_pixel *data = &timing->data.other_data;
> +	const struct edid_display_descriptor *data = &timing->data.descriptor;
>  	const struct detailed_data_monitor_range *range = &data->data.range;
>  
>  	if (!is_display_descriptor((const u8 *)timing, EDID_DETAIL_MONITOR_RANGE))
> diff --git a/include/drm/drm_edid.h b/include/drm/drm_edid.h
> index 144c495b99c4..8e322ef173a8 100644
> --- a/include/drm/drm_edid.h
> +++ b/include/drm/drm_edid.h
> @@ -68,6 +68,7 @@ struct std_timing {
>  
>  /* If detailed data is pixel timing */
>  struct detailed_pixel_timing {
> +	__le16 pixel_clock; /* non-zero, need to multiply by 10 KHz */
>  	u8 hactive_lo;
>  	u8 hblank_lo;
>  	u8 hactive_hblank_hi;
> @@ -142,8 +143,9 @@ struct cvt_timing {
>  	u8 code[3];
>  } __attribute__((packed));
>  
> -struct detailed_non_pixel {
> -	u8 pad1;
> +struct edid_display_descriptor {
> +	u16 pad0; /* 0 for Display Descriptor */
> +	u8 pad1; /* 0 for Display Descriptor */
>  	u8 type; /* ff=serial, fe=string, fd=monitor range, fc=monitor name
>  		    fb=color point data, fa=standard timing data,
>  		    f9=undefined, f8=mfg. reserved */
> @@ -168,10 +170,9 @@ struct detailed_non_pixel {
>  #define EDID_DETAIL_MONITOR_SERIAL 0xff
>  
>  struct detailed_timing {
> -	__le16 pixel_clock; /* need to multiply by 10 KHz */
>  	union {
>  		struct detailed_pixel_timing pixel_data;
> -		struct detailed_non_pixel other_data;
> +		struct edid_display_descriptor descriptor;
>  	} data;
>  } __attribute__((packed));

-- 
Jani Nikula, Intel Open Source Graphics Center

Re: [Intel-gfx] [PATCH v2 03/11] drm/edid: slightly restructure timing and non-timing descriptor structs

[kernel test robot]

Hi Jani,

I love your patch! Perhaps something to improve:

[auto build test WARNING on drm/drm-next]
[also build test WARNING on drm-intel/for-linux-next drm-tip/drm-tip v5.17 next-20220328]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]

url:    https://github.com/intel-lab-lkp/linux/commits/Jani-Nikula/drm-edid-constify-EDID-parsing-with-some-fixes/20220328-171858
base:   git://anongit.freedesktop.org/drm/drm drm-next
config: x86_64-randconfig-a003-20220328 (https://download.01.org/0day-ci/archive/20220328/202203281926.AthxJpnK-lkp@intel.com/config)
compiler: gcc-9 (Ubuntu 9.4.0-1ubuntu1~20.04.1) 9.4.0
reproduce (this is a W=1 build):
        # https://github.com/intel-lab-lkp/linux/commit/f538c9296c54ce8f878432153584a68939ffc111
        git remote add linux-review https://github.com/intel-lab-lkp/linux
        git fetch --no-tags linux-review Jani-Nikula/drm-edid-constify-EDID-parsing-with-some-fixes/20220328-171858
        git checkout f538c9296c54ce8f878432153584a68939ffc111
        # save the config file to linux build tree
        mkdir build_dir
        make W=1 O=build_dir ARCH=x86_64 SHELL=/bin/bash drivers/gpu/drm/tiny/

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>

All warnings (new ones prefixed by >>):

   drivers/gpu/drm/tiny/gm12u320.c:478:4: error: 'struct detailed_timing' has no member named 'pixel_clock'
     478 |   .pixel_clock = 3383,
         |    ^~~~~~~~~~~
>> drivers/gpu/drm/tiny/gm12u320.c:464:36: warning: missing braces around initializer [-Wmissing-braces]
     464 | static struct edid gm12u320_edid = {
         |                                    ^
   ......
     478 |   .pixel_clock = 3383,
         |                  {{  }}
     479 |   /* hactive = 848, hblank = 256 */
     480 |   .data.pixel_data.hactive_lo = 0x50,
         |                                     }}
     481 |   .data.pixel_data.hblank_lo = 0x00,
         |                                    }}
     482 |   .data.pixel_data.hactive_hblank_hi = 0x31,
         |                                            }}
     483 |   /* vactive = 480, vblank = 28 */
     484 |   .data.pixel_data.vactive_lo = 0xe0,
         |                                     }}
     485 |   .data.pixel_data.vblank_lo = 0x1c,
         |                                    }}
     486 |   .data.pixel_data.vactive_vblank_hi = 0x10,
         |                                            }}
     487 |   /* hsync offset 40 pw 128, vsync offset 1 pw 4 */
     488 |   .data.pixel_data.hsync_offset_lo = 0x28,
         |                                          }}
     489 |   .data.pixel_data.hsync_pulse_width_lo = 0x80,
         |                                               }}
     490 |   .data.pixel_data.vsync_offset_pulse_width_lo = 0x14,
         |                                                      }}
     491 |   .data.pixel_data.hsync_vsync_offset_pulse_width_hi = 0x00,
         |                                                            }}
   ......
     494 |  }, {
         |  }}
   drivers/gpu/drm/tiny/gm12u320.c:495:4: error: 'struct detailed_timing' has no member named 'pixel_clock'
     495 |   .pixel_clock = 0,
         |    ^~~~~~~~~~~
   drivers/gpu/drm/tiny/gm12u320.c:496:9: error: 'union <anonymous>' has no member named 'other_data'
     496 |   .data.other_data.type = 0xfd, /* Monitor ranges */
         |         ^~~~~~~~~~
   drivers/gpu/drm/tiny/gm12u320.c:496:27: warning: initialized field overwritten [-Woverride-init]
     496 |   .data.other_data.type = 0xfd, /* Monitor ranges */
         |                           ^~~~
   drivers/gpu/drm/tiny/gm12u320.c:496:27: note: (near initialization for 'gm12u320_edid.detailed_timings[1].data.pixel_data.pixel_clock')
   drivers/gpu/drm/tiny/gm12u320.c:497:9: error: 'union <anonymous>' has no member named 'other_data'
     497 |   .data.other_data.data.range.min_vfreq = 59,
         |         ^~~~~~~~~~
   drivers/gpu/drm/tiny/gm12u320.c:497:43: warning: initialized field overwritten [-Woverride-init]
     497 |   .data.other_data.data.range.min_vfreq = 59,
         |                                           ^~
   drivers/gpu/drm/tiny/gm12u320.c:497:43: note: (near initialization for 'gm12u320_edid.detailed_timings[1].data.pixel_data.pixel_clock')
   drivers/gpu/drm/tiny/gm12u320.c:498:9: error: 'union <anonymous>' has no member named 'other_data'
     498 |   .data.other_data.data.range.max_vfreq = 61,
         |         ^~~~~~~~~~
   drivers/gpu/drm/tiny/gm12u320.c:498:43: warning: initialized field overwritten [-Woverride-init]
     498 |   .data.other_data.data.range.max_vfreq = 61,
         |                                           ^~
   drivers/gpu/drm/tiny/gm12u320.c:498:43: note: (near initialization for 'gm12u320_edid.detailed_timings[1].data.pixel_data.pixel_clock')
   drivers/gpu/drm/tiny/gm12u320.c:499:9: error: 'union <anonymous>' has no member named 'other_data'
     499 |   .data.other_data.data.range.min_hfreq_khz = 29,
         |         ^~~~~~~~~~
   drivers/gpu/drm/tiny/gm12u320.c:499:47: warning: initialized field overwritten [-Woverride-init]
     499 |   .data.other_data.data.range.min_hfreq_khz = 29,
         |                                               ^~
   drivers/gpu/drm/tiny/gm12u320.c:499:47: note: (near initialization for 'gm12u320_edid.detailed_timings[1].data.pixel_data.pixel_clock')
   drivers/gpu/drm/tiny/gm12u320.c:500:9: error: 'union <anonymous>' has no member named 'other_data'
     500 |   .data.other_data.data.range.max_hfreq_khz = 32,
         |         ^~~~~~~~~~
   drivers/gpu/drm/tiny/gm12u320.c:500:47: warning: initialized field overwritten [-Woverride-init]
     500 |   .data.other_data.data.range.max_hfreq_khz = 32,
         |                                               ^~
   drivers/gpu/drm/tiny/gm12u320.c:500:47: note: (near initialization for 'gm12u320_edid.detailed_timings[1].data.pixel_data.pixel_clock')
   drivers/gpu/drm/tiny/gm12u320.c:501:9: error: 'union <anonymous>' has no member named 'other_data'
     501 |   .data.other_data.data.range.pixel_clock_mhz = 4, /* 40 MHz */
         |         ^~~~~~~~~~
   drivers/gpu/drm/tiny/gm12u320.c:501:49: warning: initialized field overwritten [-Woverride-init]
     501 |   .data.other_data.data.range.pixel_clock_mhz = 4, /* 40 MHz */
         |                                                 ^
   drivers/gpu/drm/tiny/gm12u320.c:501:49: note: (near initialization for 'gm12u320_edid.detailed_timings[1].data.pixel_data.pixel_clock')
   drivers/gpu/drm/tiny/gm12u320.c:502:9: error: 'union <anonymous>' has no member named 'other_data'
     502 |   .data.other_data.data.range.flags = 0,
         |         ^~~~~~~~~~
   drivers/gpu/drm/tiny/gm12u320.c:502:39: warning: initialized field overwritten [-Woverride-init]
     502 |   .data.other_data.data.range.flags = 0,
         |                                       ^
   drivers/gpu/drm/tiny/gm12u320.c:502:39: note: (near initialization for 'gm12u320_edid.detailed_timings[1].data.pixel_data.pixel_clock')
   drivers/gpu/drm/tiny/gm12u320.c:503:9: error: 'union <anonymous>' has no member named 'other_data'
     503 |   .data.other_data.data.range.formula.cvt = {
         |         ^~~~~~~~~~
>> drivers/gpu/drm/tiny/gm12u320.c:464:36: warning: missing braces around initializer [-Wmissing-braces]
     464 | static struct edid gm12u320_edid = {
         |                                    ^
   ......
     478 |   .pixel_clock = 3383,
         |                  {{  }}
     479 |   /* hactive = 848, hblank = 256 */
     480 |   .data.pixel_data.hactive_lo = 0x50,
         |                                     }}
     481 |   .data.pixel_data.hblank_lo = 0x00,
         |                                    }}
     482 |   .data.pixel_data.hactive_hblank_hi = 0x31,
         |                                            }}
     483 |   /* vactive = 480, vblank = 28 */
     484 |   .data.pixel_data.vactive_lo = 0xe0,
         |                                     }}
     485 |   .data.pixel_data.vblank_lo = 0x1c,
         |                                    }}
     486 |   .data.pixel_data.vactive_vblank_hi = 0x10,
         |                                            }}
     487 |   /* hsync offset 40 pw 128, vsync offset 1 pw 4 */
     488 |   .data.pixel_data.hsync_offset_lo = 0x28,
         |                                          }}
     489 |   .data.pixel_data.hsync_pulse_width_lo = 0x80,
         |                                               }}
     490 |   .data.pixel_data.vsync_offset_pulse_width_lo = 0x14,
         |                                                      }}
     491 |   .data.pixel_data.hsync_vsync_offset_pulse_width_hi = 0x00,
         |                                                            }}
   ......
     494 |  }, {
         |  }}
     495 |   .pixel_clock = 0,
         |                  -
         |                  {{0}}
     496 |   .data.other_data.type = 0xfd, /* Monitor ranges */
         |                           {   }}
     497 |   .data.other_data.data.range.min_vfreq = 59,
         |                                           { }}
     498 |   .data.other_data.data.range.max_vfreq = 61,
         |                                           { }}
     499 |   .data.other_data.data.range.min_hfreq_khz = 29,
         |                                               { }}
     500 |   .data.other_data.data.range.max_hfreq_khz = 32,
         |                                               { }}
     501 |   .data.other_data.data.range.pixel_clock_mhz = 4, /* 40 MHz */
         |                                                 {}}
     502 |   .data.other_data.data.range.flags = 0,
         |                                       {}}
   drivers/gpu/drm/tiny/gm12u320.c:503:45: warning: initialized field overwritten [-Woverride-init]
     503 |   .data.other_data.data.range.formula.cvt = {
         |                                             ^
   drivers/gpu/drm/tiny/gm12u320.c:503:45: note: (near initialization for 'gm12u320_edid.detailed_timings[1].data.pixel_data')
>> drivers/gpu/drm/tiny/gm12u320.c:464:36: warning: missing braces around initializer [-Wmissing-braces]
     464 | static struct edid gm12u320_edid = {
         |                                    ^
   ......
     478 |   .pixel_clock = 3383,
         |                  {{  }}
     479 |   /* hactive = 848, hblank = 256 */
     480 |   .data.pixel_data.hactive_lo = 0x50,
         |                                     }}
     481 |   .data.pixel_data.hblank_lo = 0x00,
         |                                    }}
     482 |   .data.pixel_data.hactive_hblank_hi = 0x31,
         |                                            }}
     483 |   /* vactive = 480, vblank = 28 */
     484 |   .data.pixel_data.vactive_lo = 0xe0,
         |                                     }}
     485 |   .data.pixel_data.vblank_lo = 0x1c,
         |                                    }}
     486 |   .data.pixel_data.vactive_vblank_hi = 0x10,
         |                                            }}
     487 |   /* hsync offset 40 pw 128, vsync offset 1 pw 4 */
     488 |   .data.pixel_data.hsync_offset_lo = 0x28,
         |                                          }}
     489 |   .data.pixel_data.hsync_pulse_width_lo = 0x80,
         |                                               }}
     490 |   .data.pixel_data.vsync_offset_pulse_width_lo = 0x14,
         |                                                      }}
     491 |   .data.pixel_data.hsync_vsync_offset_pulse_width_hi = 0x00,
         |                                                            }}
   ......
     494 |  }, {
         |  }}
     495 |   .pixel_clock = 0,
         |                  -
         |                  {{0}}
     496 |   .data.other_data.type = 0xfd, /* Monitor ranges */
         |                           {   }}
     497 |   .data.other_data.data.range.min_vfreq = 59,
         |                                           { }}
     498 |   .data.other_data.data.range.max_vfreq = 61,
         |                                           { }}
     499 |   .data.other_data.data.range.min_hfreq_khz = 29,
         |                                               { }}
     500 |   .data.other_data.data.range.max_hfreq_khz = 32,
         |                                               { }}
     501 |   .data.other_data.data.range.pixel_clock_mhz = 4, /* 40 MHz */
         |                                                 {}}
     502 |   .data.other_data.data.range.flags = 0,
         |                                       {}}
   ......
     505 |  }, {
         |  }
   drivers/gpu/drm/tiny/gm12u320.c:506:4: error: 'struct detailed_timing' has no member named 'pixel_clock'
     506 |   .pixel_clock = 0,
         |    ^~~~~~~~~~~
   drivers/gpu/drm/tiny/gm12u320.c:507:9: error: 'union <anonymous>' has no member named 'other_data'
     507 |   .data.other_data.type = 0xfc, /* Model string */
         |         ^~~~~~~~~~
   drivers/gpu/drm/tiny/gm12u320.c:507:27: warning: initialized field overwritten [-Woverride-init]
     507 |   .data.other_data.type = 0xfc, /* Model string */
         |                           ^~~~
   drivers/gpu/drm/tiny/gm12u320.c:507:27: note: (near initialization for 'gm12u320_edid.detailed_timings[2].data.pixel_data.pixel_clock')
   drivers/gpu/drm/tiny/gm12u320.c:508:9: error: 'union <anonymous>' has no member named 'other_data'
     508 |   .data.other_data.data.str.str = {
         |         ^~~~~~~~~~
>> drivers/gpu/drm/tiny/gm12u320.c:464:36: warning: missing braces around initializer [-Wmissing-braces]
     464 | static struct edid gm12u320_edid = {
         |                                    ^
   ......
     478 |   .pixel_clock = 3383,
         |                  {{  }}
     479 |   /* hactive = 848, hblank = 256 */
     480 |   .data.pixel_data.hactive_lo = 0x50,
         |                                     }}
     481 |   .data.pixel_data.hblank_lo = 0x00,
         |                                    }}
     482 |   .data.pixel_data.hactive_hblank_hi = 0x31,
         |                                            }}
     483 |   /* vactive = 480, vblank = 28 */
     484 |   .data.pixel_data.vactive_lo = 0xe0,
         |                                     }}
     485 |   .data.pixel_data.vblank_lo = 0x1c,
         |                                    }}
     486 |   .data.pixel_data.vactive_vblank_hi = 0x10,
         |                                            }}
     487 |   /* hsync offset 40 pw 128, vsync offset 1 pw 4 */
     488 |   .data.pixel_data.hsync_offset_lo = 0x28,
         |                                          }}
     489 |   .data.pixel_data.hsync_pulse_width_lo = 0x80,
         |                                               }}
     490 |   .data.pixel_data.vsync_offset_pulse_width_lo = 0x14,
         |                                                      }}
     491 |   .data.pixel_data.hsync_vsync_offset_pulse_width_hi = 0x00,
         |                                                            }}
   ......
     494 |  }, {
         |  }}
     495 |   .pixel_clock = 0,
         |                  -
         |                  {{0}}
     496 |   .data.other_data.type = 0xfd, /* Monitor ranges */
         |                           {   }}
     497 |   .data.other_data.data.range.min_vfreq = 59,
         |                                           { }}
     498 |   .data.other_data.data.range.max_vfreq = 61,
         |                                           { }}
     499 |   .data.other_data.data.range.min_hfreq_khz = 29,
         |                                               { }}
     500 |   .data.other_data.data.range.max_hfreq_khz = 32,
         |                                               { }}
     501 |   .data.other_data.data.range.pixel_clock_mhz = 4, /* 40 MHz */
         |                                                 {}}
     502 |   .data.other_data.data.range.flags = 0,
         |                                       {}}
   ......
     505 |  }, {
         |  }
     506 |   .pixel_clock = 0,
         |                  -
         |                  {{0}}
     507 |   .data.other_data.type = 0xfc, /* Model string */
         |                           {   }}
   drivers/gpu/drm/tiny/gm12u320.c:508:35: warning: initialized field overwritten [-Woverride-init]
     508 |   .data.other_data.data.str.str = {
         |                                   ^
   drivers/gpu/drm/tiny/gm12u320.c:508:35: note: (near initialization for 'gm12u320_edid.detailed_timings[2].data.pixel_data')
>> drivers/gpu/drm/tiny/gm12u320.c:464:36: warning: missing braces around initializer [-Wmissing-braces]
     464 | static struct edid gm12u320_edid = {
         |                                    ^
   ......
     478 |   .pixel_clock = 3383,
         |                  {{  }}
     479 |   /* hactive = 848, hblank = 256 */
     480 |   .data.pixel_data.hactive_lo = 0x50,
         |                                     }}
     481 |   .data.pixel_data.hblank_lo = 0x00,
         |                                    }}
     482 |   .data.pixel_data.hactive_hblank_hi = 0x31,
         |                                            }}
     483 |   /* vactive = 480, vblank = 28 */
     484 |   .data.pixel_data.vactive_lo = 0xe0,
         |                                     }}
     485 |   .data.pixel_data.vblank_lo = 0x1c,
         |                                    }}
     486 |   .data.pixel_data.vactive_vblank_hi = 0x10,
         |                                            }}
     487 |   /* hsync offset 40 pw 128, vsync offset 1 pw 4 */
     488 |   .data.pixel_data.hsync_offset_lo = 0x28,
         |                                          }}
     489 |   .data.pixel_data.hsync_pulse_width_lo = 0x80,
         |                                               }}
     490 |   .data.pixel_data.vsync_offset_pulse_width_lo = 0x14,
         |                                                      }}
     491 |   .data.pixel_data.hsync_vsync_offset_pulse_width_hi = 0x00,
         |                                                            }}
   ......
     494 |  }, {
         |  }}
     495 |   .pixel_clock = 0,
         |                  -
         |                  {{0}}
     496 |   .data.other_data.type = 0xfd, /* Monitor ranges */
         |                           {   }}
     497 |   .data.other_data.data.range.min_vfreq = 59,
         |                                           { }}
     498 |   .data.other_data.data.range.max_vfreq = 61,
         |                                           { }}
     499 |   .data.other_data.data.range.min_hfreq_khz = 29,
         |                                               { }}
     500 |   .data.other_data.data.range.max_hfreq_khz = 32,
         |                                               { }}
     501 |   .data.other_data.data.range.pixel_clock_mhz = 4, /* 40 MHz */
         |                                                 {}}
     502 |   .data.other_data.data.range.flags = 0,
         |                                       {}}
   ......
     505 |  }, {
         |  }
     506 |   .pixel_clock = 0,
         |                  -
         |                  {{0}}
     507 |   .data.other_data.type = 0xfc, /* Model string */
         |                           {   }}
   ......
     511 |  }, {
         |  }
   drivers/gpu/drm/tiny/gm12u320.c:512:4: error: 'struct detailed_timing' has no member named 'pixel_clock'
     512 |   .pixel_clock = 0,
         |    ^~~~~~~~~~~
   drivers/gpu/drm/tiny/gm12u320.c:513:9: error: 'union <anonymous>' has no member named 'other_data'
     513 |   .data.other_data.type = 0xfe, /* Unspecified text / padding */
         |         ^~~~~~~~~~
   drivers/gpu/drm/tiny/gm12u320.c:513:27: warning: initialized field overwritten [-Woverride-init]
     513 |   .data.other_data.type = 0xfe, /* Unspecified text / padding */
         |                           ^~~~
   drivers/gpu/drm/tiny/gm12u320.c:513:27: note: (near initialization for 'gm12u320_edid.detailed_timings[3].data.pixel_data.pixel_clock')
   drivers/gpu/drm/tiny/gm12u320.c:514:9: error: 'union <anonymous>' has no member named 'other_data'
     514 |   .data.other_data.data.str.str = {
         |         ^~~~~~~~~~
>> drivers/gpu/drm/tiny/gm12u320.c:464:36: warning: missing braces around initializer [-Wmissing-braces]
     464 | static struct edid gm12u320_edid = {
         |                                    ^
   ......
     478 |   .pixel_clock = 3383,
         |                  {{  }}
     479 |   /* hactive = 848, hblank = 256 */
     480 |   .data.pixel_data.hactive_lo = 0x50,
         |                                     }}
     481 |   .data.pixel_data.hblank_lo = 0x00,
         |                                    }}
     482 |   .data.pixel_data.hactive_hblank_hi = 0x31,
         |                                            }}
     483 |   /* vactive = 480, vblank = 28 */
     484 |   .data.pixel_data.vactive_lo = 0xe0,
         |                                     }}
     485 |   .data.pixel_data.vblank_lo = 0x1c,
         |                                    }}
     486 |   .data.pixel_data.vactive_vblank_hi = 0x10,
         |                                            }}
     487 |   /* hsync offset 40 pw 128, vsync offset 1 pw 4 */
     488 |   .data.pixel_data.hsync_offset_lo = 0x28,
         |                                          }}
     489 |   .data.pixel_data.hsync_pulse_width_lo = 0x80,
         |                                               }}
     490 |   .data.pixel_data.vsync_offset_pulse_width_lo = 0x14,
         |                                                      }}
     491 |   .data.pixel_data.hsync_vsync_offset_pulse_width_hi = 0x00,
         |                                                            }}
   ......
     494 |  }, {
         |  }}
     495 |   .pixel_clock = 0,
         |                  -
         |                  {{0}}
     496 |   .data.other_data.type = 0xfd, /* Monitor ranges */
         |                           {   }}
     497 |   .data.other_data.data.range.min_vfreq = 59,
         |                                           { }}
     498 |   .data.other_data.data.range.max_vfreq = 61,
         |                                           { }}
     499 |   .data.other_data.data.range.min_hfreq_khz = 29,
         |                                               { }}
     500 |   .data.other_data.data.range.max_hfreq_khz = 32,
         |                                               { }}
     501 |   .data.other_data.data.range.pixel_clock_mhz = 4, /* 40 MHz */
         |                                                 {}}
     502 |   .data.other_data.data.range.flags = 0,
         |                                       {}}
   ......
     505 |  }, {
         |  }
     506 |   .pixel_clock = 0,
         |                  -
         |                  {{0}}
     507 |   .data.other_data.type = 0xfc, /* Model string */
         |                           {   }}
   ......
     511 |  }, {
         |  }
     512 |   .pixel_clock = 0,
         |                  -
         |                  {{0}}
     513 |   .data.other_data.type = 0xfe, /* Unspecified text / padding */
         |                           {   }}
   drivers/gpu/drm/tiny/gm12u320.c:514:35: warning: initialized field overwritten [-Woverride-init]
     514 |   .data.other_data.data.str.str = {
         |                                   ^
   drivers/gpu/drm/tiny/gm12u320.c:514:35: note: (near initialization for 'gm12u320_edid.detailed_timings[3].data.pixel_data')
>> drivers/gpu/drm/tiny/gm12u320.c:464:36: warning: missing braces around initializer [-Wmissing-braces]
     464 | static struct edid gm12u320_edid = {
         |                                    ^
   ......
     478 |   .pixel_clock = 3383,
         |                  {{  }}
     479 |   /* hactive = 848, hblank = 256 */
     480 |   .data.pixel_data.hactive_lo = 0x50,
         |                                     }}
     481 |   .data.pixel_data.hblank_lo = 0x00,
         |                                    }}
     482 |   .data.pixel_data.hactive_hblank_hi = 0x31,
         |                                            }}
     483 |   /* vactive = 480, vblank = 28 */
     484 |   .data.pixel_data.vactive_lo = 0xe0,
         |                                     }}
     485 |   .data.pixel_data.vblank_lo = 0x1c,
         |                                    }}
     486 |   .data.pixel_data.vactive_vblank_hi = 0x10,
         |                                            }}
     487 |   /* hsync offset 40 pw 128, vsync offset 1 pw 4 */
     488 |   .data.pixel_data.hsync_offset_lo = 0x28,
         |                                          }}
     489 |   .data.pixel_data.hsync_pulse_width_lo = 0x80,
         |                                               }}
     490 |   .data.pixel_data.vsync_offset_pulse_width_lo = 0x14,
         |                                                      }}
     491 |   .data.pixel_data.hsync_vsync_offset_pulse_width_hi = 0x00,
         |                                                            }}
   ......
     494 |  }, {
         |  }}
     495 |   .pixel_clock = 0,
         |                  -
         |                  {{0}}
     496 |   .data.other_data.type = 0xfd, /* Monitor ranges */
         |                           {   }}
     497 |   .data.other_data.data.range.min_vfreq = 59,
         |                                           { }}
     498 |   .data.other_data.data.range.max_vfreq = 61,
         |                                           { }}
     499 |   .data.other_data.data.range.min_hfreq_khz = 29,
         |                                               { }}
     500 |   .data.other_data.data.range.max_hfreq_khz = 32,
         |                                               { }}
     501 |   .data.other_data.data.range.pixel_clock_mhz = 4, /* 40 MHz */
         |                                                 {}}
     502 |   .data.other_data.data.range.flags = 0,
         |                                       {}}
   ......
     505 |  }, {
         |  }
     506 |   .pixel_clock = 0,
         |                  -
         |                  {{0}}
     507 |   .data.other_data.type = 0xfc, /* Model string */
         |                           {   }}
   ......
     511 |  }, {
         |  }
     512 |   .pixel_clock = 0,
         |                  -
         |                  {{0}}
     513 |   .data.other_data.type = 0xfe, /* Unspecified text / padding */
         |                           {   }}
   ......
     517 |  } },
         |  }
>> drivers/gpu/drm/tiny/gm12u320.c:464:36: warning: missing braces around initializer [-Wmissing-braces]
     464 | static struct edid gm12u320_edid = {
         |                                    ^
   ......
     478 |   .pixel_clock = 3383,
         |                  {{  }}
     479 |   /* hactive = 848, hblank = 256 */
     480 |   .data.pixel_data.hactive_lo = 0x50,
         |                                     }}
     481 |   .data.pixel_data.hblank_lo = 0x00,
         |                                    }}
     482 |   .data.pixel_data.hactive_hblank_hi = 0x31,
         |                                            }}
     483 |   /* vactive = 480, vblank = 28 */
     484 |   .data.pixel_data.vactive_lo = 0xe0,
         |                                     }}
     485 |   .data.pixel_data.vblank_lo = 0x1c,
         |                                    }}
     486 |   .data.pixel_data.vactive_vblank_hi = 0x10,
         |                                            }}
     487 |   /* hsync offset 40 pw 128, vsync offset 1 pw 4 */
     488 |   .data.pixel_data.hsync_offset_lo = 0x28,
         |                                          }}
     489 |   .data.pixel_data.hsync_pulse_width_lo = 0x80,
         |                                               }}
     490 |   .data.pixel_data.vsync_offset_pulse_width_lo = 0x14,
         |                                                      }}
     491 |   .data.pixel_data.hsync_vsync_offset_pulse_width_hi = 0x00,
         |                                                            }}
   ......
     494 |  }, {
         |  }}
     495 |   .pixel_clock = 0,
         |                  -
         |                  {{0}}
     496 |   .data.other_data.type = 0xfd, /* Monitor ranges */
         |                           {   }}
     497 |   .data.other_data.data.range.min_vfreq = 59,
         |                                           { }}
     498 |   .data.other_data.data.range.max_vfreq = 61,
         |                                           { }}
     499 |   .data.other_data.data.range.min_hfreq_khz = 29,
         |                                               { }}
     500 |   .data.other_data.data.range.max_hfreq_khz = 32,
         |                                               { }}
     501 |   .data.other_data.data.range.pixel_clock_mhz = 4, /* 40 MHz */
         |                                                 {}}
     502 |   .data.other_data.data.range.flags = 0,
         |                                       {}}
   ......
     505 |  }, {
         |  }
     506 |   .pixel_clock = 0,
         |                  -
         |                  {{0}}
     507 |   .data.other_data.type = 0xfc, /* Model string */
         |                           {   }}
   ......
     511 |  }, {
         |  }
     512 |   .pixel_clock = 0,
         |                  -
         |                  {{0}}
     513 |   .data.other_data.type = 0xfe, /* Unspecified text / padding */
         |                           {   }}
   ......
     517 |  } },
         |  }
>> drivers/gpu/drm/tiny/gm12u320.c:464:36: warning: missing braces around initializer [-Wmissing-braces]
     464 | static struct edid gm12u320_edid = {
         |                                    ^
   ......
     478 |   .pixel_clock = 3383,
         |                  {{  }}
     479 |   /* hactive = 848, hblank = 256 */
     480 |   .data.pixel_data.hactive_lo = 0x50,
         |                                     }}
     481 |   .data.pixel_data.hblank_lo = 0x00,
         |                                    }}
     482 |   .data.pixel_data.hactive_hblank_hi = 0x31,
         |                                            }}
     483 |   /* vactive = 480, vblank = 28 */
     484 |   .data.pixel_data.vactive_lo = 0xe0,
         |                                     }}
     485 |   .data.pixel_data.vblank_lo = 0x1c,
         |                                    }}
     486 |   .data.pixel_data.vactive_vblank_hi = 0x10,
         |                                            }}
     487 |   /* hsync offset 40 pw 128, vsync offset 1 pw 4 */
     488 |   .data.pixel_data.hsync_offset_lo = 0x28,
         |                                          }}
     489 |   .data.pixel_data.hsync_pulse_width_lo = 0x80,
         |                                               }}
     490 |   .data.pixel_data.vsync_offset_pulse_width_lo = 0x14,
         |                                                      }}
     491 |   .data.pixel_data.hsync_vsync_offset_pulse_width_hi = 0x00,
         |                                                            }}
   ......
     494 |  }, {
         |  }}
     495 |   .pixel_clock = 0,
         |                  -
         |                  {{0}}
     496 |   .data.other_data.type = 0xfd, /* Monitor ranges */
         |                           {   }}
     497 |   .data.other_data.data.range.min_vfreq = 59,
         |                                           { }}
     498 |   .data.other_data.data.range.max_vfreq = 61,
         |                                           { }}
     499 |   .data.other_data.data.range.min_hfreq_khz = 29,
         |                                               { }}
     500 |   .data.other_data.data.range.max_hfreq_khz = 32,
         |                                               { }}
     501 |   .data.other_data.data.range.pixel_clock_mhz = 4, /* 40 MHz */
         |                                                 {}}
     502 |   .data.other_data.data.range.flags = 0,
         |                                       {}}
   ......
     505 |  }, {
         |  }
     506 |   .pixel_clock = 0,
         |                  -
         |                  {{0}}
     507 |   .data.other_data.type = 0xfc, /* Model string */
         |                           {   }}
   ......
     511 |  }, {
         |  }
     512 |   .pixel_clock = 0,
         |                  -
         |                  {{0}}
     513 |   .data.other_data.type = 0xfe, /* Unspecified text / padding */
         |                           {   }}
   ......
     517 |  } },
         |  }


vim +464 drivers/gpu/drm/tiny/gm12u320.c

e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  457  
e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  458  /*
e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  459   * We use fake EDID info so that userspace know that it is dealing with
e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  460   * an Acer projector, rather then listing this as an "unknown" monitor.
e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  461   * Note this assumes this driver is only ever used with the Acer C120, if we
e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  462   * add support for other devices the vendor and model should be parameterized.
e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  463   */
e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 @464  static struct edid gm12u320_edid = {
e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  465  	.header		= { 0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00 },
e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  466  	.mfg_id		= { 0x04, 0x72 },	/* "ACR" */
e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  467  	.prod_code	= { 0x20, 0xc1 },	/* C120h */
e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  468  	.serial		= 0xaa55aa55,
e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  469  	.mfg_week	= 1,
e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  470  	.mfg_year	= 16,
e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  471  	.version	= 1,			/* EDID 1.3 */
e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  472  	.revision	= 3,			/* EDID 1.3 */
e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  473  	.input		= 0x08,			/* Analog input */
e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  474  	.features	= 0x0a,			/* Pref timing in DTD 1 */
e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  475  	.standard_timings = { { 1, 1 }, { 1, 1 }, { 1, 1 }, { 1, 1 },
e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  476  			      { 1, 1 }, { 1, 1 }, { 1, 1 }, { 1, 1 } },
e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  477  	.detailed_timings = { {
e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  478  		.pixel_clock = 3383,
e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  479  		/* hactive = 848, hblank = 256 */
e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  480  		.data.pixel_data.hactive_lo = 0x50,
e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  481  		.data.pixel_data.hblank_lo = 0x00,
e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  482  		.data.pixel_data.hactive_hblank_hi = 0x31,
e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  483  		/* vactive = 480, vblank = 28 */
e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  484  		.data.pixel_data.vactive_lo = 0xe0,
e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  485  		.data.pixel_data.vblank_lo = 0x1c,
e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  486  		.data.pixel_data.vactive_vblank_hi = 0x10,
e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  487  		/* hsync offset 40 pw 128, vsync offset 1 pw 4 */
e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  488  		.data.pixel_data.hsync_offset_lo = 0x28,
e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  489  		.data.pixel_data.hsync_pulse_width_lo = 0x80,
e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  490  		.data.pixel_data.vsync_offset_pulse_width_lo = 0x14,
e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  491  		.data.pixel_data.hsync_vsync_offset_pulse_width_hi = 0x00,
e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  492  		/* Digital separate syncs, hsync+, vsync+ */
e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  493  		.data.pixel_data.misc = 0x1e,
e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  494  	}, {
e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  495  		.pixel_clock = 0,
e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  496  		.data.other_data.type = 0xfd, /* Monitor ranges */
e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  497  		.data.other_data.data.range.min_vfreq = 59,
e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  498  		.data.other_data.data.range.max_vfreq = 61,
e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  499  		.data.other_data.data.range.min_hfreq_khz = 29,
e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  500  		.data.other_data.data.range.max_hfreq_khz = 32,
e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  501  		.data.other_data.data.range.pixel_clock_mhz = 4, /* 40 MHz */
e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  502  		.data.other_data.data.range.flags = 0,
e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  503  		.data.other_data.data.range.formula.cvt = {
e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  504  			0xa0, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20 },
e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  505  	}, {
e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  506  		.pixel_clock = 0,
e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  507  		.data.other_data.type = 0xfc, /* Model string */
e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  508  		.data.other_data.data.str.str = {
e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  509  			'P', 'r', 'o', 'j', 'e', 'c', 't', 'o', 'r', '\n',
e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  510  			' ', ' ',  ' ' },
e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  511  	}, {
e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  512  		.pixel_clock = 0,
e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  513  		.data.other_data.type = 0xfe, /* Unspecified text / padding */
e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  514  		.data.other_data.data.str.str = {
e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  515  			'\n', ' ', ' ', ' ', ' ', ' ', ' ', ' ', ' ', ' ',
e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  516  			' ', ' ',  ' ' },
e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  517  	} },
e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  518  	.checksum = 0x13,
e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  519  };
e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  520  

-- 
0-DAY CI Kernel Test Service
https://01.org/lkp

Re: [Intel-gfx] [PATCH v2 03/11] drm/edid: slightly restructure timing and non-timing descriptor structs

[kernel test robot]

Hi Jani,

I love your patch! Yet something to improve:

[auto build test ERROR on drm/drm-next]
[also build test ERROR on drm-intel/for-linux-next drm-tip/drm-tip v5.17 next-20220328]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]

url:    https://github.com/intel-lab-lkp/linux/commits/Jani-Nikula/drm-edid-constify-EDID-parsing-with-some-fixes/20220328-171858
base:   git://anongit.freedesktop.org/drm/drm drm-next
config: i386-randconfig-a012-20220328 (https://download.01.org/0day-ci/archive/20220328/202203282045.xd3D6oF8-lkp@intel.com/config)
compiler: clang version 15.0.0 (https://github.com/llvm/llvm-project 0f6d9501cf49ce02937099350d08f20c4af86f3d)
reproduce (this is a W=1 build):
        wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
        chmod +x ~/bin/make.cross
        # https://github.com/intel-lab-lkp/linux/commit/f538c9296c54ce8f878432153584a68939ffc111
        git remote add linux-review https://github.com/intel-lab-lkp/linux
        git fetch --no-tags linux-review Jani-Nikula/drm-edid-constify-EDID-parsing-with-some-fixes/20220328-171858
        git checkout f538c9296c54ce8f878432153584a68939ffc111
        # save the config file to linux build tree
        mkdir build_dir
        COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross W=1 O=build_dir ARCH=i386 SHELL=/bin/bash drivers/gpu/drm/tiny/

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>

All errors (new ones prefixed by >>):

>> drivers/gpu/drm/tiny/gm12u320.c:478:4: error: field designator 'pixel_clock' does not refer to any field in type 'struct detailed_timing'
                   .pixel_clock = 3383,
                    ^
   drivers/gpu/drm/tiny/gm12u320.c:495:4: error: field designator 'pixel_clock' does not refer to any field in type 'struct detailed_timing'
                   .pixel_clock = 0,
                    ^
>> drivers/gpu/drm/tiny/gm12u320.c:496:9: error: field designator 'other_data' does not refer to any field in type 'union (unnamed union at include/drm/drm_edid.h:173:2)'
                   .data.other_data.type = 0xfd, /* Monitor ranges */
                         ^
   drivers/gpu/drm/tiny/gm12u320.c:497:9: error: field designator 'other_data' does not refer to any field in type 'union (unnamed union at include/drm/drm_edid.h:173:2)'
                   .data.other_data.data.range.min_vfreq = 59,
                         ^
   drivers/gpu/drm/tiny/gm12u320.c:498:9: error: field designator 'other_data' does not refer to any field in type 'union (unnamed union at include/drm/drm_edid.h:173:2)'
                   .data.other_data.data.range.max_vfreq = 61,
                         ^
   drivers/gpu/drm/tiny/gm12u320.c:499:9: error: field designator 'other_data' does not refer to any field in type 'union (unnamed union at include/drm/drm_edid.h:173:2)'
                   .data.other_data.data.range.min_hfreq_khz = 29,
                         ^
   drivers/gpu/drm/tiny/gm12u320.c:500:9: error: field designator 'other_data' does not refer to any field in type 'union (unnamed union at include/drm/drm_edid.h:173:2)'
                   .data.other_data.data.range.max_hfreq_khz = 32,
                         ^
   drivers/gpu/drm/tiny/gm12u320.c:501:9: error: field designator 'other_data' does not refer to any field in type 'union (unnamed union at include/drm/drm_edid.h:173:2)'
                   .data.other_data.data.range.pixel_clock_mhz = 4, /* 40 MHz */
                         ^
   drivers/gpu/drm/tiny/gm12u320.c:502:9: error: field designator 'other_data' does not refer to any field in type 'union (unnamed union at include/drm/drm_edid.h:173:2)'
                   .data.other_data.data.range.flags = 0,
                         ^
   drivers/gpu/drm/tiny/gm12u320.c:503:9: error: field designator 'other_data' does not refer to any field in type 'union (unnamed union at include/drm/drm_edid.h:173:2)'
                   .data.other_data.data.range.formula.cvt = {
                         ^
   drivers/gpu/drm/tiny/gm12u320.c:506:4: error: field designator 'pixel_clock' does not refer to any field in type 'struct detailed_timing'
                   .pixel_clock = 0,
                    ^
   drivers/gpu/drm/tiny/gm12u320.c:507:9: error: field designator 'other_data' does not refer to any field in type 'union (unnamed union at include/drm/drm_edid.h:173:2)'
                   .data.other_data.type = 0xfc, /* Model string */
                         ^
   drivers/gpu/drm/tiny/gm12u320.c:508:9: error: field designator 'other_data' does not refer to any field in type 'union (unnamed union at include/drm/drm_edid.h:173:2)'
                   .data.other_data.data.str.str = {
                         ^
   drivers/gpu/drm/tiny/gm12u320.c:512:4: error: field designator 'pixel_clock' does not refer to any field in type 'struct detailed_timing'
                   .pixel_clock = 0,
                    ^
   drivers/gpu/drm/tiny/gm12u320.c:513:9: error: field designator 'other_data' does not refer to any field in type 'union (unnamed union at include/drm/drm_edid.h:173:2)'
                   .data.other_data.type = 0xfe, /* Unspecified text / padding */
                         ^
   drivers/gpu/drm/tiny/gm12u320.c:514:9: error: field designator 'other_data' does not refer to any field in type 'union (unnamed union at include/drm/drm_edid.h:173:2)'
                   .data.other_data.data.str.str = {
                         ^
   16 errors generated.


vim +478 drivers/gpu/drm/tiny/gm12u320.c

e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  457  
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  458  /*
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  459   * We use fake EDID info so that userspace know that it is dealing with
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  460   * an Acer projector, rather then listing this as an "unknown" monitor.
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  461   * Note this assumes this driver is only ever used with the Acer C120, if we
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  462   * add support for other devices the vendor and model should be parameterized.
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  463   */
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  464  static struct edid gm12u320_edid = {
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  465  	.header		= { 0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00 },
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  466  	.mfg_id		= { 0x04, 0x72 },	/* "ACR" */
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  467  	.prod_code	= { 0x20, 0xc1 },	/* C120h */
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  468  	.serial		= 0xaa55aa55,
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  469  	.mfg_week	= 1,
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  470  	.mfg_year	= 16,
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  471  	.version	= 1,			/* EDID 1.3 */
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  472  	.revision	= 3,			/* EDID 1.3 */
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  473  	.input		= 0x08,			/* Analog input */
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  474  	.features	= 0x0a,			/* Pref timing in DTD 1 */
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  475  	.standard_timings = { { 1, 1 }, { 1, 1 }, { 1, 1 }, { 1, 1 },
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  476  			      { 1, 1 }, { 1, 1 }, { 1, 1 }, { 1, 1 } },
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  477  	.detailed_timings = { {
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 @478  		.pixel_clock = 3383,
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  479  		/* hactive = 848, hblank = 256 */
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  480  		.data.pixel_data.hactive_lo = 0x50,
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  481  		.data.pixel_data.hblank_lo = 0x00,
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  482  		.data.pixel_data.hactive_hblank_hi = 0x31,
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  483  		/* vactive = 480, vblank = 28 */
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  484  		.data.pixel_data.vactive_lo = 0xe0,
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  485  		.data.pixel_data.vblank_lo = 0x1c,
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  486  		.data.pixel_data.vactive_vblank_hi = 0x10,
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  487  		/* hsync offset 40 pw 128, vsync offset 1 pw 4 */
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  488  		.data.pixel_data.hsync_offset_lo = 0x28,
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  489  		.data.pixel_data.hsync_pulse_width_lo = 0x80,
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  490  		.data.pixel_data.vsync_offset_pulse_width_lo = 0x14,
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  491  		.data.pixel_data.hsync_vsync_offset_pulse_width_hi = 0x00,
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  492  		/* Digital separate syncs, hsync+, vsync+ */
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  493  		.data.pixel_data.misc = 0x1e,
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  494  	}, {
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  495  		.pixel_clock = 0,
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 @496  		.data.other_data.type = 0xfd, /* Monitor ranges */
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  497  		.data.other_data.data.range.min_vfreq = 59,
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  498  		.data.other_data.data.range.max_vfreq = 61,
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  499  		.data.other_data.data.range.min_hfreq_khz = 29,
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  500  		.data.other_data.data.range.max_hfreq_khz = 32,
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  501  		.data.other_data.data.range.pixel_clock_mhz = 4, /* 40 MHz */
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  502  		.data.other_data.data.range.flags = 0,
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  503  		.data.other_data.data.range.formula.cvt = {
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  504  			0xa0, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20 },
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  505  	}, {
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  506  		.pixel_clock = 0,
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  507  		.data.other_data.type = 0xfc, /* Model string */
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  508  		.data.other_data.data.str.str = {
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  509  			'P', 'r', 'o', 'j', 'e', 'c', 't', 'o', 'r', '\n',
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  510  			' ', ' ',  ' ' },
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  511  	}, {
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  512  		.pixel_clock = 0,
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  513  		.data.other_data.type = 0xfe, /* Unspecified text / padding */
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  514  		.data.other_data.data.str.str = {
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  515  			'\n', ' ', ' ', ' ', ' ', ' ', ' ', ' ', ' ', ' ',
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  516  			' ', ' ',  ' ' },
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  517  	} },
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  518  	.checksum = 0x13,
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  519  };
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  520  

-- 
0-DAY CI Kernel Test Service
https://01.org/lkp

Re: [Intel-gfx] [PATCH v2 03/11] drm/edid: slightly restructure timing and non-timing descriptor structs

[kernel test robot]

Hi Jani,

I love your patch! Yet something to improve:

[auto build test ERROR on drm/drm-next]
[also build test ERROR on drm-intel/for-linux-next drm-tip/drm-tip v5.17 next-20220328]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]

url:    https://github.com/intel-lab-lkp/linux/commits/Jani-Nikula/drm-edid-constify-EDID-parsing-with-some-fixes/20220328-171858
base:   git://anongit.freedesktop.org/drm/drm drm-next
config: i386-randconfig-a012-20220328 (https://download.01.org/0day-ci/archive/20220328/202203282045.xd3D6oF8-lkp@intel.com/config)
compiler: clang version 15.0.0 (https://github.com/llvm/llvm-project 0f6d9501cf49ce02937099350d08f20c4af86f3d)
reproduce (this is a W=1 build):
        wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
        chmod +x ~/bin/make.cross
        # https://github.com/intel-lab-lkp/linux/commit/f538c9296c54ce8f878432153584a68939ffc111
        git remote add linux-review https://github.com/intel-lab-lkp/linux
        git fetch --no-tags linux-review Jani-Nikula/drm-edid-constify-EDID-parsing-with-some-fixes/20220328-171858
        git checkout f538c9296c54ce8f878432153584a68939ffc111
        # save the config file to linux build tree
        mkdir build_dir
        COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross W=1 O=build_dir ARCH=i386 SHELL=/bin/bash drivers/gpu/drm/tiny/

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>

All errors (new ones prefixed by >>):

>> drivers/gpu/drm/tiny/gm12u320.c:478:4: error: field designator 'pixel_clock' does not refer to any field in type 'struct detailed_timing'
                   .pixel_clock = 3383,
                    ^
   drivers/gpu/drm/tiny/gm12u320.c:495:4: error: field designator 'pixel_clock' does not refer to any field in type 'struct detailed_timing'
                   .pixel_clock = 0,
                    ^
>> drivers/gpu/drm/tiny/gm12u320.c:496:9: error: field designator 'other_data' does not refer to any field in type 'union (unnamed union at include/drm/drm_edid.h:173:2)'
                   .data.other_data.type = 0xfd, /* Monitor ranges */
                         ^
   drivers/gpu/drm/tiny/gm12u320.c:497:9: error: field designator 'other_data' does not refer to any field in type 'union (unnamed union at include/drm/drm_edid.h:173:2)'
                   .data.other_data.data.range.min_vfreq = 59,
                         ^
   drivers/gpu/drm/tiny/gm12u320.c:498:9: error: field designator 'other_data' does not refer to any field in type 'union (unnamed union at include/drm/drm_edid.h:173:2)'
                   .data.other_data.data.range.max_vfreq = 61,
                         ^
   drivers/gpu/drm/tiny/gm12u320.c:499:9: error: field designator 'other_data' does not refer to any field in type 'union (unnamed union at include/drm/drm_edid.h:173:2)'
                   .data.other_data.data.range.min_hfreq_khz = 29,
                         ^
   drivers/gpu/drm/tiny/gm12u320.c:500:9: error: field designator 'other_data' does not refer to any field in type 'union (unnamed union at include/drm/drm_edid.h:173:2)'
                   .data.other_data.data.range.max_hfreq_khz = 32,
                         ^
   drivers/gpu/drm/tiny/gm12u320.c:501:9: error: field designator 'other_data' does not refer to any field in type 'union (unnamed union at include/drm/drm_edid.h:173:2)'
                   .data.other_data.data.range.pixel_clock_mhz = 4, /* 40 MHz */
                         ^
   drivers/gpu/drm/tiny/gm12u320.c:502:9: error: field designator 'other_data' does not refer to any field in type 'union (unnamed union at include/drm/drm_edid.h:173:2)'
                   .data.other_data.data.range.flags = 0,
                         ^
   drivers/gpu/drm/tiny/gm12u320.c:503:9: error: field designator 'other_data' does not refer to any field in type 'union (unnamed union at include/drm/drm_edid.h:173:2)'
                   .data.other_data.data.range.formula.cvt = {
                         ^
   drivers/gpu/drm/tiny/gm12u320.c:506:4: error: field designator 'pixel_clock' does not refer to any field in type 'struct detailed_timing'
                   .pixel_clock = 0,
                    ^
   drivers/gpu/drm/tiny/gm12u320.c:507:9: error: field designator 'other_data' does not refer to any field in type 'union (unnamed union at include/drm/drm_edid.h:173:2)'
                   .data.other_data.type = 0xfc, /* Model string */
                         ^
   drivers/gpu/drm/tiny/gm12u320.c:508:9: error: field designator 'other_data' does not refer to any field in type 'union (unnamed union at include/drm/drm_edid.h:173:2)'
                   .data.other_data.data.str.str = {
                         ^
   drivers/gpu/drm/tiny/gm12u320.c:512:4: error: field designator 'pixel_clock' does not refer to any field in type 'struct detailed_timing'
                   .pixel_clock = 0,
                    ^
   drivers/gpu/drm/tiny/gm12u320.c:513:9: error: field designator 'other_data' does not refer to any field in type 'union (unnamed union at include/drm/drm_edid.h:173:2)'
                   .data.other_data.type = 0xfe, /* Unspecified text / padding */
                         ^
   drivers/gpu/drm/tiny/gm12u320.c:514:9: error: field designator 'other_data' does not refer to any field in type 'union (unnamed union at include/drm/drm_edid.h:173:2)'
                   .data.other_data.data.str.str = {
                         ^
   16 errors generated.


vim +478 drivers/gpu/drm/tiny/gm12u320.c

e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  457  
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  458  /*
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  459   * We use fake EDID info so that userspace know that it is dealing with
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  460   * an Acer projector, rather then listing this as an "unknown" monitor.
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  461   * Note this assumes this driver is only ever used with the Acer C120, if we
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  462   * add support for other devices the vendor and model should be parameterized.
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  463   */
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  464  static struct edid gm12u320_edid = {
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  465  	.header		= { 0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00 },
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  466  	.mfg_id		= { 0x04, 0x72 },	/* "ACR" */
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  467  	.prod_code	= { 0x20, 0xc1 },	/* C120h */
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  468  	.serial		= 0xaa55aa55,
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  469  	.mfg_week	= 1,
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  470  	.mfg_year	= 16,
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  471  	.version	= 1,			/* EDID 1.3 */
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  472  	.revision	= 3,			/* EDID 1.3 */
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  473  	.input		= 0x08,			/* Analog input */
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  474  	.features	= 0x0a,			/* Pref timing in DTD 1 */
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  475  	.standard_timings = { { 1, 1 }, { 1, 1 }, { 1, 1 }, { 1, 1 },
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  476  			      { 1, 1 }, { 1, 1 }, { 1, 1 }, { 1, 1 } },
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  477  	.detailed_timings = { {
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 @478  		.pixel_clock = 3383,
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  479  		/* hactive = 848, hblank = 256 */
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  480  		.data.pixel_data.hactive_lo = 0x50,
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  481  		.data.pixel_data.hblank_lo = 0x00,
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  482  		.data.pixel_data.hactive_hblank_hi = 0x31,
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  483  		/* vactive = 480, vblank = 28 */
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  484  		.data.pixel_data.vactive_lo = 0xe0,
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  485  		.data.pixel_data.vblank_lo = 0x1c,
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  486  		.data.pixel_data.vactive_vblank_hi = 0x10,
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  487  		/* hsync offset 40 pw 128, vsync offset 1 pw 4 */
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  488  		.data.pixel_data.hsync_offset_lo = 0x28,
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  489  		.data.pixel_data.hsync_pulse_width_lo = 0x80,
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  490  		.data.pixel_data.vsync_offset_pulse_width_lo = 0x14,
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  491  		.data.pixel_data.hsync_vsync_offset_pulse_width_hi = 0x00,
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  492  		/* Digital separate syncs, hsync+, vsync+ */
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  493  		.data.pixel_data.misc = 0x1e,
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  494  	}, {
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  495  		.pixel_clock = 0,
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 @496  		.data.other_data.type = 0xfd, /* Monitor ranges */
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  497  		.data.other_data.data.range.min_vfreq = 59,
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  498  		.data.other_data.data.range.max_vfreq = 61,
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  499  		.data.other_data.data.range.min_hfreq_khz = 29,
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  500  		.data.other_data.data.range.max_hfreq_khz = 32,
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  501  		.data.other_data.data.range.pixel_clock_mhz = 4, /* 40 MHz */
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  502  		.data.other_data.data.range.flags = 0,
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  503  		.data.other_data.data.range.formula.cvt = {
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  504  			0xa0, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20 },
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  505  	}, {
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  506  		.pixel_clock = 0,
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  507  		.data.other_data.type = 0xfc, /* Model string */
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  508  		.data.other_data.data.str.str = {
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  509  			'P', 'r', 'o', 'j', 'e', 'c', 't', 'o', 'r', '\n',
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  510  			' ', ' ',  ' ' },
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  511  	}, {
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  512  		.pixel_clock = 0,
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  513  		.data.other_data.type = 0xfe, /* Unspecified text / padding */
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  514  		.data.other_data.data.str.str = {
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  515  			'\n', ' ', ' ', ' ', ' ', ' ', ' ', ' ', ' ', ' ',
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  516  			' ', ' ',  ' ' },
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  517  	} },
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  518  	.checksum = 0x13,
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  519  };
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  520  

-- 
0-DAY CI Kernel Test Service
https://01.org/lkp

Re: [Intel-gfx] [PATCH v2 03/11] drm/edid: slightly restructure timing and non-timing descriptor structs

[kernel test robot]

Hi Jani,

I love your patch! Yet something to improve:

[auto build test ERROR on drm/drm-next]
[also build test ERROR on drm-intel/for-linux-next drm-tip/drm-tip v5.17 next-20220328]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]

url:    https://github.com/intel-lab-lkp/linux/commits/Jani-Nikula/drm-edid-constify-EDID-parsing-with-some-fixes/20220328-171858
base:   git://anongit.freedesktop.org/drm/drm drm-next
config: mips-randconfig-r005-20220327 (https://download.01.org/0day-ci/archive/20220328/202203282023.nkTeTLA5-lkp@intel.com/config)
compiler: mips-linux-gcc (GCC) 11.2.0
reproduce (this is a W=1 build):
        wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
        chmod +x ~/bin/make.cross
        # https://github.com/intel-lab-lkp/linux/commit/f538c9296c54ce8f878432153584a68939ffc111
        git remote add linux-review https://github.com/intel-lab-lkp/linux
        git fetch --no-tags linux-review Jani-Nikula/drm-edid-constify-EDID-parsing-with-some-fixes/20220328-171858
        git checkout f538c9296c54ce8f878432153584a68939ffc111
        # save the config file to linux build tree
        mkdir build_dir
        COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-11.2.0 make.cross O=build_dir ARCH=mips SHELL=/bin/bash drivers/gpu/drm/tiny/

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>

All error/warnings (new ones prefixed by >>):

>> drivers/gpu/drm/tiny/gm12u320.c:478:18: error: 'struct detailed_timing' has no member named 'pixel_clock'
     478 |                 .pixel_clock = 3383,
         |                  ^~~~~~~~~~~
>> drivers/gpu/drm/tiny/gm12u320.c:464:36: warning: missing braces around initializer [-Wmissing-braces]
     464 | static struct edid gm12u320_edid = {
         |                                    ^
   ......
     478 |                 .pixel_clock = 3383,
         |                                {{  }}
     479 |                 /* hactive = 848, hblank = 256 */
     480 |                 .data.pixel_data.hactive_lo = 0x50,
         |                                                   }}
     481 |                 .data.pixel_data.hblank_lo = 0x00,
         |                                                  }}
     482 |                 .data.pixel_data.hactive_hblank_hi = 0x31,
         |                                                          }}
     483 |                 /* vactive = 480, vblank = 28 */
     484 |                 .data.pixel_data.vactive_lo = 0xe0,
         |                                                   }}
     485 |                 .data.pixel_data.vblank_lo = 0x1c,
         |                                                  }}
     486 |                 .data.pixel_data.vactive_vblank_hi = 0x10,
         |                                                          }}
     487 |                 /* hsync offset 40 pw 128, vsync offset 1 pw 4 */
     488 |                 .data.pixel_data.hsync_offset_lo = 0x28,
         |                                                        }}
     489 |                 .data.pixel_data.hsync_pulse_width_lo = 0x80,
         |                                                             }}
     490 |                 .data.pixel_data.vsync_offset_pulse_width_lo = 0x14,
         |                                                                    }}
     491 |                 .data.pixel_data.hsync_vsync_offset_pulse_width_hi = 0x00,
         |                                                                          }}
   ......
     494 |         }, {
         |         }}
   drivers/gpu/drm/tiny/gm12u320.c:495:18: error: 'struct detailed_timing' has no member named 'pixel_clock'
     495 |                 .pixel_clock = 0,
         |                  ^~~~~~~~~~~
>> drivers/gpu/drm/tiny/gm12u320.c:496:23: error: 'union <anonymous>' has no member named 'other_data'
     496 |                 .data.other_data.type = 0xfd, /* Monitor ranges */
         |                       ^~~~~~~~~~
   drivers/gpu/drm/tiny/gm12u320.c:496:41: warning: initialized field overwritten [-Woverride-init]
     496 |                 .data.other_data.type = 0xfd, /* Monitor ranges */
         |                                         ^~~~
   drivers/gpu/drm/tiny/gm12u320.c:496:41: note: (near initialization for 'gm12u320_edid.detailed_timings[1].data.pixel_data.pixel_clock')
   drivers/gpu/drm/tiny/gm12u320.c:497:23: error: 'union <anonymous>' has no member named 'other_data'
     497 |                 .data.other_data.data.range.min_vfreq = 59,
         |                       ^~~~~~~~~~
   drivers/gpu/drm/tiny/gm12u320.c:497:57: warning: initialized field overwritten [-Woverride-init]
     497 |                 .data.other_data.data.range.min_vfreq = 59,
         |                                                         ^~
   drivers/gpu/drm/tiny/gm12u320.c:497:57: note: (near initialization for 'gm12u320_edid.detailed_timings[1].data.pixel_data.pixel_clock')
   drivers/gpu/drm/tiny/gm12u320.c:498:23: error: 'union <anonymous>' has no member named 'other_data'
     498 |                 .data.other_data.data.range.max_vfreq = 61,
         |                       ^~~~~~~~~~
   drivers/gpu/drm/tiny/gm12u320.c:498:57: warning: initialized field overwritten [-Woverride-init]
     498 |                 .data.other_data.data.range.max_vfreq = 61,
         |                                                         ^~
   drivers/gpu/drm/tiny/gm12u320.c:498:57: note: (near initialization for 'gm12u320_edid.detailed_timings[1].data.pixel_data.pixel_clock')
   drivers/gpu/drm/tiny/gm12u320.c:499:23: error: 'union <anonymous>' has no member named 'other_data'
     499 |                 .data.other_data.data.range.min_hfreq_khz = 29,
         |                       ^~~~~~~~~~
   drivers/gpu/drm/tiny/gm12u320.c:499:61: warning: initialized field overwritten [-Woverride-init]
     499 |                 .data.other_data.data.range.min_hfreq_khz = 29,
         |                                                             ^~
   drivers/gpu/drm/tiny/gm12u320.c:499:61: note: (near initialization for 'gm12u320_edid.detailed_timings[1].data.pixel_data.pixel_clock')
   drivers/gpu/drm/tiny/gm12u320.c:500:23: error: 'union <anonymous>' has no member named 'other_data'
     500 |                 .data.other_data.data.range.max_hfreq_khz = 32,
         |                       ^~~~~~~~~~
   drivers/gpu/drm/tiny/gm12u320.c:500:61: warning: initialized field overwritten [-Woverride-init]
     500 |                 .data.other_data.data.range.max_hfreq_khz = 32,
         |                                                             ^~
   drivers/gpu/drm/tiny/gm12u320.c:500:61: note: (near initialization for 'gm12u320_edid.detailed_timings[1].data.pixel_data.pixel_clock')
   drivers/gpu/drm/tiny/gm12u320.c:501:23: error: 'union <anonymous>' has no member named 'other_data'
     501 |                 .data.other_data.data.range.pixel_clock_mhz = 4, /* 40 MHz */
         |                       ^~~~~~~~~~
   drivers/gpu/drm/tiny/gm12u320.c:501:63: warning: initialized field overwritten [-Woverride-init]
     501 |                 .data.other_data.data.range.pixel_clock_mhz = 4, /* 40 MHz */
         |                                                               ^
   drivers/gpu/drm/tiny/gm12u320.c:501:63: note: (near initialization for 'gm12u320_edid.detailed_timings[1].data.pixel_data.pixel_clock')
   drivers/gpu/drm/tiny/gm12u320.c:502:23: error: 'union <anonymous>' has no member named 'other_data'
     502 |                 .data.other_data.data.range.flags = 0,
         |                       ^~~~~~~~~~
   drivers/gpu/drm/tiny/gm12u320.c:502:53: warning: initialized field overwritten [-Woverride-init]
     502 |                 .data.other_data.data.range.flags = 0,
         |                                                     ^
   drivers/gpu/drm/tiny/gm12u320.c:502:53: note: (near initialization for 'gm12u320_edid.detailed_timings[1].data.pixel_data.pixel_clock')
   drivers/gpu/drm/tiny/gm12u320.c:503:23: error: 'union <anonymous>' has no member named 'other_data'
     503 |                 .data.other_data.data.range.formula.cvt = {
         |                       ^~~~~~~~~~
>> drivers/gpu/drm/tiny/gm12u320.c:464:36: warning: missing braces around initializer [-Wmissing-braces]
     464 | static struct edid gm12u320_edid = {
         |                                    ^
   ......
     478 |                 .pixel_clock = 3383,
         |                                {{  }}
     479 |                 /* hactive = 848, hblank = 256 */
     480 |                 .data.pixel_data.hactive_lo = 0x50,
         |                                                   }}
     481 |                 .data.pixel_data.hblank_lo = 0x00,
         |                                                  }}
     482 |                 .data.pixel_data.hactive_hblank_hi = 0x31,
         |                                                          }}
     483 |                 /* vactive = 480, vblank = 28 */
     484 |                 .data.pixel_data.vactive_lo = 0xe0,
         |                                                   }}
     485 |                 .data.pixel_data.vblank_lo = 0x1c,
         |                                                  }}
     486 |                 .data.pixel_data.vactive_vblank_hi = 0x10,
         |                                                          }}
     487 |                 /* hsync offset 40 pw 128, vsync offset 1 pw 4 */
     488 |                 .data.pixel_data.hsync_offset_lo = 0x28,
         |                                                        }}
     489 |                 .data.pixel_data.hsync_pulse_width_lo = 0x80,
         |                                                             }}
     490 |                 .data.pixel_data.vsync_offset_pulse_width_lo = 0x14,
         |                                                                    }}
     491 |                 .data.pixel_data.hsync_vsync_offset_pulse_width_hi = 0x00,
         |                                                                          }}
   ......
     494 |         }, {
         |         }}
     495 |                 .pixel_clock = 0,
         |                                -
         |                                {{0}}
     496 |                 .data.other_data.type = 0xfd, /* Monitor ranges */
         |                                         {   }}
     497 |                 .data.other_data.data.range.min_vfreq = 59,
         |                                                         { }}
     498 |                 .data.other_data.data.range.max_vfreq = 61,
         |                                                         { }}
     499 |                 .data.other_data.data.range.min_hfreq_khz = 29,
         |                                                             { }}
     500 |                 .data.other_data.data.range.max_hfreq_khz = 32,
         |                                                             { }}
     501 |                 .data.other_data.data.range.pixel_clock_mhz = 4, /* 40 MHz */
         |                                                               {}}
     502 |                 .data.other_data.data.range.flags = 0,
         |                                                     {}}
   drivers/gpu/drm/tiny/gm12u320.c:503:59: warning: initialized field overwritten [-Woverride-init]
     503 |                 .data.other_data.data.range.formula.cvt = {
         |                                                           ^
   drivers/gpu/drm/tiny/gm12u320.c:503:59: note: (near initialization for 'gm12u320_edid.detailed_timings[1].data.pixel_data')
>> drivers/gpu/drm/tiny/gm12u320.c:464:36: warning: missing braces around initializer [-Wmissing-braces]
     464 | static struct edid gm12u320_edid = {
         |                                    ^
   ......
     478 |                 .pixel_clock = 3383,
         |                                {{  }}
     479 |                 /* hactive = 848, hblank = 256 */
     480 |                 .data.pixel_data.hactive_lo = 0x50,
         |                                                   }}
     481 |                 .data.pixel_data.hblank_lo = 0x00,
         |                                                  }}
     482 |                 .data.pixel_data.hactive_hblank_hi = 0x31,
         |                                                          }}
     483 |                 /* vactive = 480, vblank = 28 */
     484 |                 .data.pixel_data.vactive_lo = 0xe0,
         |                                                   }}
     485 |                 .data.pixel_data.vblank_lo = 0x1c,
         |                                                  }}
     486 |                 .data.pixel_data.vactive_vblank_hi = 0x10,
         |                                                          }}
     487 |                 /* hsync offset 40 pw 128, vsync offset 1 pw 4 */
     488 |                 .data.pixel_data.hsync_offset_lo = 0x28,
         |                                                        }}
     489 |                 .data.pixel_data.hsync_pulse_width_lo = 0x80,
         |                                                             }}
     490 |                 .data.pixel_data.vsync_offset_pulse_width_lo = 0x14,
         |                                                                    }}
     491 |                 .data.pixel_data.hsync_vsync_offset_pulse_width_hi = 0x00,
         |                                                                          }}
   ......
     494 |         }, {
         |         }}
     495 |                 .pixel_clock = 0,
         |                                -
         |                                {{0}}
     496 |                 .data.other_data.type = 0xfd, /* Monitor ranges */
         |                                         {   }}
     497 |                 .data.other_data.data.range.min_vfreq = 59,
         |                                                         { }}
     498 |                 .data.other_data.data.range.max_vfreq = 61,
         |                                                         { }}
     499 |                 .data.other_data.data.range.min_hfreq_khz = 29,
         |                                                             { }}
     500 |                 .data.other_data.data.range.max_hfreq_khz = 32,
         |                                                             { }}
     501 |                 .data.other_data.data.range.pixel_clock_mhz = 4, /* 40 MHz */
         |                                                               {}}
     502 |                 .data.other_data.data.range.flags = 0,
         |                                                     {}}
   ......
     505 |         }, {
         |         }
   drivers/gpu/drm/tiny/gm12u320.c:506:18: error: 'struct detailed_timing' has no member named 'pixel_clock'
     506 |                 .pixel_clock = 0,
         |                  ^~~~~~~~~~~
   drivers/gpu/drm/tiny/gm12u320.c:507:23: error: 'union <anonymous>' has no member named 'other_data'
     507 |                 .data.other_data.type = 0xfc, /* Model string */
         |                       ^~~~~~~~~~
   drivers/gpu/drm/tiny/gm12u320.c:507:41: warning: initialized field overwritten [-Woverride-init]
     507 |                 .data.other_data.type = 0xfc, /* Model string */
         |                                         ^~~~
   drivers/gpu/drm/tiny/gm12u320.c:507:41: note: (near initialization for 'gm12u320_edid.detailed_timings[2].data.pixel_data.pixel_clock')
   drivers/gpu/drm/tiny/gm12u320.c:508:23: error: 'union <anonymous>' has no member named 'other_data'
     508 |                 .data.other_data.data.str.str = {
         |                       ^~~~~~~~~~
>> drivers/gpu/drm/tiny/gm12u320.c:464:36: warning: missing braces around initializer [-Wmissing-braces]
     464 | static struct edid gm12u320_edid = {
         |                                    ^
   ......
     478 |                 .pixel_clock = 3383,
         |                                {{  }}
     479 |                 /* hactive = 848, hblank = 256 */
     480 |                 .data.pixel_data.hactive_lo = 0x50,
         |                                                   }}
     481 |                 .data.pixel_data.hblank_lo = 0x00,
         |                                                  }}
     482 |                 .data.pixel_data.hactive_hblank_hi = 0x31,
         |                                                          }}
     483 |                 /* vactive = 480, vblank = 28 */
     484 |                 .data.pixel_data.vactive_lo = 0xe0,
         |                                                   }}
     485 |                 .data.pixel_data.vblank_lo = 0x1c,
         |                                                  }}
     486 |                 .data.pixel_data.vactive_vblank_hi = 0x10,
         |                                                          }}
     487 |                 /* hsync offset 40 pw 128, vsync offset 1 pw 4 */
     488 |                 .data.pixel_data.hsync_offset_lo = 0x28,
         |                                                        }}
     489 |                 .data.pixel_data.hsync_pulse_width_lo = 0x80,
         |                                                             }}
     490 |                 .data.pixel_data.vsync_offset_pulse_width_lo = 0x14,
         |                                                                    }}
     491 |                 .data.pixel_data.hsync_vsync_offset_pulse_width_hi = 0x00,
         |                                                                          }}
   ......
     494 |         }, {
         |         }}
     495 |                 .pixel_clock = 0,
         |                                -
         |                                {{0}}
     496 |                 .data.other_data.type = 0xfd, /* Monitor ranges */
         |                                         {   }}
     497 |                 .data.other_data.data.range.min_vfreq = 59,
         |                                                         { }}
     498 |                 .data.other_data.data.range.max_vfreq = 61,
         |                                                         { }}
     499 |                 .data.other_data.data.range.min_hfreq_khz = 29,
         |                                                             { }}
     500 |                 .data.other_data.data.range.max_hfreq_khz = 32,
         |                                                             { }}
     501 |                 .data.other_data.data.range.pixel_clock_mhz = 4, /* 40 MHz */
         |                                                               {}}
     502 |                 .data.other_data.data.range.flags = 0,
         |                                                     {}}
   ......
     505 |         }, {
         |         }
     506 |                 .pixel_clock = 0,
         |                                -
         |                                {{0}}
     507 |                 .data.other_data.type = 0xfc, /* Model string */
         |                                         {   }}
   drivers/gpu/drm/tiny/gm12u320.c:508:49: warning: initialized field overwritten [-Woverride-init]
     508 |                 .data.other_data.data.str.str = {
         |                                                 ^
   drivers/gpu/drm/tiny/gm12u320.c:508:49: note: (near initialization for 'gm12u320_edid.detailed_timings[2].data.pixel_data')
>> drivers/gpu/drm/tiny/gm12u320.c:464:36: warning: missing braces around initializer [-Wmissing-braces]
     464 | static struct edid gm12u320_edid = {
         |                                    ^
   ......
     478 |                 .pixel_clock = 3383,
         |                                {{  }}
     479 |                 /* hactive = 848, hblank = 256 */
     480 |                 .data.pixel_data.hactive_lo = 0x50,
         |                                                   }}
     481 |                 .data.pixel_data.hblank_lo = 0x00,
         |                                                  }}
     482 |                 .data.pixel_data.hactive_hblank_hi = 0x31,
         |                                                          }}
     483 |                 /* vactive = 480, vblank = 28 */
     484 |                 .data.pixel_data.vactive_lo = 0xe0,
         |                                                   }}
     485 |                 .data.pixel_data.vblank_lo = 0x1c,
         |                                                  }}
     486 |                 .data.pixel_data.vactive_vblank_hi = 0x10,
         |                                                          }}
     487 |                 /* hsync offset 40 pw 128, vsync offset 1 pw 4 */
     488 |                 .data.pixel_data.hsync_offset_lo = 0x28,
         |                                                        }}
     489 |                 .data.pixel_data.hsync_pulse_width_lo = 0x80,
         |                                                             }}
     490 |                 .data.pixel_data.vsync_offset_pulse_width_lo = 0x14,
         |                                                                    }}
     491 |                 .data.pixel_data.hsync_vsync_offset_pulse_width_hi = 0x00,
         |                                                                          }}
   ......
     494 |         }, {
         |         }}
     495 |                 .pixel_clock = 0,
         |                                -
         |                                {{0}}
     496 |                 .data.other_data.type = 0xfd, /* Monitor ranges */
         |                                         {   }}
     497 |                 .data.other_data.data.range.min_vfreq = 59,
         |                                                         { }}
     498 |                 .data.other_data.data.range.max_vfreq = 61,
         |                                                         { }}
     499 |                 .data.other_data.data.range.min_hfreq_khz = 29,
         |                                                             { }}
     500 |                 .data.other_data.data.range.max_hfreq_khz = 32,
         |                                                             { }}
     501 |                 .data.other_data.data.range.pixel_clock_mhz = 4, /* 40 MHz */
         |                                                               {}}
     502 |                 .data.other_data.data.range.flags = 0,
         |                                                     {}}
   ......
     505 |         }, {
         |         }
     506 |                 .pixel_clock = 0,
         |                                -
         |                                {{0}}
     507 |                 .data.other_data.type = 0xfc, /* Model string */
         |                                         {   }}
   ......
     511 |         }, {
         |         }
   drivers/gpu/drm/tiny/gm12u320.c:512:18: error: 'struct detailed_timing' has no member named 'pixel_clock'
     512 |                 .pixel_clock = 0,
         |                  ^~~~~~~~~~~
   drivers/gpu/drm/tiny/gm12u320.c:513:23: error: 'union <anonymous>' has no member named 'other_data'
     513 |                 .data.other_data.type = 0xfe, /* Unspecified text / padding */
         |                       ^~~~~~~~~~
   drivers/gpu/drm/tiny/gm12u320.c:513:41: warning: initialized field overwritten [-Woverride-init]
     513 |                 .data.other_data.type = 0xfe, /* Unspecified text / padding */
         |                                         ^~~~
   drivers/gpu/drm/tiny/gm12u320.c:513:41: note: (near initialization for 'gm12u320_edid.detailed_timings[3].data.pixel_data.pixel_clock')
   drivers/gpu/drm/tiny/gm12u320.c:514:23: error: 'union <anonymous>' has no member named 'other_data'
     514 |                 .data.other_data.data.str.str = {
         |                       ^~~~~~~~~~
>> drivers/gpu/drm/tiny/gm12u320.c:464:36: warning: missing braces around initializer [-Wmissing-braces]
     464 | static struct edid gm12u320_edid = {
         |                                    ^
   ......
     478 |                 .pixel_clock = 3383,
         |                                {{  }}
     479 |                 /* hactive = 848, hblank = 256 */
     480 |                 .data.pixel_data.hactive_lo = 0x50,
         |                                                   }}
     481 |                 .data.pixel_data.hblank_lo = 0x00,
         |                                                  }}
     482 |                 .data.pixel_data.hactive_hblank_hi = 0x31,
         |                                                          }}
     483 |                 /* vactive = 480, vblank = 28 */
     484 |                 .data.pixel_data.vactive_lo = 0xe0,
         |                                                   }}
     485 |                 .data.pixel_data.vblank_lo = 0x1c,
         |                                                  }}
     486 |                 .data.pixel_data.vactive_vblank_hi = 0x10,
         |                                                          }}
     487 |                 /* hsync offset 40 pw 128, vsync offset 1 pw 4 */
     488 |                 .data.pixel_data.hsync_offset_lo = 0x28,
         |                                                        }}
     489 |                 .data.pixel_data.hsync_pulse_width_lo = 0x80,
         |                                                             }}
     490 |                 .data.pixel_data.vsync_offset_pulse_width_lo = 0x14,
         |                                                                    }}
     491 |                 .data.pixel_data.hsync_vsync_offset_pulse_width_hi = 0x00,
         |                                                                          }}
   ......
     494 |         }, {
         |         }}
     495 |                 .pixel_clock = 0,
         |                                -
         |                                {{0}}
     496 |                 .data.other_data.type = 0xfd, /* Monitor ranges */
         |                                         {   }}
     497 |                 .data.other_data.data.range.min_vfreq = 59,
         |                                                         { }}
     498 |                 .data.other_data.data.range.max_vfreq = 61,
         |                                                         { }}
     499 |                 .data.other_data.data.range.min_hfreq_khz = 29,
         |                                                             { }}
     500 |                 .data.other_data.data.range.max_hfreq_khz = 32,
         |                                                             { }}
     501 |                 .data.other_data.data.range.pixel_clock_mhz = 4, /* 40 MHz */
         |                                                               {}}
     502 |                 .data.other_data.data.range.flags = 0,
         |                                                     {}}
   ......
     505 |         }, {
         |         }
     506 |                 .pixel_clock = 0,
         |                                -
         |                                {{0}}
     507 |                 .data.other_data.type = 0xfc, /* Model string */
         |                                         {   }}
   ......
     511 |         }, {
         |         }
     512 |                 .pixel_clock = 0,
         |                                -
         |                                {{0}}
     513 |                 .data.other_data.type = 0xfe, /* Unspecified text / padding */
         |                                         {   }}
   drivers/gpu/drm/tiny/gm12u320.c:514:49: warning: initialized field overwritten [-Woverride-init]
     514 |                 .data.other_data.data.str.str = {
         |                                                 ^
   drivers/gpu/drm/tiny/gm12u320.c:514:49: note: (near initialization for 'gm12u320_edid.detailed_timings[3].data.pixel_data')
>> drivers/gpu/drm/tiny/gm12u320.c:464:36: warning: missing braces around initializer [-Wmissing-braces]
     464 | static struct edid gm12u320_edid = {
         |                                    ^
   ......
     478 |                 .pixel_clock = 3383,
         |                                {{  }}
     479 |                 /* hactive = 848, hblank = 256 */
     480 |                 .data.pixel_data.hactive_lo = 0x50,
         |                                                   }}
     481 |                 .data.pixel_data.hblank_lo = 0x00,
         |                                                  }}
     482 |                 .data.pixel_data.hactive_hblank_hi = 0x31,
         |                                                          }}
     483 |                 /* vactive = 480, vblank = 28 */
     484 |                 .data.pixel_data.vactive_lo = 0xe0,
         |                                                   }}
     485 |                 .data.pixel_data.vblank_lo = 0x1c,
         |                                                  }}
     486 |                 .data.pixel_data.vactive_vblank_hi = 0x10,
         |                                                          }}
     487 |                 /* hsync offset 40 pw 128, vsync offset 1 pw 4 */
     488 |                 .data.pixel_data.hsync_offset_lo = 0x28,
         |                                                        }}
     489 |                 .data.pixel_data.hsync_pulse_width_lo = 0x80,
         |                                                             }}
     490 |                 .data.pixel_data.vsync_offset_pulse_width_lo = 0x14,
         |                                                                    }}
     491 |                 .data.pixel_data.hsync_vsync_offset_pulse_width_hi = 0x00,
         |                                                                          }}
   ......
     494 |         }, {
         |         }}
     495 |                 .pixel_clock = 0,
         |                                -
         |                                {{0}}
     496 |                 .data.other_data.type = 0xfd, /* Monitor ranges */
         |                                         {   }}
     497 |                 .data.other_data.data.range.min_vfreq = 59,
         |                                                         { }}
     498 |                 .data.other_data.data.range.max_vfreq = 61,
         |                                                         { }}
     499 |                 .data.other_data.data.range.min_hfreq_khz = 29,
         |                                                             { }}
     500 |                 .data.other_data.data.range.max_hfreq_khz = 32,
         |                                                             { }}
     501 |                 .data.other_data.data.range.pixel_clock_mhz = 4, /* 40 MHz */
         |                                                               {}}
     502 |                 .data.other_data.data.range.flags = 0,
         |                                                     {}}
   ......
     505 |         }, {
         |         }
     506 |                 .pixel_clock = 0,
         |                                -
         |                                {{0}}
     507 |                 .data.other_data.type = 0xfc, /* Model string */
         |                                         {   }}
   ......
     511 |         }, {
         |         }
     512 |                 .pixel_clock = 0,
         |                                -
         |                                {{0}}
     513 |                 .data.other_data.type = 0xfe, /* Unspecified text / padding */
         |                                         {   }}
   ......
     517 |         } },
         |         }
>> drivers/gpu/drm/tiny/gm12u320.c:464:36: warning: missing braces around initializer [-Wmissing-braces]
     464 | static struct edid gm12u320_edid = {
         |                                    ^
   ......
     478 |                 .pixel_clock = 3383,
         |                                {{  }}
     479 |                 /* hactive = 848, hblank = 256 */
     480 |                 .data.pixel_data.hactive_lo = 0x50,
         |                                                   }}
     481 |                 .data.pixel_data.hblank_lo = 0x00,
         |                                                  }}
     482 |                 .data.pixel_data.hactive_hblank_hi = 0x31,
         |                                                          }}
     483 |                 /* vactive = 480, vblank = 28 */
     484 |                 .data.pixel_data.vactive_lo = 0xe0,
         |                                                   }}
     485 |                 .data.pixel_data.vblank_lo = 0x1c,
         |                                                  }}
     486 |                 .data.pixel_data.vactive_vblank_hi = 0x10,
         |                                                          }}
     487 |                 /* hsync offset 40 pw 128, vsync offset 1 pw 4 */
     488 |                 .data.pixel_data.hsync_offset_lo = 0x28,
         |                                                        }}
     489 |                 .data.pixel_data.hsync_pulse_width_lo = 0x80,
         |                                                             }}
     490 |                 .data.pixel_data.vsync_offset_pulse_width_lo = 0x14,
         |                                                                    }}
     491 |                 .data.pixel_data.hsync_vsync_offset_pulse_width_hi = 0x00,
         |                                                                          }}
   ......
     494 |         }, {
         |         }}
     495 |                 .pixel_clock = 0,
         |                                -
         |                                {{0}}
     496 |                 .data.other_data.type = 0xfd, /* Monitor ranges */
         |                                         {   }}
     497 |                 .data.other_data.data.range.min_vfreq = 59,
         |                                                         { }}
     498 |                 .data.other_data.data.range.max_vfreq = 61,
         |                                                         { }}
     499 |                 .data.other_data.data.range.min_hfreq_khz = 29,
         |                                                             { }}
     500 |                 .data.other_data.data.range.max_hfreq_khz = 32,
         |                                                             { }}
     501 |                 .data.other_data.data.range.pixel_clock_mhz = 4, /* 40 MHz */
         |                                                               {}}
     502 |                 .data.other_data.data.range.flags = 0,
         |                                                     {}}
   ......
     505 |         }, {
         |         }
     506 |                 .pixel_clock = 0,
         |                                -
         |                                {{0}}
     507 |                 .data.other_data.type = 0xfc, /* Model string */
         |                                         {   }}
   ......
     511 |         }, {
         |         }
     512 |                 .pixel_clock = 0,
         |                                -
         |                                {{0}}
     513 |                 .data.other_data.type = 0xfe, /* Unspecified text / padding */
         |                                         {   }}
   ......
     517 |         } },
         |         }
>> drivers/gpu/drm/tiny/gm12u320.c:464:36: warning: missing braces around initializer [-Wmissing-braces]
     464 | static struct edid gm12u320_edid = {
         |                                    ^
   ......
     478 |                 .pixel_clock = 3383,
         |                                {{  }}
     479 |                 /* hactive = 848, hblank = 256 */
     480 |                 .data.pixel_data.hactive_lo = 0x50,
         |                                                   }}
     481 |                 .data.pixel_data.hblank_lo = 0x00,
         |                                                  }}
     482 |                 .data.pixel_data.hactive_hblank_hi = 0x31,
         |                                                          }}
     483 |                 /* vactive = 480, vblank = 28 */
     484 |                 .data.pixel_data.vactive_lo = 0xe0,
         |                                                   }}
     485 |                 .data.pixel_data.vblank_lo = 0x1c,
         |                                                  }}
     486 |                 .data.pixel_data.vactive_vblank_hi = 0x10,
         |                                                          }}
     487 |                 /* hsync offset 40 pw 128, vsync offset 1 pw 4 */
     488 |                 .data.pixel_data.hsync_offset_lo = 0x28,
         |                                                        }}
     489 |                 .data.pixel_data.hsync_pulse_width_lo = 0x80,
         |                                                             }}
     490 |                 .data.pixel_data.vsync_offset_pulse_width_lo = 0x14,
         |                                                                    }}
     491 |                 .data.pixel_data.hsync_vsync_offset_pulse_width_hi = 0x00,
         |                                                                          }}
   ......
     494 |         }, {
         |         }}
     495 |                 .pixel_clock = 0,
         |                                -
         |                                {{0}}
     496 |                 .data.other_data.type = 0xfd, /* Monitor ranges */
         |                                         {   }}
     497 |                 .data.other_data.data.range.min_vfreq = 59,
         |                                                         { }}
     498 |                 .data.other_data.data.range.max_vfreq = 61,
         |                                                         { }}
     499 |                 .data.other_data.data.range.min_hfreq_khz = 29,
         |                                                             { }}
     500 |                 .data.other_data.data.range.max_hfreq_khz = 32,
         |                                                             { }}
     501 |                 .data.other_data.data.range.pixel_clock_mhz = 4, /* 40 MHz */
         |                                                               {}}
     502 |                 .data.other_data.data.range.flags = 0,
         |                                                     {}}
   ......
     505 |         }, {
         |         }
     506 |                 .pixel_clock = 0,
         |                                -
         |                                {{0}}
     507 |                 .data.other_data.type = 0xfc, /* Model string */
         |                                         {   }}
   ......
     511 |         }, {
         |         }
     512 |                 .pixel_clock = 0,
         |                                -
         |                                {{0}}
     513 |                 .data.other_data.type = 0xfe, /* Unspecified text / padding */
         |                                         {   }}
   ......
     517 |         } },
         |         }


vim +478 drivers/gpu/drm/tiny/gm12u320.c

e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  457  
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  458  /*
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  459   * We use fake EDID info so that userspace know that it is dealing with
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  460   * an Acer projector, rather then listing this as an "unknown" monitor.
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  461   * Note this assumes this driver is only ever used with the Acer C120, if we
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  462   * add support for other devices the vendor and model should be parameterized.
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  463   */
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 @464  static struct edid gm12u320_edid = {
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  465  	.header		= { 0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00 },
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  466  	.mfg_id		= { 0x04, 0x72 },	/* "ACR" */
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  467  	.prod_code	= { 0x20, 0xc1 },	/* C120h */
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  468  	.serial		= 0xaa55aa55,
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  469  	.mfg_week	= 1,
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  470  	.mfg_year	= 16,
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  471  	.version	= 1,			/* EDID 1.3 */
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  472  	.revision	= 3,			/* EDID 1.3 */
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  473  	.input		= 0x08,			/* Analog input */
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  474  	.features	= 0x0a,			/* Pref timing in DTD 1 */
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  475  	.standard_timings = { { 1, 1 }, { 1, 1 }, { 1, 1 }, { 1, 1 },
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  476  			      { 1, 1 }, { 1, 1 }, { 1, 1 }, { 1, 1 } },
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  477  	.detailed_timings = { {
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 @478  		.pixel_clock = 3383,
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  479  		/* hactive = 848, hblank = 256 */
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  480  		.data.pixel_data.hactive_lo = 0x50,
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  481  		.data.pixel_data.hblank_lo = 0x00,
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  482  		.data.pixel_data.hactive_hblank_hi = 0x31,
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  483  		/* vactive = 480, vblank = 28 */
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  484  		.data.pixel_data.vactive_lo = 0xe0,
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  485  		.data.pixel_data.vblank_lo = 0x1c,
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  486  		.data.pixel_data.vactive_vblank_hi = 0x10,
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  487  		/* hsync offset 40 pw 128, vsync offset 1 pw 4 */
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  488  		.data.pixel_data.hsync_offset_lo = 0x28,
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  489  		.data.pixel_data.hsync_pulse_width_lo = 0x80,
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  490  		.data.pixel_data.vsync_offset_pulse_width_lo = 0x14,
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  491  		.data.pixel_data.hsync_vsync_offset_pulse_width_hi = 0x00,
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  492  		/* Digital separate syncs, hsync+, vsync+ */
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  493  		.data.pixel_data.misc = 0x1e,
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  494  	}, {
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  495  		.pixel_clock = 0,
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 @496  		.data.other_data.type = 0xfd, /* Monitor ranges */
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  497  		.data.other_data.data.range.min_vfreq = 59,
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  498  		.data.other_data.data.range.max_vfreq = 61,
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  499  		.data.other_data.data.range.min_hfreq_khz = 29,
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  500  		.data.other_data.data.range.max_hfreq_khz = 32,
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  501  		.data.other_data.data.range.pixel_clock_mhz = 4, /* 40 MHz */
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  502  		.data.other_data.data.range.flags = 0,
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  503  		.data.other_data.data.range.formula.cvt = {
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  504  			0xa0, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20 },
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  505  	}, {
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  506  		.pixel_clock = 0,
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  507  		.data.other_data.type = 0xfc, /* Model string */
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  508  		.data.other_data.data.str.str = {
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  509  			'P', 'r', 'o', 'j', 'e', 'c', 't', 'o', 'r', '\n',
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  510  			' ', ' ',  ' ' },
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  511  	}, {
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  512  		.pixel_clock = 0,
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  513  		.data.other_data.type = 0xfe, /* Unspecified text / padding */
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  514  		.data.other_data.data.str.str = {
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  515  			'\n', ' ', ' ', ' ', ' ', ' ', ' ', ' ', ' ', ' ',
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  516  			' ', ' ',  ' ' },
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  517  	} },
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  518  	.checksum = 0x13,
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  519  };
e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  520  

-- 
0-DAY CI Kernel Test Service
https://01.org/lkp

Re: [Intel-gfx] [PATCH v2 03/11] drm/edid: slightly restructure timing and non-timing descriptor structs

[Jani Nikula]

I think I'm just going to revert back to my original plan of leaving the
struct restructuring to another time in the future.

BR,
Jani.


On Mon, 28 Mar 2022, kernel test robot <lkp@intel.com> wrote:
> Hi Jani,
>
> I love your patch! Perhaps something to improve:
>
> [auto build test WARNING on drm/drm-next]
> [also build test WARNING on drm-intel/for-linux-next drm-tip/drm-tip v5.17 next-20220328]
> [If your patch is applied to the wrong git tree, kindly drop us a note.
> And when submitting patch, we suggest to use '--base' as documented in
> https://git-scm.com/docs/git-format-patch]
>
> url:    https://github.com/intel-lab-lkp/linux/commits/Jani-Nikula/drm-edid-constify-EDID-parsing-with-some-fixes/20220328-171858
> base:   git://anongit.freedesktop.org/drm/drm drm-next
> config: x86_64-randconfig-a003-20220328 (https://download.01.org/0day-ci/archive/20220328/202203281926.AthxJpnK-lkp@intel.com/config)
> compiler: gcc-9 (Ubuntu 9.4.0-1ubuntu1~20.04.1) 9.4.0
> reproduce (this is a W=1 build):
>         # https://github.com/intel-lab-lkp/linux/commit/f538c9296c54ce8f878432153584a68939ffc111
>         git remote add linux-review https://github.com/intel-lab-lkp/linux
>         git fetch --no-tags linux-review Jani-Nikula/drm-edid-constify-EDID-parsing-with-some-fixes/20220328-171858
>         git checkout f538c9296c54ce8f878432153584a68939ffc111
>         # save the config file to linux build tree
>         mkdir build_dir
>         make W=1 O=build_dir ARCH=x86_64 SHELL=/bin/bash drivers/gpu/drm/tiny/
>
> If you fix the issue, kindly add following tag as appropriate
> Reported-by: kernel test robot <lkp@intel.com>
>
> All warnings (new ones prefixed by >>):
>
>    drivers/gpu/drm/tiny/gm12u320.c:478:4: error: 'struct detailed_timing' has no member named 'pixel_clock'
>      478 |   .pixel_clock = 3383,
>          |    ^~~~~~~~~~~
>>> drivers/gpu/drm/tiny/gm12u320.c:464:36: warning: missing braces around initializer [-Wmissing-braces]
>      464 | static struct edid gm12u320_edid = {
>          |                                    ^
>    ......
>      478 |   .pixel_clock = 3383,
>          |                  {{  }}
>      479 |   /* hactive = 848, hblank = 256 */
>      480 |   .data.pixel_data.hactive_lo = 0x50,
>          |                                     }}
>      481 |   .data.pixel_data.hblank_lo = 0x00,
>          |                                    }}
>      482 |   .data.pixel_data.hactive_hblank_hi = 0x31,
>          |                                            }}
>      483 |   /* vactive = 480, vblank = 28 */
>      484 |   .data.pixel_data.vactive_lo = 0xe0,
>          |                                     }}
>      485 |   .data.pixel_data.vblank_lo = 0x1c,
>          |                                    }}
>      486 |   .data.pixel_data.vactive_vblank_hi = 0x10,
>          |                                            }}
>      487 |   /* hsync offset 40 pw 128, vsync offset 1 pw 4 */
>      488 |   .data.pixel_data.hsync_offset_lo = 0x28,
>          |                                          }}
>      489 |   .data.pixel_data.hsync_pulse_width_lo = 0x80,
>          |                                               }}
>      490 |   .data.pixel_data.vsync_offset_pulse_width_lo = 0x14,
>          |                                                      }}
>      491 |   .data.pixel_data.hsync_vsync_offset_pulse_width_hi = 0x00,
>          |                                                            }}
>    ......
>      494 |  }, {
>          |  }}
>    drivers/gpu/drm/tiny/gm12u320.c:495:4: error: 'struct detailed_timing' has no member named 'pixel_clock'
>      495 |   .pixel_clock = 0,
>          |    ^~~~~~~~~~~
>    drivers/gpu/drm/tiny/gm12u320.c:496:9: error: 'union <anonymous>' has no member named 'other_data'
>      496 |   .data.other_data.type = 0xfd, /* Monitor ranges */
>          |         ^~~~~~~~~~
>    drivers/gpu/drm/tiny/gm12u320.c:496:27: warning: initialized field overwritten [-Woverride-init]
>      496 |   .data.other_data.type = 0xfd, /* Monitor ranges */
>          |                           ^~~~
>    drivers/gpu/drm/tiny/gm12u320.c:496:27: note: (near initialization for 'gm12u320_edid.detailed_timings[1].data.pixel_data.pixel_clock')
>    drivers/gpu/drm/tiny/gm12u320.c:497:9: error: 'union <anonymous>' has no member named 'other_data'
>      497 |   .data.other_data.data.range.min_vfreq = 59,
>          |         ^~~~~~~~~~
>    drivers/gpu/drm/tiny/gm12u320.c:497:43: warning: initialized field overwritten [-Woverride-init]
>      497 |   .data.other_data.data.range.min_vfreq = 59,
>          |                                           ^~
>    drivers/gpu/drm/tiny/gm12u320.c:497:43: note: (near initialization for 'gm12u320_edid.detailed_timings[1].data.pixel_data.pixel_clock')
>    drivers/gpu/drm/tiny/gm12u320.c:498:9: error: 'union <anonymous>' has no member named 'other_data'
>      498 |   .data.other_data.data.range.max_vfreq = 61,
>          |         ^~~~~~~~~~
>    drivers/gpu/drm/tiny/gm12u320.c:498:43: warning: initialized field overwritten [-Woverride-init]
>      498 |   .data.other_data.data.range.max_vfreq = 61,
>          |                                           ^~
>    drivers/gpu/drm/tiny/gm12u320.c:498:43: note: (near initialization for 'gm12u320_edid.detailed_timings[1].data.pixel_data.pixel_clock')
>    drivers/gpu/drm/tiny/gm12u320.c:499:9: error: 'union <anonymous>' has no member named 'other_data'
>      499 |   .data.other_data.data.range.min_hfreq_khz = 29,
>          |         ^~~~~~~~~~
>    drivers/gpu/drm/tiny/gm12u320.c:499:47: warning: initialized field overwritten [-Woverride-init]
>      499 |   .data.other_data.data.range.min_hfreq_khz = 29,
>          |                                               ^~
>    drivers/gpu/drm/tiny/gm12u320.c:499:47: note: (near initialization for 'gm12u320_edid.detailed_timings[1].data.pixel_data.pixel_clock')
>    drivers/gpu/drm/tiny/gm12u320.c:500:9: error: 'union <anonymous>' has no member named 'other_data'
>      500 |   .data.other_data.data.range.max_hfreq_khz = 32,
>          |         ^~~~~~~~~~
>    drivers/gpu/drm/tiny/gm12u320.c:500:47: warning: initialized field overwritten [-Woverride-init]
>      500 |   .data.other_data.data.range.max_hfreq_khz = 32,
>          |                                               ^~
>    drivers/gpu/drm/tiny/gm12u320.c:500:47: note: (near initialization for 'gm12u320_edid.detailed_timings[1].data.pixel_data.pixel_clock')
>    drivers/gpu/drm/tiny/gm12u320.c:501:9: error: 'union <anonymous>' has no member named 'other_data'
>      501 |   .data.other_data.data.range.pixel_clock_mhz = 4, /* 40 MHz */
>          |         ^~~~~~~~~~
>    drivers/gpu/drm/tiny/gm12u320.c:501:49: warning: initialized field overwritten [-Woverride-init]
>      501 |   .data.other_data.data.range.pixel_clock_mhz = 4, /* 40 MHz */
>          |                                                 ^
>    drivers/gpu/drm/tiny/gm12u320.c:501:49: note: (near initialization for 'gm12u320_edid.detailed_timings[1].data.pixel_data.pixel_clock')
>    drivers/gpu/drm/tiny/gm12u320.c:502:9: error: 'union <anonymous>' has no member named 'other_data'
>      502 |   .data.other_data.data.range.flags = 0,
>          |         ^~~~~~~~~~
>    drivers/gpu/drm/tiny/gm12u320.c:502:39: warning: initialized field overwritten [-Woverride-init]
>      502 |   .data.other_data.data.range.flags = 0,
>          |                                       ^
>    drivers/gpu/drm/tiny/gm12u320.c:502:39: note: (near initialization for 'gm12u320_edid.detailed_timings[1].data.pixel_data.pixel_clock')
>    drivers/gpu/drm/tiny/gm12u320.c:503:9: error: 'union <anonymous>' has no member named 'other_data'
>      503 |   .data.other_data.data.range.formula.cvt = {
>          |         ^~~~~~~~~~
>>> drivers/gpu/drm/tiny/gm12u320.c:464:36: warning: missing braces around initializer [-Wmissing-braces]
>      464 | static struct edid gm12u320_edid = {
>          |                                    ^
>    ......
>      478 |   .pixel_clock = 3383,
>          |                  {{  }}
>      479 |   /* hactive = 848, hblank = 256 */
>      480 |   .data.pixel_data.hactive_lo = 0x50,
>          |                                     }}
>      481 |   .data.pixel_data.hblank_lo = 0x00,
>          |                                    }}
>      482 |   .data.pixel_data.hactive_hblank_hi = 0x31,
>          |                                            }}
>      483 |   /* vactive = 480, vblank = 28 */
>      484 |   .data.pixel_data.vactive_lo = 0xe0,
>          |                                     }}
>      485 |   .data.pixel_data.vblank_lo = 0x1c,
>          |                                    }}
>      486 |   .data.pixel_data.vactive_vblank_hi = 0x10,
>          |                                            }}
>      487 |   /* hsync offset 40 pw 128, vsync offset 1 pw 4 */
>      488 |   .data.pixel_data.hsync_offset_lo = 0x28,
>          |                                          }}
>      489 |   .data.pixel_data.hsync_pulse_width_lo = 0x80,
>          |                                               }}
>      490 |   .data.pixel_data.vsync_offset_pulse_width_lo = 0x14,
>          |                                                      }}
>      491 |   .data.pixel_data.hsync_vsync_offset_pulse_width_hi = 0x00,
>          |                                                            }}
>    ......
>      494 |  }, {
>          |  }}
>      495 |   .pixel_clock = 0,
>          |                  -
>          |                  {{0}}
>      496 |   .data.other_data.type = 0xfd, /* Monitor ranges */
>          |                           {   }}
>      497 |   .data.other_data.data.range.min_vfreq = 59,
>          |                                           { }}
>      498 |   .data.other_data.data.range.max_vfreq = 61,
>          |                                           { }}
>      499 |   .data.other_data.data.range.min_hfreq_khz = 29,
>          |                                               { }}
>      500 |   .data.other_data.data.range.max_hfreq_khz = 32,
>          |                                               { }}
>      501 |   .data.other_data.data.range.pixel_clock_mhz = 4, /* 40 MHz */
>          |                                                 {}}
>      502 |   .data.other_data.data.range.flags = 0,
>          |                                       {}}
>    drivers/gpu/drm/tiny/gm12u320.c:503:45: warning: initialized field overwritten [-Woverride-init]
>      503 |   .data.other_data.data.range.formula.cvt = {
>          |                                             ^
>    drivers/gpu/drm/tiny/gm12u320.c:503:45: note: (near initialization for 'gm12u320_edid.detailed_timings[1].data.pixel_data')
>>> drivers/gpu/drm/tiny/gm12u320.c:464:36: warning: missing braces around initializer [-Wmissing-braces]
>      464 | static struct edid gm12u320_edid = {
>          |                                    ^
>    ......
>      478 |   .pixel_clock = 3383,
>          |                  {{  }}
>      479 |   /* hactive = 848, hblank = 256 */
>      480 |   .data.pixel_data.hactive_lo = 0x50,
>          |                                     }}
>      481 |   .data.pixel_data.hblank_lo = 0x00,
>          |                                    }}
>      482 |   .data.pixel_data.hactive_hblank_hi = 0x31,
>          |                                            }}
>      483 |   /* vactive = 480, vblank = 28 */
>      484 |   .data.pixel_data.vactive_lo = 0xe0,
>          |                                     }}
>      485 |   .data.pixel_data.vblank_lo = 0x1c,
>          |                                    }}
>      486 |   .data.pixel_data.vactive_vblank_hi = 0x10,
>          |                                            }}
>      487 |   /* hsync offset 40 pw 128, vsync offset 1 pw 4 */
>      488 |   .data.pixel_data.hsync_offset_lo = 0x28,
>          |                                          }}
>      489 |   .data.pixel_data.hsync_pulse_width_lo = 0x80,
>          |                                               }}
>      490 |   .data.pixel_data.vsync_offset_pulse_width_lo = 0x14,
>          |                                                      }}
>      491 |   .data.pixel_data.hsync_vsync_offset_pulse_width_hi = 0x00,
>          |                                                            }}
>    ......
>      494 |  }, {
>          |  }}
>      495 |   .pixel_clock = 0,
>          |                  -
>          |                  {{0}}
>      496 |   .data.other_data.type = 0xfd, /* Monitor ranges */
>          |                           {   }}
>      497 |   .data.other_data.data.range.min_vfreq = 59,
>          |                                           { }}
>      498 |   .data.other_data.data.range.max_vfreq = 61,
>          |                                           { }}
>      499 |   .data.other_data.data.range.min_hfreq_khz = 29,
>          |                                               { }}
>      500 |   .data.other_data.data.range.max_hfreq_khz = 32,
>          |                                               { }}
>      501 |   .data.other_data.data.range.pixel_clock_mhz = 4, /* 40 MHz */
>          |                                                 {}}
>      502 |   .data.other_data.data.range.flags = 0,
>          |                                       {}}
>    ......
>      505 |  }, {
>          |  }
>    drivers/gpu/drm/tiny/gm12u320.c:506:4: error: 'struct detailed_timing' has no member named 'pixel_clock'
>      506 |   .pixel_clock = 0,
>          |    ^~~~~~~~~~~
>    drivers/gpu/drm/tiny/gm12u320.c:507:9: error: 'union <anonymous>' has no member named 'other_data'
>      507 |   .data.other_data.type = 0xfc, /* Model string */
>          |         ^~~~~~~~~~
>    drivers/gpu/drm/tiny/gm12u320.c:507:27: warning: initialized field overwritten [-Woverride-init]
>      507 |   .data.other_data.type = 0xfc, /* Model string */
>          |                           ^~~~
>    drivers/gpu/drm/tiny/gm12u320.c:507:27: note: (near initialization for 'gm12u320_edid.detailed_timings[2].data.pixel_data.pixel_clock')
>    drivers/gpu/drm/tiny/gm12u320.c:508:9: error: 'union <anonymous>' has no member named 'other_data'
>      508 |   .data.other_data.data.str.str = {
>          |         ^~~~~~~~~~
>>> drivers/gpu/drm/tiny/gm12u320.c:464:36: warning: missing braces around initializer [-Wmissing-braces]
>      464 | static struct edid gm12u320_edid = {
>          |                                    ^
>    ......
>      478 |   .pixel_clock = 3383,
>          |                  {{  }}
>      479 |   /* hactive = 848, hblank = 256 */
>      480 |   .data.pixel_data.hactive_lo = 0x50,
>          |                                     }}
>      481 |   .data.pixel_data.hblank_lo = 0x00,
>          |                                    }}
>      482 |   .data.pixel_data.hactive_hblank_hi = 0x31,
>          |                                            }}
>      483 |   /* vactive = 480, vblank = 28 */
>      484 |   .data.pixel_data.vactive_lo = 0xe0,
>          |                                     }}
>      485 |   .data.pixel_data.vblank_lo = 0x1c,
>          |                                    }}
>      486 |   .data.pixel_data.vactive_vblank_hi = 0x10,
>          |                                            }}
>      487 |   /* hsync offset 40 pw 128, vsync offset 1 pw 4 */
>      488 |   .data.pixel_data.hsync_offset_lo = 0x28,
>          |                                          }}
>      489 |   .data.pixel_data.hsync_pulse_width_lo = 0x80,
>          |                                               }}
>      490 |   .data.pixel_data.vsync_offset_pulse_width_lo = 0x14,
>          |                                                      }}
>      491 |   .data.pixel_data.hsync_vsync_offset_pulse_width_hi = 0x00,
>          |                                                            }}
>    ......
>      494 |  }, {
>          |  }}
>      495 |   .pixel_clock = 0,
>          |                  -
>          |                  {{0}}
>      496 |   .data.other_data.type = 0xfd, /* Monitor ranges */
>          |                           {   }}
>      497 |   .data.other_data.data.range.min_vfreq = 59,
>          |                                           { }}
>      498 |   .data.other_data.data.range.max_vfreq = 61,
>          |                                           { }}
>      499 |   .data.other_data.data.range.min_hfreq_khz = 29,
>          |                                               { }}
>      500 |   .data.other_data.data.range.max_hfreq_khz = 32,
>          |                                               { }}
>      501 |   .data.other_data.data.range.pixel_clock_mhz = 4, /* 40 MHz */
>          |                                                 {}}
>      502 |   .data.other_data.data.range.flags = 0,
>          |                                       {}}
>    ......
>      505 |  }, {
>          |  }
>      506 |   .pixel_clock = 0,
>          |                  -
>          |                  {{0}}
>      507 |   .data.other_data.type = 0xfc, /* Model string */
>          |                           {   }}
>    drivers/gpu/drm/tiny/gm12u320.c:508:35: warning: initialized field overwritten [-Woverride-init]
>      508 |   .data.other_data.data.str.str = {
>          |                                   ^
>    drivers/gpu/drm/tiny/gm12u320.c:508:35: note: (near initialization for 'gm12u320_edid.detailed_timings[2].data.pixel_data')
>>> drivers/gpu/drm/tiny/gm12u320.c:464:36: warning: missing braces around initializer [-Wmissing-braces]
>      464 | static struct edid gm12u320_edid = {
>          |                                    ^
>    ......
>      478 |   .pixel_clock = 3383,
>          |                  {{  }}
>      479 |   /* hactive = 848, hblank = 256 */
>      480 |   .data.pixel_data.hactive_lo = 0x50,
>          |                                     }}
>      481 |   .data.pixel_data.hblank_lo = 0x00,
>          |                                    }}
>      482 |   .data.pixel_data.hactive_hblank_hi = 0x31,
>          |                                            }}
>      483 |   /* vactive = 480, vblank = 28 */
>      484 |   .data.pixel_data.vactive_lo = 0xe0,
>          |                                     }}
>      485 |   .data.pixel_data.vblank_lo = 0x1c,
>          |                                    }}
>      486 |   .data.pixel_data.vactive_vblank_hi = 0x10,
>          |                                            }}
>      487 |   /* hsync offset 40 pw 128, vsync offset 1 pw 4 */
>      488 |   .data.pixel_data.hsync_offset_lo = 0x28,
>          |                                          }}
>      489 |   .data.pixel_data.hsync_pulse_width_lo = 0x80,
>          |                                               }}
>      490 |   .data.pixel_data.vsync_offset_pulse_width_lo = 0x14,
>          |                                                      }}
>      491 |   .data.pixel_data.hsync_vsync_offset_pulse_width_hi = 0x00,
>          |                                                            }}
>    ......
>      494 |  }, {
>          |  }}
>      495 |   .pixel_clock = 0,
>          |                  -
>          |                  {{0}}
>      496 |   .data.other_data.type = 0xfd, /* Monitor ranges */
>          |                           {   }}
>      497 |   .data.other_data.data.range.min_vfreq = 59,
>          |                                           { }}
>      498 |   .data.other_data.data.range.max_vfreq = 61,
>          |                                           { }}
>      499 |   .data.other_data.data.range.min_hfreq_khz = 29,
>          |                                               { }}
>      500 |   .data.other_data.data.range.max_hfreq_khz = 32,
>          |                                               { }}
>      501 |   .data.other_data.data.range.pixel_clock_mhz = 4, /* 40 MHz */
>          |                                                 {}}
>      502 |   .data.other_data.data.range.flags = 0,
>          |                                       {}}
>    ......
>      505 |  }, {
>          |  }
>      506 |   .pixel_clock = 0,
>          |                  -
>          |                  {{0}}
>      507 |   .data.other_data.type = 0xfc, /* Model string */
>          |                           {   }}
>    ......
>      511 |  }, {
>          |  }
>    drivers/gpu/drm/tiny/gm12u320.c:512:4: error: 'struct detailed_timing' has no member named 'pixel_clock'
>      512 |   .pixel_clock = 0,
>          |    ^~~~~~~~~~~
>    drivers/gpu/drm/tiny/gm12u320.c:513:9: error: 'union <anonymous>' has no member named 'other_data'
>      513 |   .data.other_data.type = 0xfe, /* Unspecified text / padding */
>          |         ^~~~~~~~~~
>    drivers/gpu/drm/tiny/gm12u320.c:513:27: warning: initialized field overwritten [-Woverride-init]
>      513 |   .data.other_data.type = 0xfe, /* Unspecified text / padding */
>          |                           ^~~~
>    drivers/gpu/drm/tiny/gm12u320.c:513:27: note: (near initialization for 'gm12u320_edid.detailed_timings[3].data.pixel_data.pixel_clock')
>    drivers/gpu/drm/tiny/gm12u320.c:514:9: error: 'union <anonymous>' has no member named 'other_data'
>      514 |   .data.other_data.data.str.str = {
>          |         ^~~~~~~~~~
>>> drivers/gpu/drm/tiny/gm12u320.c:464:36: warning: missing braces around initializer [-Wmissing-braces]
>      464 | static struct edid gm12u320_edid = {
>          |                                    ^
>    ......
>      478 |   .pixel_clock = 3383,
>          |                  {{  }}
>      479 |   /* hactive = 848, hblank = 256 */
>      480 |   .data.pixel_data.hactive_lo = 0x50,
>          |                                     }}
>      481 |   .data.pixel_data.hblank_lo = 0x00,
>          |                                    }}
>      482 |   .data.pixel_data.hactive_hblank_hi = 0x31,
>          |                                            }}
>      483 |   /* vactive = 480, vblank = 28 */
>      484 |   .data.pixel_data.vactive_lo = 0xe0,
>          |                                     }}
>      485 |   .data.pixel_data.vblank_lo = 0x1c,
>          |                                    }}
>      486 |   .data.pixel_data.vactive_vblank_hi = 0x10,
>          |                                            }}
>      487 |   /* hsync offset 40 pw 128, vsync offset 1 pw 4 */
>      488 |   .data.pixel_data.hsync_offset_lo = 0x28,
>          |                                          }}
>      489 |   .data.pixel_data.hsync_pulse_width_lo = 0x80,
>          |                                               }}
>      490 |   .data.pixel_data.vsync_offset_pulse_width_lo = 0x14,
>          |                                                      }}
>      491 |   .data.pixel_data.hsync_vsync_offset_pulse_width_hi = 0x00,
>          |                                                            }}
>    ......
>      494 |  }, {
>          |  }}
>      495 |   .pixel_clock = 0,
>          |                  -
>          |                  {{0}}
>      496 |   .data.other_data.type = 0xfd, /* Monitor ranges */
>          |                           {   }}
>      497 |   .data.other_data.data.range.min_vfreq = 59,
>          |                                           { }}
>      498 |   .data.other_data.data.range.max_vfreq = 61,
>          |                                           { }}
>      499 |   .data.other_data.data.range.min_hfreq_khz = 29,
>          |                                               { }}
>      500 |   .data.other_data.data.range.max_hfreq_khz = 32,
>          |                                               { }}
>      501 |   .data.other_data.data.range.pixel_clock_mhz = 4, /* 40 MHz */
>          |                                                 {}}
>      502 |   .data.other_data.data.range.flags = 0,
>          |                                       {}}
>    ......
>      505 |  }, {
>          |  }
>      506 |   .pixel_clock = 0,
>          |                  -
>          |                  {{0}}
>      507 |   .data.other_data.type = 0xfc, /* Model string */
>          |                           {   }}
>    ......
>      511 |  }, {
>          |  }
>      512 |   .pixel_clock = 0,
>          |                  -
>          |                  {{0}}
>      513 |   .data.other_data.type = 0xfe, /* Unspecified text / padding */
>          |                           {   }}
>    drivers/gpu/drm/tiny/gm12u320.c:514:35: warning: initialized field overwritten [-Woverride-init]
>      514 |   .data.other_data.data.str.str = {
>          |                                   ^
>    drivers/gpu/drm/tiny/gm12u320.c:514:35: note: (near initialization for 'gm12u320_edid.detailed_timings[3].data.pixel_data')
>>> drivers/gpu/drm/tiny/gm12u320.c:464:36: warning: missing braces around initializer [-Wmissing-braces]
>      464 | static struct edid gm12u320_edid = {
>          |                                    ^
>    ......
>      478 |   .pixel_clock = 3383,
>          |                  {{  }}
>      479 |   /* hactive = 848, hblank = 256 */
>      480 |   .data.pixel_data.hactive_lo = 0x50,
>          |                                     }}
>      481 |   .data.pixel_data.hblank_lo = 0x00,
>          |                                    }}
>      482 |   .data.pixel_data.hactive_hblank_hi = 0x31,
>          |                                            }}
>      483 |   /* vactive = 480, vblank = 28 */
>      484 |   .data.pixel_data.vactive_lo = 0xe0,
>          |                                     }}
>      485 |   .data.pixel_data.vblank_lo = 0x1c,
>          |                                    }}
>      486 |   .data.pixel_data.vactive_vblank_hi = 0x10,
>          |                                            }}
>      487 |   /* hsync offset 40 pw 128, vsync offset 1 pw 4 */
>      488 |   .data.pixel_data.hsync_offset_lo = 0x28,
>          |                                          }}
>      489 |   .data.pixel_data.hsync_pulse_width_lo = 0x80,
>          |                                               }}
>      490 |   .data.pixel_data.vsync_offset_pulse_width_lo = 0x14,
>          |                                                      }}
>      491 |   .data.pixel_data.hsync_vsync_offset_pulse_width_hi = 0x00,
>          |                                                            }}
>    ......
>      494 |  }, {
>          |  }}
>      495 |   .pixel_clock = 0,
>          |                  -
>          |                  {{0}}
>      496 |   .data.other_data.type = 0xfd, /* Monitor ranges */
>          |                           {   }}
>      497 |   .data.other_data.data.range.min_vfreq = 59,
>          |                                           { }}
>      498 |   .data.other_data.data.range.max_vfreq = 61,
>          |                                           { }}
>      499 |   .data.other_data.data.range.min_hfreq_khz = 29,
>          |                                               { }}
>      500 |   .data.other_data.data.range.max_hfreq_khz = 32,
>          |                                               { }}
>      501 |   .data.other_data.data.range.pixel_clock_mhz = 4, /* 40 MHz */
>          |                                                 {}}
>      502 |   .data.other_data.data.range.flags = 0,
>          |                                       {}}
>    ......
>      505 |  }, {
>          |  }
>      506 |   .pixel_clock = 0,
>          |                  -
>          |                  {{0}}
>      507 |   .data.other_data.type = 0xfc, /* Model string */
>          |                           {   }}
>    ......
>      511 |  }, {
>          |  }
>      512 |   .pixel_clock = 0,
>          |                  -
>          |                  {{0}}
>      513 |   .data.other_data.type = 0xfe, /* Unspecified text / padding */
>          |                           {   }}
>    ......
>      517 |  } },
>          |  }
>>> drivers/gpu/drm/tiny/gm12u320.c:464:36: warning: missing braces around initializer [-Wmissing-braces]
>      464 | static struct edid gm12u320_edid = {
>          |                                    ^
>    ......
>      478 |   .pixel_clock = 3383,
>          |                  {{  }}
>      479 |   /* hactive = 848, hblank = 256 */
>      480 |   .data.pixel_data.hactive_lo = 0x50,
>          |                                     }}
>      481 |   .data.pixel_data.hblank_lo = 0x00,
>          |                                    }}
>      482 |   .data.pixel_data.hactive_hblank_hi = 0x31,
>          |                                            }}
>      483 |   /* vactive = 480, vblank = 28 */
>      484 |   .data.pixel_data.vactive_lo = 0xe0,
>          |                                     }}
>      485 |   .data.pixel_data.vblank_lo = 0x1c,
>          |                                    }}
>      486 |   .data.pixel_data.vactive_vblank_hi = 0x10,
>          |                                            }}
>      487 |   /* hsync offset 40 pw 128, vsync offset 1 pw 4 */
>      488 |   .data.pixel_data.hsync_offset_lo = 0x28,
>          |                                          }}
>      489 |   .data.pixel_data.hsync_pulse_width_lo = 0x80,
>          |                                               }}
>      490 |   .data.pixel_data.vsync_offset_pulse_width_lo = 0x14,
>          |                                                      }}
>      491 |   .data.pixel_data.hsync_vsync_offset_pulse_width_hi = 0x00,
>          |                                                            }}
>    ......
>      494 |  }, {
>          |  }}
>      495 |   .pixel_clock = 0,
>          |                  -
>          |                  {{0}}
>      496 |   .data.other_data.type = 0xfd, /* Monitor ranges */
>          |                           {   }}
>      497 |   .data.other_data.data.range.min_vfreq = 59,
>          |                                           { }}
>      498 |   .data.other_data.data.range.max_vfreq = 61,
>          |                                           { }}
>      499 |   .data.other_data.data.range.min_hfreq_khz = 29,
>          |                                               { }}
>      500 |   .data.other_data.data.range.max_hfreq_khz = 32,
>          |                                               { }}
>      501 |   .data.other_data.data.range.pixel_clock_mhz = 4, /* 40 MHz */
>          |                                                 {}}
>      502 |   .data.other_data.data.range.flags = 0,
>          |                                       {}}
>    ......
>      505 |  }, {
>          |  }
>      506 |   .pixel_clock = 0,
>          |                  -
>          |                  {{0}}
>      507 |   .data.other_data.type = 0xfc, /* Model string */
>          |                           {   }}
>    ......
>      511 |  }, {
>          |  }
>      512 |   .pixel_clock = 0,
>          |                  -
>          |                  {{0}}
>      513 |   .data.other_data.type = 0xfe, /* Unspecified text / padding */
>          |                           {   }}
>    ......
>      517 |  } },
>          |  }
>>> drivers/gpu/drm/tiny/gm12u320.c:464:36: warning: missing braces around initializer [-Wmissing-braces]
>      464 | static struct edid gm12u320_edid = {
>          |                                    ^
>    ......
>      478 |   .pixel_clock = 3383,
>          |                  {{  }}
>      479 |   /* hactive = 848, hblank = 256 */
>      480 |   .data.pixel_data.hactive_lo = 0x50,
>          |                                     }}
>      481 |   .data.pixel_data.hblank_lo = 0x00,
>          |                                    }}
>      482 |   .data.pixel_data.hactive_hblank_hi = 0x31,
>          |                                            }}
>      483 |   /* vactive = 480, vblank = 28 */
>      484 |   .data.pixel_data.vactive_lo = 0xe0,
>          |                                     }}
>      485 |   .data.pixel_data.vblank_lo = 0x1c,
>          |                                    }}
>      486 |   .data.pixel_data.vactive_vblank_hi = 0x10,
>          |                                            }}
>      487 |   /* hsync offset 40 pw 128, vsync offset 1 pw 4 */
>      488 |   .data.pixel_data.hsync_offset_lo = 0x28,
>          |                                          }}
>      489 |   .data.pixel_data.hsync_pulse_width_lo = 0x80,
>          |                                               }}
>      490 |   .data.pixel_data.vsync_offset_pulse_width_lo = 0x14,
>          |                                                      }}
>      491 |   .data.pixel_data.hsync_vsync_offset_pulse_width_hi = 0x00,
>          |                                                            }}
>    ......
>      494 |  }, {
>          |  }}
>      495 |   .pixel_clock = 0,
>          |                  -
>          |                  {{0}}
>      496 |   .data.other_data.type = 0xfd, /* Monitor ranges */
>          |                           {   }}
>      497 |   .data.other_data.data.range.min_vfreq = 59,
>          |                                           { }}
>      498 |   .data.other_data.data.range.max_vfreq = 61,
>          |                                           { }}
>      499 |   .data.other_data.data.range.min_hfreq_khz = 29,
>          |                                               { }}
>      500 |   .data.other_data.data.range.max_hfreq_khz = 32,
>          |                                               { }}
>      501 |   .data.other_data.data.range.pixel_clock_mhz = 4, /* 40 MHz */
>          |                                                 {}}
>      502 |   .data.other_data.data.range.flags = 0,
>          |                                       {}}
>    ......
>      505 |  }, {
>          |  }
>      506 |   .pixel_clock = 0,
>          |                  -
>          |                  {{0}}
>      507 |   .data.other_data.type = 0xfc, /* Model string */
>          |                           {   }}
>    ......
>      511 |  }, {
>          |  }
>      512 |   .pixel_clock = 0,
>          |                  -
>          |                  {{0}}
>      513 |   .data.other_data.type = 0xfe, /* Unspecified text / padding */
>          |                           {   }}
>    ......
>      517 |  } },
>          |  }
>
>
> vim +464 drivers/gpu/drm/tiny/gm12u320.c
>
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  457  
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  458  /*
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  459   * We use fake EDID info so that userspace know that it is dealing with
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  460   * an Acer projector, rather then listing this as an "unknown" monitor.
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  461   * Note this assumes this driver is only ever used with the Acer C120, if we
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  462   * add support for other devices the vendor and model should be parameterized.
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  463   */
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 @464  static struct edid gm12u320_edid = {
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  465  	.header		= { 0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00 },
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  466  	.mfg_id		= { 0x04, 0x72 },	/* "ACR" */
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  467  	.prod_code	= { 0x20, 0xc1 },	/* C120h */
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  468  	.serial		= 0xaa55aa55,
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  469  	.mfg_week	= 1,
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  470  	.mfg_year	= 16,
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  471  	.version	= 1,			/* EDID 1.3 */
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  472  	.revision	= 3,			/* EDID 1.3 */
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  473  	.input		= 0x08,			/* Analog input */
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  474  	.features	= 0x0a,			/* Pref timing in DTD 1 */
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  475  	.standard_timings = { { 1, 1 }, { 1, 1 }, { 1, 1 }, { 1, 1 },
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  476  			      { 1, 1 }, { 1, 1 }, { 1, 1 }, { 1, 1 } },
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  477  	.detailed_timings = { {
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  478  		.pixel_clock = 3383,
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  479  		/* hactive = 848, hblank = 256 */
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  480  		.data.pixel_data.hactive_lo = 0x50,
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  481  		.data.pixel_data.hblank_lo = 0x00,
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  482  		.data.pixel_data.hactive_hblank_hi = 0x31,
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  483  		/* vactive = 480, vblank = 28 */
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  484  		.data.pixel_data.vactive_lo = 0xe0,
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  485  		.data.pixel_data.vblank_lo = 0x1c,
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  486  		.data.pixel_data.vactive_vblank_hi = 0x10,
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  487  		/* hsync offset 40 pw 128, vsync offset 1 pw 4 */
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  488  		.data.pixel_data.hsync_offset_lo = 0x28,
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  489  		.data.pixel_data.hsync_pulse_width_lo = 0x80,
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  490  		.data.pixel_data.vsync_offset_pulse_width_lo = 0x14,
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  491  		.data.pixel_data.hsync_vsync_offset_pulse_width_hi = 0x00,
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  492  		/* Digital separate syncs, hsync+, vsync+ */
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  493  		.data.pixel_data.misc = 0x1e,
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  494  	}, {
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  495  		.pixel_clock = 0,
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  496  		.data.other_data.type = 0xfd, /* Monitor ranges */
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  497  		.data.other_data.data.range.min_vfreq = 59,
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  498  		.data.other_data.data.range.max_vfreq = 61,
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  499  		.data.other_data.data.range.min_hfreq_khz = 29,
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  500  		.data.other_data.data.range.max_hfreq_khz = 32,
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  501  		.data.other_data.data.range.pixel_clock_mhz = 4, /* 40 MHz */
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  502  		.data.other_data.data.range.flags = 0,
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  503  		.data.other_data.data.range.formula.cvt = {
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  504  			0xa0, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20 },
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  505  	}, {
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  506  		.pixel_clock = 0,
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  507  		.data.other_data.type = 0xfc, /* Model string */
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  508  		.data.other_data.data.str.str = {
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  509  			'P', 'r', 'o', 'j', 'e', 'c', 't', 'o', 'r', '\n',
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  510  			' ', ' ',  ' ' },
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  511  	}, {
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  512  		.pixel_clock = 0,
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  513  		.data.other_data.type = 0xfe, /* Unspecified text / padding */
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  514  		.data.other_data.data.str.str = {
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  515  			'\n', ' ', ' ', ' ', ' ', ' ', ' ', ' ', ' ', ' ',
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  516  			' ', ' ',  ' ' },
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  517  	} },
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  518  	.checksum = 0x13,
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  519  };
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  520  

-- 
Jani Nikula, Intel Open Source Graphics Center

Re: [Intel-gfx] [PATCH v2 03/11] drm/edid: slightly restructure timing and non-timing descriptor structs

[Jani Nikula]

I think I'm just going to revert back to my original plan of leaving the
struct restructuring to another time in the future.

BR,
Jani.


On Mon, 28 Mar 2022, kernel test robot <lkp@intel.com> wrote:
> Hi Jani,
>
> I love your patch! Perhaps something to improve:
>
> [auto build test WARNING on drm/drm-next]
> [also build test WARNING on drm-intel/for-linux-next drm-tip/drm-tip v5.17 next-20220328]
> [If your patch is applied to the wrong git tree, kindly drop us a note.
> And when submitting patch, we suggest to use '--base' as documented in
> https://git-scm.com/docs/git-format-patch]
>
> url:    https://github.com/intel-lab-lkp/linux/commits/Jani-Nikula/drm-edid-constify-EDID-parsing-with-some-fixes/20220328-171858
> base:   git://anongit.freedesktop.org/drm/drm drm-next
> config: x86_64-randconfig-a003-20220328 (https://download.01.org/0day-ci/archive/20220328/202203281926.AthxJpnK-lkp@intel.com/config)
> compiler: gcc-9 (Ubuntu 9.4.0-1ubuntu1~20.04.1) 9.4.0
> reproduce (this is a W=1 build):
>         # https://github.com/intel-lab-lkp/linux/commit/f538c9296c54ce8f878432153584a68939ffc111
>         git remote add linux-review https://github.com/intel-lab-lkp/linux
>         git fetch --no-tags linux-review Jani-Nikula/drm-edid-constify-EDID-parsing-with-some-fixes/20220328-171858
>         git checkout f538c9296c54ce8f878432153584a68939ffc111
>         # save the config file to linux build tree
>         mkdir build_dir
>         make W=1 O=build_dir ARCH=x86_64 SHELL=/bin/bash drivers/gpu/drm/tiny/
>
> If you fix the issue, kindly add following tag as appropriate
> Reported-by: kernel test robot <lkp@intel.com>
>
> All warnings (new ones prefixed by >>):
>
>    drivers/gpu/drm/tiny/gm12u320.c:478:4: error: 'struct detailed_timing' has no member named 'pixel_clock'
>      478 |   .pixel_clock = 3383,
>          |    ^~~~~~~~~~~
>>> drivers/gpu/drm/tiny/gm12u320.c:464:36: warning: missing braces around initializer [-Wmissing-braces]
>      464 | static struct edid gm12u320_edid = {
>          |                                    ^
>    ......
>      478 |   .pixel_clock = 3383,
>          |                  {{  }}
>      479 |   /* hactive = 848, hblank = 256 */
>      480 |   .data.pixel_data.hactive_lo = 0x50,
>          |                                     }}
>      481 |   .data.pixel_data.hblank_lo = 0x00,
>          |                                    }}
>      482 |   .data.pixel_data.hactive_hblank_hi = 0x31,
>          |                                            }}
>      483 |   /* vactive = 480, vblank = 28 */
>      484 |   .data.pixel_data.vactive_lo = 0xe0,
>          |                                     }}
>      485 |   .data.pixel_data.vblank_lo = 0x1c,
>          |                                    }}
>      486 |   .data.pixel_data.vactive_vblank_hi = 0x10,
>          |                                            }}
>      487 |   /* hsync offset 40 pw 128, vsync offset 1 pw 4 */
>      488 |   .data.pixel_data.hsync_offset_lo = 0x28,
>          |                                          }}
>      489 |   .data.pixel_data.hsync_pulse_width_lo = 0x80,
>          |                                               }}
>      490 |   .data.pixel_data.vsync_offset_pulse_width_lo = 0x14,
>          |                                                      }}
>      491 |   .data.pixel_data.hsync_vsync_offset_pulse_width_hi = 0x00,
>          |                                                            }}
>    ......
>      494 |  }, {
>          |  }}
>    drivers/gpu/drm/tiny/gm12u320.c:495:4: error: 'struct detailed_timing' has no member named 'pixel_clock'
>      495 |   .pixel_clock = 0,
>          |    ^~~~~~~~~~~
>    drivers/gpu/drm/tiny/gm12u320.c:496:9: error: 'union <anonymous>' has no member named 'other_data'
>      496 |   .data.other_data.type = 0xfd, /* Monitor ranges */
>          |         ^~~~~~~~~~
>    drivers/gpu/drm/tiny/gm12u320.c:496:27: warning: initialized field overwritten [-Woverride-init]
>      496 |   .data.other_data.type = 0xfd, /* Monitor ranges */
>          |                           ^~~~
>    drivers/gpu/drm/tiny/gm12u320.c:496:27: note: (near initialization for 'gm12u320_edid.detailed_timings[1].data.pixel_data.pixel_clock')
>    drivers/gpu/drm/tiny/gm12u320.c:497:9: error: 'union <anonymous>' has no member named 'other_data'
>      497 |   .data.other_data.data.range.min_vfreq = 59,
>          |         ^~~~~~~~~~
>    drivers/gpu/drm/tiny/gm12u320.c:497:43: warning: initialized field overwritten [-Woverride-init]
>      497 |   .data.other_data.data.range.min_vfreq = 59,
>          |                                           ^~
>    drivers/gpu/drm/tiny/gm12u320.c:497:43: note: (near initialization for 'gm12u320_edid.detailed_timings[1].data.pixel_data.pixel_clock')
>    drivers/gpu/drm/tiny/gm12u320.c:498:9: error: 'union <anonymous>' has no member named 'other_data'
>      498 |   .data.other_data.data.range.max_vfreq = 61,
>          |         ^~~~~~~~~~
>    drivers/gpu/drm/tiny/gm12u320.c:498:43: warning: initialized field overwritten [-Woverride-init]
>      498 |   .data.other_data.data.range.max_vfreq = 61,
>          |                                           ^~
>    drivers/gpu/drm/tiny/gm12u320.c:498:43: note: (near initialization for 'gm12u320_edid.detailed_timings[1].data.pixel_data.pixel_clock')
>    drivers/gpu/drm/tiny/gm12u320.c:499:9: error: 'union <anonymous>' has no member named 'other_data'
>      499 |   .data.other_data.data.range.min_hfreq_khz = 29,
>          |         ^~~~~~~~~~
>    drivers/gpu/drm/tiny/gm12u320.c:499:47: warning: initialized field overwritten [-Woverride-init]
>      499 |   .data.other_data.data.range.min_hfreq_khz = 29,
>          |                                               ^~
>    drivers/gpu/drm/tiny/gm12u320.c:499:47: note: (near initialization for 'gm12u320_edid.detailed_timings[1].data.pixel_data.pixel_clock')
>    drivers/gpu/drm/tiny/gm12u320.c:500:9: error: 'union <anonymous>' has no member named 'other_data'
>      500 |   .data.other_data.data.range.max_hfreq_khz = 32,
>          |         ^~~~~~~~~~
>    drivers/gpu/drm/tiny/gm12u320.c:500:47: warning: initialized field overwritten [-Woverride-init]
>      500 |   .data.other_data.data.range.max_hfreq_khz = 32,
>          |                                               ^~
>    drivers/gpu/drm/tiny/gm12u320.c:500:47: note: (near initialization for 'gm12u320_edid.detailed_timings[1].data.pixel_data.pixel_clock')
>    drivers/gpu/drm/tiny/gm12u320.c:501:9: error: 'union <anonymous>' has no member named 'other_data'
>      501 |   .data.other_data.data.range.pixel_clock_mhz = 4, /* 40 MHz */
>          |         ^~~~~~~~~~
>    drivers/gpu/drm/tiny/gm12u320.c:501:49: warning: initialized field overwritten [-Woverride-init]
>      501 |   .data.other_data.data.range.pixel_clock_mhz = 4, /* 40 MHz */
>          |                                                 ^
>    drivers/gpu/drm/tiny/gm12u320.c:501:49: note: (near initialization for 'gm12u320_edid.detailed_timings[1].data.pixel_data.pixel_clock')
>    drivers/gpu/drm/tiny/gm12u320.c:502:9: error: 'union <anonymous>' has no member named 'other_data'
>      502 |   .data.other_data.data.range.flags = 0,
>          |         ^~~~~~~~~~
>    drivers/gpu/drm/tiny/gm12u320.c:502:39: warning: initialized field overwritten [-Woverride-init]
>      502 |   .data.other_data.data.range.flags = 0,
>          |                                       ^
>    drivers/gpu/drm/tiny/gm12u320.c:502:39: note: (near initialization for 'gm12u320_edid.detailed_timings[1].data.pixel_data.pixel_clock')
>    drivers/gpu/drm/tiny/gm12u320.c:503:9: error: 'union <anonymous>' has no member named 'other_data'
>      503 |   .data.other_data.data.range.formula.cvt = {
>          |         ^~~~~~~~~~
>>> drivers/gpu/drm/tiny/gm12u320.c:464:36: warning: missing braces around initializer [-Wmissing-braces]
>      464 | static struct edid gm12u320_edid = {
>          |                                    ^
>    ......
>      478 |   .pixel_clock = 3383,
>          |                  {{  }}
>      479 |   /* hactive = 848, hblank = 256 */
>      480 |   .data.pixel_data.hactive_lo = 0x50,
>          |                                     }}
>      481 |   .data.pixel_data.hblank_lo = 0x00,
>          |                                    }}
>      482 |   .data.pixel_data.hactive_hblank_hi = 0x31,
>          |                                            }}
>      483 |   /* vactive = 480, vblank = 28 */
>      484 |   .data.pixel_data.vactive_lo = 0xe0,
>          |                                     }}
>      485 |   .data.pixel_data.vblank_lo = 0x1c,
>          |                                    }}
>      486 |   .data.pixel_data.vactive_vblank_hi = 0x10,
>          |                                            }}
>      487 |   /* hsync offset 40 pw 128, vsync offset 1 pw 4 */
>      488 |   .data.pixel_data.hsync_offset_lo = 0x28,
>          |                                          }}
>      489 |   .data.pixel_data.hsync_pulse_width_lo = 0x80,
>          |                                               }}
>      490 |   .data.pixel_data.vsync_offset_pulse_width_lo = 0x14,
>          |                                                      }}
>      491 |   .data.pixel_data.hsync_vsync_offset_pulse_width_hi = 0x00,
>          |                                                            }}
>    ......
>      494 |  }, {
>          |  }}
>      495 |   .pixel_clock = 0,
>          |                  -
>          |                  {{0}}
>      496 |   .data.other_data.type = 0xfd, /* Monitor ranges */
>          |                           {   }}
>      497 |   .data.other_data.data.range.min_vfreq = 59,
>          |                                           { }}
>      498 |   .data.other_data.data.range.max_vfreq = 61,
>          |                                           { }}
>      499 |   .data.other_data.data.range.min_hfreq_khz = 29,
>          |                                               { }}
>      500 |   .data.other_data.data.range.max_hfreq_khz = 32,
>          |                                               { }}
>      501 |   .data.other_data.data.range.pixel_clock_mhz = 4, /* 40 MHz */
>          |                                                 {}}
>      502 |   .data.other_data.data.range.flags = 0,
>          |                                       {}}
>    drivers/gpu/drm/tiny/gm12u320.c:503:45: warning: initialized field overwritten [-Woverride-init]
>      503 |   .data.other_data.data.range.formula.cvt = {
>          |                                             ^
>    drivers/gpu/drm/tiny/gm12u320.c:503:45: note: (near initialization for 'gm12u320_edid.detailed_timings[1].data.pixel_data')
>>> drivers/gpu/drm/tiny/gm12u320.c:464:36: warning: missing braces around initializer [-Wmissing-braces]
>      464 | static struct edid gm12u320_edid = {
>          |                                    ^
>    ......
>      478 |   .pixel_clock = 3383,
>          |                  {{  }}
>      479 |   /* hactive = 848, hblank = 256 */
>      480 |   .data.pixel_data.hactive_lo = 0x50,
>          |                                     }}
>      481 |   .data.pixel_data.hblank_lo = 0x00,
>          |                                    }}
>      482 |   .data.pixel_data.hactive_hblank_hi = 0x31,
>          |                                            }}
>      483 |   /* vactive = 480, vblank = 28 */
>      484 |   .data.pixel_data.vactive_lo = 0xe0,
>          |                                     }}
>      485 |   .data.pixel_data.vblank_lo = 0x1c,
>          |                                    }}
>      486 |   .data.pixel_data.vactive_vblank_hi = 0x10,
>          |                                            }}
>      487 |   /* hsync offset 40 pw 128, vsync offset 1 pw 4 */
>      488 |   .data.pixel_data.hsync_offset_lo = 0x28,
>          |                                          }}
>      489 |   .data.pixel_data.hsync_pulse_width_lo = 0x80,
>          |                                               }}
>      490 |   .data.pixel_data.vsync_offset_pulse_width_lo = 0x14,
>          |                                                      }}
>      491 |   .data.pixel_data.hsync_vsync_offset_pulse_width_hi = 0x00,
>          |                                                            }}
>    ......
>      494 |  }, {
>          |  }}
>      495 |   .pixel_clock = 0,
>          |                  -
>          |                  {{0}}
>      496 |   .data.other_data.type = 0xfd, /* Monitor ranges */
>          |                           {   }}
>      497 |   .data.other_data.data.range.min_vfreq = 59,
>          |                                           { }}
>      498 |   .data.other_data.data.range.max_vfreq = 61,
>          |                                           { }}
>      499 |   .data.other_data.data.range.min_hfreq_khz = 29,
>          |                                               { }}
>      500 |   .data.other_data.data.range.max_hfreq_khz = 32,
>          |                                               { }}
>      501 |   .data.other_data.data.range.pixel_clock_mhz = 4, /* 40 MHz */
>          |                                                 {}}
>      502 |   .data.other_data.data.range.flags = 0,
>          |                                       {}}
>    ......
>      505 |  }, {
>          |  }
>    drivers/gpu/drm/tiny/gm12u320.c:506:4: error: 'struct detailed_timing' has no member named 'pixel_clock'
>      506 |   .pixel_clock = 0,
>          |    ^~~~~~~~~~~
>    drivers/gpu/drm/tiny/gm12u320.c:507:9: error: 'union <anonymous>' has no member named 'other_data'
>      507 |   .data.other_data.type = 0xfc, /* Model string */
>          |         ^~~~~~~~~~
>    drivers/gpu/drm/tiny/gm12u320.c:507:27: warning: initialized field overwritten [-Woverride-init]
>      507 |   .data.other_data.type = 0xfc, /* Model string */
>          |                           ^~~~
>    drivers/gpu/drm/tiny/gm12u320.c:507:27: note: (near initialization for 'gm12u320_edid.detailed_timings[2].data.pixel_data.pixel_clock')
>    drivers/gpu/drm/tiny/gm12u320.c:508:9: error: 'union <anonymous>' has no member named 'other_data'
>      508 |   .data.other_data.data.str.str = {
>          |         ^~~~~~~~~~
>>> drivers/gpu/drm/tiny/gm12u320.c:464:36: warning: missing braces around initializer [-Wmissing-braces]
>      464 | static struct edid gm12u320_edid = {
>          |                                    ^
>    ......
>      478 |   .pixel_clock = 3383,
>          |                  {{  }}
>      479 |   /* hactive = 848, hblank = 256 */
>      480 |   .data.pixel_data.hactive_lo = 0x50,
>          |                                     }}
>      481 |   .data.pixel_data.hblank_lo = 0x00,
>          |                                    }}
>      482 |   .data.pixel_data.hactive_hblank_hi = 0x31,
>          |                                            }}
>      483 |   /* vactive = 480, vblank = 28 */
>      484 |   .data.pixel_data.vactive_lo = 0xe0,
>          |                                     }}
>      485 |   .data.pixel_data.vblank_lo = 0x1c,
>          |                                    }}
>      486 |   .data.pixel_data.vactive_vblank_hi = 0x10,
>          |                                            }}
>      487 |   /* hsync offset 40 pw 128, vsync offset 1 pw 4 */
>      488 |   .data.pixel_data.hsync_offset_lo = 0x28,
>          |                                          }}
>      489 |   .data.pixel_data.hsync_pulse_width_lo = 0x80,
>          |                                               }}
>      490 |   .data.pixel_data.vsync_offset_pulse_width_lo = 0x14,
>          |                                                      }}
>      491 |   .data.pixel_data.hsync_vsync_offset_pulse_width_hi = 0x00,
>          |                                                            }}
>    ......
>      494 |  }, {
>          |  }}
>      495 |   .pixel_clock = 0,
>          |                  -
>          |                  {{0}}
>      496 |   .data.other_data.type = 0xfd, /* Monitor ranges */
>          |                           {   }}
>      497 |   .data.other_data.data.range.min_vfreq = 59,
>          |                                           { }}
>      498 |   .data.other_data.data.range.max_vfreq = 61,
>          |                                           { }}
>      499 |   .data.other_data.data.range.min_hfreq_khz = 29,
>          |                                               { }}
>      500 |   .data.other_data.data.range.max_hfreq_khz = 32,
>          |                                               { }}
>      501 |   .data.other_data.data.range.pixel_clock_mhz = 4, /* 40 MHz */
>          |                                                 {}}
>      502 |   .data.other_data.data.range.flags = 0,
>          |                                       {}}
>    ......
>      505 |  }, {
>          |  }
>      506 |   .pixel_clock = 0,
>          |                  -
>          |                  {{0}}
>      507 |   .data.other_data.type = 0xfc, /* Model string */
>          |                           {   }}
>    drivers/gpu/drm/tiny/gm12u320.c:508:35: warning: initialized field overwritten [-Woverride-init]
>      508 |   .data.other_data.data.str.str = {
>          |                                   ^
>    drivers/gpu/drm/tiny/gm12u320.c:508:35: note: (near initialization for 'gm12u320_edid.detailed_timings[2].data.pixel_data')
>>> drivers/gpu/drm/tiny/gm12u320.c:464:36: warning: missing braces around initializer [-Wmissing-braces]
>      464 | static struct edid gm12u320_edid = {
>          |                                    ^
>    ......
>      478 |   .pixel_clock = 3383,
>          |                  {{  }}
>      479 |   /* hactive = 848, hblank = 256 */
>      480 |   .data.pixel_data.hactive_lo = 0x50,
>          |                                     }}
>      481 |   .data.pixel_data.hblank_lo = 0x00,
>          |                                    }}
>      482 |   .data.pixel_data.hactive_hblank_hi = 0x31,
>          |                                            }}
>      483 |   /* vactive = 480, vblank = 28 */
>      484 |   .data.pixel_data.vactive_lo = 0xe0,
>          |                                     }}
>      485 |   .data.pixel_data.vblank_lo = 0x1c,
>          |                                    }}
>      486 |   .data.pixel_data.vactive_vblank_hi = 0x10,
>          |                                            }}
>      487 |   /* hsync offset 40 pw 128, vsync offset 1 pw 4 */
>      488 |   .data.pixel_data.hsync_offset_lo = 0x28,
>          |                                          }}
>      489 |   .data.pixel_data.hsync_pulse_width_lo = 0x80,
>          |                                               }}
>      490 |   .data.pixel_data.vsync_offset_pulse_width_lo = 0x14,
>          |                                                      }}
>      491 |   .data.pixel_data.hsync_vsync_offset_pulse_width_hi = 0x00,
>          |                                                            }}
>    ......
>      494 |  }, {
>          |  }}
>      495 |   .pixel_clock = 0,
>          |                  -
>          |                  {{0}}
>      496 |   .data.other_data.type = 0xfd, /* Monitor ranges */
>          |                           {   }}
>      497 |   .data.other_data.data.range.min_vfreq = 59,
>          |                                           { }}
>      498 |   .data.other_data.data.range.max_vfreq = 61,
>          |                                           { }}
>      499 |   .data.other_data.data.range.min_hfreq_khz = 29,
>          |                                               { }}
>      500 |   .data.other_data.data.range.max_hfreq_khz = 32,
>          |                                               { }}
>      501 |   .data.other_data.data.range.pixel_clock_mhz = 4, /* 40 MHz */
>          |                                                 {}}
>      502 |   .data.other_data.data.range.flags = 0,
>          |                                       {}}
>    ......
>      505 |  }, {
>          |  }
>      506 |   .pixel_clock = 0,
>          |                  -
>          |                  {{0}}
>      507 |   .data.other_data.type = 0xfc, /* Model string */
>          |                           {   }}
>    ......
>      511 |  }, {
>          |  }
>    drivers/gpu/drm/tiny/gm12u320.c:512:4: error: 'struct detailed_timing' has no member named 'pixel_clock'
>      512 |   .pixel_clock = 0,
>          |    ^~~~~~~~~~~
>    drivers/gpu/drm/tiny/gm12u320.c:513:9: error: 'union <anonymous>' has no member named 'other_data'
>      513 |   .data.other_data.type = 0xfe, /* Unspecified text / padding */
>          |         ^~~~~~~~~~
>    drivers/gpu/drm/tiny/gm12u320.c:513:27: warning: initialized field overwritten [-Woverride-init]
>      513 |   .data.other_data.type = 0xfe, /* Unspecified text / padding */
>          |                           ^~~~
>    drivers/gpu/drm/tiny/gm12u320.c:513:27: note: (near initialization for 'gm12u320_edid.detailed_timings[3].data.pixel_data.pixel_clock')
>    drivers/gpu/drm/tiny/gm12u320.c:514:9: error: 'union <anonymous>' has no member named 'other_data'
>      514 |   .data.other_data.data.str.str = {
>          |         ^~~~~~~~~~
>>> drivers/gpu/drm/tiny/gm12u320.c:464:36: warning: missing braces around initializer [-Wmissing-braces]
>      464 | static struct edid gm12u320_edid = {
>          |                                    ^
>    ......
>      478 |   .pixel_clock = 3383,
>          |                  {{  }}
>      479 |   /* hactive = 848, hblank = 256 */
>      480 |   .data.pixel_data.hactive_lo = 0x50,
>          |                                     }}
>      481 |   .data.pixel_data.hblank_lo = 0x00,
>          |                                    }}
>      482 |   .data.pixel_data.hactive_hblank_hi = 0x31,
>          |                                            }}
>      483 |   /* vactive = 480, vblank = 28 */
>      484 |   .data.pixel_data.vactive_lo = 0xe0,
>          |                                     }}
>      485 |   .data.pixel_data.vblank_lo = 0x1c,
>          |                                    }}
>      486 |   .data.pixel_data.vactive_vblank_hi = 0x10,
>          |                                            }}
>      487 |   /* hsync offset 40 pw 128, vsync offset 1 pw 4 */
>      488 |   .data.pixel_data.hsync_offset_lo = 0x28,
>          |                                          }}
>      489 |   .data.pixel_data.hsync_pulse_width_lo = 0x80,
>          |                                               }}
>      490 |   .data.pixel_data.vsync_offset_pulse_width_lo = 0x14,
>          |                                                      }}
>      491 |   .data.pixel_data.hsync_vsync_offset_pulse_width_hi = 0x00,
>          |                                                            }}
>    ......
>      494 |  }, {
>          |  }}
>      495 |   .pixel_clock = 0,
>          |                  -
>          |                  {{0}}
>      496 |   .data.other_data.type = 0xfd, /* Monitor ranges */
>          |                           {   }}
>      497 |   .data.other_data.data.range.min_vfreq = 59,
>          |                                           { }}
>      498 |   .data.other_data.data.range.max_vfreq = 61,
>          |                                           { }}
>      499 |   .data.other_data.data.range.min_hfreq_khz = 29,
>          |                                               { }}
>      500 |   .data.other_data.data.range.max_hfreq_khz = 32,
>          |                                               { }}
>      501 |   .data.other_data.data.range.pixel_clock_mhz = 4, /* 40 MHz */
>          |                                                 {}}
>      502 |   .data.other_data.data.range.flags = 0,
>          |                                       {}}
>    ......
>      505 |  }, {
>          |  }
>      506 |   .pixel_clock = 0,
>          |                  -
>          |                  {{0}}
>      507 |   .data.other_data.type = 0xfc, /* Model string */
>          |                           {   }}
>    ......
>      511 |  }, {
>          |  }
>      512 |   .pixel_clock = 0,
>          |                  -
>          |                  {{0}}
>      513 |   .data.other_data.type = 0xfe, /* Unspecified text / padding */
>          |                           {   }}
>    drivers/gpu/drm/tiny/gm12u320.c:514:35: warning: initialized field overwritten [-Woverride-init]
>      514 |   .data.other_data.data.str.str = {
>          |                                   ^
>    drivers/gpu/drm/tiny/gm12u320.c:514:35: note: (near initialization for 'gm12u320_edid.detailed_timings[3].data.pixel_data')
>>> drivers/gpu/drm/tiny/gm12u320.c:464:36: warning: missing braces around initializer [-Wmissing-braces]
>      464 | static struct edid gm12u320_edid = {
>          |                                    ^
>    ......
>      478 |   .pixel_clock = 3383,
>          |                  {{  }}
>      479 |   /* hactive = 848, hblank = 256 */
>      480 |   .data.pixel_data.hactive_lo = 0x50,
>          |                                     }}
>      481 |   .data.pixel_data.hblank_lo = 0x00,
>          |                                    }}
>      482 |   .data.pixel_data.hactive_hblank_hi = 0x31,
>          |                                            }}
>      483 |   /* vactive = 480, vblank = 28 */
>      484 |   .data.pixel_data.vactive_lo = 0xe0,
>          |                                     }}
>      485 |   .data.pixel_data.vblank_lo = 0x1c,
>          |                                    }}
>      486 |   .data.pixel_data.vactive_vblank_hi = 0x10,
>          |                                            }}
>      487 |   /* hsync offset 40 pw 128, vsync offset 1 pw 4 */
>      488 |   .data.pixel_data.hsync_offset_lo = 0x28,
>          |                                          }}
>      489 |   .data.pixel_data.hsync_pulse_width_lo = 0x80,
>          |                                               }}
>      490 |   .data.pixel_data.vsync_offset_pulse_width_lo = 0x14,
>          |                                                      }}
>      491 |   .data.pixel_data.hsync_vsync_offset_pulse_width_hi = 0x00,
>          |                                                            }}
>    ......
>      494 |  }, {
>          |  }}
>      495 |   .pixel_clock = 0,
>          |                  -
>          |                  {{0}}
>      496 |   .data.other_data.type = 0xfd, /* Monitor ranges */
>          |                           {   }}
>      497 |   .data.other_data.data.range.min_vfreq = 59,
>          |                                           { }}
>      498 |   .data.other_data.data.range.max_vfreq = 61,
>          |                                           { }}
>      499 |   .data.other_data.data.range.min_hfreq_khz = 29,
>          |                                               { }}
>      500 |   .data.other_data.data.range.max_hfreq_khz = 32,
>          |                                               { }}
>      501 |   .data.other_data.data.range.pixel_clock_mhz = 4, /* 40 MHz */
>          |                                                 {}}
>      502 |   .data.other_data.data.range.flags = 0,
>          |                                       {}}
>    ......
>      505 |  }, {
>          |  }
>      506 |   .pixel_clock = 0,
>          |                  -
>          |                  {{0}}
>      507 |   .data.other_data.type = 0xfc, /* Model string */
>          |                           {   }}
>    ......
>      511 |  }, {
>          |  }
>      512 |   .pixel_clock = 0,
>          |                  -
>          |                  {{0}}
>      513 |   .data.other_data.type = 0xfe, /* Unspecified text / padding */
>          |                           {   }}
>    ......
>      517 |  } },
>          |  }
>>> drivers/gpu/drm/tiny/gm12u320.c:464:36: warning: missing braces around initializer [-Wmissing-braces]
>      464 | static struct edid gm12u320_edid = {
>          |                                    ^
>    ......
>      478 |   .pixel_clock = 3383,
>          |                  {{  }}
>      479 |   /* hactive = 848, hblank = 256 */
>      480 |   .data.pixel_data.hactive_lo = 0x50,
>          |                                     }}
>      481 |   .data.pixel_data.hblank_lo = 0x00,
>          |                                    }}
>      482 |   .data.pixel_data.hactive_hblank_hi = 0x31,
>          |                                            }}
>      483 |   /* vactive = 480, vblank = 28 */
>      484 |   .data.pixel_data.vactive_lo = 0xe0,
>          |                                     }}
>      485 |   .data.pixel_data.vblank_lo = 0x1c,
>          |                                    }}
>      486 |   .data.pixel_data.vactive_vblank_hi = 0x10,
>          |                                            }}
>      487 |   /* hsync offset 40 pw 128, vsync offset 1 pw 4 */
>      488 |   .data.pixel_data.hsync_offset_lo = 0x28,
>          |                                          }}
>      489 |   .data.pixel_data.hsync_pulse_width_lo = 0x80,
>          |                                               }}
>      490 |   .data.pixel_data.vsync_offset_pulse_width_lo = 0x14,
>          |                                                      }}
>      491 |   .data.pixel_data.hsync_vsync_offset_pulse_width_hi = 0x00,
>          |                                                            }}
>    ......
>      494 |  }, {
>          |  }}
>      495 |   .pixel_clock = 0,
>          |                  -
>          |                  {{0}}
>      496 |   .data.other_data.type = 0xfd, /* Monitor ranges */
>          |                           {   }}
>      497 |   .data.other_data.data.range.min_vfreq = 59,
>          |                                           { }}
>      498 |   .data.other_data.data.range.max_vfreq = 61,
>          |                                           { }}
>      499 |   .data.other_data.data.range.min_hfreq_khz = 29,
>          |                                               { }}
>      500 |   .data.other_data.data.range.max_hfreq_khz = 32,
>          |                                               { }}
>      501 |   .data.other_data.data.range.pixel_clock_mhz = 4, /* 40 MHz */
>          |                                                 {}}
>      502 |   .data.other_data.data.range.flags = 0,
>          |                                       {}}
>    ......
>      505 |  }, {
>          |  }
>      506 |   .pixel_clock = 0,
>          |                  -
>          |                  {{0}}
>      507 |   .data.other_data.type = 0xfc, /* Model string */
>          |                           {   }}
>    ......
>      511 |  }, {
>          |  }
>      512 |   .pixel_clock = 0,
>          |                  -
>          |                  {{0}}
>      513 |   .data.other_data.type = 0xfe, /* Unspecified text / padding */
>          |                           {   }}
>    ......
>      517 |  } },
>          |  }
>>> drivers/gpu/drm/tiny/gm12u320.c:464:36: warning: missing braces around initializer [-Wmissing-braces]
>      464 | static struct edid gm12u320_edid = {
>          |                                    ^
>    ......
>      478 |   .pixel_clock = 3383,
>          |                  {{  }}
>      479 |   /* hactive = 848, hblank = 256 */
>      480 |   .data.pixel_data.hactive_lo = 0x50,
>          |                                     }}
>      481 |   .data.pixel_data.hblank_lo = 0x00,
>          |                                    }}
>      482 |   .data.pixel_data.hactive_hblank_hi = 0x31,
>          |                                            }}
>      483 |   /* vactive = 480, vblank = 28 */
>      484 |   .data.pixel_data.vactive_lo = 0xe0,
>          |                                     }}
>      485 |   .data.pixel_data.vblank_lo = 0x1c,
>          |                                    }}
>      486 |   .data.pixel_data.vactive_vblank_hi = 0x10,
>          |                                            }}
>      487 |   /* hsync offset 40 pw 128, vsync offset 1 pw 4 */
>      488 |   .data.pixel_data.hsync_offset_lo = 0x28,
>          |                                          }}
>      489 |   .data.pixel_data.hsync_pulse_width_lo = 0x80,
>          |                                               }}
>      490 |   .data.pixel_data.vsync_offset_pulse_width_lo = 0x14,
>          |                                                      }}
>      491 |   .data.pixel_data.hsync_vsync_offset_pulse_width_hi = 0x00,
>          |                                                            }}
>    ......
>      494 |  }, {
>          |  }}
>      495 |   .pixel_clock = 0,
>          |                  -
>          |                  {{0}}
>      496 |   .data.other_data.type = 0xfd, /* Monitor ranges */
>          |                           {   }}
>      497 |   .data.other_data.data.range.min_vfreq = 59,
>          |                                           { }}
>      498 |   .data.other_data.data.range.max_vfreq = 61,
>          |                                           { }}
>      499 |   .data.other_data.data.range.min_hfreq_khz = 29,
>          |                                               { }}
>      500 |   .data.other_data.data.range.max_hfreq_khz = 32,
>          |                                               { }}
>      501 |   .data.other_data.data.range.pixel_clock_mhz = 4, /* 40 MHz */
>          |                                                 {}}
>      502 |   .data.other_data.data.range.flags = 0,
>          |                                       {}}
>    ......
>      505 |  }, {
>          |  }
>      506 |   .pixel_clock = 0,
>          |                  -
>          |                  {{0}}
>      507 |   .data.other_data.type = 0xfc, /* Model string */
>          |                           {   }}
>    ......
>      511 |  }, {
>          |  }
>      512 |   .pixel_clock = 0,
>          |                  -
>          |                  {{0}}
>      513 |   .data.other_data.type = 0xfe, /* Unspecified text / padding */
>          |                           {   }}
>    ......
>      517 |  } },
>          |  }
>
>
> vim +464 drivers/gpu/drm/tiny/gm12u320.c
>
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  457  
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  458  /*
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  459   * We use fake EDID info so that userspace know that it is dealing with
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  460   * an Acer projector, rather then listing this as an "unknown" monitor.
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  461   * Note this assumes this driver is only ever used with the Acer C120, if we
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  462   * add support for other devices the vendor and model should be parameterized.
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  463   */
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 @464  static struct edid gm12u320_edid = {
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  465  	.header		= { 0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00 },
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  466  	.mfg_id		= { 0x04, 0x72 },	/* "ACR" */
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  467  	.prod_code	= { 0x20, 0xc1 },	/* C120h */
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  468  	.serial		= 0xaa55aa55,
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  469  	.mfg_week	= 1,
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  470  	.mfg_year	= 16,
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  471  	.version	= 1,			/* EDID 1.3 */
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  472  	.revision	= 3,			/* EDID 1.3 */
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  473  	.input		= 0x08,			/* Analog input */
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  474  	.features	= 0x0a,			/* Pref timing in DTD 1 */
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  475  	.standard_timings = { { 1, 1 }, { 1, 1 }, { 1, 1 }, { 1, 1 },
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  476  			      { 1, 1 }, { 1, 1 }, { 1, 1 }, { 1, 1 } },
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  477  	.detailed_timings = { {
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  478  		.pixel_clock = 3383,
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  479  		/* hactive = 848, hblank = 256 */
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  480  		.data.pixel_data.hactive_lo = 0x50,
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  481  		.data.pixel_data.hblank_lo = 0x00,
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  482  		.data.pixel_data.hactive_hblank_hi = 0x31,
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  483  		/* vactive = 480, vblank = 28 */
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  484  		.data.pixel_data.vactive_lo = 0xe0,
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  485  		.data.pixel_data.vblank_lo = 0x1c,
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  486  		.data.pixel_data.vactive_vblank_hi = 0x10,
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  487  		/* hsync offset 40 pw 128, vsync offset 1 pw 4 */
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  488  		.data.pixel_data.hsync_offset_lo = 0x28,
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  489  		.data.pixel_data.hsync_pulse_width_lo = 0x80,
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  490  		.data.pixel_data.vsync_offset_pulse_width_lo = 0x14,
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  491  		.data.pixel_data.hsync_vsync_offset_pulse_width_hi = 0x00,
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  492  		/* Digital separate syncs, hsync+, vsync+ */
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  493  		.data.pixel_data.misc = 0x1e,
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  494  	}, {
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  495  		.pixel_clock = 0,
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  496  		.data.other_data.type = 0xfd, /* Monitor ranges */
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  497  		.data.other_data.data.range.min_vfreq = 59,
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  498  		.data.other_data.data.range.max_vfreq = 61,
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  499  		.data.other_data.data.range.min_hfreq_khz = 29,
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  500  		.data.other_data.data.range.max_hfreq_khz = 32,
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  501  		.data.other_data.data.range.pixel_clock_mhz = 4, /* 40 MHz */
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  502  		.data.other_data.data.range.flags = 0,
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  503  		.data.other_data.data.range.formula.cvt = {
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  504  			0xa0, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20 },
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  505  	}, {
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  506  		.pixel_clock = 0,
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  507  		.data.other_data.type = 0xfc, /* Model string */
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  508  		.data.other_data.data.str.str = {
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  509  			'P', 'r', 'o', 'j', 'e', 'c', 't', 'o', 'r', '\n',
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  510  			' ', ' ',  ' ' },
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  511  	}, {
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  512  		.pixel_clock = 0,
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  513  		.data.other_data.type = 0xfe, /* Unspecified text / padding */
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  514  		.data.other_data.data.str.str = {
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  515  			'\n', ' ', ' ', ' ', ' ', ' ', ' ', ' ', ' ', ' ',
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  516  			' ', ' ',  ' ' },
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  517  	} },
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  518  	.checksum = 0x13,
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  519  };
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  520  

-- 
Jani Nikula, Intel Open Source Graphics Center

Re: [Intel-gfx] [PATCH v2 03/11] drm/edid: slightly restructure timing and non-timing descriptor structs

[Jani Nikula]

I think I'm just going to revert back to my original plan of leaving the
struct restructuring to another time in the future.

BR,
Jani.


On Mon, 28 Mar 2022, kernel test robot <lkp@intel.com> wrote:
> Hi Jani,
>
> I love your patch! Perhaps something to improve:
>
> [auto build test WARNING on drm/drm-next]
> [also build test WARNING on drm-intel/for-linux-next drm-tip/drm-tip v5.17 next-20220328]
> [If your patch is applied to the wrong git tree, kindly drop us a note.
> And when submitting patch, we suggest to use '--base' as documented in
> https://git-scm.com/docs/git-format-patch]
>
> url:    https://github.com/intel-lab-lkp/linux/commits/Jani-Nikula/drm-edid-constify-EDID-parsing-with-some-fixes/20220328-171858
> base:   git://anongit.freedesktop.org/drm/drm drm-next
> config: x86_64-randconfig-a003-20220328 (https://download.01.org/0day-ci/archive/20220328/202203281926.AthxJpnK-lkp@intel.com/config)
> compiler: gcc-9 (Ubuntu 9.4.0-1ubuntu1~20.04.1) 9.4.0
> reproduce (this is a W=1 build):
>         # https://github.com/intel-lab-lkp/linux/commit/f538c9296c54ce8f878432153584a68939ffc111
>         git remote add linux-review https://github.com/intel-lab-lkp/linux
>         git fetch --no-tags linux-review Jani-Nikula/drm-edid-constify-EDID-parsing-with-some-fixes/20220328-171858
>         git checkout f538c9296c54ce8f878432153584a68939ffc111
>         # save the config file to linux build tree
>         mkdir build_dir
>         make W=1 O=build_dir ARCH=x86_64 SHELL=/bin/bash drivers/gpu/drm/tiny/
>
> If you fix the issue, kindly add following tag as appropriate
> Reported-by: kernel test robot <lkp@intel.com>
>
> All warnings (new ones prefixed by >>):
>
>    drivers/gpu/drm/tiny/gm12u320.c:478:4: error: 'struct detailed_timing' has no member named 'pixel_clock'
>      478 |   .pixel_clock = 3383,
>          |    ^~~~~~~~~~~
>>> drivers/gpu/drm/tiny/gm12u320.c:464:36: warning: missing braces around initializer [-Wmissing-braces]
>      464 | static struct edid gm12u320_edid = {
>          |                                    ^
>    ......
>      478 |   .pixel_clock = 3383,
>          |                  {{  }}
>      479 |   /* hactive = 848, hblank = 256 */
>      480 |   .data.pixel_data.hactive_lo = 0x50,
>          |                                     }}
>      481 |   .data.pixel_data.hblank_lo = 0x00,
>          |                                    }}
>      482 |   .data.pixel_data.hactive_hblank_hi = 0x31,
>          |                                            }}
>      483 |   /* vactive = 480, vblank = 28 */
>      484 |   .data.pixel_data.vactive_lo = 0xe0,
>          |                                     }}
>      485 |   .data.pixel_data.vblank_lo = 0x1c,
>          |                                    }}
>      486 |   .data.pixel_data.vactive_vblank_hi = 0x10,
>          |                                            }}
>      487 |   /* hsync offset 40 pw 128, vsync offset 1 pw 4 */
>      488 |   .data.pixel_data.hsync_offset_lo = 0x28,
>          |                                          }}
>      489 |   .data.pixel_data.hsync_pulse_width_lo = 0x80,
>          |                                               }}
>      490 |   .data.pixel_data.vsync_offset_pulse_width_lo = 0x14,
>          |                                                      }}
>      491 |   .data.pixel_data.hsync_vsync_offset_pulse_width_hi = 0x00,
>          |                                                            }}
>    ......
>      494 |  }, {
>          |  }}
>    drivers/gpu/drm/tiny/gm12u320.c:495:4: error: 'struct detailed_timing' has no member named 'pixel_clock'
>      495 |   .pixel_clock = 0,
>          |    ^~~~~~~~~~~
>    drivers/gpu/drm/tiny/gm12u320.c:496:9: error: 'union <anonymous>' has no member named 'other_data'
>      496 |   .data.other_data.type = 0xfd, /* Monitor ranges */
>          |         ^~~~~~~~~~
>    drivers/gpu/drm/tiny/gm12u320.c:496:27: warning: initialized field overwritten [-Woverride-init]
>      496 |   .data.other_data.type = 0xfd, /* Monitor ranges */
>          |                           ^~~~
>    drivers/gpu/drm/tiny/gm12u320.c:496:27: note: (near initialization for 'gm12u320_edid.detailed_timings[1].data.pixel_data.pixel_clock')
>    drivers/gpu/drm/tiny/gm12u320.c:497:9: error: 'union <anonymous>' has no member named 'other_data'
>      497 |   .data.other_data.data.range.min_vfreq = 59,
>          |         ^~~~~~~~~~
>    drivers/gpu/drm/tiny/gm12u320.c:497:43: warning: initialized field overwritten [-Woverride-init]
>      497 |   .data.other_data.data.range.min_vfreq = 59,
>          |                                           ^~
>    drivers/gpu/drm/tiny/gm12u320.c:497:43: note: (near initialization for 'gm12u320_edid.detailed_timings[1].data.pixel_data.pixel_clock')
>    drivers/gpu/drm/tiny/gm12u320.c:498:9: error: 'union <anonymous>' has no member named 'other_data'
>      498 |   .data.other_data.data.range.max_vfreq = 61,
>          |         ^~~~~~~~~~
>    drivers/gpu/drm/tiny/gm12u320.c:498:43: warning: initialized field overwritten [-Woverride-init]
>      498 |   .data.other_data.data.range.max_vfreq = 61,
>          |                                           ^~
>    drivers/gpu/drm/tiny/gm12u320.c:498:43: note: (near initialization for 'gm12u320_edid.detailed_timings[1].data.pixel_data.pixel_clock')
>    drivers/gpu/drm/tiny/gm12u320.c:499:9: error: 'union <anonymous>' has no member named 'other_data'
>      499 |   .data.other_data.data.range.min_hfreq_khz = 29,
>          |         ^~~~~~~~~~
>    drivers/gpu/drm/tiny/gm12u320.c:499:47: warning: initialized field overwritten [-Woverride-init]
>      499 |   .data.other_data.data.range.min_hfreq_khz = 29,
>          |                                               ^~
>    drivers/gpu/drm/tiny/gm12u320.c:499:47: note: (near initialization for 'gm12u320_edid.detailed_timings[1].data.pixel_data.pixel_clock')
>    drivers/gpu/drm/tiny/gm12u320.c:500:9: error: 'union <anonymous>' has no member named 'other_data'
>      500 |   .data.other_data.data.range.max_hfreq_khz = 32,
>          |         ^~~~~~~~~~
>    drivers/gpu/drm/tiny/gm12u320.c:500:47: warning: initialized field overwritten [-Woverride-init]
>      500 |   .data.other_data.data.range.max_hfreq_khz = 32,
>          |                                               ^~
>    drivers/gpu/drm/tiny/gm12u320.c:500:47: note: (near initialization for 'gm12u320_edid.detailed_timings[1].data.pixel_data.pixel_clock')
>    drivers/gpu/drm/tiny/gm12u320.c:501:9: error: 'union <anonymous>' has no member named 'other_data'
>      501 |   .data.other_data.data.range.pixel_clock_mhz = 4, /* 40 MHz */
>          |         ^~~~~~~~~~
>    drivers/gpu/drm/tiny/gm12u320.c:501:49: warning: initialized field overwritten [-Woverride-init]
>      501 |   .data.other_data.data.range.pixel_clock_mhz = 4, /* 40 MHz */
>          |                                                 ^
>    drivers/gpu/drm/tiny/gm12u320.c:501:49: note: (near initialization for 'gm12u320_edid.detailed_timings[1].data.pixel_data.pixel_clock')
>    drivers/gpu/drm/tiny/gm12u320.c:502:9: error: 'union <anonymous>' has no member named 'other_data'
>      502 |   .data.other_data.data.range.flags = 0,
>          |         ^~~~~~~~~~
>    drivers/gpu/drm/tiny/gm12u320.c:502:39: warning: initialized field overwritten [-Woverride-init]
>      502 |   .data.other_data.data.range.flags = 0,
>          |                                       ^
>    drivers/gpu/drm/tiny/gm12u320.c:502:39: note: (near initialization for 'gm12u320_edid.detailed_timings[1].data.pixel_data.pixel_clock')
>    drivers/gpu/drm/tiny/gm12u320.c:503:9: error: 'union <anonymous>' has no member named 'other_data'
>      503 |   .data.other_data.data.range.formula.cvt = {
>          |         ^~~~~~~~~~
>>> drivers/gpu/drm/tiny/gm12u320.c:464:36: warning: missing braces around initializer [-Wmissing-braces]
>      464 | static struct edid gm12u320_edid = {
>          |                                    ^
>    ......
>      478 |   .pixel_clock = 3383,
>          |                  {{  }}
>      479 |   /* hactive = 848, hblank = 256 */
>      480 |   .data.pixel_data.hactive_lo = 0x50,
>          |                                     }}
>      481 |   .data.pixel_data.hblank_lo = 0x00,
>          |                                    }}
>      482 |   .data.pixel_data.hactive_hblank_hi = 0x31,
>          |                                            }}
>      483 |   /* vactive = 480, vblank = 28 */
>      484 |   .data.pixel_data.vactive_lo = 0xe0,
>          |                                     }}
>      485 |   .data.pixel_data.vblank_lo = 0x1c,
>          |                                    }}
>      486 |   .data.pixel_data.vactive_vblank_hi = 0x10,
>          |                                            }}
>      487 |   /* hsync offset 40 pw 128, vsync offset 1 pw 4 */
>      488 |   .data.pixel_data.hsync_offset_lo = 0x28,
>          |                                          }}
>      489 |   .data.pixel_data.hsync_pulse_width_lo = 0x80,
>          |                                               }}
>      490 |   .data.pixel_data.vsync_offset_pulse_width_lo = 0x14,
>          |                                                      }}
>      491 |   .data.pixel_data.hsync_vsync_offset_pulse_width_hi = 0x00,
>          |                                                            }}
>    ......
>      494 |  }, {
>          |  }}
>      495 |   .pixel_clock = 0,
>          |                  -
>          |                  {{0}}
>      496 |   .data.other_data.type = 0xfd, /* Monitor ranges */
>          |                           {   }}
>      497 |   .data.other_data.data.range.min_vfreq = 59,
>          |                                           { }}
>      498 |   .data.other_data.data.range.max_vfreq = 61,
>          |                                           { }}
>      499 |   .data.other_data.data.range.min_hfreq_khz = 29,
>          |                                               { }}
>      500 |   .data.other_data.data.range.max_hfreq_khz = 32,
>          |                                               { }}
>      501 |   .data.other_data.data.range.pixel_clock_mhz = 4, /* 40 MHz */
>          |                                                 {}}
>      502 |   .data.other_data.data.range.flags = 0,
>          |                                       {}}
>    drivers/gpu/drm/tiny/gm12u320.c:503:45: warning: initialized field overwritten [-Woverride-init]
>      503 |   .data.other_data.data.range.formula.cvt = {
>          |                                             ^
>    drivers/gpu/drm/tiny/gm12u320.c:503:45: note: (near initialization for 'gm12u320_edid.detailed_timings[1].data.pixel_data')
>>> drivers/gpu/drm/tiny/gm12u320.c:464:36: warning: missing braces around initializer [-Wmissing-braces]
>      464 | static struct edid gm12u320_edid = {
>          |                                    ^
>    ......
>      478 |   .pixel_clock = 3383,
>          |                  {{  }}
>      479 |   /* hactive = 848, hblank = 256 */
>      480 |   .data.pixel_data.hactive_lo = 0x50,
>          |                                     }}
>      481 |   .data.pixel_data.hblank_lo = 0x00,
>          |                                    }}
>      482 |   .data.pixel_data.hactive_hblank_hi = 0x31,
>          |                                            }}
>      483 |   /* vactive = 480, vblank = 28 */
>      484 |   .data.pixel_data.vactive_lo = 0xe0,
>          |                                     }}
>      485 |   .data.pixel_data.vblank_lo = 0x1c,
>          |                                    }}
>      486 |   .data.pixel_data.vactive_vblank_hi = 0x10,
>          |                                            }}
>      487 |   /* hsync offset 40 pw 128, vsync offset 1 pw 4 */
>      488 |   .data.pixel_data.hsync_offset_lo = 0x28,
>          |                                          }}
>      489 |   .data.pixel_data.hsync_pulse_width_lo = 0x80,
>          |                                               }}
>      490 |   .data.pixel_data.vsync_offset_pulse_width_lo = 0x14,
>          |                                                      }}
>      491 |   .data.pixel_data.hsync_vsync_offset_pulse_width_hi = 0x00,
>          |                                                            }}
>    ......
>      494 |  }, {
>          |  }}
>      495 |   .pixel_clock = 0,
>          |                  -
>          |                  {{0}}
>      496 |   .data.other_data.type = 0xfd, /* Monitor ranges */
>          |                           {   }}
>      497 |   .data.other_data.data.range.min_vfreq = 59,
>          |                                           { }}
>      498 |   .data.other_data.data.range.max_vfreq = 61,
>          |                                           { }}
>      499 |   .data.other_data.data.range.min_hfreq_khz = 29,
>          |                                               { }}
>      500 |   .data.other_data.data.range.max_hfreq_khz = 32,
>          |                                               { }}
>      501 |   .data.other_data.data.range.pixel_clock_mhz = 4, /* 40 MHz */
>          |                                                 {}}
>      502 |   .data.other_data.data.range.flags = 0,
>          |                                       {}}
>    ......
>      505 |  }, {
>          |  }
>    drivers/gpu/drm/tiny/gm12u320.c:506:4: error: 'struct detailed_timing' has no member named 'pixel_clock'
>      506 |   .pixel_clock = 0,
>          |    ^~~~~~~~~~~
>    drivers/gpu/drm/tiny/gm12u320.c:507:9: error: 'union <anonymous>' has no member named 'other_data'
>      507 |   .data.other_data.type = 0xfc, /* Model string */
>          |         ^~~~~~~~~~
>    drivers/gpu/drm/tiny/gm12u320.c:507:27: warning: initialized field overwritten [-Woverride-init]
>      507 |   .data.other_data.type = 0xfc, /* Model string */
>          |                           ^~~~
>    drivers/gpu/drm/tiny/gm12u320.c:507:27: note: (near initialization for 'gm12u320_edid.detailed_timings[2].data.pixel_data.pixel_clock')
>    drivers/gpu/drm/tiny/gm12u320.c:508:9: error: 'union <anonymous>' has no member named 'other_data'
>      508 |   .data.other_data.data.str.str = {
>          |         ^~~~~~~~~~
>>> drivers/gpu/drm/tiny/gm12u320.c:464:36: warning: missing braces around initializer [-Wmissing-braces]
>      464 | static struct edid gm12u320_edid = {
>          |                                    ^
>    ......
>      478 |   .pixel_clock = 3383,
>          |                  {{  }}
>      479 |   /* hactive = 848, hblank = 256 */
>      480 |   .data.pixel_data.hactive_lo = 0x50,
>          |                                     }}
>      481 |   .data.pixel_data.hblank_lo = 0x00,
>          |                                    }}
>      482 |   .data.pixel_data.hactive_hblank_hi = 0x31,
>          |                                            }}
>      483 |   /* vactive = 480, vblank = 28 */
>      484 |   .data.pixel_data.vactive_lo = 0xe0,
>          |                                     }}
>      485 |   .data.pixel_data.vblank_lo = 0x1c,
>          |                                    }}
>      486 |   .data.pixel_data.vactive_vblank_hi = 0x10,
>          |                                            }}
>      487 |   /* hsync offset 40 pw 128, vsync offset 1 pw 4 */
>      488 |   .data.pixel_data.hsync_offset_lo = 0x28,
>          |                                          }}
>      489 |   .data.pixel_data.hsync_pulse_width_lo = 0x80,
>          |                                               }}
>      490 |   .data.pixel_data.vsync_offset_pulse_width_lo = 0x14,
>          |                                                      }}
>      491 |   .data.pixel_data.hsync_vsync_offset_pulse_width_hi = 0x00,
>          |                                                            }}
>    ......
>      494 |  }, {
>          |  }}
>      495 |   .pixel_clock = 0,
>          |                  -
>          |                  {{0}}
>      496 |   .data.other_data.type = 0xfd, /* Monitor ranges */
>          |                           {   }}
>      497 |   .data.other_data.data.range.min_vfreq = 59,
>          |                                           { }}
>      498 |   .data.other_data.data.range.max_vfreq = 61,
>          |                                           { }}
>      499 |   .data.other_data.data.range.min_hfreq_khz = 29,
>          |                                               { }}
>      500 |   .data.other_data.data.range.max_hfreq_khz = 32,
>          |                                               { }}
>      501 |   .data.other_data.data.range.pixel_clock_mhz = 4, /* 40 MHz */
>          |                                                 {}}
>      502 |   .data.other_data.data.range.flags = 0,
>          |                                       {}}
>    ......
>      505 |  }, {
>          |  }
>      506 |   .pixel_clock = 0,
>          |                  -
>          |                  {{0}}
>      507 |   .data.other_data.type = 0xfc, /* Model string */
>          |                           {   }}
>    drivers/gpu/drm/tiny/gm12u320.c:508:35: warning: initialized field overwritten [-Woverride-init]
>      508 |   .data.other_data.data.str.str = {
>          |                                   ^
>    drivers/gpu/drm/tiny/gm12u320.c:508:35: note: (near initialization for 'gm12u320_edid.detailed_timings[2].data.pixel_data')
>>> drivers/gpu/drm/tiny/gm12u320.c:464:36: warning: missing braces around initializer [-Wmissing-braces]
>      464 | static struct edid gm12u320_edid = {
>          |                                    ^
>    ......
>      478 |   .pixel_clock = 3383,
>          |                  {{  }}
>      479 |   /* hactive = 848, hblank = 256 */
>      480 |   .data.pixel_data.hactive_lo = 0x50,
>          |                                     }}
>      481 |   .data.pixel_data.hblank_lo = 0x00,
>          |                                    }}
>      482 |   .data.pixel_data.hactive_hblank_hi = 0x31,
>          |                                            }}
>      483 |   /* vactive = 480, vblank = 28 */
>      484 |   .data.pixel_data.vactive_lo = 0xe0,
>          |                                     }}
>      485 |   .data.pixel_data.vblank_lo = 0x1c,
>          |                                    }}
>      486 |   .data.pixel_data.vactive_vblank_hi = 0x10,
>          |                                            }}
>      487 |   /* hsync offset 40 pw 128, vsync offset 1 pw 4 */
>      488 |   .data.pixel_data.hsync_offset_lo = 0x28,
>          |                                          }}
>      489 |   .data.pixel_data.hsync_pulse_width_lo = 0x80,
>          |                                               }}
>      490 |   .data.pixel_data.vsync_offset_pulse_width_lo = 0x14,
>          |                                                      }}
>      491 |   .data.pixel_data.hsync_vsync_offset_pulse_width_hi = 0x00,
>          |                                                            }}
>    ......
>      494 |  }, {
>          |  }}
>      495 |   .pixel_clock = 0,
>          |                  -
>          |                  {{0}}
>      496 |   .data.other_data.type = 0xfd, /* Monitor ranges */
>          |                           {   }}
>      497 |   .data.other_data.data.range.min_vfreq = 59,
>          |                                           { }}
>      498 |   .data.other_data.data.range.max_vfreq = 61,
>          |                                           { }}
>      499 |   .data.other_data.data.range.min_hfreq_khz = 29,
>          |                                               { }}
>      500 |   .data.other_data.data.range.max_hfreq_khz = 32,
>          |                                               { }}
>      501 |   .data.other_data.data.range.pixel_clock_mhz = 4, /* 40 MHz */
>          |                                                 {}}
>      502 |   .data.other_data.data.range.flags = 0,
>          |                                       {}}
>    ......
>      505 |  }, {
>          |  }
>      506 |   .pixel_clock = 0,
>          |                  -
>          |                  {{0}}
>      507 |   .data.other_data.type = 0xfc, /* Model string */
>          |                           {   }}
>    ......
>      511 |  }, {
>          |  }
>    drivers/gpu/drm/tiny/gm12u320.c:512:4: error: 'struct detailed_timing' has no member named 'pixel_clock'
>      512 |   .pixel_clock = 0,
>          |    ^~~~~~~~~~~
>    drivers/gpu/drm/tiny/gm12u320.c:513:9: error: 'union <anonymous>' has no member named 'other_data'
>      513 |   .data.other_data.type = 0xfe, /* Unspecified text / padding */
>          |         ^~~~~~~~~~
>    drivers/gpu/drm/tiny/gm12u320.c:513:27: warning: initialized field overwritten [-Woverride-init]
>      513 |   .data.other_data.type = 0xfe, /* Unspecified text / padding */
>          |                           ^~~~
>    drivers/gpu/drm/tiny/gm12u320.c:513:27: note: (near initialization for 'gm12u320_edid.detailed_timings[3].data.pixel_data.pixel_clock')
>    drivers/gpu/drm/tiny/gm12u320.c:514:9: error: 'union <anonymous>' has no member named 'other_data'
>      514 |   .data.other_data.data.str.str = {
>          |         ^~~~~~~~~~
>>> drivers/gpu/drm/tiny/gm12u320.c:464:36: warning: missing braces around initializer [-Wmissing-braces]
>      464 | static struct edid gm12u320_edid = {
>          |                                    ^
>    ......
>      478 |   .pixel_clock = 3383,
>          |                  {{  }}
>      479 |   /* hactive = 848, hblank = 256 */
>      480 |   .data.pixel_data.hactive_lo = 0x50,
>          |                                     }}
>      481 |   .data.pixel_data.hblank_lo = 0x00,
>          |                                    }}
>      482 |   .data.pixel_data.hactive_hblank_hi = 0x31,
>          |                                            }}
>      483 |   /* vactive = 480, vblank = 28 */
>      484 |   .data.pixel_data.vactive_lo = 0xe0,
>          |                                     }}
>      485 |   .data.pixel_data.vblank_lo = 0x1c,
>          |                                    }}
>      486 |   .data.pixel_data.vactive_vblank_hi = 0x10,
>          |                                            }}
>      487 |   /* hsync offset 40 pw 128, vsync offset 1 pw 4 */
>      488 |   .data.pixel_data.hsync_offset_lo = 0x28,
>          |                                          }}
>      489 |   .data.pixel_data.hsync_pulse_width_lo = 0x80,
>          |                                               }}
>      490 |   .data.pixel_data.vsync_offset_pulse_width_lo = 0x14,
>          |                                                      }}
>      491 |   .data.pixel_data.hsync_vsync_offset_pulse_width_hi = 0x00,
>          |                                                            }}
>    ......
>      494 |  }, {
>          |  }}
>      495 |   .pixel_clock = 0,
>          |                  -
>          |                  {{0}}
>      496 |   .data.other_data.type = 0xfd, /* Monitor ranges */
>          |                           {   }}
>      497 |   .data.other_data.data.range.min_vfreq = 59,
>          |                                           { }}
>      498 |   .data.other_data.data.range.max_vfreq = 61,
>          |                                           { }}
>      499 |   .data.other_data.data.range.min_hfreq_khz = 29,
>          |                                               { }}
>      500 |   .data.other_data.data.range.max_hfreq_khz = 32,
>          |                                               { }}
>      501 |   .data.other_data.data.range.pixel_clock_mhz = 4, /* 40 MHz */
>          |                                                 {}}
>      502 |   .data.other_data.data.range.flags = 0,
>          |                                       {}}
>    ......
>      505 |  }, {
>          |  }
>      506 |   .pixel_clock = 0,
>          |                  -
>          |                  {{0}}
>      507 |   .data.other_data.type = 0xfc, /* Model string */
>          |                           {   }}
>    ......
>      511 |  }, {
>          |  }
>      512 |   .pixel_clock = 0,
>          |                  -
>          |                  {{0}}
>      513 |   .data.other_data.type = 0xfe, /* Unspecified text / padding */
>          |                           {   }}
>    drivers/gpu/drm/tiny/gm12u320.c:514:35: warning: initialized field overwritten [-Woverride-init]
>      514 |   .data.other_data.data.str.str = {
>          |                                   ^
>    drivers/gpu/drm/tiny/gm12u320.c:514:35: note: (near initialization for 'gm12u320_edid.detailed_timings[3].data.pixel_data')
>>> drivers/gpu/drm/tiny/gm12u320.c:464:36: warning: missing braces around initializer [-Wmissing-braces]
>      464 | static struct edid gm12u320_edid = {
>          |                                    ^
>    ......
>      478 |   .pixel_clock = 3383,
>          |                  {{  }}
>      479 |   /* hactive = 848, hblank = 256 */
>      480 |   .data.pixel_data.hactive_lo = 0x50,
>          |                                     }}
>      481 |   .data.pixel_data.hblank_lo = 0x00,
>          |                                    }}
>      482 |   .data.pixel_data.hactive_hblank_hi = 0x31,
>          |                                            }}
>      483 |   /* vactive = 480, vblank = 28 */
>      484 |   .data.pixel_data.vactive_lo = 0xe0,
>          |                                     }}
>      485 |   .data.pixel_data.vblank_lo = 0x1c,
>          |                                    }}
>      486 |   .data.pixel_data.vactive_vblank_hi = 0x10,
>          |                                            }}
>      487 |   /* hsync offset 40 pw 128, vsync offset 1 pw 4 */
>      488 |   .data.pixel_data.hsync_offset_lo = 0x28,
>          |                                          }}
>      489 |   .data.pixel_data.hsync_pulse_width_lo = 0x80,
>          |                                               }}
>      490 |   .data.pixel_data.vsync_offset_pulse_width_lo = 0x14,
>          |                                                      }}
>      491 |   .data.pixel_data.hsync_vsync_offset_pulse_width_hi = 0x00,
>          |                                                            }}
>    ......
>      494 |  }, {
>          |  }}
>      495 |   .pixel_clock = 0,
>          |                  -
>          |                  {{0}}
>      496 |   .data.other_data.type = 0xfd, /* Monitor ranges */
>          |                           {   }}
>      497 |   .data.other_data.data.range.min_vfreq = 59,
>          |                                           { }}
>      498 |   .data.other_data.data.range.max_vfreq = 61,
>          |                                           { }}
>      499 |   .data.other_data.data.range.min_hfreq_khz = 29,
>          |                                               { }}
>      500 |   .data.other_data.data.range.max_hfreq_khz = 32,
>          |                                               { }}
>      501 |   .data.other_data.data.range.pixel_clock_mhz = 4, /* 40 MHz */
>          |                                                 {}}
>      502 |   .data.other_data.data.range.flags = 0,
>          |                                       {}}
>    ......
>      505 |  }, {
>          |  }
>      506 |   .pixel_clock = 0,
>          |                  -
>          |                  {{0}}
>      507 |   .data.other_data.type = 0xfc, /* Model string */
>          |                           {   }}
>    ......
>      511 |  }, {
>          |  }
>      512 |   .pixel_clock = 0,
>          |                  -
>          |                  {{0}}
>      513 |   .data.other_data.type = 0xfe, /* Unspecified text / padding */
>          |                           {   }}
>    ......
>      517 |  } },
>          |  }
>>> drivers/gpu/drm/tiny/gm12u320.c:464:36: warning: missing braces around initializer [-Wmissing-braces]
>      464 | static struct edid gm12u320_edid = {
>          |                                    ^
>    ......
>      478 |   .pixel_clock = 3383,
>          |                  {{  }}
>      479 |   /* hactive = 848, hblank = 256 */
>      480 |   .data.pixel_data.hactive_lo = 0x50,
>          |                                     }}
>      481 |   .data.pixel_data.hblank_lo = 0x00,
>          |                                    }}
>      482 |   .data.pixel_data.hactive_hblank_hi = 0x31,
>          |                                            }}
>      483 |   /* vactive = 480, vblank = 28 */
>      484 |   .data.pixel_data.vactive_lo = 0xe0,
>          |                                     }}
>      485 |   .data.pixel_data.vblank_lo = 0x1c,
>          |                                    }}
>      486 |   .data.pixel_data.vactive_vblank_hi = 0x10,
>          |                                            }}
>      487 |   /* hsync offset 40 pw 128, vsync offset 1 pw 4 */
>      488 |   .data.pixel_data.hsync_offset_lo = 0x28,
>          |                                          }}
>      489 |   .data.pixel_data.hsync_pulse_width_lo = 0x80,
>          |                                               }}
>      490 |   .data.pixel_data.vsync_offset_pulse_width_lo = 0x14,
>          |                                                      }}
>      491 |   .data.pixel_data.hsync_vsync_offset_pulse_width_hi = 0x00,
>          |                                                            }}
>    ......
>      494 |  }, {
>          |  }}
>      495 |   .pixel_clock = 0,
>          |                  -
>          |                  {{0}}
>      496 |   .data.other_data.type = 0xfd, /* Monitor ranges */
>          |                           {   }}
>      497 |   .data.other_data.data.range.min_vfreq = 59,
>          |                                           { }}
>      498 |   .data.other_data.data.range.max_vfreq = 61,
>          |                                           { }}
>      499 |   .data.other_data.data.range.min_hfreq_khz = 29,
>          |                                               { }}
>      500 |   .data.other_data.data.range.max_hfreq_khz = 32,
>          |                                               { }}
>      501 |   .data.other_data.data.range.pixel_clock_mhz = 4, /* 40 MHz */
>          |                                                 {}}
>      502 |   .data.other_data.data.range.flags = 0,
>          |                                       {}}
>    ......
>      505 |  }, {
>          |  }
>      506 |   .pixel_clock = 0,
>          |                  -
>          |                  {{0}}
>      507 |   .data.other_data.type = 0xfc, /* Model string */
>          |                           {   }}
>    ......
>      511 |  }, {
>          |  }
>      512 |   .pixel_clock = 0,
>          |                  -
>          |                  {{0}}
>      513 |   .data.other_data.type = 0xfe, /* Unspecified text / padding */
>          |                           {   }}
>    ......
>      517 |  } },
>          |  }
>>> drivers/gpu/drm/tiny/gm12u320.c:464:36: warning: missing braces around initializer [-Wmissing-braces]
>      464 | static struct edid gm12u320_edid = {
>          |                                    ^
>    ......
>      478 |   .pixel_clock = 3383,
>          |                  {{  }}
>      479 |   /* hactive = 848, hblank = 256 */
>      480 |   .data.pixel_data.hactive_lo = 0x50,
>          |                                     }}
>      481 |   .data.pixel_data.hblank_lo = 0x00,
>          |                                    }}
>      482 |   .data.pixel_data.hactive_hblank_hi = 0x31,
>          |                                            }}
>      483 |   /* vactive = 480, vblank = 28 */
>      484 |   .data.pixel_data.vactive_lo = 0xe0,
>          |                                     }}
>      485 |   .data.pixel_data.vblank_lo = 0x1c,
>          |                                    }}
>      486 |   .data.pixel_data.vactive_vblank_hi = 0x10,
>          |                                            }}
>      487 |   /* hsync offset 40 pw 128, vsync offset 1 pw 4 */
>      488 |   .data.pixel_data.hsync_offset_lo = 0x28,
>          |                                          }}
>      489 |   .data.pixel_data.hsync_pulse_width_lo = 0x80,
>          |                                               }}
>      490 |   .data.pixel_data.vsync_offset_pulse_width_lo = 0x14,
>          |                                                      }}
>      491 |   .data.pixel_data.hsync_vsync_offset_pulse_width_hi = 0x00,
>          |                                                            }}
>    ......
>      494 |  }, {
>          |  }}
>      495 |   .pixel_clock = 0,
>          |                  -
>          |                  {{0}}
>      496 |   .data.other_data.type = 0xfd, /* Monitor ranges */
>          |                           {   }}
>      497 |   .data.other_data.data.range.min_vfreq = 59,
>          |                                           { }}
>      498 |   .data.other_data.data.range.max_vfreq = 61,
>          |                                           { }}
>      499 |   .data.other_data.data.range.min_hfreq_khz = 29,
>          |                                               { }}
>      500 |   .data.other_data.data.range.max_hfreq_khz = 32,
>          |                                               { }}
>      501 |   .data.other_data.data.range.pixel_clock_mhz = 4, /* 40 MHz */
>          |                                                 {}}
>      502 |   .data.other_data.data.range.flags = 0,
>          |                                       {}}
>    ......
>      505 |  }, {
>          |  }
>      506 |   .pixel_clock = 0,
>          |                  -
>          |                  {{0}}
>      507 |   .data.other_data.type = 0xfc, /* Model string */
>          |                           {   }}
>    ......
>      511 |  }, {
>          |  }
>      512 |   .pixel_clock = 0,
>          |                  -
>          |                  {{0}}
>      513 |   .data.other_data.type = 0xfe, /* Unspecified text / padding */
>          |                           {   }}
>    ......
>      517 |  } },
>          |  }
>
>
> vim +464 drivers/gpu/drm/tiny/gm12u320.c
>
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  457  
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  458  /*
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  459   * We use fake EDID info so that userspace know that it is dealing with
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  460   * an Acer projector, rather then listing this as an "unknown" monitor.
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  461   * Note this assumes this driver is only ever used with the Acer C120, if we
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  462   * add support for other devices the vendor and model should be parameterized.
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  463   */
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 @464  static struct edid gm12u320_edid = {
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  465  	.header		= { 0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00 },
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  466  	.mfg_id		= { 0x04, 0x72 },	/* "ACR" */
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  467  	.prod_code	= { 0x20, 0xc1 },	/* C120h */
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  468  	.serial		= 0xaa55aa55,
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  469  	.mfg_week	= 1,
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  470  	.mfg_year	= 16,
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  471  	.version	= 1,			/* EDID 1.3 */
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  472  	.revision	= 3,			/* EDID 1.3 */
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  473  	.input		= 0x08,			/* Analog input */
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  474  	.features	= 0x0a,			/* Pref timing in DTD 1 */
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  475  	.standard_timings = { { 1, 1 }, { 1, 1 }, { 1, 1 }, { 1, 1 },
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  476  			      { 1, 1 }, { 1, 1 }, { 1, 1 }, { 1, 1 } },
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  477  	.detailed_timings = { {
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  478  		.pixel_clock = 3383,
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  479  		/* hactive = 848, hblank = 256 */
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  480  		.data.pixel_data.hactive_lo = 0x50,
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  481  		.data.pixel_data.hblank_lo = 0x00,
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  482  		.data.pixel_data.hactive_hblank_hi = 0x31,
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  483  		/* vactive = 480, vblank = 28 */
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  484  		.data.pixel_data.vactive_lo = 0xe0,
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  485  		.data.pixel_data.vblank_lo = 0x1c,
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  486  		.data.pixel_data.vactive_vblank_hi = 0x10,
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  487  		/* hsync offset 40 pw 128, vsync offset 1 pw 4 */
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  488  		.data.pixel_data.hsync_offset_lo = 0x28,
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  489  		.data.pixel_data.hsync_pulse_width_lo = 0x80,
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  490  		.data.pixel_data.vsync_offset_pulse_width_lo = 0x14,
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  491  		.data.pixel_data.hsync_vsync_offset_pulse_width_hi = 0x00,
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  492  		/* Digital separate syncs, hsync+, vsync+ */
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  493  		.data.pixel_data.misc = 0x1e,
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  494  	}, {
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  495  		.pixel_clock = 0,
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  496  		.data.other_data.type = 0xfd, /* Monitor ranges */
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  497  		.data.other_data.data.range.min_vfreq = 59,
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  498  		.data.other_data.data.range.max_vfreq = 61,
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  499  		.data.other_data.data.range.min_hfreq_khz = 29,
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  500  		.data.other_data.data.range.max_hfreq_khz = 32,
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  501  		.data.other_data.data.range.pixel_clock_mhz = 4, /* 40 MHz */
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  502  		.data.other_data.data.range.flags = 0,
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  503  		.data.other_data.data.range.formula.cvt = {
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  504  			0xa0, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20 },
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  505  	}, {
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  506  		.pixel_clock = 0,
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  507  		.data.other_data.type = 0xfc, /* Model string */
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  508  		.data.other_data.data.str.str = {
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  509  			'P', 'r', 'o', 'j', 'e', 'c', 't', 'o', 'r', '\n',
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  510  			' ', ' ',  ' ' },
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  511  	}, {
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  512  		.pixel_clock = 0,
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  513  		.data.other_data.type = 0xfe, /* Unspecified text / padding */
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  514  		.data.other_data.data.str.str = {
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  515  			'\n', ' ', ' ', ' ', ' ', ' ', ' ', ' ', ' ', ' ',
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  516  			' ', ' ',  ' ' },
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  517  	} },
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  518  	.checksum = 0x13,
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  519  };
> e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21  520  

-- 
Jani Nikula, Intel Open Source Graphics Center

Re: [PATCH v2 00/11] drm/edid: constify EDID parsing, with some fixes

[Jani Nikula]

On Mon, 28 Mar 2022, Jani Nikula <jani.nikula@intel.com> wrote:
> v2 of https://patchwork.freedesktop.org/series/101787/ addressing some
> review comments from Ville.

Please ignore this series.

>
> Jani Nikula (11):
>   drm/edid: don't modify EDID while parsing
>   drm/edid: fix reduced blanking support check
>   drm/edid: slightly restructure timing and non-timing descriptor
>     structs
>   drm/edid: pass a timing pointer to is_display_descriptor()
>   drm/edid: use struct detailed_timing member access in is_rb()
>   drm/edid: use struct detailed_data_monitor_range member access in gtf2
>     functions
>   drm/edid: constify struct detailed_timing in lower level parsing
>   drm/edid: constify struct detailed_timing in parsing callbacks
>   drm/edid: constify struct edid passed to detailed blocks
>   drm/edid: constify struct edid passed around in callbacks and closure
>   drm/edid: add more general struct edid constness in the interfaces
>
>  .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c |   6 +-
>  drivers/gpu/drm/drm_edid.c                    | 287 ++++++++++--------
>  include/drm/drm_edid.h                        |  19 +-
>  3 files changed, 174 insertions(+), 138 deletions(-)

-- 
Jani Nikula, Intel Open Source Graphics Center

Re: [Intel-gfx] [PATCH v2 00/11] drm/edid: constify EDID parsing, with some fixes

[Jani Nikula]

On Mon, 28 Mar 2022, Jani Nikula <jani.nikula@intel.com> wrote:
> v2 of https://patchwork.freedesktop.org/series/101787/ addressing some
> review comments from Ville.

Please ignore this series.

>
> Jani Nikula (11):
>   drm/edid: don't modify EDID while parsing
>   drm/edid: fix reduced blanking support check
>   drm/edid: slightly restructure timing and non-timing descriptor
>     structs
>   drm/edid: pass a timing pointer to is_display_descriptor()
>   drm/edid: use struct detailed_timing member access in is_rb()
>   drm/edid: use struct detailed_data_monitor_range member access in gtf2
>     functions
>   drm/edid: constify struct detailed_timing in lower level parsing
>   drm/edid: constify struct detailed_timing in parsing callbacks
>   drm/edid: constify struct edid passed to detailed blocks
>   drm/edid: constify struct edid passed around in callbacks and closure
>   drm/edid: add more general struct edid constness in the interfaces
>
>  .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c |   6 +-
>  drivers/gpu/drm/drm_edid.c                    | 287 ++++++++++--------
>  include/drm/drm_edid.h                        |  19 +-
>  3 files changed, 174 insertions(+), 138 deletions(-)

-- 
Jani Nikula, Intel Open Source Graphics Center

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/edid: constify EDID parsing, with some fixes

[Patchwork]

== Series Details ==

Series: drm/edid: constify EDID parsing, with some fixes
URL   : https://patchwork.freedesktop.org/series/101862/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
6bf277e7683e drm/edid: don't modify EDID while parsing
29064813a1c5 drm/edid: fix reduced blanking support check
c3676edd8bb4 drm/edid: slightly restructure timing and non-timing descriptor structs
-:19: WARNING:BAD_SIGN_OFF: Duplicate signature
#19: 
Reported-by: kernel test robot <lkp@intel.com>

-:20: WARNING:BAD_SIGN_OFF: Duplicate signature
#20: 
Reported-by: kernel test robot <lkp@intel.com>

-:89: CHECK:UNNECESSARY_PARENTHESES: Unnecessary parentheses around timing->data.descriptor.data.cvt[i]
#89: FILE: drivers/gpu/drm/drm_edid.c:3190:
+		cvt = &(timing->data.descriptor.data.cvt[i]);

total: 0 errors, 2 warnings, 1 checks, 101 lines checked
a750f4974472 drm/edid: pass a timing pointer to is_display_descriptor()
6162fbd4b286 drm/edid: use struct detailed_timing member access in is_rb()
069531d80950 drm/edid: use struct detailed_data_monitor_range member access in gtf2 functions
d473eb44a5b1 drm/edid: constify struct detailed_timing in lower level parsing
271e3f746308 drm/edid: constify struct detailed_timing in parsing callbacks
faeac16dc413 drm/edid: constify struct edid passed to detailed blocks
f608edfef2f9 drm/edid: constify struct edid passed around in callbacks and closure
d6ab774d4fc6 drm/edid: add more general struct edid constness in the interfaces

[Intel-gfx] ✗ Fi.CI.DOCS: warning for drm/edid: constify EDID parsing, with some fixes

[Patchwork]

== Series Details ==

Series: drm/edid: constify EDID parsing, with some fixes
URL   : https://patchwork.freedesktop.org/series/101862/
State : warning

== Summary ==

$ make htmldocs 2>&1 > /dev/null | grep i915
./drivers/gpu/drm/i915/display/intel_drrs.c:1: warning: 'intel_drrs_enable' not found
./drivers/gpu/drm/i915/display/intel_drrs.c:1: warning: 'intel_drrs_disable' not found

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/edid: constify EDID parsing, with some fixes

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 13004 bytes --]

== Series Details ==

Series: drm/edid: constify EDID parsing, with some fixes
URL   : https://patchwork.freedesktop.org/series/101862/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_11411 -> Patchwork_22694
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22694/index.html

Participating hosts (42 -> 41)
------------------------------

  Additional (1): fi-bwr-2160 
  Missing    (2): fi-bsw-cyan shard-tglu 

Known issues
------------

  Here are the changes found in Patchwork_22694 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@core_hotunplug@unbind-rebind:
    - fi-elk-e7500:       NOTRUN -> [INCOMPLETE][1] ([i915#5441])
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22694/fi-elk-e7500/igt@core_hotunplug@unbind-rebind.html
    - fi-ilk-650:         NOTRUN -> [INCOMPLETE][2] ([i915#5441])
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22694/fi-ilk-650/igt@core_hotunplug@unbind-rebind.html
    - fi-cfl-guc:         NOTRUN -> [INCOMPLETE][3] ([i915#1982] / [i915#5441])
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22694/fi-cfl-guc/igt@core_hotunplug@unbind-rebind.html
    - fi-kbl-soraka:      NOTRUN -> [INCOMPLETE][4] ([i915#1373] / [i915#5441])
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22694/fi-kbl-soraka/igt@core_hotunplug@unbind-rebind.html
    - fi-tgl-1115g4:      [PASS][5] -> [INCOMPLETE][6] ([i915#1373] / [i915#5441])
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11411/fi-tgl-1115g4/igt@core_hotunplug@unbind-rebind.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22694/fi-tgl-1115g4/igt@core_hotunplug@unbind-rebind.html

  * igt@gem_exec_suspend@basic-s3:
    - fi-bwr-2160:        NOTRUN -> [SKIP][7] ([fdo#109271]) +19 similar issues
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22694/fi-bwr-2160/igt@gem_exec_suspend@basic-s3.html

  * igt@gem_render_tiled_blits@basic:
    - fi-bsw-n3050:       [PASS][8] -> [INCOMPLETE][9] ([i915#5441])
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11411/fi-bsw-n3050/igt@gem_render_tiled_blits@basic.html
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22694/fi-bsw-n3050/igt@gem_render_tiled_blits@basic.html
    - fi-bsw-nick:        [PASS][10] -> [INCOMPLETE][11] ([i915#5441])
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11411/fi-bsw-nick/igt@gem_render_tiled_blits@basic.html
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22694/fi-bsw-nick/igt@gem_render_tiled_blits@basic.html
    - fi-kbl-7567u:       [PASS][12] -> [INCOMPLETE][13] ([i915#5441])
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11411/fi-kbl-7567u/igt@gem_render_tiled_blits@basic.html
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22694/fi-kbl-7567u/igt@gem_render_tiled_blits@basic.html
    - fi-kbl-7500u:       [PASS][14] -> [INCOMPLETE][15] ([i915#5441])
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11411/fi-kbl-7500u/igt@gem_render_tiled_blits@basic.html
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22694/fi-kbl-7500u/igt@gem_render_tiled_blits@basic.html

  * igt@gem_tiled_blits@basic:
    - fi-bwr-2160:        NOTRUN -> [INCOMPLETE][16] ([i915#5441])
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22694/fi-bwr-2160/igt@gem_tiled_blits@basic.html

  * igt@kms_chamelium@common-hpd-after-suspend:
    - fi-kbl-soraka:      NOTRUN -> [SKIP][17] ([fdo#109271] / [fdo#111827]) +8 similar issues
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22694/fi-kbl-soraka/igt@kms_chamelium@common-hpd-after-suspend.html

  * igt@kms_chamelium@dp-edid-read:
    - fi-cfl-guc:         NOTRUN -> [SKIP][18] ([fdo#109271] / [fdo#111827]) +8 similar issues
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22694/fi-cfl-guc/igt@kms_chamelium@dp-edid-read.html
    - fi-elk-e7500:       NOTRUN -> [SKIP][19] ([fdo#109271]) +26 similar issues
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22694/fi-elk-e7500/igt@kms_chamelium@dp-edid-read.html

  * igt@kms_chamelium@dp-hpd-fast:
    - fi-ilk-650:         NOTRUN -> [SKIP][20] ([fdo#109271] / [fdo#111827]) +8 similar issues
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22694/fi-ilk-650/igt@kms_chamelium@dp-hpd-fast.html

  * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic:
    - fi-cfl-guc:         NOTRUN -> [SKIP][21] ([fdo#109271]) +9 similar issues
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22694/fi-cfl-guc/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic.html

  * igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-c:
    - fi-elk-e7500:       NOTRUN -> [SKIP][22] ([fdo#109271] / [i915#5341])
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22694/fi-elk-e7500/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-c.html
    - fi-ilk-650:         NOTRUN -> [SKIP][23] ([fdo#109271] / [i915#5341])
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22694/fi-ilk-650/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-c.html

  * igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d:
    - fi-kbl-soraka:      NOTRUN -> [SKIP][24] ([fdo#109271] / [i915#533])
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22694/fi-kbl-soraka/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d.html
    - fi-cfl-guc:         NOTRUN -> [SKIP][25] ([fdo#109271] / [i915#533])
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22694/fi-cfl-guc/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d.html

  * igt@kms_psr@primary_page_flip:
    - fi-ilk-650:         NOTRUN -> [SKIP][26] ([fdo#109271]) +14 similar issues
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22694/fi-ilk-650/igt@kms_psr@primary_page_flip.html

  * igt@kms_setmode@basic-clone-single-crtc:
    - fi-kbl-soraka:      NOTRUN -> [SKIP][27] ([fdo#109271]) +5 similar issues
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22694/fi-kbl-soraka/igt@kms_setmode@basic-clone-single-crtc.html

  * igt@runner@aborted:
    - fi-bwr-2160:        NOTRUN -> [FAIL][28] ([i915#4312])
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22694/fi-bwr-2160/igt@runner@aborted.html
    - fi-tgl-1115g4:      NOTRUN -> [FAIL][29] ([i915#4312])
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22694/fi-tgl-1115g4/igt@runner@aborted.html

  
#### Possible fixes ####

  * igt@core_hotunplug@unbind-rebind:
    - {bat-jsl-2}:        [INCOMPLETE][30] ([i915#1373] / [i915#5441]) -> [PASS][31]
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11411/bat-jsl-2/igt@core_hotunplug@unbind-rebind.html
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22694/bat-jsl-2/igt@core_hotunplug@unbind-rebind.html
    - {fi-adl-ddr5}:      [INCOMPLETE][32] ([i915#5441]) -> [PASS][33]
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11411/fi-adl-ddr5/igt@core_hotunplug@unbind-rebind.html
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22694/fi-adl-ddr5/igt@core_hotunplug@unbind-rebind.html

  * igt@gem_render_linear_blits@basic:
    - fi-ilk-650:         [INCOMPLETE][34] ([i915#5441]) -> [PASS][35]
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11411/fi-ilk-650/igt@gem_render_linear_blits@basic.html
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22694/fi-ilk-650/igt@gem_render_linear_blits@basic.html

  * igt@gem_render_tiled_blits@basic:
    - fi-kbl-soraka:      [INCOMPLETE][36] ([i915#5441]) -> [PASS][37]
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11411/fi-kbl-soraka/igt@gem_render_tiled_blits@basic.html
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22694/fi-kbl-soraka/igt@gem_render_tiled_blits@basic.html

  * igt@gem_tiled_blits@basic:
    - fi-elk-e7500:       [INCOMPLETE][38] ([i915#5441]) -> [PASS][39]
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11411/fi-elk-e7500/igt@gem_tiled_blits@basic.html
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22694/fi-elk-e7500/igt@gem_tiled_blits@basic.html
    - fi-cfl-guc:         [INCOMPLETE][40] ([i915#5441]) -> [PASS][41]
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11411/fi-cfl-guc/igt@gem_tiled_blits@basic.html
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22694/fi-cfl-guc/igt@gem_tiled_blits@basic.html
    - {fi-jsl-1}:         [INCOMPLETE][42] ([i915#5441]) -> [PASS][43]
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11411/fi-jsl-1/igt@gem_tiled_blits@basic.html
   [43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22694/fi-jsl-1/igt@gem_tiled_blits@basic.html
    - {bat-adlp-6}:       [INCOMPLETE][44] ([i915#5441]) -> [PASS][45]
   [44]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11411/bat-adlp-6/igt@gem_tiled_blits@basic.html
   [45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22694/bat-adlp-6/igt@gem_tiled_blits@basic.html
    - {fi-hsw-g3258}:     [INCOMPLETE][46] ([i915#5441]) -> [PASS][47]
   [46]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11411/fi-hsw-g3258/igt@gem_tiled_blits@basic.html
   [47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22694/fi-hsw-g3258/igt@gem_tiled_blits@basic.html

  
#### Warnings ####

  * igt@runner@aborted:
    - fi-bsw-nick:        [FAIL][48] ([i915#4312]) -> [FAIL][49] ([i915#3428] / [i915#4312])
   [48]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11411/fi-bsw-nick/igt@runner@aborted.html
   [49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22694/fi-bsw-nick/igt@runner@aborted.html
    - fi-bsw-n3050:       [FAIL][50] ([i915#4312]) -> [FAIL][51] ([i915#3428] / [i915#4312])
   [50]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11411/fi-bsw-n3050/igt@runner@aborted.html
   [51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22694/fi-bsw-n3050/igt@runner@aborted.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285
  [fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
  [i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072
  [i915#1373]: https://gitlab.freedesktop.org/drm/intel/issues/1373
  [i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982
  [i915#2575]: https://gitlab.freedesktop.org/drm/intel/issues/2575
  [i915#3012]: https://gitlab.freedesktop.org/drm/intel/issues/3012
  [i915#3282]: https://gitlab.freedesktop.org/drm/intel/issues/3282
  [i915#3291]: https://gitlab.freedesktop.org/drm/intel/issues/3291
  [i915#3301]: https://gitlab.freedesktop.org/drm/intel/issues/3301
  [i915#3428]: https://gitlab.freedesktop.org/drm/intel/issues/3428
  [i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555
  [i915#3576]: https://gitlab.freedesktop.org/drm/intel/issues/3576
  [i915#3708]: https://gitlab.freedesktop.org/drm/intel/issues/3708
  [i915#4103]: https://gitlab.freedesktop.org/drm/intel/issues/4103
  [i915#4312]: https://gitlab.freedesktop.org/drm/intel/issues/4312
  [i915#5195]: https://gitlab.freedesktop.org/drm/intel/issues/5195
  [i915#533]: https://gitlab.freedesktop.org/drm/intel/issues/533
  [i915#5339]: https://gitlab.freedesktop.org/drm/intel/issues/5339
  [i915#5341]: https://gitlab.freedesktop.org/drm/intel/issues/5341
  [i915#5441]: https://gitlab.freedesktop.org/drm/intel/issues/5441


Build changes
-------------

  * Linux: CI_DRM_11411 -> Patchwork_22694

  CI-20190529: 20190529
  CI_DRM_11411: 584d45d16f9118c67c850a748b34a6470fa28db4 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_6395: 9cba01635ccbce91e9205f68b8d540805d45c11f @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  Patchwork_22694: d6ab774d4fc69952bac086fc3dee6d41d924b2d3 @ git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

d6ab774d4fc6 drm/edid: add more general struct edid constness in the interfaces
f608edfef2f9 drm/edid: constify struct edid passed around in callbacks and closure
faeac16dc413 drm/edid: constify struct edid passed to detailed blocks
271e3f746308 drm/edid: constify struct detailed_timing in parsing callbacks
d473eb44a5b1 drm/edid: constify struct detailed_timing in lower level parsing
069531d80950 drm/edid: use struct detailed_data_monitor_range member access in gtf2 functions
6162fbd4b286 drm/edid: use struct detailed_timing member access in is_rb()
a750f4974472 drm/edid: pass a timing pointer to is_display_descriptor()
c3676edd8bb4 drm/edid: slightly restructure timing and non-timing descriptor structs
29064813a1c5 drm/edid: fix reduced blanking support check
6bf277e7683e drm/edid: don't modify EDID while parsing

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22694/index.html

[-- Attachment #2: Type: text/html, Size: 16248 bytes --]

Re: [PATCH v2 02/11] drm/edid: fix reduced blanking support check

[Ville Syrjälä]

On Mon, Mar 28, 2022 at 12:17:16PM +0300, Jani Nikula wrote:
> The reduced blanking bit is valid only for CVT, indicated by display
> range limits flags 0x04.
> 
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

> ---
>  drivers/gpu/drm/drm_edid.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
> index 1b552fe54f38..13d05062d68c 100644
> --- a/drivers/gpu/drm/drm_edid.c
> +++ b/drivers/gpu/drm/drm_edid.c
> @@ -2408,7 +2408,7 @@ is_rb(struct detailed_timing *t, void *data)
>  	if (!is_display_descriptor(r, EDID_DETAIL_MONITOR_RANGE))
>  		return;
>  
> -	if (r[15] & 0x10)
> +	if (r[10] == DRM_EDID_CVT_SUPPORT_FLAG && r[15] & 0x10)
>  		*(bool *)data = true;
>  }
>  
> -- 
> 2.30.2

-- 
Ville Syrjälä
Intel

Re: [Intel-gfx] [PATCH v2 02/11] drm/edid: fix reduced blanking support check

[Ville Syrjälä]

On Mon, Mar 28, 2022 at 12:17:16PM +0300, Jani Nikula wrote:
> The reduced blanking bit is valid only for CVT, indicated by display
> range limits flags 0x04.
> 
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

> ---
>  drivers/gpu/drm/drm_edid.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
> index 1b552fe54f38..13d05062d68c 100644
> --- a/drivers/gpu/drm/drm_edid.c
> +++ b/drivers/gpu/drm/drm_edid.c
> @@ -2408,7 +2408,7 @@ is_rb(struct detailed_timing *t, void *data)
>  	if (!is_display_descriptor(r, EDID_DETAIL_MONITOR_RANGE))
>  		return;
>  
> -	if (r[15] & 0x10)
> +	if (r[10] == DRM_EDID_CVT_SUPPORT_FLAG && r[15] & 0x10)
>  		*(bool *)data = true;
>  }
>  
> -- 
> 2.30.2

-- 
Ville Syrjälä
Intel

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/edid: constify EDID parsing, with some fixes

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 30272 bytes --]

== Series Details ==

Series: drm/edid: constify EDID parsing, with some fixes
URL   : https://patchwork.freedesktop.org/series/101862/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_11411_full -> Patchwork_22694_full
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Participating hosts (11 -> 11)
------------------------------

  No changes in participating hosts

Known issues
------------

  Here are the changes found in Patchwork_22694_full that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@api_intel_bb@blit-noreloc-purge-cache-random:
    - shard-apl:          [PASS][1] -> [INCOMPLETE][2] ([i915#5441]) +1 similar issue
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11411/shard-apl4/igt@api_intel_bb@blit-noreloc-purge-cache-random.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22694/shard-apl6/igt@api_intel_bb@blit-noreloc-purge-cache-random.html

  * igt@core_hotunplug@unbind-rebind:
    - shard-snb:          NOTRUN -> [INCOMPLETE][3] ([i915#5441])
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22694/shard-snb5/igt@core_hotunplug@unbind-rebind.html
    - shard-tglb:         NOTRUN -> [INCOMPLETE][4] ([i915#1373] / [i915#5441])
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22694/shard-tglb5/igt@core_hotunplug@unbind-rebind.html
    - shard-apl:          NOTRUN -> [INCOMPLETE][5] ([i915#1373] / [i915#5441])
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22694/shard-apl4/igt@core_hotunplug@unbind-rebind.html
    - shard-glk:          NOTRUN -> [INCOMPLETE][6] ([i915#5441])
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22694/shard-glk6/igt@core_hotunplug@unbind-rebind.html
    - shard-kbl:          NOTRUN -> [INCOMPLETE][7] ([i915#1373] / [i915#5441])
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22694/shard-kbl7/igt@core_hotunplug@unbind-rebind.html
    - shard-iclb:         NOTRUN -> [INCOMPLETE][8] ([i915#1373] / [i915#5441])
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22694/shard-iclb1/igt@core_hotunplug@unbind-rebind.html

  * igt@gem_ctx_isolation@preservation-s3@vcs0:
    - shard-kbl:          [PASS][9] -> [DMESG-WARN][10] ([i915#180]) +3 similar issues
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11411/shard-kbl1/igt@gem_ctx_isolation@preservation-s3@vcs0.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22694/shard-kbl4/igt@gem_ctx_isolation@preservation-s3@vcs0.html

  * igt@gem_ctx_persistence@legacy-engines-hostile:
    - shard-snb:          NOTRUN -> [SKIP][11] ([fdo#109271] / [i915#1099])
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22694/shard-snb5/igt@gem_ctx_persistence@legacy-engines-hostile.html

  * igt@gem_exec_fair@basic-deadline:
    - shard-kbl:          [PASS][12] -> [FAIL][13] ([i915#2846])
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11411/shard-kbl1/igt@gem_exec_fair@basic-deadline.html
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22694/shard-kbl4/igt@gem_exec_fair@basic-deadline.html
    - shard-glk:          [PASS][14] -> [FAIL][15] ([i915#2846])
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11411/shard-glk1/igt@gem_exec_fair@basic-deadline.html
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22694/shard-glk8/igt@gem_exec_fair@basic-deadline.html

  * igt@gem_exec_fair@basic-flow@rcs0:
    - shard-tglb:         [PASS][16] -> [FAIL][17] ([i915#2842])
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11411/shard-tglb2/igt@gem_exec_fair@basic-flow@rcs0.html
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22694/shard-tglb1/igt@gem_exec_fair@basic-flow@rcs0.html

  * igt@gem_exec_fair@basic-none@vecs0:
    - shard-apl:          [PASS][18] -> [FAIL][19] ([i915#2842])
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11411/shard-apl1/igt@gem_exec_fair@basic-none@vecs0.html
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22694/shard-apl3/igt@gem_exec_fair@basic-none@vecs0.html

  * igt@gem_exec_fair@basic-pace@rcs0:
    - shard-kbl:          [PASS][20] -> [FAIL][21] ([i915#2842])
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11411/shard-kbl3/igt@gem_exec_fair@basic-pace@rcs0.html
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22694/shard-kbl1/igt@gem_exec_fair@basic-pace@rcs0.html

  * igt@gem_exec_fair@basic-pace@vcs1:
    - shard-iclb:         NOTRUN -> [FAIL][22] ([i915#2842]) +1 similar issue
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22694/shard-iclb2/igt@gem_exec_fair@basic-pace@vcs1.html

  * igt@gem_exec_flush@basic-batch-kernel-default-cmd:
    - shard-iclb:         NOTRUN -> [SKIP][23] ([fdo#109313])
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22694/shard-iclb3/igt@gem_exec_flush@basic-batch-kernel-default-cmd.html

  * igt@gem_exec_params@no-blt:
    - shard-iclb:         NOTRUN -> [SKIP][24] ([fdo#109283])
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22694/shard-iclb5/igt@gem_exec_params@no-blt.html

  * igt@gem_exec_suspend@basic-s3@smem:
    - shard-apl:          NOTRUN -> [DMESG-WARN][25] ([i915#180]) +1 similar issue
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22694/shard-apl7/igt@gem_exec_suspend@basic-s3@smem.html

  * igt@gem_lmem_swapping@heavy-verify-random:
    - shard-kbl:          NOTRUN -> [SKIP][26] ([fdo#109271] / [i915#4613]) +2 similar issues
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22694/shard-kbl7/igt@gem_lmem_swapping@heavy-verify-random.html

  * igt@gem_lmem_swapping@verify-random:
    - shard-tglb:         NOTRUN -> [SKIP][27] ([i915#4613]) +1 similar issue
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22694/shard-tglb5/igt@gem_lmem_swapping@verify-random.html
    - shard-iclb:         NOTRUN -> [SKIP][28] ([i915#4613])
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22694/shard-iclb1/igt@gem_lmem_swapping@verify-random.html
    - shard-glk:          NOTRUN -> [SKIP][29] ([fdo#109271] / [i915#4613])
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22694/shard-glk6/igt@gem_lmem_swapping@verify-random.html
    - shard-apl:          NOTRUN -> [SKIP][30] ([fdo#109271] / [i915#4613])
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22694/shard-apl4/igt@gem_lmem_swapping@verify-random.html

  * igt@gem_ppgtt@blt-vs-render-ctxn:
    - shard-glk:          NOTRUN -> [DMESG-FAIL][31] ([i915#5441])
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22694/shard-glk3/igt@gem_ppgtt@blt-vs-render-ctxn.html
    - shard-iclb:         NOTRUN -> [DMESG-FAIL][32] ([i915#5441])
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22694/shard-iclb5/igt@gem_ppgtt@blt-vs-render-ctxn.html

  * igt@gem_ppgtt@flink-and-close-vma-leak:
    - shard-glk:          [PASS][33] -> [FAIL][34] ([i915#644])
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11411/shard-glk4/igt@gem_ppgtt@flink-and-close-vma-leak.html
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22694/shard-glk4/igt@gem_ppgtt@flink-and-close-vma-leak.html

  * igt@gem_pxp@fail-invalid-protected-context:
    - shard-iclb:         NOTRUN -> [SKIP][35] ([i915#4270]) +3 similar issues
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22694/shard-iclb5/igt@gem_pxp@fail-invalid-protected-context.html

  * igt@gem_pxp@verify-pxp-stale-ctx-execution:
    - shard-tglb:         NOTRUN -> [SKIP][36] ([i915#4270])
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22694/shard-tglb5/igt@gem_pxp@verify-pxp-stale-ctx-execution.html

  * igt@gem_render_copy@y-tiled-to-vebox-yf-tiled:
    - shard-iclb:         NOTRUN -> [SKIP][37] ([i915#768]) +2 similar issues
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22694/shard-iclb3/igt@gem_render_copy@y-tiled-to-vebox-yf-tiled.html

  * igt@gem_tiled_partial_pwrite_pread@reads:
    - shard-skl:          NOTRUN -> [INCOMPLETE][38] ([i915#5441]) +3 similar issues
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22694/shard-skl7/igt@gem_tiled_partial_pwrite_pread@reads.html

  * igt@gem_userptr_blits@dmabuf-sync:
    - shard-iclb:         NOTRUN -> [SKIP][39] ([i915#3323])
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22694/shard-iclb5/igt@gem_userptr_blits@dmabuf-sync.html

  * igt@gem_userptr_blits@input-checking:
    - shard-apl:          NOTRUN -> [DMESG-WARN][40] ([i915#4991])
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22694/shard-apl3/igt@gem_userptr_blits@input-checking.html
    - shard-glk:          NOTRUN -> [DMESG-WARN][41] ([i915#4991])
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22694/shard-glk6/igt@gem_userptr_blits@input-checking.html
    - shard-kbl:          NOTRUN -> [DMESG-WARN][42] ([i915#4991])
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22694/shard-kbl4/igt@gem_userptr_blits@input-checking.html

  * igt@gem_userptr_blits@unsync-overlap:
    - shard-tglb:         NOTRUN -> [SKIP][43] ([i915#3297])
   [43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22694/shard-tglb5/igt@gem_userptr_blits@unsync-overlap.html

  * igt@gem_userptr_blits@unsync-unmap-cycles:
    - shard-iclb:         NOTRUN -> [SKIP][44] ([i915#3297]) +2 similar issues
   [44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22694/shard-iclb8/igt@gem_userptr_blits@unsync-unmap-cycles.html

  * igt@gem_userptr_blits@vma-merge:
    - shard-snb:          NOTRUN -> [FAIL][45] ([i915#2724])
   [45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22694/shard-snb7/igt@gem_userptr_blits@vma-merge.html

  * igt@gen7_exec_parse@oacontrol-tracking:
    - shard-iclb:         NOTRUN -> [SKIP][46] ([fdo#109289])
   [46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22694/shard-iclb5/igt@gen7_exec_parse@oacontrol-tracking.html

  * igt@gen9_exec_parse@allowed-single:
    - shard-skl:          [PASS][47] -> [DMESG-WARN][48] ([i915#1436] / [i915#716])
   [47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11411/shard-skl10/igt@gen9_exec_parse@allowed-single.html
   [48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22694/shard-skl1/igt@gen9_exec_parse@allowed-single.html

  * igt@gen9_exec_parse@unaligned-jump:
    - shard-iclb:         NOTRUN -> [SKIP][49] ([i915#2856]) +1 similar issue
   [49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22694/shard-iclb3/igt@gen9_exec_parse@unaligned-jump.html

  * igt@i915_pm_dc@dc3co-vpb-simulation:
    - shard-tglb:         NOTRUN -> [SKIP][50] ([i915#1904])
   [50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22694/shard-tglb5/igt@i915_pm_dc@dc3co-vpb-simulation.html

  * igt@i915_pm_rpm@modeset-pc8-residency-stress:
    - shard-iclb:         NOTRUN -> [SKIP][51] ([fdo#109293] / [fdo#109506])
   [51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22694/shard-iclb5/igt@i915_pm_rpm@modeset-pc8-residency-stress.html

  * igt@kms_addfb_basic@invalid-smem-bo-on-discrete:
    - shard-iclb:         NOTRUN -> [SKIP][52] ([i915#3826])
   [52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22694/shard-iclb3/igt@kms_addfb_basic@invalid-smem-bo-on-discrete.html

  * igt@kms_atomic@plane-primary-overlay-mutable-zpos:
    - shard-iclb:         NOTRUN -> [SKIP][53] ([i915#404])
   [53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22694/shard-iclb5/igt@kms_atomic@plane-primary-overlay-mutable-zpos.html

  * igt@kms_big_fb@4-tiled-32bpp-rotate-270:
    - shard-iclb:         NOTRUN -> [SKIP][54] ([i915#5286]) +3 similar issues
   [54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22694/shard-iclb1/igt@kms_big_fb@4-tiled-32bpp-rotate-270.html

  * igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-0:
    - shard-tglb:         NOTRUN -> [SKIP][55] ([i915#5286]) +3 similar issues
   [55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22694/shard-tglb5/igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-0.html

  * igt@kms_big_fb@x-tiled-16bpp-rotate-0:
    - shard-kbl:          NOTRUN -> [INCOMPLETE][56] ([i915#5441]) +2 similar issues
   [56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22694/shard-kbl4/igt@kms_big_fb@x-tiled-16bpp-rotate-0.html

  * igt@kms_big_fb@x-tiled-16bpp-rotate-180:
    - shard-snb:          [PASS][57] -> [INCOMPLETE][58] ([i915#5441]) +2 similar issues
   [57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11411/shard-snb5/igt@kms_big_fb@x-tiled-16bpp-rotate-180.html
   [58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22694/shard-snb4/igt@kms_big_fb@x-tiled-16bpp-rotate-180.html

  * igt@kms_big_fb@x-tiled-16bpp-rotate-90:
    - shard-iclb:         NOTRUN -> [SKIP][59] ([fdo#110725] / [fdo#111614])
   [59]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22694/shard-iclb5/igt@kms_big_fb@x-tiled-16bpp-rotate-90.html

  * igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-0:
    - shard-skl:          [PASS][60] -> [INCOMPLETE][61] ([i915#5441])
   [60]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11411/shard-skl2/igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-0.html
   [61]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22694/shard-skl6/igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-0.html

  * igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-0-hflip-async-flip:
    - shard-kbl:          NOTRUN -> [SKIP][62] ([fdo#109271] / [i915#3777])
   [62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22694/shard-kbl4/igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-0-hflip-async-flip.html

  * igt@kms_big_fb@y-tiled-16bpp-rotate-270:
    - shard-tglb:         NOTRUN -> [INCOMPLETE][63] ([i915#5441])
   [63]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22694/shard-tglb5/igt@kms_big_fb@y-tiled-16bpp-rotate-270.html

  * igt@kms_big_fb@y-tiled-32bpp-rotate-90:
    - shard-glk:          [PASS][64] -> [INCOMPLETE][65] ([i915#5441]) +1 similar issue
   [64]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11411/shard-glk9/igt@kms_big_fb@y-tiled-32bpp-rotate-90.html
   [65]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22694/shard-glk2/igt@kms_big_fb@y-tiled-32bpp-rotate-90.html

  * igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0-hflip:
    - shard-glk:          NOTRUN -> [SKIP][66] ([fdo#109271] / [i915#3777]) +2 similar issues
   [66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22694/shard-glk7/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0-hflip.html

  * igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0-hflip-async-flip:
    - shard-skl:          NOTRUN -> [SKIP][67] ([fdo#109271] / [i915#3777])
   [67]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22694/shard-skl9/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0-hflip-async-flip.html

  * igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-180-async-flip:
    - shard-tglb:         [PASS][68] -> [INCOMPLETE][69] ([i915#5441])
   [68]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11411/shard-tglb6/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-180-async-flip.html
   [69]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22694/shard-tglb5/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-180-async-flip.html

  * igt@kms_big_fb@yf-tiled-16bpp-rotate-0:
    - shard-iclb:         NOTRUN -> [INCOMPLETE][70] ([i915#5441]) +3 similar issues
   [70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22694/shard-iclb3/igt@kms_big_fb@yf-tiled-16bpp-rotate-0.html
    - shard-glk:          [PASS][71] -> [DMESG-WARN][72] ([i915#118])
   [71]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11411/shard-glk6/igt@kms_big_fb@yf-tiled-16bpp-rotate-0.html
   [72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22694/shard-glk6/igt@kms_big_fb@yf-tiled-16bpp-rotate-0.html

  * igt@kms_big_fb@yf-tiled-16bpp-rotate-270:
    - shard-tglb:         NOTRUN -> [SKIP][73] ([fdo#111615])
   [73]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22694/shard-tglb5/igt@kms_big_fb@yf-tiled-16bpp-rotate-270.html

  * igt@kms_big_fb@yf-tiled-32bpp-rotate-180:
    - shard-iclb:         [PASS][74] -> [INCOMPLETE][75] ([i915#5441]) +2 similar issues
   [74]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11411/shard-iclb3/igt@kms_big_fb@yf-tiled-32bpp-rotate-180.html
   [75]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22694/shard-iclb7/igt@kms_big_fb@yf-tiled-32bpp-rotate-180.html

  * igt@kms_big_fb@yf-tiled-64bpp-rotate-0:
    - shard-iclb:         NOTRUN -> [SKIP][76] ([fdo#110723])
   [76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22694/shard-iclb5/igt@kms_big_fb@yf-tiled-64bpp-rotate-0.html

  * igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-0:
    - shard-apl:          NOTRUN -> [SKIP][77] ([fdo#109271]) +98 similar issues
   [77]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22694/shard-apl8/igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-0.html

  * igt@kms_big_joiner@2x-modeset:
    - shard-iclb:         NOTRUN -> [SKIP][78] ([i915#2705])
   [78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22694/shard-iclb5/igt@kms_big_joiner@2x-modeset.html

  * igt@kms_ccs@pipe-b-bad-aux-stride-y_tiled_gen12_rc_ccs_cc:
    - shard-skl:          NOTRUN -> [SKIP][79] ([fdo#109271] / [i915#3886])
   [79]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22694/shard-skl10/igt@kms_ccs@pipe-b-bad-aux-stride-y_tiled_gen12_rc_ccs_cc.html

  * igt@kms_ccs@pipe-b-crc-primary-basic-y_tiled_gen12_rc_ccs_cc:
    - shard-kbl:          NOTRUN -> [SKIP][80] ([fdo#109271] / [i915#3886]) +3 similar issues
   [80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22694/shard-kbl7/igt@kms_ccs@pipe-b-crc-primary-basic-y_tiled_gen12_rc_ccs_cc.html

  * igt@kms_ccs@pipe-c-ccs-on-another-bo-y_tiled_gen12_rc_ccs_cc:
    - shard-iclb:         NOTRUN -> [SKIP][81] ([fdo#109278] / [i915#3886]) +6 similar issues
   [81]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22694/shard-iclb1/igt@kms_ccs@pipe-c-ccs-on-another-bo-y_tiled_gen12_rc_ccs_cc.html
    - shard-apl:          NOTRUN -> [SKIP][82] ([fdo#109271] / [i915#3886]) +2 similar issues
   [82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22694/shard-apl4/igt@kms_ccs@pipe-c-ccs-on-another-bo-y_tiled_gen12_rc_ccs_cc.html
    - shard-glk:          NOTRUN -> [SKIP][83] ([fdo#109271] / [i915#3886]) +2 similar issues
   [83]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22694/shard-glk6/igt@kms_ccs@pipe-c-ccs-on-another-bo-y_tiled_gen12_rc_ccs_cc.html

  * igt@kms_ccs@pipe-c-crc-sprite-planes-basic-y_tiled_gen12_mc_ccs:
    - shard-tglb:         NOTRUN -> [SKIP][84] ([i915#3689] / [i915#3886]) +1 similar issue
   [84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22694/shard-tglb5/igt@kms_ccs@pipe-c-crc-sprite-planes-basic-y_tiled_gen12_mc_ccs.html

  * igt@kms_ccs@pipe-d-bad-pixel-format-y_tiled_ccs:
    - shard-snb:          NOTRUN -> [SKIP][85] ([fdo#109271]) +89 similar issues
   [85]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22694/shard-snb7/igt@kms_ccs@pipe-d-bad-pixel-format-y_tiled_ccs.html

  * igt@kms_ccs@pipe-d-bad-pixel-format-yf_tiled_ccs:
    - shard-tglb:         NOTRUN -> [SKIP][86] ([fdo#111615] / [i915#3689])
   [86]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22694/shard-tglb5/igt@kms_ccs@pipe-d-bad-pixel-format-yf_tiled_ccs.html

  * igt@kms_ccs@pipe-d-crc-sprite-planes-basic-y_tiled_ccs:
    - shard-tglb:         NOTRUN -> [SKIP][87] ([i915#3689])
   [87]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22694/shard-tglb5/igt@kms_ccs@pipe-d-crc-sprite-planes-basic-y_tiled_ccs.html

  * igt@kms_cdclk@mode-transition:
    - shard-iclb:         NOTRUN -> [SKIP][88] ([i915#3742])
   [88]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22694/shard-iclb5/igt@kms_cdclk@mode-transition.html

  * igt@kms_chamelium@dp-edid-change-during-suspend:
    - shard-snb:          NOTRUN -> [SKIP][89] ([fdo#109271] / [fdo#111827]) +3 similar issues
   [89]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22694/shard-snb7/igt@kms_chamelium@dp-edid-change-during-suspend.html

  * igt@kms_chamelium@vga-hpd:
    - shard-apl:          NOTRUN -> [SKIP][90] ([fdo#109271] / [fdo#111827]) +7 similar issues
   [90]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22694/shard-apl8/igt@kms_chamelium@vga-hpd.html

  * igt@kms_chamelium@vga-hpd-with-enabled-mode:
    - shard-iclb:         NOTRUN -> [SKIP][91] ([fdo#109284] / [fdo#111827]) +11 similar issues
   [91]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22694/shard-iclb3/igt@kms_chamelium@vga-hpd-with-enabled-mode.html

  * igt@kms_color@pipe-d-ctm-max:
    - shard-iclb:         NOTRUN -> [SKIP][92] ([fdo#109278] / [i915#1149])
   [92]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22694/shard-iclb5/igt@kms_color@pipe-d-ctm-max.html

  * igt@kms_color_chamelium@pipe-b-ctm-0-5:
    - shard-glk:          NOTRUN -> [SKIP][93] ([fdo#109271] / [fdo#111827]) +4 similar issues
   [93]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22694/shard-glk3/igt@kms_color_chamelium@pipe-b-ctm-0-5.html

  * igt@kms_color_chamelium@pipe-b-ctm-max:
    - shard-tglb:         NOTRUN -> [SKIP][94] ([fdo#109284] / [fdo#111827]) +1 similar issue
   [94]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22694/shard-tglb5/igt@kms_color_chamelium@pipe-b-ctm-max.html

  * igt@kms_color_chamelium@pipe-c-ctm-red-to-blue:
    - shard-kbl:          NOTRUN -> [SKIP][95] ([fdo#109271] / [fdo#111827]) +3 similar issues
   [95]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22694/shard-kbl7/igt@kms_color_chamelium@pipe-c-ctm-red-to-blue.html

  * igt@kms_color_chamelium@pipe-c-degamma:
    - shard-skl:          NOTRUN -> [SKIP][96] ([fdo#109271] / [fdo#111827]) +2 similar issues
   [96]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22694/shard-skl7/igt@kms_color_chamelium@pipe-c-degamma.html

  * igt@kms_color_chamelium@pipe-d-ctm-max:
    - shard-iclb:         NOTRUN -> [SKIP][97] ([fdo#109278] / [fdo#109284] / [fdo#111827])
   [97]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22694/shard-iclb1/igt@kms_color_chamelium@pipe-d-ctm-max.html

  * igt@kms_content_protection@srm:
    - shard-skl:          NOTRUN -> [SKIP][98] ([fdo#109271]) +27 similar issues
   [98]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22694/shard-skl9/igt@kms_content_protection@srm.html

  * igt@kms_content_protection@type1:
    - shard-iclb:         NOTRUN -> [SKIP][99] ([fdo#109300] / [fdo#111066]) +2 similar issues
   [99]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22694/shard-iclb5/igt@kms_content_protection@type1.html

  * igt@kms_cursor_crc@pipe-a-cursor-512x170-sliding:
    - shard-kbl:          NOTRUN -> [SKIP][100] ([fdo#109271]) +62 similar issues
   [100]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22694/shard-kbl3/igt@kms_cursor_crc@pipe-a-cursor-512x170-sliding.html

  * igt@kms_cursor_crc@pipe-a-cursor-512x512-sliding:
    - shard-iclb:         NOTRUN -> [SKIP][101] ([fdo#109278] / [fdo#109279]) +4 similar issues
   [101]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22694/shard-iclb5/igt@kms_cursor_crc@pipe-a-cursor-512x512-sliding.html

  * igt@kms_cursor_crc@pipe-b-cursor-suspend:
    - shard-apl:          [PASS][102] -> [DMESG-WARN][103] ([i915#180])
   [102]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11411/shard-apl3/igt@kms_cursor_crc@pipe-b-cursor-suspend.html
   [103]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22694/shard-apl6/igt@kms_cursor_crc@pipe-b-cursor-suspend.html

  * igt@kms_cursor_crc@pipe-c-cursor-512x512-random:
    - shard-tglb:         NOTRUN -> [SKIP][104] ([fdo#109279] / [i915#3359]) +1 similar issue
   [104]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22694/shard-tglb5/igt@kms_cursor_crc@pipe-c-cursor-512x512-random.html

  * igt@kms_cursor_legacy@2x-long-cursor-vs-flip-legacy:
    - shard-tglb:         NOTRUN -> [SKIP][105] ([fdo#109274] / [fdo#111825]) +2 similar issues
   [105]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22694/shard-tglb5/igt@kms_cursor_legacy@2x-long-cursor-vs-flip-legacy.html

  * igt@kms_cursor_legacy@cursora-vs-flipb-legacy:
    - shard-iclb:         NOTRUN -> [SKIP][106] ([fdo#109274] / [fdo#109278]) +4 similar issues
   [106]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22694/shard-iclb1/igt@kms_cursor_legacy@cursora-vs-flipb-legacy.html

  * igt@kms_cursor_legacy@pipe-d-torture-bo:
    - shard-apl:          NOTRUN -> [SKIP][107] ([fdo#109271] / [i915#533]) +1 similar issue
   [107]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22694/shard-apl7/igt@kms_cursor_legacy@pipe-d-torture-bo.html

  * igt@kms_dp_tiled_display@basic-test-pattern-with-chamelium:
    - shard-tglb:         NOTRUN -> [SKIP][108] ([i915#3528])
   [108]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22694/shard-tglb5/igt@kms_dp_tiled_display@basic-test-pattern-with-chamelium.html

  * igt@kms_draw_crc@draw-method-xrgb8888-mmap-cpu-4tiled:
    - shard-iclb:         NOTRUN -> [SKIP][109] ([i915#5287])
   [109]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22694/shard-iclb5/igt@kms_draw_crc@draw-method-xrgb8888-mmap-cpu-4tiled.html

  * igt@kms_dsc@basic-dsc-enable:
    - shard-iclb:         NOTRUN -> [SKIP][110] ([i915#3840])
   [110]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22694/shard-iclb3/igt@kms_dsc@basic-dsc-enable.html

  * igt@kms_flip@2x-flip-vs-fences:
    - shard-iclb:         NOTRUN -> [SKIP][111] ([fdo#109274]) +3 similar issues
   [111]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22694/shard-iclb5/igt@kms_flip@2x-flip-vs-fences.html

  * igt@kms_flip@flip-vs-expired-vblank@b-edp1:
    - shard-skl:          NOTRUN -> [FAIL][112] ([i915#79])
   [112]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22694/shard-skl10/igt@kms_flip@flip-vs-expired-vblank@b-edp1.html

  * igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilercccs-upscaling:
    - shard-iclb:         NOTRUN -> [SKIP][113] ([i915#2587])
   [113]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22694/shard-iclb3/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilercccs-upscaling.html

  * igt@kms_frontbuffer_tracking@fbc-2p-shrfb-fliptrack-mmap-gtt:
    - shard-iclb:         NOTRUN -> [SKIP][114] ([fdo#109280]) +26 similar issues
   [114]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22694/shard-iclb5/igt@kms_frontbuffer_tracking@fbc-2p-shrfb-fliptrack-mmap-gtt.html

  * igt@kms_frontbuffer_tracking@fbc-tiling-4:
    - shard-iclb:         NOTRUN -> [SKIP][115] ([i915#5438])
   [115]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22694/shard-iclb5/igt@kms_frontbuffer_tracking@fbc-tiling-4.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-cur-indfb-move:
    - shard-tglb:         NOTRUN -> [SKIP][116] ([fdo#109280] / [fdo#111825]) +5 similar issues
   [116]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22694/shard-tglb5/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-cur-indfb-move.html

  * igt@kms_multipipe_modeset@basic-max-pipe-crc-check:
    - shard-iclb:         NOTRUN -> [SKIP][117] ([i915#1839]) +1 similar issue
   [117]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22694/shard-iclb3/igt@kms_multipipe_modeset@basic-max-pipe-crc-check.html

  * igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d:
    - shard-skl:          NOTRUN -> [SKIP][118] ([fdo#109271] / [i915#533])
   [118]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22694/shard-skl7/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d.html

  * igt@kms_pipe_crc_basic@disable-crc-after-crtc-pipe-d:
    - shard-kbl:          NOTRUN -> [SKIP][119] ([fdo#109271] / [i915#533])
   [119]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22694/shard-kbl4/igt@kms_pipe_crc_basic@disable-crc-after-crtc-pipe-d.html

  * igt@kms_plane_alpha_blend@pipe-a-alpha-transparent-fb:
    - shard-apl:          NOTRUN -> [FAIL][120] ([i915#265])
   [120]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22694/shard-apl3/igt@kms_plane_alpha_blend@pipe-a-alpha-transparent-fb.html
    - shard-glk:          NOTRUN -> [FAIL][121] ([i915#265])
   [121]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22694/shard-glk6/igt@kms_plane_alpha_blend@pipe-a-alpha-transparent-fb.html
    - shard-kbl:          NOTRUN -> [FAIL][122] ([i915#265])
   [122]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22694/shard-kbl4/igt@kms_plane_alpha_blend@pipe-a-alpha-transparent-fb.html

  * igt@kms_plane_alpha_blend@pipe-a-constant-alpha-max:
    - shard-glk:          NOTRUN -> [FAIL][123] ([fdo#108145] / [i915#265])
   [123]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22694/shard-glk3/igt@kms_plane_alpha_blend@pipe-a-constant-alpha-max.html

  * igt@kms_plane_alpha_blend@pipe-c-alpha-opaque-fb:
    - shard-kbl:          NOTRUN -> [FAIL][124] ([fdo#108145] / [i915#265])
   [124]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22694/shard-kbl7/igt@kms_plane_alpha_blend@pipe-c-alpha-opaque-fb.html
    - shard-apl:          NOTRUN -> [FAIL][125] ([fdo#108145] / [i915#265])
   [125]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22694/shard-apl4/igt@kms_plane_alpha_blend@pipe-c-alpha-opaque-fb.html

  * igt@kms_plane_alpha_blend@pipe-d-constant-alpha-max:
    - shard-iclb:         NOTRUN -> [SKIP][126] ([fdo#109278]) +32 similar issues
   [126]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22694/shard-iclb5/igt@kms_plane_alpha_blend@pipe-d-constant-alpha-max.html

  * igt@kms_plane_lowres@pipe-a-tiling-4:
    - shard-iclb:         NOTRUN -> [SKIP][127] ([i915#5288])
   [127]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22694/shard-iclb5/igt@kms_plane_lowres@pipe-a-tiling-4.html

  * igt@kms_plane_lowres@pipe-b-tiling-yf:
    - shard-tglb:         NOTRUN -> [SKIP][128] ([fdo#111615] / [fdo#112054])
   [128]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22694/shard-tglb5/igt@kms_plane_lowres@pipe-b-tiling-yf.html
    - shard-iclb:         NOTRUN -> [SKIP][129] ([i915#3536]) +1 similar issue
   [129]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22694/shard-iclb1/igt@kms_plane_lowres@pipe-b-tiling-yf.html

  * igt@kms_plane_scaling@pl

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22694/index.html

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