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From: Mauro Carvalho Chehab <mchehab@kernel.org>
To: unlisted-recipients:; (no To-header on input)
Cc: "Mauro Carvalho Chehab" <mchehab@kernel.org>,
	"Christian König" <christian.koenig@amd.com>,
	"Thomas Hellström" <thomas.hellstrom@linux.intel.com>,
	"Abdiel Janulgue" <abdiel.janulgue@linux.intel.com>,
	"Alan Previn" <alan.previn.teres.alexis@intel.com>,
	"Andi Shyti" <andi.shyti@linux.intel.com>,
	"Andrzej Hajda" <andrzej.hajda@intel.com>,
	"Ashutosh Dixit" <ashutosh.dixit@intel.com>,
	"Ayaz A Siddiqui" <ayaz.siddiqui@intel.com>,
	"Borislav Petkov" <bp@suse.de>,
	"Casey Bowman" <casey.g.bowman@intel.com>,
	"Chris Wilson" <chris.p.wilson@intel.com>,
	"Daniel Vetter" <daniel@ffwll.ch>,
	"Daniele Ceraolo Spurio" <daniele.ceraolospurio@intel.com>,
	"Dave Airlie" <airlied@redhat.com>,
	"David Airlie" <airlied@linux.ie>,
	"Jani Nikula" <jani.nikula@linux.intel.com>,
	"Jason Ekstrand" <jason@jlekstrand.net>,
	"John Harrison" <John.C.Harrison@Intel.com>,
	"Joonas Lahtinen" <joonas.lahtinen@linux.intel.com>,
	"Lucas De Marchi" <lucas.demarchi@intel.com>,
	"Maarten Lankhorst" <maarten.lankhorst@linux.intel.com>,
	"Matt Atwood" <matthew.s.atwood@intel.com>,
	"Matt Roper" <matthew.d.roper@intel.com>,
	"Matthew Auld" <matthew.auld@intel.com>,
	"Matthew Brost" <matthew.brost@intel.com>,
	"Michael Cheng" <michael.cheng@intel.com>,
	"Michal Wajdeczko" <michal.wajdeczko@intel.com>,
	"Prathap Kumar Valsan" <prathap.kumar.valsan@intel.com>,
	"Ramalingam C" <ramalingam.c@intel.com>,
	"Rodrigo Vivi" <rodrigo.vivi@intel.com>,
	"Sumit Semwal" <sumit.semwal@linaro.org>,
	"Tomas Winkler" <tomas.winkler@intel.com>,
	"Tvrtko Ursulin" <tvrtko.ursulin@linux.intel.com>,
	"Umesh Nerlige Ramappa" <umesh.nerlige.ramappa@intel.com>,
	"Vinay Belgaumkar" <vinay.belgaumkar@intel.com>,
	dri-devel@lists.freedesktop.org, intel-gfx@lists.freedesktop.org,
	linaro-mm-sig@lists.linaro.org, linux-kernel@vger.kernel.org,
	linux-media@vger.kernel.org
Subject: [PATCH 00/21] Fix performance regressions with TLB and add GuC support
Date: Wed, 13 Jul 2022 10:29:57 +0100	[thread overview]
Message-ID: <cover.1657703926.git.mchehab@kernel.org> (raw)

TLB invalidation is a slow operation. It should not be doing lightly, as it
causes performance regressions, like this:

[178.821002] i915 0000:00:02.0: [drm] *ERROR* rcs0 TLB invalidation did not complete in 4ms!

This series contain 

1) some patches that makes TLB invalidation to happen only on
active, non-wedged engines, doing cache invalidation in batch 
and only when GT objects are exposed to userspace:

  drm/i915/gt: Ignore TLB invalidations on idle engines
  drm/i915/gt: Only invalidate TLBs exposed to user manipulation
  drm/i915/gt: Skip TLB invalidations once wedged
  drm/i915/gt: Batch TLB invalidations
  drm/i915/gt: Move TLB invalidation to its own file

2) It fixes two bugs, being the first a workaround:

  drm/i915/gt: Invalidate TLB of the OA unit at TLB invalidations
  drm/i915: Invalidate the TLBs on each GT

  drm/i915/guc: Introduce TLB_INVALIDATION_ALL action

3) It adds GuC support. Besides providing TLB invalidation on some
additional hardware, this should also help serializing GuC operations
with TLB invalidation:

  drm/i915/guc: Introduce TLB_INVALIDATION_ALL action
  drm/i915/guc: Define CTB based TLB invalidation routines
  drm/i915: Add platform macro for selective tlb flush
  drm/i915: Define GuC Based TLB invalidation routines
  drm/i915: Add generic interface for tlb invalidation for XeHP
  drm/i915: Use selective tlb invalidations where supported

4) It adds the corresponding kernel-doc markups for the kAPI
used for TLB invalidation.

While I could have split this into smaller pieces, I'm opting to send
them altogether, in order for CI trybot to better verify what issues
will be closed with this series.

---

Chris Wilson (7):
  drm/i915/gt: Ignore TLB invalidations on idle engines
  drm/i915/gt: Invalidate TLB of the OA unit at TLB invalidations
  drm/i915/gt: Only invalidate TLBs exposed to user manipulation
  drm/i915/gt: Skip TLB invalidations once wedged
  drm/i915/gt: Batch TLB invalidations
  drm/i915/gt: Move TLB invalidation to its own file
  drm/i915: Invalidate the TLBs on each GT

Mauro Carvalho Chehab (8):
  drm/i915/gt: document with_intel_gt_pm_if_awake()
  drm/i915/gt: describe the new tlb parameter at i915_vma_resource
  drm/i915/guc: use kernel-doc for enum intel_guc_tlb_inval_mode
  drm/i915/guc: document the TLB invalidation struct members
  drm/i915: document tlb field at struct drm_i915_gem_object
  drm/i915/gt: document TLB cache invalidation functions
  drm/i915/guc: describe enum intel_guc_tlb_invalidation_type
  drm/i915/guc: document TLB cache invalidation functions

Piotr Piórkowski (1):
  drm/i915/guc: Introduce TLB_INVALIDATION_ALL action

Prathap Kumar Valsan (5):
  drm/i915/guc: Define CTB based TLB invalidation routines
  drm/i915: Add platform macro for selective tlb flush
  drm/i915: Define GuC Based TLB invalidation routines
  drm/i915: Add generic interface for tlb invalidation for XeHP
  drm/i915: Use selective tlb invalidations where supported

 drivers/gpu/drm/i915/Makefile                 |   1 +
 .../gpu/drm/i915/gem/i915_gem_object_types.h  |   6 +-
 drivers/gpu/drm/i915/gem/i915_gem_pages.c     |  28 +-
 drivers/gpu/drm/i915/gt/intel_engine.h        |   1 +
 drivers/gpu/drm/i915/gt/intel_gt.c            | 125 +-------
 drivers/gpu/drm/i915/gt/intel_gt.h            |   2 -
 .../gpu/drm/i915/gt/intel_gt_buffer_pool.h    |   3 +-
 drivers/gpu/drm/i915/gt/intel_gt_defines.h    |  11 +
 drivers/gpu/drm/i915/gt/intel_gt_pm.h         |  10 +
 drivers/gpu/drm/i915/gt/intel_gt_regs.h       |   8 +
 drivers/gpu/drm/i915/gt/intel_gt_types.h      |  22 +-
 drivers/gpu/drm/i915/gt/intel_ppgtt.c         |   8 +-
 drivers/gpu/drm/i915/gt/intel_tlb.c           | 295 ++++++++++++++++++
 drivers/gpu/drm/i915/gt/intel_tlb.h           |  30 ++
 .../gpu/drm/i915/gt/uc/abi/guc_actions_abi.h  |  54 ++++
 drivers/gpu/drm/i915/gt/uc/intel_guc.c        | 232 ++++++++++++++
 drivers/gpu/drm/i915/gt/uc/intel_guc.h        |  36 +++
 drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c     |  24 +-
 drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h   |   9 +
 .../gpu/drm/i915/gt/uc/intel_guc_submission.c |  91 +++++-
 drivers/gpu/drm/i915/i915_drv.h               |   4 +-
 drivers/gpu/drm/i915/i915_pci.c               |   1 +
 drivers/gpu/drm/i915/i915_vma.c               |  46 ++-
 drivers/gpu/drm/i915/i915_vma.h               |   2 +
 drivers/gpu/drm/i915/i915_vma_resource.c      |   9 +-
 drivers/gpu/drm/i915/i915_vma_resource.h      |   6 +-
 drivers/gpu/drm/i915/intel_device_info.h      |   1 +
 27 files changed, 910 insertions(+), 155 deletions(-)
 create mode 100644 drivers/gpu/drm/i915/gt/intel_gt_defines.h
 create mode 100644 drivers/gpu/drm/i915/gt/intel_tlb.c
 create mode 100644 drivers/gpu/drm/i915/gt/intel_tlb.h

-- 
2.36.1



WARNING: multiple messages have this Message-ID (diff)
From: Mauro Carvalho Chehab <mchehab@kernel.org>
Cc: "Jason Ekstrand" <jason@jlekstrand.net>,
	"David Airlie" <airlied@linux.ie>,
	"Casey Bowman" <casey.g.bowman@intel.com>,
	dri-devel@lists.freedesktop.org,
	"Daniele Ceraolo Spurio" <daniele.ceraolospurio@intel.com>,
	"Andrzej Hajda" <andrzej.hajda@intel.com>,
	"Matthew Brost" <matthew.brost@intel.com>,
	"Sumit Semwal" <sumit.semwal@linaro.org>,
	"Abdiel Janulgue" <abdiel.janulgue@linux.intel.com>,
	"Michael Cheng" <michael.cheng@intel.com>,
	"Matt Atwood" <matthew.s.atwood@intel.com>,
	"Chris Wilson" <chris.p.wilson@intel.com>,
	"Ayaz A Siddiqui" <ayaz.siddiqui@intel.com>,
	"Andi Shyti" <andi.shyti@linux.intel.com>,
	"Dave Airlie" <airlied@redhat.com>,
	"Tomas Winkler" <tomas.winkler@intel.com>,
	"Borislav Petkov" <bp@suse.de>,
	"Matthew Auld" <matthew.auld@intel.com>,
	"Thomas Hellström" <thomas.hellstrom@linux.intel.com>,
	"Alan Previn" <alan.previn.teres.alexis@intel.com>,
	"Lucas De Marchi" <lucas.demarchi@intel.com>,
	intel-gfx@lists.freedesktop.org, linux-media@vger.kernel.org,
	linaro-mm-sig@lists.linaro.org,
	"Rodrigo Vivi" <rodrigo.vivi@intel.com>,
	"Vinay Belgaumkar" <vinay.belgaumkar@intel.com>,
	"Mauro Carvalho Chehab" <mchehab@kernel.org>,
	"Tvrtko Ursulin" <tvrtko.ursulin@linux.intel.com>,
	linux-kernel@vger.kernel.org,
	"Ashutosh Dixit" <ashutosh.dixit@intel.com>,
	"Prathap Kumar Valsan" <prathap.kumar.valsan@intel.com>,
	"Michal Wajdeczko" <michal.wajdeczko@intel.com>,
	"Umesh Nerlige Ramappa" <umesh.nerlige.ramappa@intel.com>,
	"Christian König" <christian.koenig@amd.com>,
	"John Harrison" <John.C.Harrison@Intel.com>
Subject: [PATCH 00/21] Fix performance regressions with TLB and add GuC support
Date: Wed, 13 Jul 2022 10:29:57 +0100	[thread overview]
Message-ID: <cover.1657703926.git.mchehab@kernel.org> (raw)

TLB invalidation is a slow operation. It should not be doing lightly, as it
causes performance regressions, like this:

[178.821002] i915 0000:00:02.0: [drm] *ERROR* rcs0 TLB invalidation did not complete in 4ms!

This series contain 

1) some patches that makes TLB invalidation to happen only on
active, non-wedged engines, doing cache invalidation in batch 
and only when GT objects are exposed to userspace:

  drm/i915/gt: Ignore TLB invalidations on idle engines
  drm/i915/gt: Only invalidate TLBs exposed to user manipulation
  drm/i915/gt: Skip TLB invalidations once wedged
  drm/i915/gt: Batch TLB invalidations
  drm/i915/gt: Move TLB invalidation to its own file

2) It fixes two bugs, being the first a workaround:

  drm/i915/gt: Invalidate TLB of the OA unit at TLB invalidations
  drm/i915: Invalidate the TLBs on each GT

  drm/i915/guc: Introduce TLB_INVALIDATION_ALL action

3) It adds GuC support. Besides providing TLB invalidation on some
additional hardware, this should also help serializing GuC operations
with TLB invalidation:

  drm/i915/guc: Introduce TLB_INVALIDATION_ALL action
  drm/i915/guc: Define CTB based TLB invalidation routines
  drm/i915: Add platform macro for selective tlb flush
  drm/i915: Define GuC Based TLB invalidation routines
  drm/i915: Add generic interface for tlb invalidation for XeHP
  drm/i915: Use selective tlb invalidations where supported

4) It adds the corresponding kernel-doc markups for the kAPI
used for TLB invalidation.

While I could have split this into smaller pieces, I'm opting to send
them altogether, in order for CI trybot to better verify what issues
will be closed with this series.

---

Chris Wilson (7):
  drm/i915/gt: Ignore TLB invalidations on idle engines
  drm/i915/gt: Invalidate TLB of the OA unit at TLB invalidations
  drm/i915/gt: Only invalidate TLBs exposed to user manipulation
  drm/i915/gt: Skip TLB invalidations once wedged
  drm/i915/gt: Batch TLB invalidations
  drm/i915/gt: Move TLB invalidation to its own file
  drm/i915: Invalidate the TLBs on each GT

Mauro Carvalho Chehab (8):
  drm/i915/gt: document with_intel_gt_pm_if_awake()
  drm/i915/gt: describe the new tlb parameter at i915_vma_resource
  drm/i915/guc: use kernel-doc for enum intel_guc_tlb_inval_mode
  drm/i915/guc: document the TLB invalidation struct members
  drm/i915: document tlb field at struct drm_i915_gem_object
  drm/i915/gt: document TLB cache invalidation functions
  drm/i915/guc: describe enum intel_guc_tlb_invalidation_type
  drm/i915/guc: document TLB cache invalidation functions

Piotr Piórkowski (1):
  drm/i915/guc: Introduce TLB_INVALIDATION_ALL action

Prathap Kumar Valsan (5):
  drm/i915/guc: Define CTB based TLB invalidation routines
  drm/i915: Add platform macro for selective tlb flush
  drm/i915: Define GuC Based TLB invalidation routines
  drm/i915: Add generic interface for tlb invalidation for XeHP
  drm/i915: Use selective tlb invalidations where supported

 drivers/gpu/drm/i915/Makefile                 |   1 +
 .../gpu/drm/i915/gem/i915_gem_object_types.h  |   6 +-
 drivers/gpu/drm/i915/gem/i915_gem_pages.c     |  28 +-
 drivers/gpu/drm/i915/gt/intel_engine.h        |   1 +
 drivers/gpu/drm/i915/gt/intel_gt.c            | 125 +-------
 drivers/gpu/drm/i915/gt/intel_gt.h            |   2 -
 .../gpu/drm/i915/gt/intel_gt_buffer_pool.h    |   3 +-
 drivers/gpu/drm/i915/gt/intel_gt_defines.h    |  11 +
 drivers/gpu/drm/i915/gt/intel_gt_pm.h         |  10 +
 drivers/gpu/drm/i915/gt/intel_gt_regs.h       |   8 +
 drivers/gpu/drm/i915/gt/intel_gt_types.h      |  22 +-
 drivers/gpu/drm/i915/gt/intel_ppgtt.c         |   8 +-
 drivers/gpu/drm/i915/gt/intel_tlb.c           | 295 ++++++++++++++++++
 drivers/gpu/drm/i915/gt/intel_tlb.h           |  30 ++
 .../gpu/drm/i915/gt/uc/abi/guc_actions_abi.h  |  54 ++++
 drivers/gpu/drm/i915/gt/uc/intel_guc.c        | 232 ++++++++++++++
 drivers/gpu/drm/i915/gt/uc/intel_guc.h        |  36 +++
 drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c     |  24 +-
 drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h   |   9 +
 .../gpu/drm/i915/gt/uc/intel_guc_submission.c |  91 +++++-
 drivers/gpu/drm/i915/i915_drv.h               |   4 +-
 drivers/gpu/drm/i915/i915_pci.c               |   1 +
 drivers/gpu/drm/i915/i915_vma.c               |  46 ++-
 drivers/gpu/drm/i915/i915_vma.h               |   2 +
 drivers/gpu/drm/i915/i915_vma_resource.c      |   9 +-
 drivers/gpu/drm/i915/i915_vma_resource.h      |   6 +-
 drivers/gpu/drm/i915/intel_device_info.h      |   1 +
 27 files changed, 910 insertions(+), 155 deletions(-)
 create mode 100644 drivers/gpu/drm/i915/gt/intel_gt_defines.h
 create mode 100644 drivers/gpu/drm/i915/gt/intel_tlb.c
 create mode 100644 drivers/gpu/drm/i915/gt/intel_tlb.h

-- 
2.36.1



WARNING: multiple messages have this Message-ID (diff)
From: Mauro Carvalho Chehab <mchehab@kernel.org>
Cc: "David Airlie" <airlied@linux.ie>,
	dri-devel@lists.freedesktop.org,
	"Andrzej Hajda" <andrzej.hajda@intel.com>,
	"Sumit Semwal" <sumit.semwal@linaro.org>,
	"Abdiel Janulgue" <abdiel.janulgue@linux.intel.com>,
	"Michael Cheng" <michael.cheng@intel.com>,
	"Chris Wilson" <chris.p.wilson@intel.com>,
	"Dave Airlie" <airlied@redhat.com>,
	"Tomas Winkler" <tomas.winkler@intel.com>,
	"Borislav Petkov" <bp@suse.de>,
	"Matthew Auld" <matthew.auld@intel.com>,
	"Thomas Hellström" <thomas.hellstrom@linux.intel.com>,
	"Alan Previn" <alan.previn.teres.alexis@intel.com>,
	"Lucas De Marchi" <lucas.demarchi@intel.com>,
	intel-gfx@lists.freedesktop.org, linux-media@vger.kernel.org,
	linaro-mm-sig@lists.linaro.org,
	"Rodrigo Vivi" <rodrigo.vivi@intel.com>,
	"Mauro Carvalho Chehab" <mchehab@kernel.org>,
	linux-kernel@vger.kernel.org,
	"Christian König" <christian.koenig@amd.com>
Subject: [Intel-gfx] [PATCH 00/21] Fix performance regressions with TLB and add GuC support
Date: Wed, 13 Jul 2022 10:29:57 +0100	[thread overview]
Message-ID: <cover.1657703926.git.mchehab@kernel.org> (raw)

TLB invalidation is a slow operation. It should not be doing lightly, as it
causes performance regressions, like this:

[178.821002] i915 0000:00:02.0: [drm] *ERROR* rcs0 TLB invalidation did not complete in 4ms!

This series contain 

1) some patches that makes TLB invalidation to happen only on
active, non-wedged engines, doing cache invalidation in batch 
and only when GT objects are exposed to userspace:

  drm/i915/gt: Ignore TLB invalidations on idle engines
  drm/i915/gt: Only invalidate TLBs exposed to user manipulation
  drm/i915/gt: Skip TLB invalidations once wedged
  drm/i915/gt: Batch TLB invalidations
  drm/i915/gt: Move TLB invalidation to its own file

2) It fixes two bugs, being the first a workaround:

  drm/i915/gt: Invalidate TLB of the OA unit at TLB invalidations
  drm/i915: Invalidate the TLBs on each GT

  drm/i915/guc: Introduce TLB_INVALIDATION_ALL action

3) It adds GuC support. Besides providing TLB invalidation on some
additional hardware, this should also help serializing GuC operations
with TLB invalidation:

  drm/i915/guc: Introduce TLB_INVALIDATION_ALL action
  drm/i915/guc: Define CTB based TLB invalidation routines
  drm/i915: Add platform macro for selective tlb flush
  drm/i915: Define GuC Based TLB invalidation routines
  drm/i915: Add generic interface for tlb invalidation for XeHP
  drm/i915: Use selective tlb invalidations where supported

4) It adds the corresponding kernel-doc markups for the kAPI
used for TLB invalidation.

While I could have split this into smaller pieces, I'm opting to send
them altogether, in order for CI trybot to better verify what issues
will be closed with this series.

---

Chris Wilson (7):
  drm/i915/gt: Ignore TLB invalidations on idle engines
  drm/i915/gt: Invalidate TLB of the OA unit at TLB invalidations
  drm/i915/gt: Only invalidate TLBs exposed to user manipulation
  drm/i915/gt: Skip TLB invalidations once wedged
  drm/i915/gt: Batch TLB invalidations
  drm/i915/gt: Move TLB invalidation to its own file
  drm/i915: Invalidate the TLBs on each GT

Mauro Carvalho Chehab (8):
  drm/i915/gt: document with_intel_gt_pm_if_awake()
  drm/i915/gt: describe the new tlb parameter at i915_vma_resource
  drm/i915/guc: use kernel-doc for enum intel_guc_tlb_inval_mode
  drm/i915/guc: document the TLB invalidation struct members
  drm/i915: document tlb field at struct drm_i915_gem_object
  drm/i915/gt: document TLB cache invalidation functions
  drm/i915/guc: describe enum intel_guc_tlb_invalidation_type
  drm/i915/guc: document TLB cache invalidation functions

Piotr Piórkowski (1):
  drm/i915/guc: Introduce TLB_INVALIDATION_ALL action

Prathap Kumar Valsan (5):
  drm/i915/guc: Define CTB based TLB invalidation routines
  drm/i915: Add platform macro for selective tlb flush
  drm/i915: Define GuC Based TLB invalidation routines
  drm/i915: Add generic interface for tlb invalidation for XeHP
  drm/i915: Use selective tlb invalidations where supported

 drivers/gpu/drm/i915/Makefile                 |   1 +
 .../gpu/drm/i915/gem/i915_gem_object_types.h  |   6 +-
 drivers/gpu/drm/i915/gem/i915_gem_pages.c     |  28 +-
 drivers/gpu/drm/i915/gt/intel_engine.h        |   1 +
 drivers/gpu/drm/i915/gt/intel_gt.c            | 125 +-------
 drivers/gpu/drm/i915/gt/intel_gt.h            |   2 -
 .../gpu/drm/i915/gt/intel_gt_buffer_pool.h    |   3 +-
 drivers/gpu/drm/i915/gt/intel_gt_defines.h    |  11 +
 drivers/gpu/drm/i915/gt/intel_gt_pm.h         |  10 +
 drivers/gpu/drm/i915/gt/intel_gt_regs.h       |   8 +
 drivers/gpu/drm/i915/gt/intel_gt_types.h      |  22 +-
 drivers/gpu/drm/i915/gt/intel_ppgtt.c         |   8 +-
 drivers/gpu/drm/i915/gt/intel_tlb.c           | 295 ++++++++++++++++++
 drivers/gpu/drm/i915/gt/intel_tlb.h           |  30 ++
 .../gpu/drm/i915/gt/uc/abi/guc_actions_abi.h  |  54 ++++
 drivers/gpu/drm/i915/gt/uc/intel_guc.c        | 232 ++++++++++++++
 drivers/gpu/drm/i915/gt/uc/intel_guc.h        |  36 +++
 drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c     |  24 +-
 drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h   |   9 +
 .../gpu/drm/i915/gt/uc/intel_guc_submission.c |  91 +++++-
 drivers/gpu/drm/i915/i915_drv.h               |   4 +-
 drivers/gpu/drm/i915/i915_pci.c               |   1 +
 drivers/gpu/drm/i915/i915_vma.c               |  46 ++-
 drivers/gpu/drm/i915/i915_vma.h               |   2 +
 drivers/gpu/drm/i915/i915_vma_resource.c      |   9 +-
 drivers/gpu/drm/i915/i915_vma_resource.h      |   6 +-
 drivers/gpu/drm/i915/intel_device_info.h      |   1 +
 27 files changed, 910 insertions(+), 155 deletions(-)
 create mode 100644 drivers/gpu/drm/i915/gt/intel_gt_defines.h
 create mode 100644 drivers/gpu/drm/i915/gt/intel_tlb.c
 create mode 100644 drivers/gpu/drm/i915/gt/intel_tlb.h

-- 
2.36.1



             reply	other threads:[~2022-07-13  9:31 UTC|newest]

Thread overview: 68+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-07-13  9:29 Mauro Carvalho Chehab [this message]
2022-07-13  9:29 ` [Intel-gfx] [PATCH 00/21] Fix performance regressions with TLB and add GuC support Mauro Carvalho Chehab
2022-07-13  9:29 ` Mauro Carvalho Chehab
2022-07-13  9:29 ` [PATCH 01/21] drm/i915/gt: Ignore TLB invalidations on idle engines Mauro Carvalho Chehab
2022-07-13  9:29   ` [Intel-gfx] " Mauro Carvalho Chehab
2022-07-13  9:29   ` Mauro Carvalho Chehab
2022-07-13  9:29 ` [PATCH 02/21] drm/i915/gt: document with_intel_gt_pm_if_awake() Mauro Carvalho Chehab
2022-07-13  9:29   ` [Intel-gfx] " Mauro Carvalho Chehab
2022-07-13  9:29   ` Mauro Carvalho Chehab
2022-07-13  9:30 ` [PATCH 03/21] drm/i915/gt: Invalidate TLB of the OA unit at TLB invalidations Mauro Carvalho Chehab
2022-07-13  9:30   ` [Intel-gfx] " Mauro Carvalho Chehab
2022-07-13  9:30   ` Mauro Carvalho Chehab
2022-07-13  9:30 ` [PATCH 04/21] drm/i915/gt: Only invalidate TLBs exposed to user manipulation Mauro Carvalho Chehab
2022-07-13  9:30   ` [Intel-gfx] " Mauro Carvalho Chehab
2022-07-13  9:30   ` Mauro Carvalho Chehab
2022-07-13  9:30 ` [PATCH 05/21] drm/i915/gt: Skip TLB invalidations once wedged Mauro Carvalho Chehab
2022-07-13  9:30   ` [Intel-gfx] " Mauro Carvalho Chehab
2022-07-13  9:30   ` Mauro Carvalho Chehab
2022-07-13  9:30 ` [PATCH 06/21] drm/i915/gt: Batch TLB invalidations Mauro Carvalho Chehab
2022-07-13  9:30   ` [Intel-gfx] " Mauro Carvalho Chehab
2022-07-13  9:30   ` Mauro Carvalho Chehab
2022-07-13  9:30 ` [PATCH 07/21] drm/i915/gt: describe the new tlb parameter at i915_vma_resource Mauro Carvalho Chehab
2022-07-13  9:30   ` [Intel-gfx] " Mauro Carvalho Chehab
2022-07-13  9:30   ` Mauro Carvalho Chehab
2022-07-13  9:30 ` [PATCH 08/21] drm/i915/gt: Move TLB invalidation to its own file Mauro Carvalho Chehab
2022-07-13  9:30   ` Mauro Carvalho Chehab
2022-07-13  9:30   ` [Intel-gfx] " Mauro Carvalho Chehab
2022-07-13  9:30 ` [PATCH 09/21] drm/i915/guc: Define CTB based TLB invalidation routines Mauro Carvalho Chehab
2022-07-13  9:30   ` [Intel-gfx] " Mauro Carvalho Chehab
2022-07-13  9:30   ` Mauro Carvalho Chehab
2022-07-13  9:30 ` [PATCH 10/21] drm/i915/guc: use kernel-doc for enum intel_guc_tlb_inval_mode Mauro Carvalho Chehab
2022-07-13  9:30   ` [Intel-gfx] " Mauro Carvalho Chehab
2022-07-13  9:30   ` Mauro Carvalho Chehab
2022-07-13  9:30 ` [PATCH 11/21] drm/i915/guc: document the TLB invalidation struct members Mauro Carvalho Chehab
2022-07-13  9:30   ` [Intel-gfx] " Mauro Carvalho Chehab
2022-07-13  9:30   ` Mauro Carvalho Chehab
2022-07-13  9:30 ` [PATCH 12/21] drm/i915/guc: Introduce TLB_INVALIDATION_ALL action Mauro Carvalho Chehab
2022-07-13  9:30   ` [Intel-gfx] " Mauro Carvalho Chehab
2022-07-13  9:30   ` Mauro Carvalho Chehab
2022-07-13  9:30 ` [PATCH 13/21] drm/i915: Invalidate the TLBs on each GT Mauro Carvalho Chehab
2022-07-13  9:30   ` [Intel-gfx] " Mauro Carvalho Chehab
2022-07-13  9:30   ` Mauro Carvalho Chehab
2022-07-13  9:30 ` [PATCH 14/21] drm/i915: document tlb field at struct drm_i915_gem_object Mauro Carvalho Chehab
2022-07-13  9:30   ` [Intel-gfx] " Mauro Carvalho Chehab
2022-07-13  9:30   ` Mauro Carvalho Chehab
2022-07-13  9:30 ` [PATCH 15/21] drm/i915: Add platform macro for selective tlb flush Mauro Carvalho Chehab
2022-07-13  9:30   ` [Intel-gfx] " Mauro Carvalho Chehab
2022-07-13  9:30   ` Mauro Carvalho Chehab
2022-07-13  9:30 ` [PATCH 16/21] drm/i915: Define GuC Based TLB invalidation routines Mauro Carvalho Chehab
2022-07-13  9:30   ` [Intel-gfx] " Mauro Carvalho Chehab
2022-07-13  9:30   ` Mauro Carvalho Chehab
2022-07-13  9:30 ` [PATCH 17/21] drm/i915: Add generic interface for tlb invalidation for XeHP Mauro Carvalho Chehab
2022-07-13  9:30   ` Mauro Carvalho Chehab
2022-07-13  9:30   ` [Intel-gfx] " Mauro Carvalho Chehab
2022-07-13  9:30 ` [PATCH 18/21] drm/i915: Use selective tlb invalidations where supported Mauro Carvalho Chehab
2022-07-13  9:30   ` [Intel-gfx] " Mauro Carvalho Chehab
2022-07-13  9:30   ` Mauro Carvalho Chehab
2022-07-13  9:30 ` [PATCH 19/21] drm/i915/gt: document TLB cache invalidation functions Mauro Carvalho Chehab
2022-07-13  9:30   ` [Intel-gfx] " Mauro Carvalho Chehab
2022-07-13  9:30   ` Mauro Carvalho Chehab
2022-07-13  9:30 ` [PATCH 20/21] drm/i915/guc: describe enum intel_guc_tlb_invalidation_type Mauro Carvalho Chehab
2022-07-13  9:30   ` [Intel-gfx] " Mauro Carvalho Chehab
2022-07-13  9:30   ` Mauro Carvalho Chehab
2022-07-13  9:30 ` [PATCH 21/21] drm/i915/guc: document TLB cache invalidation functions Mauro Carvalho Chehab
2022-07-13  9:30   ` [Intel-gfx] " Mauro Carvalho Chehab
2022-07-13  9:30   ` Mauro Carvalho Chehab
2022-07-13  9:48 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for Fix performance regressions with TLB and add GuC support Patchwork
2022-07-13 13:13 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for Fix performance regressions with TLB and add GuC support (rev2) Patchwork

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