All of lore.kernel.org
 help / color / mirror / Atom feed
* [GIT PULL 0/7] Renesas SoC updates for v6.2 (take two)
@ 2022-11-18 16:44 ` Geert Uytterhoeven
  0 siblings, 0 replies; 17+ messages in thread
From: Geert Uytterhoeven @ 2022-11-18 16:44 UTC (permalink / raw)
  To: arm-soc, soc
  Cc: Magnus Damm, linux-arm-kernel, linux-renesas-soc, Geert Uytterhoeven

	Hi SoC folks,

This is my second pull request for the inclusion of Renesas SoC updates
for v6.2, and the first one including support for an SoC with a RISC-V
CPU core (and including no changes for SoCs with arm32 CPU cores).

It consists of 7 parts:

  [GIT PULL 1/7] Renesas ARM defconfig updates for v6.2

    - Enable support for Renesas R-Car S4-8 Spider Ethernet devices in the
      arm64 defconfig.

  [GIT PULL 2/7] Renesas ARM DT updates for v6.2 (take two)

    - Timer (TMU and CMT) and quad Cortex-A76 CPU topology support for
      the R-Car V4H SoC,
    - Watchdog, L2 cache, and system controller support for the RZ/V2M
      SoC on the RZ/V2M Evaluation Kit 2.0,
    - Ethernet Switch and SERDES supports for the R-Car S4-8 SoC and the
      Spider development board,
    - Miscellaneous fixes and improvements.

  [GIT PULL 3/7] Renesas driver updates for v6.2 (take two)

    - Add support for identifying the SoC revision on RZ/V2M.

  [GIT PULL 4/7] Renesas DT binding updates for v6.2 (take two)

    - Document support for the Andes Technology AX45MP RISC-V CPU Core, as
      used on the Renesas RZ/Five SoC,
    - Document support for the Renesas RZ/V2M System Configuration.

  [GIT PULL 5/7] Renesas RISC-V defconfig updates for v6.2

    - Enable support for the Renesas RZ/Five SoC and the RZ/Five SMARC EVK
      board in the risc-v defconfig.

  [GIT PULL 6/7] Renesas RISC-V DT updates for v6.2

    - Add initial support for the Renesas RZ/Five SoC and the Renesas
      RZ/Five SMARC EVK development board.

  [GIT PULL 7/7] Renesas RISC-V SoC updates for v6.2

    - Add Kconfig option for Renesas RISC-V SoCs.

Thanks for pulling!

P.S. I'm wondering if I should reduce the number of branches?
     Probably it would make sense to (at least) use a single branch for
     the DTS changes, as the RZ/Five DTS files share base SoC and board
     DTS with RZ/G2UL through #include <arm64/renesas/...>.

Gr{oetje,eeting}s,

						Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
							    -- Linus Torvalds

^ permalink raw reply	[flat|nested] 17+ messages in thread

end of thread, other threads:[~2022-11-21 14:52 UTC | newest]

Thread overview: 17+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2022-11-18 16:44 [GIT PULL 0/7] Renesas SoC updates for v6.2 (take two) Geert Uytterhoeven
2022-11-18 16:44 ` Geert Uytterhoeven
2022-11-18 16:44 ` [GIT PULL 1/7] Renesas ARM defconfig updates for v6.2 Geert Uytterhoeven
2022-11-18 16:44   ` Geert Uytterhoeven
2022-11-18 16:44 ` [GIT PULL 2/7] Renesas ARM DT updates for v6.2 (take two) Geert Uytterhoeven
2022-11-18 16:44   ` Geert Uytterhoeven
2022-11-18 16:45 ` [GIT PULL 3/7] Renesas driver " Geert Uytterhoeven
2022-11-18 16:45   ` Geert Uytterhoeven
2022-11-18 16:45 ` [GIT PULL 4/7] Renesas DT binding " Geert Uytterhoeven
2022-11-18 16:45   ` Geert Uytterhoeven
2022-11-18 16:45 ` [GIT PULL 5/7] Renesas RISC-V defconfig updates for v6.2 Geert Uytterhoeven
2022-11-18 16:45   ` Geert Uytterhoeven
2022-11-18 16:45 ` [GIT PULL 6/7] Renesas RISC-V DT " Geert Uytterhoeven
2022-11-18 16:45   ` Geert Uytterhoeven
2022-11-18 16:45 ` [GIT PULL 7/7] Renesas RISC-V SoC " Geert Uytterhoeven
2022-11-18 16:45   ` Geert Uytterhoeven
2022-11-21 14:52 ` [GIT PULL 0/7] Renesas SoC updates for v6.2 (take two) patchwork-bot+linux-soc

This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.