From: Richard Henderson <richard.henderson@linaro.org>
To: "Philippe Mathieu-Daudé" <f4bug@amsat.org>, qemu-devel@nongnu.org
Cc: Peter Maydell <peter.maydell@linaro.org>,
Bin Meng <bin.meng@windriver.com>,
Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>,
Max Filippov <jcmvbkbc@gmail.com>,
Alistair Francis <alistair.francis@wdc.com>,
"Edgar E. Iglesias" <edgar.iglesias@gmail.com>,
Warner Losh <imp@bsdimp.com>, Marek Vasut <marex@denx.de>,
Yoshinori Sato <ysato@users.sourceforge.jp>,
qemu-ppc@nongnu.org, Artyom Tarasenko <atar4qemu@gmail.com>,
Aleksandar Rikalo <aleksandar.rikalo@syrmia.com>,
Eduardo Habkost <ehabkost@redhat.com>,
Kyle Evans <kevans@freebsd.org>, Greg Kurz <groug@kaod.org>,
qemu-arm@nongnu.org, Michael Rolnik <mrolnik@gmail.com>,
Stafford Horne <shorne@gmail.com>,
David Gibson <david@gibson.dropbear.id.au>,
qemu-riscv@nongnu.org, Chris Wulff <crwulff@gmail.com>,
Laurent Vivier <laurent@vivier.eu>,
Palmer Dabbelt <palmer@dabbelt.com>,
Paolo Bonzini <pbonzini@redhat.com>,
Aurelien Jarno <aurelien@aurel32.net>
Subject: Re: [PATCH 07/24] target/arm: Restrict cpu_exec_interrupt() handler to sysemu
Date: Fri, 3 Sep 2021 21:10:21 +0200 [thread overview]
Message-ID: <d004f466-df7a-e32b-d999-0501989aeef8@linaro.org> (raw)
In-Reply-To: <20210902151715.383678-8-f4bug@amsat.org>
On 9/2/21 5:16 PM, Philippe Mathieu-Daudé wrote:
> Restrict cpu_exec_interrupt() and its callees to sysemu.
>
> Signed-off-by: Philippe Mathieu-Daudé<f4bug@amsat.org>
> ---
> target/arm/cpu.h | 3 +--
> target/arm/cpu.c | 7 +++++--
> target/arm/cpu_tcg.c | 6 +++---
> 3 files changed, 9 insertions(+), 7 deletions(-)
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
r~
WARNING: multiple messages have this Message-ID (diff)
From: Richard Henderson <richard.henderson@linaro.org>
To: "Philippe Mathieu-Daudé" <f4bug@amsat.org>, qemu-devel@nongnu.org
Cc: Yoshinori Sato <ysato@users.sourceforge.jp>,
Jiaxun Yang <jiaxun.yang@flygoat.com>,
qemu-arm@nongnu.org, Palmer Dabbelt <palmer@dabbelt.com>,
Max Filippov <jcmvbkbc@gmail.com>, Warner Losh <imp@bsdimp.com>,
Michael Rolnik <mrolnik@gmail.com>,
Stafford Horne <shorne@gmail.com>,
Paolo Bonzini <pbonzini@redhat.com>,
"Edgar E. Iglesias" <edgar.iglesias@gmail.com>,
Bin Meng <bin.meng@windriver.com>,
Chris Wulff <crwulff@gmail.com>,
Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>,
David Gibson <david@gibson.dropbear.id.au>,
Kyle Evans <kevans@freebsd.org>,
Peter Maydell <peter.maydell@linaro.org>,
Aurelien Jarno <aurelien@aurel32.net>,
Eduardo Habkost <ehabkost@redhat.com>,
Marek Vasut <marex@denx.de>,
Artyom Tarasenko <atar4qemu@gmail.com>,
Aleksandar Rikalo <aleksandar.rikalo@syrmia.com>,
Greg Kurz <groug@kaod.org>,
qemu-riscv@nongnu.org, Laurent Vivier <laurent@vivier.eu>,
qemu-ppc@nongnu.org, Alistair Francis <alistair.francis@wdc.com>
Subject: Re: [PATCH 07/24] target/arm: Restrict cpu_exec_interrupt() handler to sysemu
Date: Fri, 3 Sep 2021 21:10:21 +0200 [thread overview]
Message-ID: <d004f466-df7a-e32b-d999-0501989aeef8@linaro.org> (raw)
In-Reply-To: <20210902151715.383678-8-f4bug@amsat.org>
On 9/2/21 5:16 PM, Philippe Mathieu-Daudé wrote:
> Restrict cpu_exec_interrupt() and its callees to sysemu.
>
> Signed-off-by: Philippe Mathieu-Daudé<f4bug@amsat.org>
> ---
> target/arm/cpu.h | 3 +--
> target/arm/cpu.c | 7 +++++--
> target/arm/cpu_tcg.c | 6 +++---
> 3 files changed, 9 insertions(+), 7 deletions(-)
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
r~
next prev parent reply other threads:[~2021-09-03 19:14 UTC|newest]
Thread overview: 152+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-09-02 15:16 [PATCH 00/24] accel/tcg: Restrict TCGCPUOps::cpu_exec_interrupt() to sysemu Philippe Mathieu-Daudé
2021-09-02 15:16 ` Philippe Mathieu-Daudé
2021-09-02 15:16 ` [PATCH 01/24] target/xtensa: Restrict do_transaction_failed() " Philippe Mathieu-Daudé
2021-09-02 15:16 ` Philippe Mathieu-Daudé
2021-09-02 20:09 ` Warner Losh
2021-09-02 20:09 ` Warner Losh
2021-09-03 18:54 ` Richard Henderson
2021-09-03 18:54 ` Richard Henderson
2021-09-02 15:16 ` [PATCH 02/24] target/i386: Restrict sysemu-only fpu_helper helpers Philippe Mathieu-Daudé
2021-09-02 15:16 ` Philippe Mathieu-Daudé
2021-09-02 20:10 ` Warner Losh
2021-09-02 20:10 ` Warner Losh
2021-09-03 18:58 ` Richard Henderson
2021-09-03 18:58 ` Richard Henderson
2021-09-02 15:16 ` [PATCH 03/24] target/i386: Simplify TARGET_X86_64 #ifdef'ry Philippe Mathieu-Daudé
2021-09-02 15:16 ` Philippe Mathieu-Daudé
2021-09-02 20:10 ` Warner Losh
2021-09-02 20:10 ` Warner Losh
2021-09-03 19:00 ` Richard Henderson
2021-09-03 19:00 ` Richard Henderson
2021-09-02 15:16 ` [RFC PATCH 04/24] accel/tcg: Rename user-mode do_interrupt hack as fake_user_exception Philippe Mathieu-Daudé
2021-09-02 15:16 ` Philippe Mathieu-Daudé
2021-09-02 20:14 ` Warner Losh
2021-09-02 20:14 ` Warner Losh
2021-09-03 19:07 ` Richard Henderson
2021-09-03 19:07 ` Richard Henderson
2021-09-04 23:26 ` Philippe Mathieu-Daudé
2021-09-04 23:26 ` Philippe Mathieu-Daudé
2021-09-02 15:16 ` [PATCH 05/24] accel/tcg: Assert most of cpu_handle_interrupt() is sysemu-specific Philippe Mathieu-Daudé
2021-09-02 15:16 ` Philippe Mathieu-Daudé
2021-09-03 19:08 ` Richard Henderson
2021-09-03 19:08 ` Richard Henderson
2021-09-02 15:16 ` [PATCH 06/24] target/alpha: Restrict cpu_exec_interrupt() handler to sysemu Philippe Mathieu-Daudé
2021-09-02 15:16 ` Philippe Mathieu-Daudé
2021-09-02 20:15 ` Warner Losh
2021-09-02 20:15 ` Warner Losh
2021-09-03 19:09 ` Richard Henderson
2021-09-03 19:09 ` Richard Henderson
2021-09-02 15:16 ` [PATCH 07/24] target/arm: " Philippe Mathieu-Daudé
2021-09-02 15:16 ` Philippe Mathieu-Daudé
2021-09-02 20:16 ` Warner Losh
2021-09-02 20:16 ` Warner Losh
2021-09-03 19:10 ` Richard Henderson [this message]
2021-09-03 19:10 ` Richard Henderson
2021-09-02 15:16 ` [PATCH 08/24] target/avr: " Philippe Mathieu-Daudé
2021-09-02 15:16 ` Philippe Mathieu-Daudé
2021-09-02 20:16 ` Warner Losh
2021-09-02 20:16 ` Warner Losh
2021-09-03 19:12 ` Richard Henderson
2021-09-03 19:12 ` Richard Henderson
2021-09-03 20:47 ` Philippe Mathieu-Daudé
2021-09-03 20:47 ` Philippe Mathieu-Daudé
2021-09-03 20:50 ` Richard Henderson
2021-09-03 20:50 ` Richard Henderson
2021-09-02 15:17 ` [PATCH 09/24] target/cris: " Philippe Mathieu-Daudé
2021-09-02 15:17 ` Philippe Mathieu-Daudé
2021-09-02 20:17 ` Warner Losh
2021-09-02 20:17 ` Warner Losh
2021-09-03 19:12 ` Richard Henderson
2021-09-03 19:12 ` Richard Henderson
2021-09-02 15:17 ` [PATCH 10/24] target/hppa: " Philippe Mathieu-Daudé
2021-09-02 15:17 ` Philippe Mathieu-Daudé
2021-09-02 20:17 ` Warner Losh
2021-09-02 20:17 ` Warner Losh
2021-09-03 19:14 ` Richard Henderson
2021-09-03 19:14 ` Richard Henderson
2021-09-02 15:17 ` [PATCH 11/24] target/i386: " Philippe Mathieu-Daudé
2021-09-02 15:17 ` Philippe Mathieu-Daudé
2021-09-02 20:18 ` Warner Losh
2021-09-02 20:18 ` Warner Losh
2021-09-03 19:15 ` Richard Henderson
2021-09-03 19:15 ` Richard Henderson
2021-09-02 15:17 ` [PATCH 12/24] target/m68k: " Philippe Mathieu-Daudé
2021-09-02 15:17 ` Philippe Mathieu-Daudé
2021-09-02 20:19 ` Warner Losh
2021-09-02 20:19 ` Warner Losh
2021-09-03 19:16 ` Richard Henderson
2021-09-03 19:16 ` Richard Henderson
2021-09-02 15:17 ` [PATCH 13/24] target/microblaze: " Philippe Mathieu-Daudé
2021-09-02 15:17 ` Philippe Mathieu-Daudé
2021-09-02 20:20 ` Warner Losh
2021-09-02 20:20 ` Warner Losh
2021-09-03 19:16 ` Richard Henderson
2021-09-03 19:16 ` Richard Henderson
2021-09-02 15:17 ` [PATCH 14/24] target/mips: " Philippe Mathieu-Daudé
2021-09-02 15:17 ` Philippe Mathieu-Daudé
2021-09-02 20:21 ` Warner Losh
2021-09-02 20:21 ` Warner Losh
2021-09-03 19:17 ` Richard Henderson
2021-09-03 19:17 ` Richard Henderson
2021-09-02 15:17 ` [PATCH 15/24] target/nios2: " Philippe Mathieu-Daudé
2021-09-02 15:17 ` Philippe Mathieu-Daudé
2021-09-02 20:22 ` Warner Losh
2021-09-02 20:22 ` Warner Losh
2021-09-03 19:17 ` Richard Henderson
2021-09-03 19:17 ` Richard Henderson
2021-09-02 15:17 ` [PATCH 16/24] target/openrisc: " Philippe Mathieu-Daudé
2021-09-02 15:17 ` Philippe Mathieu-Daudé
2021-09-02 20:24 ` Warner Losh
2021-09-02 20:24 ` Warner Losh
2021-09-04 23:40 ` Philippe Mathieu-Daudé
2021-09-04 23:40 ` Philippe Mathieu-Daudé
2021-09-03 19:18 ` Richard Henderson
2021-09-03 19:18 ` Richard Henderson
2021-09-02 15:17 ` [PATCH 17/24] target/ppc: " Philippe Mathieu-Daudé
2021-09-02 15:17 ` Philippe Mathieu-Daudé
2021-09-02 20:24 ` Warner Losh
2021-09-02 20:24 ` Warner Losh
2021-09-03 0:48 ` David Gibson
2021-09-03 0:48 ` David Gibson
2021-09-03 19:19 ` Richard Henderson
2021-09-03 19:19 ` Richard Henderson
2021-09-02 15:17 ` [PATCH 18/24] target/riscv: " Philippe Mathieu-Daudé
2021-09-02 15:17 ` Philippe Mathieu-Daudé
2021-09-02 20:25 ` Warner Losh
2021-09-02 20:25 ` Warner Losh
2021-09-03 19:21 ` Richard Henderson
2021-09-03 19:21 ` Richard Henderson
2021-09-02 15:17 ` [PATCH 19/24] target/sh4: " Philippe Mathieu-Daudé
2021-09-02 15:17 ` Philippe Mathieu-Daudé
2021-09-02 20:25 ` Warner Losh
2021-09-02 20:25 ` Warner Losh
2021-09-03 19:22 ` Richard Henderson
2021-09-03 19:22 ` Richard Henderson
2021-09-02 15:17 ` [PATCH 20/24] target/sparc: " Philippe Mathieu-Daudé
2021-09-02 15:17 ` Philippe Mathieu-Daudé
2021-09-02 20:26 ` Warner Losh
2021-09-02 20:26 ` Warner Losh
2021-09-03 19:22 ` Richard Henderson
2021-09-03 19:22 ` Richard Henderson
2021-09-02 15:17 ` [PATCH 21/24] target/rx: " Philippe Mathieu-Daudé
2021-09-02 15:17 ` Philippe Mathieu-Daudé
2021-09-02 20:26 ` Warner Losh
2021-09-02 20:26 ` Warner Losh
2021-09-03 19:23 ` Richard Henderson
2021-09-03 19:23 ` Richard Henderson
2021-09-02 15:17 ` [PATCH 22/24] target/xtensa: " Philippe Mathieu-Daudé
2021-09-02 15:17 ` Philippe Mathieu-Daudé
2021-09-02 20:26 ` Warner Losh
2021-09-02 20:26 ` Warner Losh
2021-09-03 19:24 ` Richard Henderson
2021-09-03 19:24 ` Richard Henderson
2021-09-02 15:17 ` [PATCH 23/24] accel/tcg: Restrict TCGCPUOps::cpu_exec_interrupt() " Philippe Mathieu-Daudé
2021-09-02 15:17 ` Philippe Mathieu-Daudé
2021-09-03 19:26 ` Richard Henderson
2021-09-03 19:26 ` Richard Henderson
2021-09-02 15:17 ` [PATCH 24/24] user: Remove cpu_get_pic_interrupt() stubs Philippe Mathieu-Daudé
2021-09-02 15:17 ` Philippe Mathieu-Daudé
2021-09-02 20:27 ` Warner Losh
2021-09-02 20:27 ` Warner Losh
2021-09-03 19:27 ` Richard Henderson
2021-09-03 19:27 ` Richard Henderson
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=d004f466-df7a-e32b-d999-0501989aeef8@linaro.org \
--to=richard.henderson@linaro.org \
--cc=aleksandar.rikalo@syrmia.com \
--cc=alistair.francis@wdc.com \
--cc=atar4qemu@gmail.com \
--cc=aurelien@aurel32.net \
--cc=bin.meng@windriver.com \
--cc=crwulff@gmail.com \
--cc=david@gibson.dropbear.id.au \
--cc=edgar.iglesias@gmail.com \
--cc=ehabkost@redhat.com \
--cc=f4bug@amsat.org \
--cc=groug@kaod.org \
--cc=imp@bsdimp.com \
--cc=jcmvbkbc@gmail.com \
--cc=kevans@freebsd.org \
--cc=laurent@vivier.eu \
--cc=marex@denx.de \
--cc=mark.cave-ayland@ilande.co.uk \
--cc=mrolnik@gmail.com \
--cc=palmer@dabbelt.com \
--cc=pbonzini@redhat.com \
--cc=peter.maydell@linaro.org \
--cc=qemu-arm@nongnu.org \
--cc=qemu-devel@nongnu.org \
--cc=qemu-ppc@nongnu.org \
--cc=qemu-riscv@nongnu.org \
--cc=shorne@gmail.com \
--cc=ysato@users.sourceforge.jp \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.