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From: Jan Beulich <jbeulich@suse.com>
To: "xen-devel@lists.xenproject.org" <xen-devel@lists.xenproject.org>
Cc: Andrew Cooper <andrew.cooper3@citrix.com>, Wei Liu <wl@xen.org>,
	Roger Pau Monne <roger.pau@citrix.com>
Subject: Re: [PATCH v8 09/12] x86/HVM: scale MPERF values reported to guests (on AMD)
Date: Tue, 5 May 2020 10:19:06 +0200	[thread overview]
Message-ID: <d4ae14f1-52c2-1dfb-439b-d0b09b36282a@suse.com> (raw)
In-Reply-To: <c14edd2c-3cd8-c9b4-0cc0-7cbf2c672127@suse.com>

On 05.05.2020 10:17, Jan Beulich wrote:
> AMD's PM specifies that MPERF (and its r/o counterpart) reads are
> affected by the TSC ratio. Hence when processing such reads in software
> we too should scale the values. While we don't currently (yet) expose
> the underlying feature flags, besides us allowing the MSRs to be read
> nevertheless, RDPRU is going to expose the values even to user space.
> 
> Furthermore, due to the not exposed feature flags, this change has the
> effect of making properly inaccessible (for reads) the two MSRs.
> 
> Note that writes to MPERF (and APERF) continue to be unsupported.
> 
> Signed-off-by: Jan Beulich <jbeulich@suse.com>

Sorry, just re-sent this one with correct numbering.

Jan


  reply	other threads:[~2020-05-05  8:19 UTC|newest]

Thread overview: 51+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-05-05  8:10 [PATCH v8 00/12] x86emul: further work Jan Beulich
2020-05-05  8:12 ` [PATCH v8 01/12] x86emul: disable FPU/MMX/SIMD insn emulation when !HVM Jan Beulich
2020-05-07 18:11   ` Andrew Cooper
2020-05-08  8:10     ` Jan Beulich
2020-05-05  8:13 ` [PATCH v8 02/12] x86emul: support MOVDIR{I,64B} insns Jan Beulich
2020-05-07 18:30   ` Andrew Cooper
2020-05-08  7:19     ` Jan Beulich
2020-05-05  8:13 ` [PATCH v8 03/12] x86emul: support ENQCMD insns Jan Beulich
2020-05-07 18:59   ` Andrew Cooper
2020-05-08  7:32     ` Jan Beulich
2020-05-05  8:14 ` [PATCH v8 04/12] x86emul: support SERIALIZE Jan Beulich
2020-05-07 19:32   ` Andrew Cooper
2020-05-08  7:34     ` Jan Beulich
2020-05-08 13:00       ` Andrew Cooper
2020-05-08 13:59         ` Jan Beulich
2020-05-08 15:05           ` Andrew Cooper
2020-05-05  8:14 ` [PATCH v8 05/12] x86emul: support X{SUS,RES}LDTRK Jan Beulich
2020-05-07 20:13   ` Andrew Cooper
2020-05-08  7:38     ` Jan Beulich
2020-05-08 13:15       ` Andrew Cooper
2020-05-08 14:42         ` Jan Beulich
2020-05-05  8:15 ` [PATCH v8 06/12] x86/HVM: make hvmemul_blk() capable of handling r/o operations Jan Beulich
2020-05-05 14:20   ` Paul Durrant
2020-05-07 20:34   ` Andrew Cooper
2020-05-08  7:13     ` Jan Beulich
2020-05-05  8:15 ` [PATCH v8 07/12] x86emul: support FNSTENV and FNSAVE Jan Beulich
2020-05-05 12:36   ` Jan Beulich
2020-05-08 17:58   ` Andrew Cooper
2020-05-13 12:07     ` Jan Beulich
2020-05-05  8:16 ` [PATCH v8 08/12] x86emul: support FLDENV and FRSTOR Jan Beulich
2020-05-08 13:37   ` Roger Pau Monné
2020-05-08 15:04     ` Jan Beulich
2020-05-08 16:21       ` Roger Pau Monné
2020-05-11  7:29         ` Jan Beulich
2020-05-11  9:22           ` Roger Pau Monné
2020-05-08 18:29       ` Andrew Cooper
2020-05-11  7:25         ` Jan Beulich
2020-05-11  8:02           ` Roger Pau Monné
2020-05-08 18:19   ` Andrew Cooper
2020-05-05  8:16 ` [PATCH v8 09/12] x86emul: support FXSAVE/FXRSTOR Jan Beulich
2020-05-08 19:31   ` Andrew Cooper
2020-05-13 13:24     ` Jan Beulich
2020-05-05  8:17 ` [PATCH v8 09/12] x86/HVM: scale MPERF values reported to guests (on AMD) Jan Beulich
2020-05-05  8:19   ` Jan Beulich [this message]
2020-05-05  8:18 ` [PATCH v8 10/12] " Jan Beulich
2020-05-08 20:32   ` Andrew Cooper
2020-05-05  8:19 ` [PATCH v8 11/12] x86emul: support RDPRU Jan Beulich
2020-05-05  8:20 ` [PATCH v8 12/12] x86/HVM: don't needlessly intercept APERF/MPERF/TSC MSR reads Jan Beulich
2020-05-08 21:04   ` Andrew Cooper
2020-05-13 13:35     ` Jan Beulich
2020-05-14  8:52       ` Jan Beulich

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