From: LIU Zhiwei <zhiwei_liu@c-sky.com>
To: Richard Henderson <richard.henderson@linaro.org>,
peter.maydell@linaro.org
Cc: qemu-riscv@nongnu.org, qemu-devel@nongnu.org,
wxy194768@alibaba-inc.com, wenmeng_zhang@c-sky.com,
palmer@dabbelt.com, alistair23@gmail.com, alex.bennee@linaro.org
Subject: Re: [RFC PATCH 0/8] RISCV risu porting
Date: Tue, 19 May 2020 17:44:07 +0800 [thread overview]
Message-ID: <d7475c4e-6613-5f59-b65f-d23e844b2115@c-sky.com> (raw)
In-Reply-To: <69d804ea-5274-bee4-9368-69c888082143@linaro.org>
[-- Attachment #1: Type: text/plain, Size: 765 bytes --]
On 2020/5/12 0:30, Richard Henderson wrote:
> On 4/30/20 12:21 AM, LIU Zhiwei wrote:
>> It's some difficult when I try to support RV32, because it's very
>> similiar to RV64, so I can't make two .risu files like arm.risu and
>> aarch64.risu.
> You could a command-line parameter, like --be or --sve for this.
Yes. I should add a "--xlen" parameter to specify the general register
length in risugen_riscv.pm.
Besides, I should modify current riscv64.risu.
For instructions in RV32 and RV64:
LB RV32_64 imm:12 rs1:5 000 rd:5 0000011
For RV64 only instructions:
LD RV64 imm:12 rs1:5 011 rd:5 0000011
So I can generate RV32 instructions through --pattern '*.RV32.*', and
the RV64 instructions through --pattern '.*RV64.*'.
Best Regards,
Zhiwei
>
> r~
[-- Attachment #2: Type: text/html, Size: 1538 bytes --]
WARNING: multiple messages have this Message-ID (diff)
From: LIU Zhiwei <zhiwei_liu@c-sky.com>
To: Richard Henderson <richard.henderson@linaro.org>,
peter.maydell@linaro.org
Cc: alistair23@gmail.com, palmer@dabbelt.com,
wenmeng_zhang@c-sky.com, wxy194768@alibaba-inc.com,
qemu-devel@nongnu.org, alex.bennee@linaro.org,
qemu-riscv@nongnu.org
Subject: Re: [RFC PATCH 0/8] RISCV risu porting
Date: Tue, 19 May 2020 17:44:07 +0800 [thread overview]
Message-ID: <d7475c4e-6613-5f59-b65f-d23e844b2115@c-sky.com> (raw)
In-Reply-To: <69d804ea-5274-bee4-9368-69c888082143@linaro.org>
[-- Attachment #1: Type: text/plain, Size: 765 bytes --]
On 2020/5/12 0:30, Richard Henderson wrote:
> On 4/30/20 12:21 AM, LIU Zhiwei wrote:
>> It's some difficult when I try to support RV32, because it's very
>> similiar to RV64, so I can't make two .risu files like arm.risu and
>> aarch64.risu.
> You could a command-line parameter, like --be or --sve for this.
Yes. I should add a "--xlen" parameter to specify the general register
length in risugen_riscv.pm.
Besides, I should modify current riscv64.risu.
For instructions in RV32 and RV64:
LB RV32_64 imm:12 rs1:5 000 rd:5 0000011
For RV64 only instructions:
LD RV64 imm:12 rs1:5 011 rd:5 0000011
So I can generate RV32 instructions through --pattern '*.RV32.*', and
the RV64 instructions through --pattern '.*RV64.*'.
Best Regards,
Zhiwei
>
> r~
[-- Attachment #2: Type: text/html, Size: 1538 bytes --]
next prev parent reply other threads:[~2020-05-19 9:45 UTC|newest]
Thread overview: 56+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-04-30 7:21 [RFC PATCH 0/8] RISCV risu porting LIU Zhiwei
2020-04-30 7:21 ` LIU Zhiwei
2020-04-30 7:21 ` [RFC PATCH 1/8] riscv: Add RV64I instructions description LIU Zhiwei
2020-04-30 7:21 ` LIU Zhiwei
2020-05-11 16:39 ` Richard Henderson
2020-05-11 16:39 ` Richard Henderson
2020-05-20 2:41 ` LIU Zhiwei
2020-05-20 2:41 ` LIU Zhiwei
2020-05-20 5:39 ` Richard Henderson
2020-05-20 5:39 ` Richard Henderson
2020-04-30 7:21 ` [RFC PATCH 2/8] riscv: Generate payload scripts LIU Zhiwei
2020-04-30 7:21 ` LIU Zhiwei
2020-05-11 17:40 ` Richard Henderson
2020-05-11 17:40 ` Richard Henderson
2020-05-20 2:37 ` LIU Zhiwei
2020-05-20 2:37 ` LIU Zhiwei
2020-05-20 5:41 ` Richard Henderson
2020-05-20 5:41 ` Richard Henderson
2020-05-20 9:06 ` LIU Zhiwei
2020-05-20 9:06 ` LIU Zhiwei
2020-04-30 7:21 ` [RFC PATCH 3/8] riscv: Define riscv struct reginfo LIU Zhiwei
2020-04-30 7:21 ` LIU Zhiwei
2020-05-11 17:42 ` Richard Henderson
2020-05-11 17:42 ` Richard Henderson
2020-04-30 7:21 ` [RFC PATCH 4/8] riscv: Implement payload load interfaces LIU Zhiwei
2020-04-30 7:21 ` LIU Zhiwei
2020-05-11 18:03 ` Richard Henderson
2020-05-11 18:03 ` Richard Henderson
2020-05-11 18:07 ` Richard Henderson
2020-05-11 18:07 ` Richard Henderson
2020-04-30 7:21 ` [RFC PATCH 5/8] riscv: Add standard test case LIU Zhiwei
2020-04-30 7:21 ` LIU Zhiwei
2020-05-11 18:04 ` Richard Henderson
2020-05-11 18:04 ` Richard Henderson
2020-04-30 7:21 ` [RFC PATCH 6/8] riscv: Add configure script LIU Zhiwei
2020-04-30 7:21 ` LIU Zhiwei
2020-05-11 18:06 ` Richard Henderson
2020-05-11 18:06 ` Richard Henderson
2020-05-20 1:45 ` LIU Zhiwei
2020-05-20 1:45 ` LIU Zhiwei
2020-05-20 2:28 ` LIU Zhiwei
2020-05-20 2:28 ` LIU Zhiwei
2020-04-30 7:21 ` [RFC PATCH 7/8] riscv: Add RV64M instructions description LIU Zhiwei
2020-04-30 7:21 ` LIU Zhiwei
2020-05-11 18:12 ` Richard Henderson
2020-05-11 18:12 ` Richard Henderson
2020-04-30 7:21 ` [RFC PATCH 8/8] riscv: Add RV64F " LIU Zhiwei
2020-04-30 7:21 ` LIU Zhiwei
2020-05-11 18:11 ` Richard Henderson
2020-05-11 18:11 ` Richard Henderson
2020-05-19 12:27 ` LIU Zhiwei
2020-05-19 12:27 ` LIU Zhiwei
2020-05-11 16:30 ` [RFC PATCH 0/8] RISCV risu porting Richard Henderson
2020-05-11 16:30 ` Richard Henderson
2020-05-19 9:44 ` LIU Zhiwei [this message]
2020-05-19 9:44 ` LIU Zhiwei
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=d7475c4e-6613-5f59-b65f-d23e844b2115@c-sky.com \
--to=zhiwei_liu@c-sky.com \
--cc=alex.bennee@linaro.org \
--cc=alistair23@gmail.com \
--cc=palmer@dabbelt.com \
--cc=peter.maydell@linaro.org \
--cc=qemu-devel@nongnu.org \
--cc=qemu-riscv@nongnu.org \
--cc=richard.henderson@linaro.org \
--cc=wenmeng_zhang@c-sky.com \
--cc=wxy194768@alibaba-inc.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.