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From: Chunfeng Yun <chunfeng.yun@mediatek.com>
To: Guillaume Ranquet <granquet@baylibre.com>,
	Matthias Brugger <matthias.bgg@gmail.com>,
	Vinod Koul <vkoul@kernel.org>, Stephen Boyd <sboyd@kernel.org>,
	David Airlie <airlied@linux.ie>, Rob Herring <robh+dt@kernel.org>,
	Philipp Zabel <p.zabel@pengutronix.de>,
	"Krzysztof Kozlowski" <krzysztof.kozlowski+dt@linaro.org>,
	Daniel Vetter <daniel@ffwll.ch>, CK Hu <ck.hu@mediatek.com>,
	Jitao shi <jitao.shi@mediatek.com>,
	Chun-Kuang Hu <chunkuang.hu@kernel.org>,
	"Michael Turquette" <mturquette@baylibre.com>,
	Kishon Vijay Abraham I <kishon@ti.com>
Cc: <linux-mediatek@lists.infradead.org>,
	<dri-devel@lists.freedesktop.org>,
	Pablo Sun <pablo.sun@mediatek.com>, <linux-clk@vger.kernel.org>,
	<linux-kernel@vger.kernel.org>,
	Mattijs Korpershoek <mkorpershoek@baylibre.com>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-phy@lists.infradead.org>, <devicetree@vger.kernel.org>
Subject: Re: [PATCH v1 14/17] phy: mediatek: add support for phy-mtk-hdmi-mt8195
Date: Wed, 28 Sep 2022 10:40:59 +0800	[thread overview]
Message-ID: <da5c39fb351a7ca5a9dfa1c938d2e3d914ecb0d2.camel@mediatek.com> (raw)
In-Reply-To: <CABnWg9v4OuAU0x7n1q09gO7u3faOsmeq_4PFpw=_wAn1+erF8A@mail.gmail.com>

On Tue, 2022-09-27 at 06:23 -0700, Guillaume Ranquet wrote:
> On Tue, 20 Sep 2022 09:46, Chunfeng Yun <chunfeng.yun@mediatek.com>
> wrote:
> > On Mon, 2022-09-19 at 18:56 +0200, Guillaume Ranquet wrote:
> > > Add basic support for the mediatek hdmi phy on MT8195 SoC
> > > 
> > > Signed-off-by: Guillaume Ranquet <granquet@baylibre.com>
> > > 
> > > diff --git a/drivers/gpu/drm/mediatek/mtk_mt8195_hdmi.c
> > > b/drivers/gpu/drm/mediatek/mtk_mt8195_hdmi.c
> > > index bb7593ea4c86..0157acdce56c 100644
> > > --- a/drivers/gpu/drm/mediatek/mtk_mt8195_hdmi.c
> > > +++ b/drivers/gpu/drm/mediatek/mtk_mt8195_hdmi.c
> > > @@ -1344,6 +1344,8 @@ static void mtk_hdmi_bridge_disable(struct
> > > drm_bridge *bridge,
> > >  	mtk_hdmi_disable_hdcp_encrypt(hdmi);
> > >  	usleep_range(50000, 50050);
> > > 
> > > +	phy_power_off(hdmi->phy);
> > > +
> > >  	hdmi->enabled = false;
> > >  }
> > > 
> > > diff --git a/drivers/phy/mediatek/Makefile
> > > b/drivers/phy/mediatek/Makefile
> > > index fb1f8edaffa7..c9a50395533e 100644
> > > --- a/drivers/phy/mediatek/Makefile
> > > +++ b/drivers/phy/mediatek/Makefile
> > > @@ -12,6 +12,7 @@ obj-$(CONFIG_PHY_MTK_XSPHY)		+= phy-
> > > mtk-
> > > xsphy.o
> > >  phy-mtk-hdmi-drv-y			:= phy-mtk-hdmi.o
> > >  phy-mtk-hdmi-drv-y			+= phy-mtk-hdmi-
> > > mt2701.o
> > >  phy-mtk-hdmi-drv-y			+= phy-mtk-hdmi-
> > > mt8173.o
> > > +phy-mtk-hdmi-drv-y			+= phy-mtk-hdmi-
> > > mt8195.o
> > >  obj-$(CONFIG_PHY_MTK_HDMI)		+= phy-mtk-hdmi-drv.o
> > > 
> > >  phy-mtk-mipi-dsi-drv-y			:= phy-mtk-mipi-dsi.o
> > > diff --git a/drivers/phy/mediatek/phy-mtk-hdmi-mt8195.c
> > > b/drivers/phy/mediatek/phy-mtk-hdmi-mt8195.c
> > > new file mode 100644
> > > index 000000000000..149015b64c02
> > > --- /dev/null
> > > +++ b/drivers/phy/mediatek/phy-mtk-hdmi-mt8195.c
> > > @@ -0,0 +1,673 @@
> > > +// SPDX-License-Identifier: GPL-2.0
> > > +/*
> > > + * Copyright (c) 2021 MediaTek Inc.
> > > + * Copyright (c) 2021 BayLibre, SAS
> > > + */
> > > +#include <linux/delay.h>
> > > +#include <linux/io.h>
> > > +#include <linux/mfd/syscon.h>
> > > +#include <linux/module.h>
> > > +#include <linux/phy/phy.h>
> > > +#include <linux/platform_device.h>
> > > +#include <linux/types.h>
> > > +#include <linux/nvmem-consumer.h>
> > > +
> > > +#include "phy-mtk-hdmi.h"
> > > +#include "phy-mtk-hdmi-mt8195.h"
> > > +
> > > +static void mtk_hdmi_ana_fifo_en(struct mtk_hdmi_phy *hdmi_phy)
> > > +{
> > > +	/* make data fifo writable for hdmi2.0 */
> > > +	mtk_hdmi_phy_mask(hdmi_phy, HDMI_ANA_CTL,
> > > REG_ANA_HDMI20_FIFO_EN,
> > > +			  REG_ANA_HDMI20_FIFO_EN);
> > > +}
> > > +
> > > +static void
> > > +mtk_mt8195_phy_tmds_high_bit_clk_ratio(struct mtk_hdmi_phy
> > > *hdmi_phy,
> > > +				       bool enable)
> > > +{
> > > +	mtk_hdmi_ana_fifo_en(hdmi_phy);
> > > +
> > > +	/* HDMI 2.0 specification, 3.4Gbps <= TMDS Bit Rate <= 6G,
> > > +	 * clock bit ratio 1:40, under 3.4Gbps, clock bit ratio 1:10
> > > +	 */
> > > +	if (enable)
> > > +		mtk_hdmi_phy_mask(hdmi_phy, HDMI20_CLK_CFG,
> > > +				  0x2 << REG_TXC_DIV_SHIFT,
> > 
> > Use FIELD_PREP() macro, then no need define REG_TXC_DIV_SHIFT
> > anymore.
> > 
> 
> Didn't know about FIELD_* macros, will use them for V2.
> 
> Thx for the suggestion.
Please use helpers defined in phy-mtk-io.h, the register access helpers
of mtk_hdmi_phy_* are already removed in phy next branch.

Thanks a lot



WARNING: multiple messages have this Message-ID (diff)
From: Chunfeng Yun <chunfeng.yun@mediatek.com>
To: Guillaume Ranquet <granquet@baylibre.com>,
	Matthias Brugger <matthias.bgg@gmail.com>,
	Vinod Koul <vkoul@kernel.org>, Stephen Boyd <sboyd@kernel.org>,
	David Airlie <airlied@linux.ie>, Rob Herring <robh+dt@kernel.org>,
	Philipp Zabel <p.zabel@pengutronix.de>,
	"Krzysztof Kozlowski" <krzysztof.kozlowski+dt@linaro.org>,
	Daniel Vetter <daniel@ffwll.ch>, CK Hu <ck.hu@mediatek.com>,
	Jitao shi <jitao.shi@mediatek.com>,
	Chun-Kuang Hu <chunkuang.hu@kernel.org>,
	"Michael Turquette" <mturquette@baylibre.com>,
	Kishon Vijay Abraham I <kishon@ti.com>
Cc: devicetree@vger.kernel.org,
	Mattijs Korpershoek <mkorpershoek@baylibre.com>,
	linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org,
	linux-clk@vger.kernel.org, linux-mediatek@lists.infradead.org,
	linux-phy@lists.infradead.org, Pablo Sun <pablo.sun@mediatek.com>,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v1 14/17] phy: mediatek: add support for phy-mtk-hdmi-mt8195
Date: Wed, 28 Sep 2022 10:40:59 +0800	[thread overview]
Message-ID: <da5c39fb351a7ca5a9dfa1c938d2e3d914ecb0d2.camel@mediatek.com> (raw)
In-Reply-To: <CABnWg9v4OuAU0x7n1q09gO7u3faOsmeq_4PFpw=_wAn1+erF8A@mail.gmail.com>

On Tue, 2022-09-27 at 06:23 -0700, Guillaume Ranquet wrote:
> On Tue, 20 Sep 2022 09:46, Chunfeng Yun <chunfeng.yun@mediatek.com>
> wrote:
> > On Mon, 2022-09-19 at 18:56 +0200, Guillaume Ranquet wrote:
> > > Add basic support for the mediatek hdmi phy on MT8195 SoC
> > > 
> > > Signed-off-by: Guillaume Ranquet <granquet@baylibre.com>
> > > 
> > > diff --git a/drivers/gpu/drm/mediatek/mtk_mt8195_hdmi.c
> > > b/drivers/gpu/drm/mediatek/mtk_mt8195_hdmi.c
> > > index bb7593ea4c86..0157acdce56c 100644
> > > --- a/drivers/gpu/drm/mediatek/mtk_mt8195_hdmi.c
> > > +++ b/drivers/gpu/drm/mediatek/mtk_mt8195_hdmi.c
> > > @@ -1344,6 +1344,8 @@ static void mtk_hdmi_bridge_disable(struct
> > > drm_bridge *bridge,
> > >  	mtk_hdmi_disable_hdcp_encrypt(hdmi);
> > >  	usleep_range(50000, 50050);
> > > 
> > > +	phy_power_off(hdmi->phy);
> > > +
> > >  	hdmi->enabled = false;
> > >  }
> > > 
> > > diff --git a/drivers/phy/mediatek/Makefile
> > > b/drivers/phy/mediatek/Makefile
> > > index fb1f8edaffa7..c9a50395533e 100644
> > > --- a/drivers/phy/mediatek/Makefile
> > > +++ b/drivers/phy/mediatek/Makefile
> > > @@ -12,6 +12,7 @@ obj-$(CONFIG_PHY_MTK_XSPHY)		+= phy-
> > > mtk-
> > > xsphy.o
> > >  phy-mtk-hdmi-drv-y			:= phy-mtk-hdmi.o
> > >  phy-mtk-hdmi-drv-y			+= phy-mtk-hdmi-
> > > mt2701.o
> > >  phy-mtk-hdmi-drv-y			+= phy-mtk-hdmi-
> > > mt8173.o
> > > +phy-mtk-hdmi-drv-y			+= phy-mtk-hdmi-
> > > mt8195.o
> > >  obj-$(CONFIG_PHY_MTK_HDMI)		+= phy-mtk-hdmi-drv.o
> > > 
> > >  phy-mtk-mipi-dsi-drv-y			:= phy-mtk-mipi-dsi.o
> > > diff --git a/drivers/phy/mediatek/phy-mtk-hdmi-mt8195.c
> > > b/drivers/phy/mediatek/phy-mtk-hdmi-mt8195.c
> > > new file mode 100644
> > > index 000000000000..149015b64c02
> > > --- /dev/null
> > > +++ b/drivers/phy/mediatek/phy-mtk-hdmi-mt8195.c
> > > @@ -0,0 +1,673 @@
> > > +// SPDX-License-Identifier: GPL-2.0
> > > +/*
> > > + * Copyright (c) 2021 MediaTek Inc.
> > > + * Copyright (c) 2021 BayLibre, SAS
> > > + */
> > > +#include <linux/delay.h>
> > > +#include <linux/io.h>
> > > +#include <linux/mfd/syscon.h>
> > > +#include <linux/module.h>
> > > +#include <linux/phy/phy.h>
> > > +#include <linux/platform_device.h>
> > > +#include <linux/types.h>
> > > +#include <linux/nvmem-consumer.h>
> > > +
> > > +#include "phy-mtk-hdmi.h"
> > > +#include "phy-mtk-hdmi-mt8195.h"
> > > +
> > > +static void mtk_hdmi_ana_fifo_en(struct mtk_hdmi_phy *hdmi_phy)
> > > +{
> > > +	/* make data fifo writable for hdmi2.0 */
> > > +	mtk_hdmi_phy_mask(hdmi_phy, HDMI_ANA_CTL,
> > > REG_ANA_HDMI20_FIFO_EN,
> > > +			  REG_ANA_HDMI20_FIFO_EN);
> > > +}
> > > +
> > > +static void
> > > +mtk_mt8195_phy_tmds_high_bit_clk_ratio(struct mtk_hdmi_phy
> > > *hdmi_phy,
> > > +				       bool enable)
> > > +{
> > > +	mtk_hdmi_ana_fifo_en(hdmi_phy);
> > > +
> > > +	/* HDMI 2.0 specification, 3.4Gbps <= TMDS Bit Rate <= 6G,
> > > +	 * clock bit ratio 1:40, under 3.4Gbps, clock bit ratio 1:10
> > > +	 */
> > > +	if (enable)
> > > +		mtk_hdmi_phy_mask(hdmi_phy, HDMI20_CLK_CFG,
> > > +				  0x2 << REG_TXC_DIV_SHIFT,
> > 
> > Use FIELD_PREP() macro, then no need define REG_TXC_DIV_SHIFT
> > anymore.
> > 
> 
> Didn't know about FIELD_* macros, will use them for V2.
> 
> Thx for the suggestion.
Please use helpers defined in phy-mtk-io.h, the register access helpers
of mtk_hdmi_phy_* are already removed in phy next branch.

Thanks a lot



WARNING: multiple messages have this Message-ID (diff)
From: Chunfeng Yun <chunfeng.yun@mediatek.com>
To: Guillaume Ranquet <granquet@baylibre.com>,
	Matthias Brugger <matthias.bgg@gmail.com>,
	Vinod Koul <vkoul@kernel.org>, Stephen Boyd <sboyd@kernel.org>,
	David Airlie <airlied@linux.ie>, Rob Herring <robh+dt@kernel.org>,
	Philipp Zabel <p.zabel@pengutronix.de>,
	"Krzysztof Kozlowski" <krzysztof.kozlowski+dt@linaro.org>,
	Daniel Vetter <daniel@ffwll.ch>, CK Hu <ck.hu@mediatek.com>,
	Jitao shi <jitao.shi@mediatek.com>,
	Chun-Kuang Hu <chunkuang.hu@kernel.org>,
	"Michael Turquette" <mturquette@baylibre.com>,
	Kishon Vijay Abraham I <kishon@ti.com>
Cc: <linux-mediatek@lists.infradead.org>,
	<dri-devel@lists.freedesktop.org>,
	Pablo Sun <pablo.sun@mediatek.com>, <linux-clk@vger.kernel.org>,
	<linux-kernel@vger.kernel.org>,
	Mattijs Korpershoek <mkorpershoek@baylibre.com>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-phy@lists.infradead.org>, <devicetree@vger.kernel.org>
Subject: Re: [PATCH v1 14/17] phy: mediatek: add support for phy-mtk-hdmi-mt8195
Date: Wed, 28 Sep 2022 10:40:59 +0800	[thread overview]
Message-ID: <da5c39fb351a7ca5a9dfa1c938d2e3d914ecb0d2.camel@mediatek.com> (raw)
In-Reply-To: <CABnWg9v4OuAU0x7n1q09gO7u3faOsmeq_4PFpw=_wAn1+erF8A@mail.gmail.com>

On Tue, 2022-09-27 at 06:23 -0700, Guillaume Ranquet wrote:
> On Tue, 20 Sep 2022 09:46, Chunfeng Yun <chunfeng.yun@mediatek.com>
> wrote:
> > On Mon, 2022-09-19 at 18:56 +0200, Guillaume Ranquet wrote:
> > > Add basic support for the mediatek hdmi phy on MT8195 SoC
> > > 
> > > Signed-off-by: Guillaume Ranquet <granquet@baylibre.com>
> > > 
> > > diff --git a/drivers/gpu/drm/mediatek/mtk_mt8195_hdmi.c
> > > b/drivers/gpu/drm/mediatek/mtk_mt8195_hdmi.c
> > > index bb7593ea4c86..0157acdce56c 100644
> > > --- a/drivers/gpu/drm/mediatek/mtk_mt8195_hdmi.c
> > > +++ b/drivers/gpu/drm/mediatek/mtk_mt8195_hdmi.c
> > > @@ -1344,6 +1344,8 @@ static void mtk_hdmi_bridge_disable(struct
> > > drm_bridge *bridge,
> > >  	mtk_hdmi_disable_hdcp_encrypt(hdmi);
> > >  	usleep_range(50000, 50050);
> > > 
> > > +	phy_power_off(hdmi->phy);
> > > +
> > >  	hdmi->enabled = false;
> > >  }
> > > 
> > > diff --git a/drivers/phy/mediatek/Makefile
> > > b/drivers/phy/mediatek/Makefile
> > > index fb1f8edaffa7..c9a50395533e 100644
> > > --- a/drivers/phy/mediatek/Makefile
> > > +++ b/drivers/phy/mediatek/Makefile
> > > @@ -12,6 +12,7 @@ obj-$(CONFIG_PHY_MTK_XSPHY)		+= phy-
> > > mtk-
> > > xsphy.o
> > >  phy-mtk-hdmi-drv-y			:= phy-mtk-hdmi.o
> > >  phy-mtk-hdmi-drv-y			+= phy-mtk-hdmi-
> > > mt2701.o
> > >  phy-mtk-hdmi-drv-y			+= phy-mtk-hdmi-
> > > mt8173.o
> > > +phy-mtk-hdmi-drv-y			+= phy-mtk-hdmi-
> > > mt8195.o
> > >  obj-$(CONFIG_PHY_MTK_HDMI)		+= phy-mtk-hdmi-drv.o
> > > 
> > >  phy-mtk-mipi-dsi-drv-y			:= phy-mtk-mipi-dsi.o
> > > diff --git a/drivers/phy/mediatek/phy-mtk-hdmi-mt8195.c
> > > b/drivers/phy/mediatek/phy-mtk-hdmi-mt8195.c
> > > new file mode 100644
> > > index 000000000000..149015b64c02
> > > --- /dev/null
> > > +++ b/drivers/phy/mediatek/phy-mtk-hdmi-mt8195.c
> > > @@ -0,0 +1,673 @@
> > > +// SPDX-License-Identifier: GPL-2.0
> > > +/*
> > > + * Copyright (c) 2021 MediaTek Inc.
> > > + * Copyright (c) 2021 BayLibre, SAS
> > > + */
> > > +#include <linux/delay.h>
> > > +#include <linux/io.h>
> > > +#include <linux/mfd/syscon.h>
> > > +#include <linux/module.h>
> > > +#include <linux/phy/phy.h>
> > > +#include <linux/platform_device.h>
> > > +#include <linux/types.h>
> > > +#include <linux/nvmem-consumer.h>
> > > +
> > > +#include "phy-mtk-hdmi.h"
> > > +#include "phy-mtk-hdmi-mt8195.h"
> > > +
> > > +static void mtk_hdmi_ana_fifo_en(struct mtk_hdmi_phy *hdmi_phy)
> > > +{
> > > +	/* make data fifo writable for hdmi2.0 */
> > > +	mtk_hdmi_phy_mask(hdmi_phy, HDMI_ANA_CTL,
> > > REG_ANA_HDMI20_FIFO_EN,
> > > +			  REG_ANA_HDMI20_FIFO_EN);
> > > +}
> > > +
> > > +static void
> > > +mtk_mt8195_phy_tmds_high_bit_clk_ratio(struct mtk_hdmi_phy
> > > *hdmi_phy,
> > > +				       bool enable)
> > > +{
> > > +	mtk_hdmi_ana_fifo_en(hdmi_phy);
> > > +
> > > +	/* HDMI 2.0 specification, 3.4Gbps <= TMDS Bit Rate <= 6G,
> > > +	 * clock bit ratio 1:40, under 3.4Gbps, clock bit ratio 1:10
> > > +	 */
> > > +	if (enable)
> > > +		mtk_hdmi_phy_mask(hdmi_phy, HDMI20_CLK_CFG,
> > > +				  0x2 << REG_TXC_DIV_SHIFT,
> > 
> > Use FIELD_PREP() macro, then no need define REG_TXC_DIV_SHIFT
> > anymore.
> > 
> 
> Didn't know about FIELD_* macros, will use them for V2.
> 
> Thx for the suggestion.
Please use helpers defined in phy-mtk-io.h, the register access helpers
of mtk_hdmi_phy_* are already removed in phy next branch.

Thanks a lot



-- 
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy

WARNING: multiple messages have this Message-ID (diff)
From: Chunfeng Yun <chunfeng.yun@mediatek.com>
To: Guillaume Ranquet <granquet@baylibre.com>,
	Matthias Brugger <matthias.bgg@gmail.com>,
	Vinod Koul <vkoul@kernel.org>, Stephen Boyd <sboyd@kernel.org>,
	David Airlie <airlied@linux.ie>, Rob Herring <robh+dt@kernel.org>,
	Philipp Zabel <p.zabel@pengutronix.de>,
	"Krzysztof Kozlowski" <krzysztof.kozlowski+dt@linaro.org>,
	Daniel Vetter <daniel@ffwll.ch>, CK Hu <ck.hu@mediatek.com>,
	Jitao shi <jitao.shi@mediatek.com>,
	Chun-Kuang Hu <chunkuang.hu@kernel.org>,
	"Michael Turquette" <mturquette@baylibre.com>,
	Kishon Vijay Abraham I <kishon@ti.com>
Cc: <linux-mediatek@lists.infradead.org>,
	<dri-devel@lists.freedesktop.org>,
	Pablo Sun <pablo.sun@mediatek.com>, <linux-clk@vger.kernel.org>,
	<linux-kernel@vger.kernel.org>,
	Mattijs Korpershoek <mkorpershoek@baylibre.com>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-phy@lists.infradead.org>, <devicetree@vger.kernel.org>
Subject: Re: [PATCH v1 14/17] phy: mediatek: add support for phy-mtk-hdmi-mt8195
Date: Wed, 28 Sep 2022 10:40:59 +0800	[thread overview]
Message-ID: <da5c39fb351a7ca5a9dfa1c938d2e3d914ecb0d2.camel@mediatek.com> (raw)
In-Reply-To: <CABnWg9v4OuAU0x7n1q09gO7u3faOsmeq_4PFpw=_wAn1+erF8A@mail.gmail.com>

On Tue, 2022-09-27 at 06:23 -0700, Guillaume Ranquet wrote:
> On Tue, 20 Sep 2022 09:46, Chunfeng Yun <chunfeng.yun@mediatek.com>
> wrote:
> > On Mon, 2022-09-19 at 18:56 +0200, Guillaume Ranquet wrote:
> > > Add basic support for the mediatek hdmi phy on MT8195 SoC
> > > 
> > > Signed-off-by: Guillaume Ranquet <granquet@baylibre.com>
> > > 
> > > diff --git a/drivers/gpu/drm/mediatek/mtk_mt8195_hdmi.c
> > > b/drivers/gpu/drm/mediatek/mtk_mt8195_hdmi.c
> > > index bb7593ea4c86..0157acdce56c 100644
> > > --- a/drivers/gpu/drm/mediatek/mtk_mt8195_hdmi.c
> > > +++ b/drivers/gpu/drm/mediatek/mtk_mt8195_hdmi.c
> > > @@ -1344,6 +1344,8 @@ static void mtk_hdmi_bridge_disable(struct
> > > drm_bridge *bridge,
> > >  	mtk_hdmi_disable_hdcp_encrypt(hdmi);
> > >  	usleep_range(50000, 50050);
> > > 
> > > +	phy_power_off(hdmi->phy);
> > > +
> > >  	hdmi->enabled = false;
> > >  }
> > > 
> > > diff --git a/drivers/phy/mediatek/Makefile
> > > b/drivers/phy/mediatek/Makefile
> > > index fb1f8edaffa7..c9a50395533e 100644
> > > --- a/drivers/phy/mediatek/Makefile
> > > +++ b/drivers/phy/mediatek/Makefile
> > > @@ -12,6 +12,7 @@ obj-$(CONFIG_PHY_MTK_XSPHY)		+= phy-
> > > mtk-
> > > xsphy.o
> > >  phy-mtk-hdmi-drv-y			:= phy-mtk-hdmi.o
> > >  phy-mtk-hdmi-drv-y			+= phy-mtk-hdmi-
> > > mt2701.o
> > >  phy-mtk-hdmi-drv-y			+= phy-mtk-hdmi-
> > > mt8173.o
> > > +phy-mtk-hdmi-drv-y			+= phy-mtk-hdmi-
> > > mt8195.o
> > >  obj-$(CONFIG_PHY_MTK_HDMI)		+= phy-mtk-hdmi-drv.o
> > > 
> > >  phy-mtk-mipi-dsi-drv-y			:= phy-mtk-mipi-dsi.o
> > > diff --git a/drivers/phy/mediatek/phy-mtk-hdmi-mt8195.c
> > > b/drivers/phy/mediatek/phy-mtk-hdmi-mt8195.c
> > > new file mode 100644
> > > index 000000000000..149015b64c02
> > > --- /dev/null
> > > +++ b/drivers/phy/mediatek/phy-mtk-hdmi-mt8195.c
> > > @@ -0,0 +1,673 @@
> > > +// SPDX-License-Identifier: GPL-2.0
> > > +/*
> > > + * Copyright (c) 2021 MediaTek Inc.
> > > + * Copyright (c) 2021 BayLibre, SAS
> > > + */
> > > +#include <linux/delay.h>
> > > +#include <linux/io.h>
> > > +#include <linux/mfd/syscon.h>
> > > +#include <linux/module.h>
> > > +#include <linux/phy/phy.h>
> > > +#include <linux/platform_device.h>
> > > +#include <linux/types.h>
> > > +#include <linux/nvmem-consumer.h>
> > > +
> > > +#include "phy-mtk-hdmi.h"
> > > +#include "phy-mtk-hdmi-mt8195.h"
> > > +
> > > +static void mtk_hdmi_ana_fifo_en(struct mtk_hdmi_phy *hdmi_phy)
> > > +{
> > > +	/* make data fifo writable for hdmi2.0 */
> > > +	mtk_hdmi_phy_mask(hdmi_phy, HDMI_ANA_CTL,
> > > REG_ANA_HDMI20_FIFO_EN,
> > > +			  REG_ANA_HDMI20_FIFO_EN);
> > > +}
> > > +
> > > +static void
> > > +mtk_mt8195_phy_tmds_high_bit_clk_ratio(struct mtk_hdmi_phy
> > > *hdmi_phy,
> > > +				       bool enable)
> > > +{
> > > +	mtk_hdmi_ana_fifo_en(hdmi_phy);
> > > +
> > > +	/* HDMI 2.0 specification, 3.4Gbps <= TMDS Bit Rate <= 6G,
> > > +	 * clock bit ratio 1:40, under 3.4Gbps, clock bit ratio 1:10
> > > +	 */
> > > +	if (enable)
> > > +		mtk_hdmi_phy_mask(hdmi_phy, HDMI20_CLK_CFG,
> > > +				  0x2 << REG_TXC_DIV_SHIFT,
> > 
> > Use FIELD_PREP() macro, then no need define REG_TXC_DIV_SHIFT
> > anymore.
> > 
> 
> Didn't know about FIELD_* macros, will use them for V2.
> 
> Thx for the suggestion.
Please use helpers defined in phy-mtk-io.h, the register access helpers
of mtk_hdmi_phy_* are already removed in phy next branch.

Thanks a lot



_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  reply	other threads:[~2022-09-28  2:41 UTC|newest]

Thread overview: 280+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-09-19 16:55 [PATCH v1 00/17] Add MT8195 HDMI support Guillaume Ranquet
2022-09-19 16:55 ` Guillaume Ranquet
2022-09-19 16:55 ` Guillaume Ranquet
2022-09-19 16:55 ` Guillaume Ranquet
2022-09-19 16:55 ` [PATCH v1 01/17] dt-bindings: clk: mediatek: Add MT8195 DPI clocks Guillaume Ranquet
2022-09-19 16:55   ` Guillaume Ranquet
2022-09-19 16:55   ` Guillaume Ranquet
2022-09-19 16:55   ` Guillaume Ranquet
2022-09-21  2:48   ` Bo-Chen Chen
2022-09-21  2:48     ` Bo-Chen Chen
2022-09-21  2:48     ` Bo-Chen Chen
2022-09-21  2:48     ` Bo-Chen Chen
2022-09-22  7:11   ` Krzysztof Kozlowski
2022-09-22  7:11     ` Krzysztof Kozlowski
2022-09-22  7:11     ` Krzysztof Kozlowski
2022-09-22  7:11     ` Krzysztof Kozlowski
2022-09-22 12:45     ` Guillaume Ranquet
2022-09-22 12:45       ` Guillaume Ranquet
2022-09-22 12:45       ` Guillaume Ranquet
2022-09-22 12:45       ` Guillaume Ranquet
2022-09-22 12:51       ` Krzysztof Kozlowski
2022-09-22 12:51         ` Krzysztof Kozlowski
2022-09-22 12:51         ` Krzysztof Kozlowski
2022-09-22 12:51         ` Krzysztof Kozlowski
2022-09-22 19:31         ` Konstantin Ryabitsev
2022-09-22 19:31           ` Konstantin Ryabitsev
2022-09-22 19:31           ` Konstantin Ryabitsev
2022-09-22 19:31           ` Konstantin Ryabitsev
2022-09-22 12:51   ` Krzysztof Kozlowski
2022-09-22 12:51     ` Krzysztof Kozlowski
2022-09-22 12:51     ` Krzysztof Kozlowski
2022-09-22 12:51     ` Krzysztof Kozlowski
2022-09-19 16:56 ` [PATCH v1 02/17] clk: mediatek: add VDOSYS1 clock Guillaume Ranquet
2022-09-19 16:56   ` Guillaume Ranquet
2022-09-19 16:56   ` Guillaume Ranquet
2022-09-19 16:56   ` Guillaume Ranquet
2022-09-26  5:09   ` Chen-Yu Tsai
2022-09-26  5:09     ` Chen-Yu Tsai
2022-09-26  5:09     ` Chen-Yu Tsai
2022-09-26  5:09     ` Chen-Yu Tsai
2022-09-26  5:35     ` Chen-Yu Tsai
2022-09-26  5:35       ` Chen-Yu Tsai
2022-09-26  5:35       ` Chen-Yu Tsai
2022-09-26  5:35       ` Chen-Yu Tsai
2022-09-19 16:56 ` [PATCH v1 03/17] dt-bindings: phy: mediatek: hdmi-phy: Add mt8195 compatible Guillaume Ranquet
2022-09-19 16:56   ` Guillaume Ranquet
2022-09-19 16:56   ` Guillaume Ranquet
2022-09-19 16:56   ` Guillaume Ranquet
2022-09-22  7:12   ` Krzysztof Kozlowski
2022-09-22  7:12     ` Krzysztof Kozlowski
2022-09-22  7:12     ` Krzysztof Kozlowski
2022-09-22  7:12     ` Krzysztof Kozlowski
2022-09-22 12:52   ` Krzysztof Kozlowski
2022-09-22 12:52     ` Krzysztof Kozlowski
2022-09-22 12:52     ` Krzysztof Kozlowski
2022-09-22 12:52     ` Krzysztof Kozlowski
2022-09-19 16:56 ` [PATCH v1 04/17] dt-bindings: display: mediatek: add MT8195 hdmi bindings Guillaume Ranquet
2022-09-19 16:56   ` Guillaume Ranquet
2022-09-19 16:56   ` Guillaume Ranquet
2022-09-19 16:56   ` Guillaume Ranquet
2022-09-22  7:18   ` Krzysztof Kozlowski
2022-09-22  7:18     ` Krzysztof Kozlowski
2022-09-22  7:18     ` Krzysztof Kozlowski
2022-09-22  7:18     ` Krzysztof Kozlowski
2022-09-27 13:54     ` Guillaume Ranquet
2022-09-27 13:54       ` Guillaume Ranquet
2022-09-27 13:54       ` Guillaume Ranquet
2022-09-27 13:54       ` Guillaume Ranquet
2022-09-27 14:31       ` Krzysztof Kozlowski
2022-09-27 14:31         ` Krzysztof Kozlowski
2022-09-27 14:31         ` Krzysztof Kozlowski
2022-09-27 14:31         ` Krzysztof Kozlowski
2022-09-19 16:56 ` [PATCH v1 05/17] drm/mediatek: hdmi: use a syscon/regmap instead of iomem Guillaume Ranquet
2022-09-19 16:56   ` Guillaume Ranquet
2022-09-19 16:56   ` Guillaume Ranquet
2022-09-19 16:56   ` Guillaume Ranquet
2022-09-20 10:18   ` AngeloGioacchino Del Regno
2022-09-20 10:18     ` AngeloGioacchino Del Regno
2022-09-20 10:18     ` AngeloGioacchino Del Regno
2022-09-20 10:18     ` AngeloGioacchino Del Regno
2022-09-27 13:06     ` Guillaume Ranquet
2022-09-27 13:06       ` Guillaume Ranquet
2022-09-27 13:06       ` Guillaume Ranquet
2022-09-27 13:06       ` Guillaume Ranquet
2022-09-19 16:56 ` [PATCH v1 06/17] dt-bindings: mediatek: set the hdmi to be compatible with syscon Guillaume Ranquet
2022-09-19 16:56   ` Guillaume Ranquet
2022-09-19 16:56   ` Guillaume Ranquet
2022-09-19 16:56   ` Guillaume Ranquet
2022-09-20 10:19   ` AngeloGioacchino Del Regno
2022-09-20 10:19     ` AngeloGioacchino Del Regno
2022-09-20 10:19     ` AngeloGioacchino Del Regno
2022-09-20 10:19     ` AngeloGioacchino Del Regno
2022-09-22  7:19   ` Krzysztof Kozlowski
2022-09-22  7:19     ` Krzysztof Kozlowski
2022-09-22  7:19     ` Krzysztof Kozlowski
2022-09-22  7:19     ` Krzysztof Kozlowski
2022-09-27 14:03     ` Guillaume Ranquet
2022-09-27 14:03       ` Guillaume Ranquet
2022-09-27 14:03       ` Guillaume Ranquet
2022-09-27 14:03       ` Guillaume Ranquet
2022-09-19 16:56 ` [PATCH v1 07/17] drm/mediatek: extract common functions from the mtk hdmi driver Guillaume Ranquet
2022-09-19 16:56   ` Guillaume Ranquet
2022-09-19 16:56   ` Guillaume Ranquet
2022-09-19 16:56   ` Guillaume Ranquet
2022-09-20 10:25   ` AngeloGioacchino Del Regno
2022-09-20 10:25     ` AngeloGioacchino Del Regno
2022-09-20 10:25     ` AngeloGioacchino Del Regno
2022-09-20 10:25     ` AngeloGioacchino Del Regno
2022-09-27 13:08     ` Guillaume Ranquet
2022-09-27 13:08       ` Guillaume Ranquet
2022-09-27 13:08       ` Guillaume Ranquet
2022-09-27 13:08       ` Guillaume Ranquet
2022-09-19 16:56 ` [PATCH v1 08/17] drm/mediatek: hdmi: add cec flag Guillaume Ranquet
2022-09-19 16:56   ` Guillaume Ranquet
2022-09-19 16:56   ` Guillaume Ranquet
2022-09-19 16:56   ` Guillaume Ranquet
2022-09-20 10:34   ` AngeloGioacchino Del Regno
2022-09-20 10:34     ` AngeloGioacchino Del Regno
2022-09-20 10:34     ` AngeloGioacchino Del Regno
2022-09-20 10:34     ` AngeloGioacchino Del Regno
2022-09-19 16:56 ` [PATCH v1 09/17] drm/mediatek: hdmi: add connector flag Guillaume Ranquet
2022-09-19 16:56   ` Guillaume Ranquet
2022-09-19 16:56   ` Guillaume Ranquet
2022-09-19 16:56   ` Guillaume Ranquet
2022-09-20 10:38   ` AngeloGioacchino Del Regno
2022-09-20 10:38     ` AngeloGioacchino Del Regno
2022-09-20 10:38     ` AngeloGioacchino Del Regno
2022-09-20 10:38     ` AngeloGioacchino Del Regno
2022-10-03 15:39     ` Guillaume Ranquet
2022-10-03 15:39       ` Guillaume Ranquet
2022-10-03 15:39       ` Guillaume Ranquet
2022-10-03 15:39       ` Guillaume Ranquet
2022-09-19 16:56 ` [PATCH v1 10/17] drm/mediatek: hdmi: add frame_colorimetry flag Guillaume Ranquet
2022-09-19 16:56   ` Guillaume Ranquet
2022-09-19 16:56   ` Guillaume Ranquet
2022-09-19 16:56   ` Guillaume Ranquet
2022-09-19 16:56 ` [PATCH v1 11/17] drm/mediatek: hdmi: add mt8195 support Guillaume Ranquet
2022-09-19 16:56   ` Guillaume Ranquet
2022-09-19 16:56   ` Guillaume Ranquet
2022-09-19 16:56   ` Guillaume Ranquet
2022-09-20 11:04   ` AngeloGioacchino Del Regno
2022-09-20 11:04     ` AngeloGioacchino Del Regno
2022-09-20 11:04     ` AngeloGioacchino Del Regno
2022-09-20 11:04     ` AngeloGioacchino Del Regno
2022-10-14 13:54     ` Guillaume Ranquet
2022-10-14 13:54       ` Guillaume Ranquet
2022-10-14 13:54       ` Guillaume Ranquet
2022-10-14 13:54       ` Guillaume Ranquet
2022-09-22  7:24   ` Krzysztof Kozlowski
2022-09-22  7:24     ` Krzysztof Kozlowski
2022-09-22  7:24     ` Krzysztof Kozlowski
2022-09-22  7:24     ` Krzysztof Kozlowski
2022-09-19 16:56 ` [PATCH v1 12/17] drm/mediatek: hdmi: mt8195: add audio support Guillaume Ranquet
2022-09-19 16:56   ` Guillaume Ranquet
2022-09-19 16:56   ` Guillaume Ranquet
2022-09-19 16:56   ` Guillaume Ranquet
2022-09-20 11:11   ` AngeloGioacchino Del Regno
2022-09-20 11:11     ` AngeloGioacchino Del Regno
2022-09-20 11:11     ` AngeloGioacchino Del Regno
2022-09-20 11:11     ` AngeloGioacchino Del Regno
2022-09-27 13:13     ` Guillaume Ranquet
2022-09-27 13:13       ` Guillaume Ranquet
2022-09-27 13:13       ` Guillaume Ranquet
2022-09-27 13:13       ` Guillaume Ranquet
2022-09-19 16:56 ` [PATCH v1 13/17] phy: phy-mtk-hdmi: Add generic phy configure callback Guillaume Ranquet
2022-09-19 16:56   ` Guillaume Ranquet
2022-09-19 16:56   ` Guillaume Ranquet
2022-09-19 16:56   ` Guillaume Ranquet
2022-09-20 11:41   ` AngeloGioacchino Del Regno
2022-09-20 11:41     ` AngeloGioacchino Del Regno
2022-09-20 11:41     ` AngeloGioacchino Del Regno
2022-09-20 11:41     ` AngeloGioacchino Del Regno
2022-09-19 16:56 ` [PATCH v1 14/17] phy: mediatek: add support for phy-mtk-hdmi-mt8195 Guillaume Ranquet
2022-09-19 16:56   ` Guillaume Ranquet
2022-09-19 16:56   ` Guillaume Ranquet
2022-09-19 16:56   ` Guillaume Ranquet
2022-09-20  7:46   ` Chunfeng Yun
2022-09-20  7:46     ` Chunfeng Yun
2022-09-20  7:46     ` Chunfeng Yun
2022-09-20  7:46     ` Chunfeng Yun
2022-09-27 13:23     ` Guillaume Ranquet
2022-09-27 13:23       ` Guillaume Ranquet
2022-09-27 13:23       ` Guillaume Ranquet
2022-09-27 13:23       ` Guillaume Ranquet
2022-09-28  2:40       ` Chunfeng Yun [this message]
2022-09-28  2:40         ` Chunfeng Yun
2022-09-28  2:40         ` Chunfeng Yun
2022-09-28  2:40         ` Chunfeng Yun
2022-09-28 12:23         ` Guillaume Ranquet
2022-09-28 12:23           ` Guillaume Ranquet
2022-09-28 12:23           ` Guillaume Ranquet
2022-09-28 12:23           ` Guillaume Ranquet
2022-09-20 12:17   ` AngeloGioacchino Del Regno
2022-09-20 12:17     ` AngeloGioacchino Del Regno
2022-09-20 12:17     ` AngeloGioacchino Del Regno
2022-09-20 12:17     ` AngeloGioacchino Del Regno
2022-09-27 13:18     ` Guillaume Ranquet
2022-09-27 13:18       ` Guillaume Ranquet
2022-09-27 13:18       ` Guillaume Ranquet
2022-09-27 13:18       ` Guillaume Ranquet
2022-09-19 16:56 ` [PATCH v1 15/17] dt-bindings: display: mediatek: dpi: Add compatible for MediaTek MT8195 Guillaume Ranquet
2022-09-19 16:56   ` Guillaume Ranquet
2022-09-19 16:56   ` Guillaume Ranquet
2022-09-19 16:56   ` Guillaume Ranquet
2022-09-22  7:20   ` Krzysztof Kozlowski
2022-09-22  7:20     ` Krzysztof Kozlowski
2022-09-22  7:20     ` Krzysztof Kozlowski
2022-09-22  7:20     ` Krzysztof Kozlowski
2022-09-26  5:24     ` Chen-Yu Tsai
2022-09-26  5:24       ` Chen-Yu Tsai
2022-09-26  5:24       ` Chen-Yu Tsai
2022-09-26  5:24       ` Chen-Yu Tsai
2022-09-26  6:38       ` Krzysztof Kozlowski
2022-09-26  6:38         ` Krzysztof Kozlowski
2022-09-26  6:38         ` Krzysztof Kozlowski
2022-09-26  6:38         ` Krzysztof Kozlowski
2022-09-19 16:56 ` [PATCH v1 16/17] drm/mediatek: dpi: Add mt8195 hdmi to DPI driver Guillaume Ranquet
2022-09-19 16:56   ` Guillaume Ranquet
2022-09-19 16:56   ` Guillaume Ranquet
2022-09-19 16:56   ` Guillaume Ranquet
2022-09-20 12:22   ` AngeloGioacchino Del Regno
2022-09-20 12:22     ` AngeloGioacchino Del Regno
2022-09-20 12:22     ` AngeloGioacchino Del Regno
2022-09-20 12:22     ` AngeloGioacchino Del Regno
2022-09-27 13:34     ` Guillaume Ranquet
2022-09-27 13:34       ` Guillaume Ranquet
2022-09-27 13:34       ` Guillaume Ranquet
2022-09-27 13:34       ` Guillaume Ranquet
2022-09-28 13:09       ` AngeloGioacchino Del Regno
2022-09-28 13:09         ` AngeloGioacchino Del Regno
2022-09-28 13:09         ` AngeloGioacchino Del Regno
2022-09-28 13:09         ` AngeloGioacchino Del Regno
2022-09-22  7:22   ` Krzysztof Kozlowski
2022-09-22  7:22     ` Krzysztof Kozlowski
2022-09-22  7:22     ` Krzysztof Kozlowski
2022-09-22  7:22     ` Krzysztof Kozlowski
2022-09-27 13:38     ` Guillaume Ranquet
2022-09-27 13:38       ` Guillaume Ranquet
2022-09-27 13:38       ` Guillaume Ranquet
2022-09-27 13:38       ` Guillaume Ranquet
2022-09-19 16:56 ` [PATCH v1 17/17] drm/mediatek: Add mt8195-dpi support to drm_drv Guillaume Ranquet
2022-09-19 16:56   ` Guillaume Ranquet
2022-09-19 16:56   ` Guillaume Ranquet
2022-09-19 16:56   ` Guillaume Ranquet
2022-09-22  7:20   ` Krzysztof Kozlowski
2022-09-22  7:20     ` Krzysztof Kozlowski
2022-09-22  7:20     ` Krzysztof Kozlowski
2022-09-22  7:20     ` Krzysztof Kozlowski
2022-09-27 13:04     ` Guillaume Ranquet
2022-09-27 13:04       ` Guillaume Ranquet
2022-09-27 13:04       ` Guillaume Ranquet
2022-09-27 13:04       ` Guillaume Ranquet
2022-09-27 14:28       ` Krzysztof Kozlowski
2022-09-27 14:28         ` Krzysztof Kozlowski
2022-09-27 14:28         ` Krzysztof Kozlowski
2022-09-27 14:28         ` Krzysztof Kozlowski
2022-10-03 15:29         ` Guillaume Ranquet
2022-10-03 15:29           ` Guillaume Ranquet
2022-10-03 15:29           ` Guillaume Ranquet
2022-10-03 15:29           ` Guillaume Ranquet
2022-10-04 10:49           ` Krzysztof Kozlowski
2022-10-04 10:49             ` Krzysztof Kozlowski
2022-10-04 10:49             ` Krzysztof Kozlowski
2022-10-04 10:49             ` Krzysztof Kozlowski
2022-10-04 11:55             ` Guillaume Ranquet
2022-10-04 11:55               ` Guillaume Ranquet
2022-10-04 11:55               ` Guillaume Ranquet
2022-10-04 11:55               ` Guillaume Ranquet
2022-10-04 15:05               ` Krzysztof Kozlowski
2022-10-04 15:05                 ` Krzysztof Kozlowski
2022-10-04 15:05                 ` Krzysztof Kozlowski
2022-10-04 15:05                 ` Krzysztof Kozlowski
2022-10-05  9:34                 ` Guillaume Ranquet
2022-10-05  9:34                   ` Guillaume Ranquet
2022-10-05  9:34                   ` Guillaume Ranquet
2022-10-05  9:34                   ` Guillaume Ranquet
2022-10-05 14:53                   ` Krzysztof Kozlowski
2022-10-05 14:53                     ` Krzysztof Kozlowski
2022-10-05 14:53                     ` Krzysztof Kozlowski
2022-10-05 14:53                     ` Krzysztof Kozlowski

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