From: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org> To: Mathieu Poirier <mathieu.poirier@linaro.org>, Suzuki K Poulose <suzuki.poulose@arm.com>, Mike Leach <mike.leach@linaro.org>, Peter Zijlstra <peterz@infradead.org>, Ingo Molnar <mingo@redhat.com>, Arnaldo Carvalho de Melo <acme@kernel.org>, Mark Rutland <mark.rutland@arm.com>, Alexander Shishkin <alexander.shishkin@linux.intel.com>, Jiri Olsa <jolsa@redhat.com>, Namhyung Kim <namhyung@kernel.org> Cc: coresight@lists.linaro.org, Stephen Boyd <swboyd@chromium.org>, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org> Subject: [PATCHv2 4/4] coresight: tmc-etr: Fix possible NULL ptr dereference in get_perf_etr_buf_cpu_wide() Date: Thu, 22 Oct 2020 16:27:54 +0530 [thread overview] Message-ID: <dd3db103915da0b4420143df95e500cf30d62aaa.1603363729.git.saiprakash.ranjan@codeaurora.org> (raw) In-Reply-To: <cover.1603363729.git.saiprakash.ranjan@codeaurora.org> There was a report of NULL pointer dereference in ETF enable path for perf CS mode with PID monitoring. It is almost 100% reproducible when the process to monitor is something very active such as chrome and with ETF as the sink but the ETR may also be susceptible to this crash. Currently in a bid to find the pid, the owner is dereferenced via task_pid_nr() call in get_perf_etr_buf_cpu_wide() and with owner being NULL and no proper validation of event->owner, we can have a possible NULL pointer dereference, so add a check to validate event->owner before dereferencing it to fix any possible NULL pointer dereference crashes and also check for kernel events. Fixes: 3147da92a8a8 ("coresight: tmc-etr: Allocate and free ETR memory buffers for CPU-wide scenarios") Suggested-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org> --- drivers/hwtracing/coresight/coresight-tmc-etr.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/drivers/hwtracing/coresight/coresight-tmc-etr.c b/drivers/hwtracing/coresight/coresight-tmc-etr.c index 714f9e867e5f..305dfdd5345a 100644 --- a/drivers/hwtracing/coresight/coresight-tmc-etr.c +++ b/drivers/hwtracing/coresight/coresight-tmc-etr.c @@ -1381,6 +1381,10 @@ static void *tmc_alloc_etr_buffer(struct coresight_device *csdev, { struct etr_perf_buffer *etr_perf; struct tmc_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); + struct task_struct *task = READ_ONCE(event->owner); + + if (!task || is_kernel_event(event)) + return NULL; etr_perf = tmc_etr_setup_perf_buf(drvdata, event, nr_pages, pages, snapshot); @@ -1389,7 +1393,7 @@ static void *tmc_alloc_etr_buffer(struct coresight_device *csdev, return NULL; } - etr_perf->pid = task_pid_nr(event->owner); + etr_perf->pid = task_pid_nr(task); etr_perf->snapshot = snapshot; etr_perf->nr_pages = nr_pages; etr_perf->pages = pages; -- QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation
WARNING: multiple messages have this Message-ID (diff)
From: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org> To: Mathieu Poirier <mathieu.poirier@linaro.org>, Suzuki K Poulose <suzuki.poulose@arm.com>, Mike Leach <mike.leach@linaro.org>, Peter Zijlstra <peterz@infradead.org>, Ingo Molnar <mingo@redhat.com>, Arnaldo Carvalho de Melo <acme@kernel.org>, Mark Rutland <mark.rutland@arm.com>, Alexander Shishkin <alexander.shishkin@linux.intel.com>, Jiri Olsa <jolsa@redhat.com>, Namhyung Kim <namhyung@kernel.org> Cc: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>, linux-arm-msm@vger.kernel.org, coresight@lists.linaro.org, linux-kernel@vger.kernel.org, Stephen Boyd <swboyd@chromium.org>, linux-arm-kernel@lists.infradead.org Subject: [PATCHv2 4/4] coresight: tmc-etr: Fix possible NULL ptr dereference in get_perf_etr_buf_cpu_wide() Date: Thu, 22 Oct 2020 16:27:54 +0530 [thread overview] Message-ID: <dd3db103915da0b4420143df95e500cf30d62aaa.1603363729.git.saiprakash.ranjan@codeaurora.org> (raw) In-Reply-To: <cover.1603363729.git.saiprakash.ranjan@codeaurora.org> There was a report of NULL pointer dereference in ETF enable path for perf CS mode with PID monitoring. It is almost 100% reproducible when the process to monitor is something very active such as chrome and with ETF as the sink but the ETR may also be susceptible to this crash. Currently in a bid to find the pid, the owner is dereferenced via task_pid_nr() call in get_perf_etr_buf_cpu_wide() and with owner being NULL and no proper validation of event->owner, we can have a possible NULL pointer dereference, so add a check to validate event->owner before dereferencing it to fix any possible NULL pointer dereference crashes and also check for kernel events. Fixes: 3147da92a8a8 ("coresight: tmc-etr: Allocate and free ETR memory buffers for CPU-wide scenarios") Suggested-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org> --- drivers/hwtracing/coresight/coresight-tmc-etr.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/drivers/hwtracing/coresight/coresight-tmc-etr.c b/drivers/hwtracing/coresight/coresight-tmc-etr.c index 714f9e867e5f..305dfdd5345a 100644 --- a/drivers/hwtracing/coresight/coresight-tmc-etr.c +++ b/drivers/hwtracing/coresight/coresight-tmc-etr.c @@ -1381,6 +1381,10 @@ static void *tmc_alloc_etr_buffer(struct coresight_device *csdev, { struct etr_perf_buffer *etr_perf; struct tmc_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); + struct task_struct *task = READ_ONCE(event->owner); + + if (!task || is_kernel_event(event)) + return NULL; etr_perf = tmc_etr_setup_perf_buf(drvdata, event, nr_pages, pages, snapshot); @@ -1389,7 +1393,7 @@ static void *tmc_alloc_etr_buffer(struct coresight_device *csdev, return NULL; } - etr_perf->pid = task_pid_nr(event->owner); + etr_perf->pid = task_pid_nr(task); etr_perf->snapshot = snapshot; etr_perf->nr_pages = nr_pages; etr_perf->pages = pages; -- QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2020-10-22 10:59 UTC|newest] Thread overview: 63+ messages / expand[flat|nested] mbox.gz Atom feed top 2020-10-22 10:57 [PATCHv2 0/4] coresight: etf/etb10/etr: Fix NULL pointer dereference crashes Sai Prakash Ranjan 2020-10-22 10:57 ` Sai Prakash Ranjan 2020-10-22 10:57 ` [PATCHv2 1/4] perf/core: Export is_kernel_event() Sai Prakash Ranjan 2020-10-22 10:57 ` Sai Prakash Ranjan 2020-10-31 7:35 ` kernel test robot 2020-10-22 10:57 ` [PATCHv2 2/4] coresight: tmc-etf: Fix NULL ptr dereference in tmc_enable_etf_sink_perf() Sai Prakash Ranjan 2020-10-22 10:57 ` Sai Prakash Ranjan 2020-10-22 11:32 ` Peter Zijlstra 2020-10-22 11:32 ` Peter Zijlstra 2020-10-22 12:49 ` Sai Prakash Ranjan 2020-10-22 12:49 ` Sai Prakash Ranjan 2020-10-22 13:34 ` Peter Zijlstra 2020-10-22 13:34 ` Peter Zijlstra 2020-10-22 14:23 ` Sai Prakash Ranjan 2020-10-22 14:23 ` Sai Prakash Ranjan 2020-10-22 13:30 ` Suzuki Poulose 2020-10-22 13:30 ` Suzuki Poulose 2020-10-22 15:06 ` Peter Zijlstra 2020-10-22 15:06 ` Peter Zijlstra 2020-10-22 15:32 ` Suzuki Poulose 2020-10-22 15:32 ` Suzuki Poulose 2020-10-22 21:20 ` Mathieu Poirier 2020-10-22 21:20 ` Mathieu Poirier 2020-10-23 7:39 ` Peter Zijlstra 2020-10-23 7:39 ` Peter Zijlstra 2020-10-23 8:49 ` Suzuki Poulose 2020-10-23 8:49 ` Suzuki Poulose 2020-10-23 9:23 ` Peter Zijlstra 2020-10-23 9:23 ` Peter Zijlstra 2020-10-23 10:49 ` Suzuki Poulose 2020-10-23 10:49 ` Suzuki Poulose 2020-10-23 9:41 ` Peter Zijlstra 2020-10-23 9:41 ` Peter Zijlstra 2020-10-23 10:34 ` Suzuki Poulose 2020-10-23 10:34 ` Suzuki Poulose 2020-10-23 10:54 ` Peter Zijlstra 2020-10-23 10:54 ` Peter Zijlstra 2020-10-23 12:56 ` Suzuki Poulose 2020-10-23 12:56 ` Suzuki Poulose 2020-10-23 13:16 ` Peter Zijlstra 2020-10-23 13:16 ` Peter Zijlstra 2020-10-23 13:29 ` Suzuki Poulose 2020-10-23 13:29 ` Suzuki Poulose 2020-10-23 13:44 ` Peter Zijlstra 2020-10-23 13:44 ` Peter Zijlstra 2020-10-23 20:37 ` Mathieu Poirier 2020-10-23 20:37 ` Mathieu Poirier 2020-10-30 7:59 ` Sai Prakash Ranjan 2020-10-30 7:59 ` Sai Prakash Ranjan 2020-10-30 16:48 ` Mathieu Poirier 2020-10-30 16:48 ` Mathieu Poirier 2020-10-30 17:26 ` Sai Prakash Ranjan 2020-10-30 17:26 ` Sai Prakash Ranjan 2020-11-04 17:03 ` Mathieu Poirier 2020-11-04 17:03 ` Mathieu Poirier 2020-10-22 10:57 ` [PATCHv2 3/4] coresight: etb10: Fix possible NULL ptr dereference in etb_enable_perf() Sai Prakash Ranjan 2020-10-22 10:57 ` Sai Prakash Ranjan 2020-10-22 10:57 ` Sai Prakash Ranjan [this message] 2020-10-22 10:57 ` [PATCHv2 4/4] coresight: tmc-etr: Fix possible NULL ptr dereference in get_perf_etr_buf_cpu_wide() Sai Prakash Ranjan 2020-10-22 11:10 ` [PATCHv2 0/4] coresight: etf/etb10/etr: Fix NULL pointer dereference crashes Sai Prakash Ranjan 2020-10-22 11:10 ` Sai Prakash Ranjan 2020-10-22 11:23 ` Sai Prakash Ranjan 2020-10-22 11:23 ` Sai Prakash Ranjan
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