All of lore.kernel.org
 help / color / mirror / Atom feed
* [U-Boot] [PATCH 00/30] General fixes / cleanup for RISC-V and improvements to qemu-riscv
@ 2018-10-19 22:07 Lukas Auer
  2018-10-19 22:07 ` [U-Boot] [PATCH 01/30] tools: .gitignore: add prelink-riscv Lukas Auer
                   ` (30 more replies)
  0 siblings, 31 replies; 119+ messages in thread
From: Lukas Auer @ 2018-10-19 22:07 UTC (permalink / raw)
  To: u-boot


This patch series includes general fixes and cleanup for RISC-V. It also
adds support for booting Linux on qemu-riscv. At the moment, only
single-core systems are supported. Support for multi-core systems will
be added with a future patch series.

To boot Linux on qemu-riscv, Linux must be compiled into BBL as a
payload. BBL must be included in a FIT image and supplied to QEMU with
the -kernel parameter. Its location in memory is embedded in the device
tree, which QEMU passes to u-boot.
To test this, QEMU and riscv-pk (BBL) must be modified. QEMU is modified
to add support for loading binary files (FIT images in this case) in
addition to ELF files. riscv-pk must be modified to adjust the link
address and to ignore the kernel address from the device tree. A pull
request for QEMU, which implements this, is available at [1]. A modified
version of riscv-pk is available at [2].

[1]: https://github.com/riscv/riscv-qemu/pull/175
[2]: https://github.com/lukasauer/riscv-pk/tree/riscv-u-boot


Lukas Auer (30):
  tools: .gitignore: add prelink-riscv
  riscv: ignore device tree binaries
  dts: riscv: update makefile to also clean the RISC-V dts directory
  riscv: rename CPU_RISCV_32/64 to match architecture names
    ARCH_RV32I/64I
  riscv: select CONFIG_PHYS_64BIT on RV64I systems
  riscv: add Kconfig entries for the C and A ISA extensions
  riscv: set -march and -mabi based on the Kconfig configuration
  riscv: add Kconfig entries for the code model
  riscv: move target selection into separate file
  riscv: enable -fdata-sections
  riscv: fix use of incorrectly sized variables
  riscv: make use of the barrier functions from Linux
  riscv: do not reimplement generic io functions
  riscv: complete the list of exception codes
  riscv: treat undefined exception codes as reserved
  riscv: hang on unhandled exceptions
  riscv: implement the invalidate_icache_* functions
  riscv: invalidate the instruction cache before jumping to Linux
  riscv: fix inconsistent use of spaces and tabs in start.S
  riscv: align mtvec on a 4-byte boundary
  riscv: remove CONFIG_INIT_CRITICAL
  riscv: remove unused labels in start.S
  riscv: do not blindly modify the mstatus CSR
  riscv: save hart ID and device tree passed by prior boot stage
  riscv: qemu: use device tree passed by prior boot stage
  bdinfo: riscv: print fdt_blob address
  riscv: qemu: support booting Linux
  riscv: align bootm implementation with that of other architectures
  dm: core: add missing prototype for ofnode_read_u64
  riscv: qemu: detect and boot the kernel passed by QEMU

 arch/riscv/Kconfig                      |  54 ++--
 arch/riscv/Kconfig.board                |  14 +
 arch/riscv/Makefile                     |  16 ++
 arch/riscv/config.mk                    |   7 +-
 arch/riscv/cpu/cpu.c                    |   6 +
 arch/riscv/cpu/start.S                  | 339 +++++++++++-------------
 arch/riscv/dts/.gitignore               |   1 +
 arch/riscv/include/asm/barrier.h        |  67 +++++
 arch/riscv/include/asm/io.h             |  48 +---
 arch/riscv/include/asm/posix_types.h    |   6 +-
 arch/riscv/include/asm/types.h          |   4 +
 arch/riscv/lib/bootm.c                  |  93 +++++--
 arch/riscv/lib/cache.c                  |  10 +
 arch/riscv/lib/interrupts.c             |  31 ++-
 arch/riscv/lib/setjmp.S                 |   2 +-
 board/emulation/qemu-riscv/Kconfig      |   1 +
 board/emulation/qemu-riscv/qemu-riscv.c |  35 ++-
 cmd/bdinfo.c                            |   2 +
 configs/ax25-ae350_defconfig            |   2 +-
 configs/qemu-riscv32_defconfig          |   4 +-
 configs/qemu-riscv64_defconfig          |   6 +-
 dts/Makefile                            |   2 +-
 include/config_distro_bootcmd.h         |   8 +-
 include/configs/qemu-riscv.h            |  13 +
 include/dm/ofnode.h                     |  10 +
 tools/.gitignore                        |   1 +
 26 files changed, 494 insertions(+), 288 deletions(-)
 create mode 100644 arch/riscv/Kconfig.board
 create mode 100644 arch/riscv/dts/.gitignore
 create mode 100644 arch/riscv/include/asm/barrier.h

-- 
2.17.2

^ permalink raw reply	[flat|nested] 119+ messages in thread

end of thread, other threads:[~2018-11-03 17:19 UTC | newest]

Thread overview: 119+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2018-10-19 22:07 [U-Boot] [PATCH 00/30] General fixes / cleanup for RISC-V and improvements to qemu-riscv Lukas Auer
2018-10-19 22:07 ` [U-Boot] [PATCH 01/30] tools: .gitignore: add prelink-riscv Lukas Auer
2018-10-22  6:22   ` Bin Meng
     [not found]   ` <752D002CFF5D0F4FA35C0100F1D73F3FA3A37BF6@ATCPCS16.andestech.com>
2018-10-23  1:21     ` [U-Boot] FW: " Rick Chen
2018-10-19 22:07 ` [U-Boot] [PATCH 02/30] riscv: ignore device tree binaries Lukas Auer
2018-10-22  6:16   ` Bin Meng
     [not found]     ` <752D002CFF5D0F4FA35C0100F1D73F3FA3A37942@ATCPCS16.andestech.com>
2018-10-23  1:30       ` [U-Boot] FW: " Rick Chen
2018-10-24 14:17         ` Auer, Lukas
2018-10-19 22:07 ` [U-Boot] [PATCH 03/30] dts: riscv: update makefile to also clean the RISC-V dts directory Lukas Auer
2018-10-22  6:23   ` Bin Meng
     [not found]   ` <752D002CFF5D0F4FA35C0100F1D73F3FA3A37C3F@ATCPCS16.andestech.com>
2018-10-23  1:28     ` [U-Boot] FW: " Rick Chen
2018-10-19 22:07 ` [U-Boot] [PATCH 04/30] riscv: rename CPU_RISCV_32/64 to match architecture names ARCH_RV32I/64I Lukas Auer
2018-10-22  6:23   ` Bin Meng
     [not found]     ` <752D002CFF5D0F4FA35C0100F1D73F3FA3A37C6E@ATCPCS16.andestech.com>
     [not found]       ` <CAN5B=eJZp5afSyKRn0=uKz8bkm5cNBq41-JnLLkpn8kwDaf=9A@mail.gmail.com>
2018-10-23  1:46         ` Rick Chen
2018-10-24 14:19     ` Auer, Lukas
2018-10-19 22:07 ` [U-Boot] [PATCH 05/30] riscv: select CONFIG_PHYS_64BIT on RV64I systems Lukas Auer
2018-10-22  6:23   ` Bin Meng
     [not found]     ` <752D002CFF5D0F4FA35C0100F1D73F3FA3A37C8D@ATCPCS16.andestech.com>
2018-10-23  1:50       ` Rick Chen
2018-10-19 22:07 ` [U-Boot] [PATCH 06/30] riscv: add Kconfig entries for the C and A ISA extensions Lukas Auer
2018-10-22  7:21   ` Bin Meng
2018-10-24 15:21     ` Auer, Lukas
2018-10-24 15:32       ` Bin Meng
2018-10-24 15:41         ` Auer, Lukas
2018-10-25  2:12           ` Bin Meng
2018-10-19 22:07 ` [U-Boot] [PATCH 07/30] riscv: set -march and -mabi based on the Kconfig configuration Lukas Auer
2018-10-22  7:21   ` Bin Meng
2018-10-24 15:57     ` Auer, Lukas
2018-10-25  1:56       ` Bin Meng
2018-10-19 22:07 ` [U-Boot] [PATCH 08/30] riscv: add Kconfig entries for the code model Lukas Auer
2018-10-22  7:21   ` Bin Meng
2018-10-19 22:07 ` [U-Boot] [PATCH 09/30] riscv: move target selection into separate file Lukas Auer
2018-10-22  7:22   ` Bin Meng
     [not found]     ` <752D002CFF5D0F4FA35C0100F1D73F3FA3A37D41@ATCPCS16.andestech.com>
2018-10-23  2:48       ` Rick Chen
2018-10-25  2:50         ` Bin Meng
2018-10-25 11:37           ` Auer, Lukas
2018-10-25 11:39     ` Auer, Lukas
2018-10-25 13:32       ` Bin Meng
2018-10-19 22:07 ` [U-Boot] [PATCH 10/30] riscv: enable -fdata-sections Lukas Auer
2018-10-22  7:22   ` Bin Meng
     [not found]     ` <752D002CFF5D0F4FA35C0100F1D73F3FA3A37CD1@ATCPCS16.andestech.com>
2018-10-23  2:20       ` Rick Chen
2018-10-19 22:07 ` [U-Boot] [PATCH 11/30] riscv: fix use of incorrectly sized variables Lukas Auer
2018-10-22  7:36   ` Bin Meng
     [not found]     ` <752D002CFF5D0F4FA35C0100F1D73F3FA3A37E20@ATCPCS16.andestech.com>
2018-10-23  5:52       ` Rick Chen
2018-10-25 11:47         ` Auer, Lukas
2018-10-19 22:07 ` [U-Boot] [PATCH 12/30] riscv: make use of the barrier functions from Linux Lukas Auer
2018-10-22  7:36   ` Bin Meng
     [not found]     ` <752D002CFF5D0F4FA35C0100F1D73F3FA3A37E79@ATCPCS16.andestech.com>
2018-10-23  6:12       ` Rick Chen
2018-10-25 12:39     ` Auer, Lukas
2018-10-19 22:07 ` [U-Boot] [PATCH 13/30] riscv: do not reimplement generic io functions Lukas Auer
2018-10-22  7:36   ` Bin Meng
     [not found]     ` <752D002CFF5D0F4FA35C0100F1D73F3FA3A37E95@ATCPCS16.andestech.com>
2018-10-23  6:18       ` Rick Chen
2018-10-25 12:42     ` Auer, Lukas
2018-10-19 22:07 ` [U-Boot] [PATCH 14/30] riscv: complete the list of exception codes Lukas Auer
2018-10-22  7:36   ` Bin Meng
     [not found]     ` <752D002CFF5D0F4FA35C0100F1D73F3FA3A37EAD@ATCPCS16.andestech.com>
2018-10-23  6:22       ` Rick Chen
2018-10-19 22:07 ` [U-Boot] [PATCH 15/30] riscv: treat undefined exception codes as reserved Lukas Auer
2018-10-22  7:36   ` Bin Meng
     [not found]     ` <752D002CFF5D0F4FA35C0100F1D73F3FA3A37EC2@ATCPCS16.andestech.com>
2018-10-23  6:26       ` Rick Chen
2018-10-19 22:07 ` [U-Boot] [PATCH 16/30] riscv: hang on unhandled exceptions Lukas Auer
2018-10-22  7:46   ` Bin Meng
     [not found]     ` <752D002CFF5D0F4FA35C0100F1D73F3FA3A37ED4@ATCPCS16.andestech.com>
2018-10-23  6:28       ` Rick Chen
2018-10-19 22:07 ` [U-Boot] [PATCH 17/30] riscv: implement the invalidate_icache_* functions Lukas Auer
2018-10-22  7:47   ` Bin Meng
     [not found]     ` <752D002CFF5D0F4FA35C0100F1D73F3FA3A37EEE@ATCPCS16.andestech.com>
2018-10-23  6:34       ` Rick Chen
2018-10-19 22:07 ` [U-Boot] [PATCH 18/30] riscv: invalidate the instruction cache before jumping to Linux Lukas Auer
     [not found]   ` <752D002CFF5D0F4FA35C0100F1D73F3FA3A3568B@ATCPCS16.andestech.com>
2018-10-22  1:39     ` [U-Boot] FW: " Rick Chen
2018-10-26 16:27       ` Auer, Lukas
2018-10-29  2:25         ` Rick Chen
2018-10-31  3:48           ` Greentime Hu
2018-10-31  4:22             ` Rick Chen
2018-11-03 17:19               ` Auer, Lukas
2018-10-19 22:07 ` [U-Boot] [PATCH 19/30] riscv: fix inconsistent use of spaces and tabs in start.S Lukas Auer
2018-10-22  7:47   ` Bin Meng
     [not found]     ` <752D002CFF5D0F4FA35C0100F1D73F3FA3A37F52@ATCPCS16.andestech.com>
2018-10-23  6:58       ` Rick Chen
2018-10-19 22:07 ` [U-Boot] [PATCH 20/30] riscv: align mtvec on a 4-byte boundary Lukas Auer
2018-10-22  7:47   ` Bin Meng
     [not found]     ` <752D002CFF5D0F4FA35C0100F1D73F3FA3A380C6@ATCPCS16.andestech.com>
2018-10-23  9:17       ` Rick Chen
2018-10-23  9:25         ` Bin Meng
2018-10-19 22:07 ` [U-Boot] [PATCH 21/30] riscv: remove CONFIG_INIT_CRITICAL Lukas Auer
2018-10-22  9:19   ` Bin Meng
2018-10-25  2:57     ` Bin Meng
2018-10-25 15:48       ` Auer, Lukas
2018-10-19 22:07 ` [U-Boot] [PATCH 22/30] riscv: remove unused labels in start.S Lukas Auer
2018-10-22  9:19   ` Bin Meng
     [not found]     ` <752D002CFF5D0F4FA35C0100F1D73F3FA3A38CF1@ATCPCS16.andestech.com>
2018-10-24  2:38       ` Rick Chen
2018-10-24  3:34         ` Bin Meng
2018-10-24  5:20           ` Rick Chen
2018-10-24  5:47             ` Rick Chen
2018-10-24 14:13               ` Auer, Lukas
2018-10-25  1:16                 ` Rick Chen
2018-10-25 15:56                   ` Auer, Lukas
2018-10-29 16:43                     ` Auer, Lukas
2018-10-30  1:49                       ` Rick Chen
2018-10-30 12:51                         ` Auer, Lukas
2018-10-19 22:07 ` [U-Boot] [PATCH 23/30] riscv: do not blindly modify the mstatus CSR Lukas Auer
2018-10-22  9:19   ` Bin Meng
     [not found]     ` <752D002CFF5D0F4FA35C0100F1D73F3FA3A38DCB@ATCPCS16.andestech.com>
2018-10-24  5:51       ` Rick Chen
2018-10-19 22:07 ` [U-Boot] [PATCH 24/30] riscv: save hart ID and device tree passed by prior boot stage Lukas Auer
2018-10-22  9:19   ` Bin Meng
     [not found]     ` <752D002CFF5D0F4FA35C0100F1D73F3FA3A38DE5@ATCPCS16.andestech.com>
2018-10-24  5:56       ` Rick Chen
2018-10-19 22:07 ` [U-Boot] [PATCH 25/30] riscv: qemu: use " Lukas Auer
2018-10-22  9:19   ` Bin Meng
     [not found]     ` <752D002CFF5D0F4FA35C0100F1D73F3FA3A38E02@ATCPCS16.andestech.com>
2018-10-24  6:05       ` Rick Chen
2018-10-19 22:07 ` [U-Boot] [PATCH 26/30] bdinfo: riscv: print fdt_blob address Lukas Auer
2018-10-22  9:35   ` Bin Meng
     [not found]     ` <752D002CFF5D0F4FA35C0100F1D73F3FA3A38E43@ATCPCS16.andestech.com>
2018-10-24  6:54       ` Rick Chen
2018-10-26 13:36         ` Auer, Lukas
2018-10-19 22:07 ` [U-Boot] [PATCH 27/30] riscv: qemu: support booting Linux Lukas Auer
2018-10-22  9:35   ` Bin Meng
2018-10-19 22:07 ` [U-Boot] [PATCH 28/30] riscv: align bootm implementation with that of other architectures Lukas Auer
2018-10-22  9:35   ` Bin Meng
2018-10-19 22:07 ` [U-Boot] [PATCH 29/30] dm: core: add missing prototype for ofnode_read_u64 Lukas Auer
2018-10-22  9:35   ` Bin Meng
2018-10-25 16:09     ` Auer, Lukas
2018-10-19 22:07 ` [U-Boot] [PATCH 30/30] riscv: qemu: detect and boot the kernel passed by QEMU Lukas Auer
2018-10-22  9:35   ` Bin Meng
2018-10-22  9:37 ` [U-Boot] [PATCH 00/30] General fixes / cleanup for RISC-V and improvements to qemu-riscv Bin Meng
2018-10-26 13:20   ` Bin Meng
2018-10-26 13:40     ` Auer, Lukas

This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.