* [PATCH v2 linux dev-5.3 0/5] ARM: dts: aspeed-g6 lpc, rainier
@ 2019-09-19 15:23 Brad Bishop
2019-09-19 15:23 ` [PATCH v2 linux dev-5.3 1/4] dt-bindings: lpc: add aspeed-g6 compatible strings Brad Bishop
` (9 more replies)
0 siblings, 10 replies; 24+ messages in thread
From: Brad Bishop @ 2019-09-19 15:23 UTC (permalink / raw)
To: joel; +Cc: openbmc
> This is a quick attempt at wiring up some of the LPC bits on the
> AST2600, and then using it on a new board, Rainier, a new POWER system
> with an AST2600. The only verification performed was ensuring the
> kernel still booted and the ibt device probed using the Rainier device
> tree atop the ast2600-evb qemu model. Please review.
Changes since v1:
- split DT binding docs and driver changes into separate patches.
- reordered rainier DT elements (alphabetized).
- added rainier rtc, lpc-ctl, reserved memory, mac devices
Brad Bishop (4):
dt-bindings: lpc: add aspeed-g6 compatible strings
ARM: aspeed-g6: lpc: add compatible strings
ARM: dts: aspeed-g6: Add lpc devices
ARM: dts: aspeed: add Rainier system
.../bindings/ipmi/aspeed,ast2400-ibt-bmc.txt | 3 +-
.../devicetree/bindings/mfd/aspeed-lpc.txt | 8 +-
arch/arm/boot/dts/Makefile | 3 +-
arch/arm/boot/dts/aspeed-bmc-opp-rainier.dts | 485 ++++++++++++++++++
arch/arm/boot/dts/aspeed-g6.dtsi | 91 ++++
drivers/char/ipmi/bt-bmc.c | 1 +
drivers/char/ipmi/kcs_bmc_aspeed.c | 1 +
drivers/reset/reset-simple.c | 1 +
drivers/soc/aspeed/aspeed-lpc-ctrl.c | 1 +
drivers/soc/aspeed/aspeed-lpc-snoop.c | 2 +
10 files changed, 593 insertions(+), 3 deletions(-)
create mode 100644 arch/arm/boot/dts/aspeed-bmc-opp-rainier.dts
--
2.21.0
^ permalink raw reply [flat|nested] 24+ messages in thread
* [PATCH v2 linux dev-5.3 1/4] dt-bindings: lpc: add aspeed-g6 compatible strings
2019-09-19 15:23 [PATCH v2 linux dev-5.3 0/5] ARM: dts: aspeed-g6 lpc, rainier Brad Bishop
@ 2019-09-19 15:23 ` Brad Bishop
2019-09-19 15:23 ` [PATCH v2 linux dev-5.3 2/4] ARM: aspeed-g6: lpc: add " Brad Bishop
` (8 subsequent siblings)
9 siblings, 0 replies; 24+ messages in thread
From: Brad Bishop @ 2019-09-19 15:23 UTC (permalink / raw)
To: joel; +Cc: openbmc
Assume The AST2600 SoCs contain the same LPC devices as the AST2500.
Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com>
---
.../devicetree/bindings/ipmi/aspeed,ast2400-ibt-bmc.txt | 3 ++-
Documentation/devicetree/bindings/mfd/aspeed-lpc.txt | 8 +++++++-
2 files changed, 9 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/ipmi/aspeed,ast2400-ibt-bmc.txt b/Documentation/devicetree/bindings/ipmi/aspeed,ast2400-ibt-bmc.txt
index 028268fd99ee..4b43b7829bd9 100644
--- a/Documentation/devicetree/bindings/ipmi/aspeed,ast2400-ibt-bmc.txt
+++ b/Documentation/devicetree/bindings/ipmi/aspeed,ast2400-ibt-bmc.txt
@@ -1,6 +1,6 @@
* Aspeed BT (Block Transfer) IPMI interface
-The Aspeed SOCs (AST2400 and AST2500) are commonly used as BMCs
+The Aspeed SOCs (AST2400, AST2500 and AST2600) are commonly used as BMCs
(BaseBoard Management Controllers) and the BT interface can be used to
perform in-band IPMI communication with their host.
@@ -9,6 +9,7 @@ Required properties:
- compatible : should be one of
"aspeed,ast2400-ibt-bmc"
"aspeed,ast2500-ibt-bmc"
+ "aspeed,ast2600-ibt-bmc"
- reg: physical address and size of the registers
Optional properties:
diff --git a/Documentation/devicetree/bindings/mfd/aspeed-lpc.txt b/Documentation/devicetree/bindings/mfd/aspeed-lpc.txt
index 86446074e206..e1197bab57bb 100644
--- a/Documentation/devicetree/bindings/mfd/aspeed-lpc.txt
+++ b/Documentation/devicetree/bindings/mfd/aspeed-lpc.txt
@@ -46,6 +46,7 @@ Required properties
- compatible: One of:
"aspeed,ast2400-lpc", "simple-mfd"
"aspeed,ast2500-lpc", "simple-mfd"
+ "aspeed,ast2600-lpc", "simple-mfd"
- reg: contains the physical address and length values of the Aspeed
LPC memory region.
@@ -64,6 +65,7 @@ BMC Node
- compatible: One of:
"aspeed,ast2400-lpc-bmc"
"aspeed,ast2500-lpc-bmc"
+ "aspeed,ast2600-lpc-bmc"
- reg: contains the physical address and length values of the
H8S/2168-compatible LPC controller memory region
@@ -74,6 +76,7 @@ Host Node
- compatible: One of:
"aspeed,ast2400-lpc-host", "simple-mfd", "syscon"
"aspeed,ast2500-lpc-host", "simple-mfd", "syscon"
+ "aspeed,ast2600-lpc-host", "simple-mfd", "syscon"
- reg: contains the address and length values of the host-related
register space for the Aspeed LPC controller
@@ -128,6 +131,7 @@ Required properties:
- compatible: One of:
"aspeed,ast2400-lpc-ctrl";
"aspeed,ast2500-lpc-ctrl";
+ "aspeed,ast2600-lpc-ctrl";
- reg: contains offset/length values of the host interface controller
memory regions
@@ -168,6 +172,7 @@ Required properties:
- compatible: One of:
"aspeed,ast2400-lhc";
"aspeed,ast2500-lhc";
+ "aspeed,ast2600-lhc";
- reg: contains offset/length values of the LHC memory regions. In the
AST2400 and AST2500 there are two regions.
@@ -187,7 +192,8 @@ state of the LPC bus. Some systems may chose to modify this configuration.
Required properties:
- - compatible: "aspeed,ast2500-lpc-reset" or
+ - compatible: "aspeed,ast2600-lpc-reset" or
+ "aspeed,ast2500-lpc-reset"
"aspeed,ast2400-lpc-reset"
- reg: offset and length of the IP in the LHC memory region
- #reset-controller indicates the number of reset cells expected
--
2.21.0
^ permalink raw reply related [flat|nested] 24+ messages in thread
* [PATCH v2 linux dev-5.3 2/4] ARM: aspeed-g6: lpc: add compatible strings
2019-09-19 15:23 [PATCH v2 linux dev-5.3 0/5] ARM: dts: aspeed-g6 lpc, rainier Brad Bishop
2019-09-19 15:23 ` [PATCH v2 linux dev-5.3 1/4] dt-bindings: lpc: add aspeed-g6 compatible strings Brad Bishop
@ 2019-09-19 15:23 ` Brad Bishop
2019-09-20 6:31 ` Andrew Jeffery
2019-09-19 15:23 ` [PATCH v2 linux dev-5.3 3/4] ARM: dts: aspeed-g6: Add lpc devices Brad Bishop
` (7 subsequent siblings)
9 siblings, 1 reply; 24+ messages in thread
From: Brad Bishop @ 2019-09-19 15:23 UTC (permalink / raw)
To: joel; +Cc: openbmc
Assume the AST2600 SoC contains the same LPC devices as the AST2500.
Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com>
---
v2:
- removed DT binding documentation changes
---
drivers/char/ipmi/bt-bmc.c | 1 +
drivers/char/ipmi/kcs_bmc_aspeed.c | 1 +
drivers/reset/reset-simple.c | 1 +
drivers/soc/aspeed/aspeed-lpc-ctrl.c | 1 +
drivers/soc/aspeed/aspeed-lpc-snoop.c | 2 ++
5 files changed, 6 insertions(+)
diff --git a/drivers/char/ipmi/bt-bmc.c b/drivers/char/ipmi/bt-bmc.c
index 40b9927c072c..0e600449931b 100644
--- a/drivers/char/ipmi/bt-bmc.c
+++ b/drivers/char/ipmi/bt-bmc.c
@@ -513,6 +513,7 @@ static int bt_bmc_remove(struct platform_device *pdev)
static const struct of_device_id bt_bmc_match[] = {
{ .compatible = "aspeed,ast2400-ibt-bmc" },
{ .compatible = "aspeed,ast2500-ibt-bmc" },
+ { .compatible = "aspeed,ast2600-ibt-bmc" },
{ },
};
diff --git a/drivers/char/ipmi/kcs_bmc_aspeed.c b/drivers/char/ipmi/kcs_bmc_aspeed.c
index 3c955946e647..a0a8bb89c9b3 100644
--- a/drivers/char/ipmi/kcs_bmc_aspeed.c
+++ b/drivers/char/ipmi/kcs_bmc_aspeed.c
@@ -301,6 +301,7 @@ static int aspeed_kcs_remove(struct platform_device *pdev)
static const struct of_device_id ast_kcs_bmc_match[] = {
{ .compatible = "aspeed,ast2400-kcs-bmc" },
{ .compatible = "aspeed,ast2500-kcs-bmc" },
+ { .compatible = "aspeed,ast2600-kcs-bmc" },
{ }
};
MODULE_DEVICE_TABLE(of, ast_kcs_bmc_match);
diff --git a/drivers/reset/reset-simple.c b/drivers/reset/reset-simple.c
index 1154f7b1f4dd..2fe9c889a75a 100644
--- a/drivers/reset/reset-simple.c
+++ b/drivers/reset/reset-simple.c
@@ -125,6 +125,7 @@ static const struct of_device_id reset_simple_dt_ids[] = {
.data = &reset_simple_active_low },
{ .compatible = "aspeed,ast2400-lpc-reset" },
{ .compatible = "aspeed,ast2500-lpc-reset" },
+ { .compatible = "aspeed,ast2600-lpc-reset" },
{ .compatible = "bitmain,bm1880-reset",
.data = &reset_simple_active_low },
{ /* sentinel */ },
diff --git a/drivers/soc/aspeed/aspeed-lpc-ctrl.c b/drivers/soc/aspeed/aspeed-lpc-ctrl.c
index 01ed21e8bfee..12e4421dee37 100644
--- a/drivers/soc/aspeed/aspeed-lpc-ctrl.c
+++ b/drivers/soc/aspeed/aspeed-lpc-ctrl.c
@@ -291,6 +291,7 @@ static int aspeed_lpc_ctrl_remove(struct platform_device *pdev)
static const struct of_device_id aspeed_lpc_ctrl_match[] = {
{ .compatible = "aspeed,ast2400-lpc-ctrl" },
{ .compatible = "aspeed,ast2500-lpc-ctrl" },
+ { .compatible = "aspeed,ast2600-lpc-ctrl" },
{ },
};
diff --git a/drivers/soc/aspeed/aspeed-lpc-snoop.c b/drivers/soc/aspeed/aspeed-lpc-snoop.c
index 48f7ac238861..c7b4ac066b40 100644
--- a/drivers/soc/aspeed/aspeed-lpc-snoop.c
+++ b/drivers/soc/aspeed/aspeed-lpc-snoop.c
@@ -325,6 +325,8 @@ static const struct of_device_id aspeed_lpc_snoop_match[] = {
.data = &ast2400_model_data },
{ .compatible = "aspeed,ast2500-lpc-snoop",
.data = &ast2500_model_data },
+ { .compatible = "aspeed,ast2600-lpc-snoop",
+ .data = &ast2500_model_data },
{ },
};
--
2.21.0
^ permalink raw reply related [flat|nested] 24+ messages in thread
* [PATCH v2 linux dev-5.3 3/4] ARM: dts: aspeed-g6: Add lpc devices
2019-09-19 15:23 [PATCH v2 linux dev-5.3 0/5] ARM: dts: aspeed-g6 lpc, rainier Brad Bishop
2019-09-19 15:23 ` [PATCH v2 linux dev-5.3 1/4] dt-bindings: lpc: add aspeed-g6 compatible strings Brad Bishop
2019-09-19 15:23 ` [PATCH v2 linux dev-5.3 2/4] ARM: aspeed-g6: lpc: add " Brad Bishop
@ 2019-09-19 15:23 ` Brad Bishop
2019-09-20 6:37 ` Andrew Jeffery
2019-09-19 15:23 ` [PATCH v2 linux dev-5.3 4/4] ARM: dts: aspeed: add Rainier system Brad Bishop
` (6 subsequent siblings)
9 siblings, 1 reply; 24+ messages in thread
From: Brad Bishop @ 2019-09-19 15:23 UTC (permalink / raw)
To: joel; +Cc: openbmc
Assume everything is the same as G5, except the interrupt is updated.
Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com>
---
arch/arm/boot/dts/aspeed-g6.dtsi | 91 ++++++++++++++++++++++++++++++++
1 file changed, 91 insertions(+)
diff --git a/arch/arm/boot/dts/aspeed-g6.dtsi b/arch/arm/boot/dts/aspeed-g6.dtsi
index 72038c16f541..b4991cbe1f36 100644
--- a/arch/arm/boot/dts/aspeed-g6.dtsi
+++ b/arch/arm/boot/dts/aspeed-g6.dtsi
@@ -249,6 +249,97 @@
status = "disabled";
};
+ lpc: lpc@1e789000 {
+ compatible = "aspeed,ast2600-lpc", "simple-mfd";
+ reg = <0x1e789000 0x1000>;
+
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x1e789000 0x1000>;
+
+ lpc_bmc: lpc-bmc@0 {
+ compatible = "aspeed,ast2600-lpc-bmc", "simple-mfd", "syscon";
+ reg = <0x0 0x80>;
+ reg-io-width = <4>;
+
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x0 0x80>;
+
+ kcs1: kcs1@0 {
+ compatible = "aspeed,ast2600-kcs-bmc";
+ interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
+ kcs_chan = <1>;
+ status = "disabled";
+ };
+ kcs2: kcs2@0 {
+ compatible = "aspeed,ast2600-kcs-bmc";
+ interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
+ kcs_chan = <2>;
+ status = "disabled";
+ };
+ kcs3: kcs3@0 {
+ compatible = "aspeed,ast2600-kcs-bmc";
+ interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
+ kcs_chan = <3>;
+ status = "disabled";
+ };
+ };
+
+ lpc_host: lpc-host@80 {
+ compatible = "aspeed,ast2600-lpc-host", "simple-mfd", "syscon";
+ reg = <0x80 0x1e0>;
+ reg-io-width = <4>;
+
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x80 0x1e0>;
+
+ kcs4: kcs4@0 {
+ compatible = "aspeed,ast2600-kcs-bmc";
+ interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
+ kcs_chan = <4>;
+ status = "disabled";
+ };
+
+ lpc_ctrl: lpc-ctrl@0 {
+ compatible = "aspeed,ast2600-lpc-ctrl";
+ reg = <0x0 0x80>;
+ clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
+ status = "disabled";
+ };
+
+ lpc_snoop: lpc-snoop@0 {
+ compatible = "aspeed,ast2600-lpc-snoop";
+ reg = <0x0 0x80>;
+ interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ };
+
+ lhc: lhc@20 {
+ compatible = "aspeed,ast2600-lhc";
+ reg = <0x20 0x24 0x48 0x8>;
+ };
+
+ lpc_reset: reset-controller@18 {
+ compatible = "aspeed,ast2600-lpc-reset";
+ reg = <0x18 0x4>;
+ #reset-cells = <1>;
+ };
+
+ ibt: ibt@c0 {
+ compatible = "aspeed,ast2600-ibt-bmc";
+ reg = <0xc0 0x18>;
+ interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ };
+
+ sio_regs: regs {
+ compatible = "aspeed,bmc-misc";
+ };
+ };
+ };
+
sdc: sdc@1e740000 {
compatible = "aspeed,ast2600-sd-controller";
reg = <0x1e740000 0x100>;
--
2.21.0
^ permalink raw reply related [flat|nested] 24+ messages in thread
* [PATCH v2 linux dev-5.3 4/4] ARM: dts: aspeed: add Rainier system
2019-09-19 15:23 [PATCH v2 linux dev-5.3 0/5] ARM: dts: aspeed-g6 lpc, rainier Brad Bishop
` (2 preceding siblings ...)
2019-09-19 15:23 ` [PATCH v2 linux dev-5.3 3/4] ARM: dts: aspeed-g6: Add lpc devices Brad Bishop
@ 2019-09-19 15:23 ` Brad Bishop
2019-09-20 7:25 ` Andrew Jeffery
2019-09-19 15:23 ` [PATCH v2 linux dev-5.3 0/5] ARM: dts: aspeed-g6 lpc, rainier Brad Bishop
` (5 subsequent siblings)
9 siblings, 1 reply; 24+ messages in thread
From: Brad Bishop @ 2019-09-19 15:23 UTC (permalink / raw)
To: joel; +Cc: openbmc
Rainier is a new Power system with an AST2600.
Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com>
---
v2:
- reordered rainier DT elements (alphabetized).
- added rainier rtc, lpc-ctl, reserved memory, mac devices
---
arch/arm/boot/dts/Makefile | 3 +-
arch/arm/boot/dts/aspeed-bmc-opp-rainier.dts | 485 +++++++++++++++++++
2 files changed, 487 insertions(+), 1 deletion(-)
create mode 100644 arch/arm/boot/dts/aspeed-bmc-opp-rainier.dts
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 5af075c2f819..2f81a4be50a8 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -1293,4 +1293,5 @@ dtb-$(CONFIG_ARCH_ASPEED) += \
aspeed-bmc-opp-witherspoon.dtb \
aspeed-bmc-opp-zaius.dtb \
aspeed-bmc-portwell-neptune.dtb \
- aspeed-bmc-quanta-q71l.dtb
+ aspeed-bmc-quanta-q71l.dtb \
+ aspeed-bmc-opp-rainier.dtb
diff --git a/arch/arm/boot/dts/aspeed-bmc-opp-rainier.dts b/arch/arm/boot/dts/aspeed-bmc-opp-rainier.dts
new file mode 100644
index 000000000000..5f45b1effe4a
--- /dev/null
+++ b/arch/arm/boot/dts/aspeed-bmc-opp-rainier.dts
@@ -0,0 +1,485 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+// Copyright 2019 IBM Corp.
+/dts-v1/;
+
+#include "aspeed-g6.dtsi"
+
+/ {
+ model = "Rainier";
+ compatible = "ibm,rainier-bmc", "aspeed,ast2600";
+
+ aliases {
+ serial4 = &uart5;
+ };
+
+ chosen {
+ stdout-path = &uart5;
+ bootargs = "console=ttyS4,115200n8";
+ };
+
+ memory@80000000 {
+ device_type = "memory";
+ reg = <0x80000000 0x80000000>;
+ };
+
+ reserved-memory {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ flash_memory: region@98000000 {
+ no-map;
+ reg = <0x98000000 0x04000000>; /* 64M */
+ };
+ };
+
+};
+
+&emmc_controller {
+ status = "okay";
+};
+
+&emmc {
+ status = "okay";
+};
+
+&fsim0 {
+ status = "okay";
+};
+
+&ibt {
+ status = "okay";
+};
+
+&i2c0 {
+ status = "okay";
+};
+
+&i2c1 {
+ status = "okay";
+};
+
+&i2c2 {
+ status = "okay";
+};
+
+&i2c3 {
+ status = "okay";
+
+ power-supply@68 {
+ compatible = "ibm,cffps2";
+ reg = <0x68>;
+ };
+
+ power-supply@69 {
+ compatible = "ibm,cffps2";
+ reg = <0x69>;
+ };
+
+ power-supply@6a {
+ compatible = "ibm,cffps2";
+ reg = <0x6a>;
+ };
+
+ power-supply@6b {
+ compatible = "ibm,cffps2";
+ reg = <0x6b>;
+ };
+};
+
+&i2c4 {
+ status = "okay";
+
+ tmp275@48 {
+ compatible = "ti,tmp275";
+ reg = <0x48>;
+ };
+
+ tmp275@49 {
+ compatible = "ti,tmp275";
+ reg = <0x49>;
+ };
+
+ tmp275@4a {
+ compatible = "ti,tmp275";
+ reg = <0x4a>;
+ };
+};
+
+&i2c5 {
+ status = "okay";
+
+ tmp275@48 {
+ compatible = "ti,tmp275";
+ reg = <0x48>;
+ };
+
+ tmp275@49 {
+ compatible = "ti,tmp275";
+ reg = <0x49>;
+ };
+};
+
+&i2c6 {
+ status = "okay";
+
+ tmp275@48 {
+ compatible = "ti,tmp275";
+ reg = <0x48>;
+ };
+
+ tmp275@4a {
+ compatible = "ti,tmp275";
+ reg = <0x4a>;
+ };
+
+ tmp275@4b {
+ compatible = "ti,tmp275";
+ reg = <0x4b>;
+ };
+};
+
+&i2c7 {
+ status = "okay";
+
+ si7021-a20@20 {
+ compatible = "silabs,si7020";
+ reg = <0x20>;
+ };
+
+ tmp275@48 {
+ compatible = "ti,tmp275";
+ reg = <0x48>;
+ };
+
+ max31785@52 {
+ compatible = "maxim,max31785a";
+ reg = <0x52>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ fan@0 {
+ compatible = "pmbus-fan";
+ reg = <0>;
+ tach-pulses = <2>;
+ maxim,fan-rotor-input = "tach";
+ maxim,fan-pwm-freq = <25000>;
+ maxim,fan-dual-tach;
+ maxim,fan-no-watchdog;
+ maxim,fan-no-fault-ramp;
+ maxim,fan-ramp = <2>;
+ maxim,fan-fault-pin-mon;
+ };
+
+ fan@1 {
+ compatible = "pmbus-fan";
+ reg = <1>;
+ tach-pulses = <2>;
+ maxim,fan-rotor-input = "tach";
+ maxim,fan-pwm-freq = <25000>;
+ maxim,fan-dual-tach;
+ maxim,fan-no-watchdog;
+ maxim,fan-no-fault-ramp;
+ maxim,fan-ramp = <2>;
+ maxim,fan-fault-pin-mon;
+ };
+
+ fan@2 {
+ compatible = "pmbus-fan";
+ reg = <2>;
+ tach-pulses = <2>;
+ maxim,fan-rotor-input = "tach";
+ maxim,fan-pwm-freq = <25000>;
+ maxim,fan-dual-tach;
+ maxim,fan-no-watchdog;
+ maxim,fan-no-fault-ramp;
+ maxim,fan-ramp = <2>;
+ maxim,fan-fault-pin-mon;
+ };
+
+ fan@3 {
+ compatible = "pmbus-fan";
+ reg = <3>;
+ tach-pulses = <2>;
+ maxim,fan-rotor-input = "tach";
+ maxim,fan-pwm-freq = <25000>;
+ maxim,fan-dual-tach;
+ maxim,fan-no-watchdog;
+ maxim,fan-no-fault-ramp;
+ maxim,fan-ramp = <2>;
+ maxim,fan-fault-pin-mon;
+ };
+ };
+
+ pca0: pca9552@60 {
+ compatible = "nxp,pca9552";
+ reg = <0x60>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ gpio@0 {
+ reg = <0>;
+ };
+
+ gpio@1 {
+ reg = <1>;
+ };
+
+ gpio@2 {
+ reg = <2>;
+ };
+
+ gpio@3 {
+ reg = <3>;
+ };
+
+ gpio@4 {
+ reg = <4>;
+ };
+
+ gpio@5 {
+ reg = <5>;
+ };
+
+ gpio@6 {
+ reg = <6>;
+ };
+
+ gpio@7 {
+ reg = <7>;
+ };
+
+ gpio@8 {
+ reg = <8>;
+ };
+
+ gpio@9 {
+ reg = <9>;
+ };
+
+ gpio@10 {
+ reg = <10>;
+ };
+
+ gpio@11 {
+ reg = <11>;
+ };
+
+ gpio@12 {
+ reg = <12>;
+ };
+
+ gpio@13 {
+ reg = <13>;
+ };
+
+ gpio@14 {
+ reg = <14>;
+ };
+
+ gpio@15 {
+ reg = <15>;
+ };
+ };
+
+ dps: dps310@76 {
+ compatible = "infineon,dps310";
+ reg = <0x76>;
+ #io-channel-cells = <0>;
+ };
+};
+
+&i2c8 {
+ status = "okay";
+
+ ucd90320@b {
+ compatible = "ti,ucd90160";
+ reg = <0x0b>;
+ };
+
+ ucd90320@c {
+ compatible = "ti,ucd90160";
+ reg = <0x0c>;
+ };
+
+ ucd90320@11 {
+ compatible = "ti,ucd90160";
+ reg = <0x11>;
+ };
+
+ rtc@32 {
+ compatible = "epson,rx8900";
+ reg = <0x32>;
+ };
+
+ tmp275@48 {
+ compatible = "ti,tmp275";
+ reg = <0x48>;
+ };
+
+ tmp275@4a {
+ compatible = "ti,tmp275";
+ reg = <0x4a>;
+ };
+};
+
+&i2c9 {
+ status = "okay";
+
+ ir35221@42 {
+ compatible = "infineon,ir35221";
+ reg = <0x42>;
+ };
+
+ ir35221@43 {
+ compatible = "infineon,ir35221";
+ reg = <0x43>;
+ };
+
+ ir35221@44 {
+ compatible = "infineon,ir35221";
+ reg = <0x44>;
+ };
+
+ tmp423a@4c {
+ compatible = "ti,tmp423";
+ reg = <0x4c>;
+ };
+
+ tmp423b@4d {
+ compatible = "ti,tmp423";
+ reg = <0x4d>;
+ };
+
+ ir35221@72 {
+ compatible = "infineon,ir35221";
+ reg = <0x72>;
+ };
+
+ ir35221@73 {
+ compatible = "infineon,ir35221";
+ reg = <0x73>;
+ };
+
+ ir35221@74 {
+ compatible = "infineon,ir35221";
+ reg = <0x74>;
+ };
+};
+
+&i2c10 {
+ status = "okay";
+
+ ir35221@42 {
+ compatible = "infineon,ir35221";
+ reg = <0x42>;
+ };
+
+ ir35221@43 {
+ compatible = "infineon,ir35221";
+ reg = <0x43>;
+ };
+
+ ir35221@44 {
+ compatible = "infineon,ir35221";
+ reg = <0x44>;
+ };
+
+ tmp423a@4c {
+ compatible = "ti,tmp423";
+ reg = <0x4c>;
+ };
+
+ tmp423b@4d {
+ compatible = "ti,tmp423";
+ reg = <0x4d>;
+ };
+
+ ir35221@72 {
+ compatible = "infineon,ir35221";
+ reg = <0x72>;
+ };
+
+ ir35221@73 {
+ compatible = "infineon,ir35221";
+ reg = <0x73>;
+ };
+
+ ir35221@74 {
+ compatible = "infineon,ir35221";
+ reg = <0x74>;
+ };
+};
+
+&i2c11 {
+ status = "okay";
+
+ tmp275@48 {
+ compatible = "ti,tmp275";
+ reg = <0x48>;
+ };
+
+ tmp275@49 {
+ compatible = "ti,tmp275";
+ reg = <0x49>;
+ };
+};
+
+&i2c12 {
+ status = "okay";
+};
+
+&i2c13 {
+ status = "okay";
+};
+
+&i2c14 {
+ status = "okay";
+};
+
+&i2c15 {
+ status = "okay";
+};
+
+&lpc_ctrl {
+ status = "okay";
+ memory-region = <&flash_memory>;
+ flash = <&spi1>;
+};
+
+&mac0 {
+ status = "okay";
+};
+
+&mac1 {
+ status = "okay";
+};
+
+&mac2 {
+ status = "okay";
+};
+
+&mac3 {
+ status = "okay";
+};
+
+&sdc {
+ status = "okay";
+};
+
+&sdhci0 {
+ status = "okay";
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_sd1_default>;
+};
+
+&sdhci1 {
+ status = "okay";
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_sd2_default>;
+};
--
2.21.0
^ permalink raw reply related [flat|nested] 24+ messages in thread
* [PATCH v2 linux dev-5.3 0/5] ARM: dts: aspeed-g6 lpc, rainier
2019-09-19 15:23 [PATCH v2 linux dev-5.3 0/5] ARM: dts: aspeed-g6 lpc, rainier Brad Bishop
` (3 preceding siblings ...)
2019-09-19 15:23 ` [PATCH v2 linux dev-5.3 4/4] ARM: dts: aspeed: add Rainier system Brad Bishop
@ 2019-09-19 15:23 ` Brad Bishop
2019-09-19 15:23 ` [PATCH v2 linux dev-5.3 1/4] dt-bindings: lpc: add aspeed-g6 compatible strings Brad Bishop
` (4 subsequent siblings)
9 siblings, 0 replies; 24+ messages in thread
From: Brad Bishop @ 2019-09-19 15:23 UTC (permalink / raw)
To: joel; +Cc: openbmc
> This is a quick attempt at wiring up some of the LPC bits on the
> AST2600, and then using it on a new board, Rainier, a new POWER system
> with an AST2600. The only verification performed was ensuring the
> kernel still booted and the ibt device probed using the Rainier device
> tree atop the ast2600-evb qemu model. Please review.
Changes since v1:
- split DT binding docs and driver changes into separate patches.
- reordered rainier DT elements (alphabetized).
- added rainier rtc, lpc-ctl, reserved memory, mac devices
Brad Bishop (4):
dt-bindings: lpc: add aspeed-g6 compatible strings
ARM: aspeed-g6: lpc: add compatible strings
ARM: dts: aspeed-g6: Add lpc devices
ARM: dts: aspeed: add Rainier system
.../bindings/ipmi/aspeed,ast2400-ibt-bmc.txt | 3 +-
.../devicetree/bindings/mfd/aspeed-lpc.txt | 8 +-
arch/arm/boot/dts/Makefile | 3 +-
arch/arm/boot/dts/aspeed-bmc-opp-rainier.dts | 485 ++++++++++++++++++
arch/arm/boot/dts/aspeed-g6.dtsi | 91 ++++
drivers/char/ipmi/bt-bmc.c | 1 +
drivers/char/ipmi/kcs_bmc_aspeed.c | 1 +
drivers/reset/reset-simple.c | 1 +
drivers/soc/aspeed/aspeed-lpc-ctrl.c | 1 +
drivers/soc/aspeed/aspeed-lpc-snoop.c | 2 +
10 files changed, 593 insertions(+), 3 deletions(-)
create mode 100644 arch/arm/boot/dts/aspeed-bmc-opp-rainier.dts
--
2.21.0
^ permalink raw reply [flat|nested] 24+ messages in thread
* [PATCH v2 linux dev-5.3 1/4] dt-bindings: lpc: add aspeed-g6 compatible strings
2019-09-19 15:23 [PATCH v2 linux dev-5.3 0/5] ARM: dts: aspeed-g6 lpc, rainier Brad Bishop
` (4 preceding siblings ...)
2019-09-19 15:23 ` [PATCH v2 linux dev-5.3 0/5] ARM: dts: aspeed-g6 lpc, rainier Brad Bishop
@ 2019-09-19 15:23 ` Brad Bishop
2019-09-19 16:25 ` Eddie James
2019-09-19 15:23 ` [PATCH v2 linux dev-5.3 2/4] ARM: aspeed-g6: lpc: add " Brad Bishop
` (3 subsequent siblings)
9 siblings, 1 reply; 24+ messages in thread
From: Brad Bishop @ 2019-09-19 15:23 UTC (permalink / raw)
To: joel; +Cc: openbmc
Assume The AST2600 SoCs contain the same LPC devices as the AST2500.
Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com>
---
.../devicetree/bindings/ipmi/aspeed,ast2400-ibt-bmc.txt | 3 ++-
Documentation/devicetree/bindings/mfd/aspeed-lpc.txt | 8 +++++++-
2 files changed, 9 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/ipmi/aspeed,ast2400-ibt-bmc.txt b/Documentation/devicetree/bindings/ipmi/aspeed,ast2400-ibt-bmc.txt
index 028268fd99ee..4b43b7829bd9 100644
--- a/Documentation/devicetree/bindings/ipmi/aspeed,ast2400-ibt-bmc.txt
+++ b/Documentation/devicetree/bindings/ipmi/aspeed,ast2400-ibt-bmc.txt
@@ -1,6 +1,6 @@
* Aspeed BT (Block Transfer) IPMI interface
-The Aspeed SOCs (AST2400 and AST2500) are commonly used as BMCs
+The Aspeed SOCs (AST2400, AST2500 and AST2600) are commonly used as BMCs
(BaseBoard Management Controllers) and the BT interface can be used to
perform in-band IPMI communication with their host.
@@ -9,6 +9,7 @@ Required properties:
- compatible : should be one of
"aspeed,ast2400-ibt-bmc"
"aspeed,ast2500-ibt-bmc"
+ "aspeed,ast2600-ibt-bmc"
- reg: physical address and size of the registers
Optional properties:
diff --git a/Documentation/devicetree/bindings/mfd/aspeed-lpc.txt b/Documentation/devicetree/bindings/mfd/aspeed-lpc.txt
index 86446074e206..e1197bab57bb 100644
--- a/Documentation/devicetree/bindings/mfd/aspeed-lpc.txt
+++ b/Documentation/devicetree/bindings/mfd/aspeed-lpc.txt
@@ -46,6 +46,7 @@ Required properties
- compatible: One of:
"aspeed,ast2400-lpc", "simple-mfd"
"aspeed,ast2500-lpc", "simple-mfd"
+ "aspeed,ast2600-lpc", "simple-mfd"
- reg: contains the physical address and length values of the Aspeed
LPC memory region.
@@ -64,6 +65,7 @@ BMC Node
- compatible: One of:
"aspeed,ast2400-lpc-bmc"
"aspeed,ast2500-lpc-bmc"
+ "aspeed,ast2600-lpc-bmc"
- reg: contains the physical address and length values of the
H8S/2168-compatible LPC controller memory region
@@ -74,6 +76,7 @@ Host Node
- compatible: One of:
"aspeed,ast2400-lpc-host", "simple-mfd", "syscon"
"aspeed,ast2500-lpc-host", "simple-mfd", "syscon"
+ "aspeed,ast2600-lpc-host", "simple-mfd", "syscon"
- reg: contains the address and length values of the host-related
register space for the Aspeed LPC controller
@@ -128,6 +131,7 @@ Required properties:
- compatible: One of:
"aspeed,ast2400-lpc-ctrl";
"aspeed,ast2500-lpc-ctrl";
+ "aspeed,ast2600-lpc-ctrl";
- reg: contains offset/length values of the host interface controller
memory regions
@@ -168,6 +172,7 @@ Required properties:
- compatible: One of:
"aspeed,ast2400-lhc";
"aspeed,ast2500-lhc";
+ "aspeed,ast2600-lhc";
- reg: contains offset/length values of the LHC memory regions. In the
AST2400 and AST2500 there are two regions.
@@ -187,7 +192,8 @@ state of the LPC bus. Some systems may chose to modify this configuration.
Required properties:
- - compatible: "aspeed,ast2500-lpc-reset" or
+ - compatible: "aspeed,ast2600-lpc-reset" or
+ "aspeed,ast2500-lpc-reset"
"aspeed,ast2400-lpc-reset"
- reg: offset and length of the IP in the LHC memory region
- #reset-controller indicates the number of reset cells expected
--
2.21.0
^ permalink raw reply related [flat|nested] 24+ messages in thread
* [PATCH v2 linux dev-5.3 2/4] ARM: aspeed-g6: lpc: add compatible strings
2019-09-19 15:23 [PATCH v2 linux dev-5.3 0/5] ARM: dts: aspeed-g6 lpc, rainier Brad Bishop
` (5 preceding siblings ...)
2019-09-19 15:23 ` [PATCH v2 linux dev-5.3 1/4] dt-bindings: lpc: add aspeed-g6 compatible strings Brad Bishop
@ 2019-09-19 15:23 ` Brad Bishop
2019-09-19 16:26 ` Eddie James
2019-09-19 15:23 ` [PATCH v2 linux dev-5.3 3/4] ARM: dts: aspeed-g6: Add lpc devices Brad Bishop
` (2 subsequent siblings)
9 siblings, 1 reply; 24+ messages in thread
From: Brad Bishop @ 2019-09-19 15:23 UTC (permalink / raw)
To: joel; +Cc: openbmc
Assume the AST2600 SoC contains the same LPC devices as the AST2500.
Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com>
---
v2:
- removed DT binding documentation changes
---
drivers/char/ipmi/bt-bmc.c | 1 +
drivers/char/ipmi/kcs_bmc_aspeed.c | 1 +
drivers/reset/reset-simple.c | 1 +
drivers/soc/aspeed/aspeed-lpc-ctrl.c | 1 +
drivers/soc/aspeed/aspeed-lpc-snoop.c | 2 ++
5 files changed, 6 insertions(+)
diff --git a/drivers/char/ipmi/bt-bmc.c b/drivers/char/ipmi/bt-bmc.c
index 40b9927c072c..0e600449931b 100644
--- a/drivers/char/ipmi/bt-bmc.c
+++ b/drivers/char/ipmi/bt-bmc.c
@@ -513,6 +513,7 @@ static int bt_bmc_remove(struct platform_device *pdev)
static const struct of_device_id bt_bmc_match[] = {
{ .compatible = "aspeed,ast2400-ibt-bmc" },
{ .compatible = "aspeed,ast2500-ibt-bmc" },
+ { .compatible = "aspeed,ast2600-ibt-bmc" },
{ },
};
diff --git a/drivers/char/ipmi/kcs_bmc_aspeed.c b/drivers/char/ipmi/kcs_bmc_aspeed.c
index 3c955946e647..a0a8bb89c9b3 100644
--- a/drivers/char/ipmi/kcs_bmc_aspeed.c
+++ b/drivers/char/ipmi/kcs_bmc_aspeed.c
@@ -301,6 +301,7 @@ static int aspeed_kcs_remove(struct platform_device *pdev)
static const struct of_device_id ast_kcs_bmc_match[] = {
{ .compatible = "aspeed,ast2400-kcs-bmc" },
{ .compatible = "aspeed,ast2500-kcs-bmc" },
+ { .compatible = "aspeed,ast2600-kcs-bmc" },
{ }
};
MODULE_DEVICE_TABLE(of, ast_kcs_bmc_match);
diff --git a/drivers/reset/reset-simple.c b/drivers/reset/reset-simple.c
index 1154f7b1f4dd..2fe9c889a75a 100644
--- a/drivers/reset/reset-simple.c
+++ b/drivers/reset/reset-simple.c
@@ -125,6 +125,7 @@ static const struct of_device_id reset_simple_dt_ids[] = {
.data = &reset_simple_active_low },
{ .compatible = "aspeed,ast2400-lpc-reset" },
{ .compatible = "aspeed,ast2500-lpc-reset" },
+ { .compatible = "aspeed,ast2600-lpc-reset" },
{ .compatible = "bitmain,bm1880-reset",
.data = &reset_simple_active_low },
{ /* sentinel */ },
diff --git a/drivers/soc/aspeed/aspeed-lpc-ctrl.c b/drivers/soc/aspeed/aspeed-lpc-ctrl.c
index 01ed21e8bfee..12e4421dee37 100644
--- a/drivers/soc/aspeed/aspeed-lpc-ctrl.c
+++ b/drivers/soc/aspeed/aspeed-lpc-ctrl.c
@@ -291,6 +291,7 @@ static int aspeed_lpc_ctrl_remove(struct platform_device *pdev)
static const struct of_device_id aspeed_lpc_ctrl_match[] = {
{ .compatible = "aspeed,ast2400-lpc-ctrl" },
{ .compatible = "aspeed,ast2500-lpc-ctrl" },
+ { .compatible = "aspeed,ast2600-lpc-ctrl" },
{ },
};
diff --git a/drivers/soc/aspeed/aspeed-lpc-snoop.c b/drivers/soc/aspeed/aspeed-lpc-snoop.c
index 48f7ac238861..c7b4ac066b40 100644
--- a/drivers/soc/aspeed/aspeed-lpc-snoop.c
+++ b/drivers/soc/aspeed/aspeed-lpc-snoop.c
@@ -325,6 +325,8 @@ static const struct of_device_id aspeed_lpc_snoop_match[] = {
.data = &ast2400_model_data },
{ .compatible = "aspeed,ast2500-lpc-snoop",
.data = &ast2500_model_data },
+ { .compatible = "aspeed,ast2600-lpc-snoop",
+ .data = &ast2500_model_data },
{ },
};
--
2.21.0
^ permalink raw reply related [flat|nested] 24+ messages in thread
* [PATCH v2 linux dev-5.3 3/4] ARM: dts: aspeed-g6: Add lpc devices
2019-09-19 15:23 [PATCH v2 linux dev-5.3 0/5] ARM: dts: aspeed-g6 lpc, rainier Brad Bishop
` (6 preceding siblings ...)
2019-09-19 15:23 ` [PATCH v2 linux dev-5.3 2/4] ARM: aspeed-g6: lpc: add " Brad Bishop
@ 2019-09-19 15:23 ` Brad Bishop
2019-09-19 16:29 ` Eddie James
2019-09-20 8:04 ` Andrew Jeffery
2019-09-19 15:23 ` [PATCH v2 linux dev-5.3 4/4] ARM: dts: aspeed: add Rainier system Brad Bishop
2019-09-19 15:32 ` [PATCH v2 linux dev-5.3 0/5] ARM: dts: aspeed-g6 lpc, rainier Brad Bishop
9 siblings, 2 replies; 24+ messages in thread
From: Brad Bishop @ 2019-09-19 15:23 UTC (permalink / raw)
To: joel; +Cc: openbmc
Assume everything is the same as G5, except the interrupt is updated.
Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com>
---
arch/arm/boot/dts/aspeed-g6.dtsi | 91 ++++++++++++++++++++++++++++++++
1 file changed, 91 insertions(+)
diff --git a/arch/arm/boot/dts/aspeed-g6.dtsi b/arch/arm/boot/dts/aspeed-g6.dtsi
index 72038c16f541..b4991cbe1f36 100644
--- a/arch/arm/boot/dts/aspeed-g6.dtsi
+++ b/arch/arm/boot/dts/aspeed-g6.dtsi
@@ -249,6 +249,97 @@
status = "disabled";
};
+ lpc: lpc@1e789000 {
+ compatible = "aspeed,ast2600-lpc", "simple-mfd";
+ reg = <0x1e789000 0x1000>;
+
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x1e789000 0x1000>;
+
+ lpc_bmc: lpc-bmc@0 {
+ compatible = "aspeed,ast2600-lpc-bmc", "simple-mfd", "syscon";
+ reg = <0x0 0x80>;
+ reg-io-width = <4>;
+
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x0 0x80>;
+
+ kcs1: kcs1@0 {
+ compatible = "aspeed,ast2600-kcs-bmc";
+ interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
+ kcs_chan = <1>;
+ status = "disabled";
+ };
+ kcs2: kcs2@0 {
+ compatible = "aspeed,ast2600-kcs-bmc";
+ interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
+ kcs_chan = <2>;
+ status = "disabled";
+ };
+ kcs3: kcs3@0 {
+ compatible = "aspeed,ast2600-kcs-bmc";
+ interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
+ kcs_chan = <3>;
+ status = "disabled";
+ };
+ };
+
+ lpc_host: lpc-host@80 {
+ compatible = "aspeed,ast2600-lpc-host", "simple-mfd", "syscon";
+ reg = <0x80 0x1e0>;
+ reg-io-width = <4>;
+
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x80 0x1e0>;
+
+ kcs4: kcs4@0 {
+ compatible = "aspeed,ast2600-kcs-bmc";
+ interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
+ kcs_chan = <4>;
+ status = "disabled";
+ };
+
+ lpc_ctrl: lpc-ctrl@0 {
+ compatible = "aspeed,ast2600-lpc-ctrl";
+ reg = <0x0 0x80>;
+ clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
+ status = "disabled";
+ };
+
+ lpc_snoop: lpc-snoop@0 {
+ compatible = "aspeed,ast2600-lpc-snoop";
+ reg = <0x0 0x80>;
+ interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ };
+
+ lhc: lhc@20 {
+ compatible = "aspeed,ast2600-lhc";
+ reg = <0x20 0x24 0x48 0x8>;
+ };
+
+ lpc_reset: reset-controller@18 {
+ compatible = "aspeed,ast2600-lpc-reset";
+ reg = <0x18 0x4>;
+ #reset-cells = <1>;
+ };
+
+ ibt: ibt@c0 {
+ compatible = "aspeed,ast2600-ibt-bmc";
+ reg = <0xc0 0x18>;
+ interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ };
+
+ sio_regs: regs {
+ compatible = "aspeed,bmc-misc";
+ };
+ };
+ };
+
sdc: sdc@1e740000 {
compatible = "aspeed,ast2600-sd-controller";
reg = <0x1e740000 0x100>;
--
2.21.0
^ permalink raw reply related [flat|nested] 24+ messages in thread
* [PATCH v2 linux dev-5.3 4/4] ARM: dts: aspeed: add Rainier system
2019-09-19 15:23 [PATCH v2 linux dev-5.3 0/5] ARM: dts: aspeed-g6 lpc, rainier Brad Bishop
` (7 preceding siblings ...)
2019-09-19 15:23 ` [PATCH v2 linux dev-5.3 3/4] ARM: dts: aspeed-g6: Add lpc devices Brad Bishop
@ 2019-09-19 15:23 ` Brad Bishop
2019-09-19 16:31 ` Eddie James
2019-09-19 15:32 ` [PATCH v2 linux dev-5.3 0/5] ARM: dts: aspeed-g6 lpc, rainier Brad Bishop
9 siblings, 1 reply; 24+ messages in thread
From: Brad Bishop @ 2019-09-19 15:23 UTC (permalink / raw)
To: joel; +Cc: openbmc
Rainier is a new Power system with an AST2600.
Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com>
---
v2:
- reordered rainier DT elements (alphabetized).
- added rainier rtc, lpc-ctl, reserved memory, mac devices
---
arch/arm/boot/dts/Makefile | 3 +-
arch/arm/boot/dts/aspeed-bmc-opp-rainier.dts | 485 +++++++++++++++++++
2 files changed, 487 insertions(+), 1 deletion(-)
create mode 100644 arch/arm/boot/dts/aspeed-bmc-opp-rainier.dts
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 5af075c2f819..2f81a4be50a8 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -1293,4 +1293,5 @@ dtb-$(CONFIG_ARCH_ASPEED) += \
aspeed-bmc-opp-witherspoon.dtb \
aspeed-bmc-opp-zaius.dtb \
aspeed-bmc-portwell-neptune.dtb \
- aspeed-bmc-quanta-q71l.dtb
+ aspeed-bmc-quanta-q71l.dtb \
+ aspeed-bmc-opp-rainier.dtb
diff --git a/arch/arm/boot/dts/aspeed-bmc-opp-rainier.dts b/arch/arm/boot/dts/aspeed-bmc-opp-rainier.dts
new file mode 100644
index 000000000000..5f45b1effe4a
--- /dev/null
+++ b/arch/arm/boot/dts/aspeed-bmc-opp-rainier.dts
@@ -0,0 +1,485 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+// Copyright 2019 IBM Corp.
+/dts-v1/;
+
+#include "aspeed-g6.dtsi"
+
+/ {
+ model = "Rainier";
+ compatible = "ibm,rainier-bmc", "aspeed,ast2600";
+
+ aliases {
+ serial4 = &uart5;
+ };
+
+ chosen {
+ stdout-path = &uart5;
+ bootargs = "console=ttyS4,115200n8";
+ };
+
+ memory@80000000 {
+ device_type = "memory";
+ reg = <0x80000000 0x80000000>;
+ };
+
+ reserved-memory {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ flash_memory: region@98000000 {
+ no-map;
+ reg = <0x98000000 0x04000000>; /* 64M */
+ };
+ };
+
+};
+
+&emmc_controller {
+ status = "okay";
+};
+
+&emmc {
+ status = "okay";
+};
+
+&fsim0 {
+ status = "okay";
+};
+
+&ibt {
+ status = "okay";
+};
+
+&i2c0 {
+ status = "okay";
+};
+
+&i2c1 {
+ status = "okay";
+};
+
+&i2c2 {
+ status = "okay";
+};
+
+&i2c3 {
+ status = "okay";
+
+ power-supply@68 {
+ compatible = "ibm,cffps2";
+ reg = <0x68>;
+ };
+
+ power-supply@69 {
+ compatible = "ibm,cffps2";
+ reg = <0x69>;
+ };
+
+ power-supply@6a {
+ compatible = "ibm,cffps2";
+ reg = <0x6a>;
+ };
+
+ power-supply@6b {
+ compatible = "ibm,cffps2";
+ reg = <0x6b>;
+ };
+};
+
+&i2c4 {
+ status = "okay";
+
+ tmp275@48 {
+ compatible = "ti,tmp275";
+ reg = <0x48>;
+ };
+
+ tmp275@49 {
+ compatible = "ti,tmp275";
+ reg = <0x49>;
+ };
+
+ tmp275@4a {
+ compatible = "ti,tmp275";
+ reg = <0x4a>;
+ };
+};
+
+&i2c5 {
+ status = "okay";
+
+ tmp275@48 {
+ compatible = "ti,tmp275";
+ reg = <0x48>;
+ };
+
+ tmp275@49 {
+ compatible = "ti,tmp275";
+ reg = <0x49>;
+ };
+};
+
+&i2c6 {
+ status = "okay";
+
+ tmp275@48 {
+ compatible = "ti,tmp275";
+ reg = <0x48>;
+ };
+
+ tmp275@4a {
+ compatible = "ti,tmp275";
+ reg = <0x4a>;
+ };
+
+ tmp275@4b {
+ compatible = "ti,tmp275";
+ reg = <0x4b>;
+ };
+};
+
+&i2c7 {
+ status = "okay";
+
+ si7021-a20@20 {
+ compatible = "silabs,si7020";
+ reg = <0x20>;
+ };
+
+ tmp275@48 {
+ compatible = "ti,tmp275";
+ reg = <0x48>;
+ };
+
+ max31785@52 {
+ compatible = "maxim,max31785a";
+ reg = <0x52>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ fan@0 {
+ compatible = "pmbus-fan";
+ reg = <0>;
+ tach-pulses = <2>;
+ maxim,fan-rotor-input = "tach";
+ maxim,fan-pwm-freq = <25000>;
+ maxim,fan-dual-tach;
+ maxim,fan-no-watchdog;
+ maxim,fan-no-fault-ramp;
+ maxim,fan-ramp = <2>;
+ maxim,fan-fault-pin-mon;
+ };
+
+ fan@1 {
+ compatible = "pmbus-fan";
+ reg = <1>;
+ tach-pulses = <2>;
+ maxim,fan-rotor-input = "tach";
+ maxim,fan-pwm-freq = <25000>;
+ maxim,fan-dual-tach;
+ maxim,fan-no-watchdog;
+ maxim,fan-no-fault-ramp;
+ maxim,fan-ramp = <2>;
+ maxim,fan-fault-pin-mon;
+ };
+
+ fan@2 {
+ compatible = "pmbus-fan";
+ reg = <2>;
+ tach-pulses = <2>;
+ maxim,fan-rotor-input = "tach";
+ maxim,fan-pwm-freq = <25000>;
+ maxim,fan-dual-tach;
+ maxim,fan-no-watchdog;
+ maxim,fan-no-fault-ramp;
+ maxim,fan-ramp = <2>;
+ maxim,fan-fault-pin-mon;
+ };
+
+ fan@3 {
+ compatible = "pmbus-fan";
+ reg = <3>;
+ tach-pulses = <2>;
+ maxim,fan-rotor-input = "tach";
+ maxim,fan-pwm-freq = <25000>;
+ maxim,fan-dual-tach;
+ maxim,fan-no-watchdog;
+ maxim,fan-no-fault-ramp;
+ maxim,fan-ramp = <2>;
+ maxim,fan-fault-pin-mon;
+ };
+ };
+
+ pca0: pca9552@60 {
+ compatible = "nxp,pca9552";
+ reg = <0x60>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ gpio@0 {
+ reg = <0>;
+ };
+
+ gpio@1 {
+ reg = <1>;
+ };
+
+ gpio@2 {
+ reg = <2>;
+ };
+
+ gpio@3 {
+ reg = <3>;
+ };
+
+ gpio@4 {
+ reg = <4>;
+ };
+
+ gpio@5 {
+ reg = <5>;
+ };
+
+ gpio@6 {
+ reg = <6>;
+ };
+
+ gpio@7 {
+ reg = <7>;
+ };
+
+ gpio@8 {
+ reg = <8>;
+ };
+
+ gpio@9 {
+ reg = <9>;
+ };
+
+ gpio@10 {
+ reg = <10>;
+ };
+
+ gpio@11 {
+ reg = <11>;
+ };
+
+ gpio@12 {
+ reg = <12>;
+ };
+
+ gpio@13 {
+ reg = <13>;
+ };
+
+ gpio@14 {
+ reg = <14>;
+ };
+
+ gpio@15 {
+ reg = <15>;
+ };
+ };
+
+ dps: dps310@76 {
+ compatible = "infineon,dps310";
+ reg = <0x76>;
+ #io-channel-cells = <0>;
+ };
+};
+
+&i2c8 {
+ status = "okay";
+
+ ucd90320@b {
+ compatible = "ti,ucd90160";
+ reg = <0x0b>;
+ };
+
+ ucd90320@c {
+ compatible = "ti,ucd90160";
+ reg = <0x0c>;
+ };
+
+ ucd90320@11 {
+ compatible = "ti,ucd90160";
+ reg = <0x11>;
+ };
+
+ rtc@32 {
+ compatible = "epson,rx8900";
+ reg = <0x32>;
+ };
+
+ tmp275@48 {
+ compatible = "ti,tmp275";
+ reg = <0x48>;
+ };
+
+ tmp275@4a {
+ compatible = "ti,tmp275";
+ reg = <0x4a>;
+ };
+};
+
+&i2c9 {
+ status = "okay";
+
+ ir35221@42 {
+ compatible = "infineon,ir35221";
+ reg = <0x42>;
+ };
+
+ ir35221@43 {
+ compatible = "infineon,ir35221";
+ reg = <0x43>;
+ };
+
+ ir35221@44 {
+ compatible = "infineon,ir35221";
+ reg = <0x44>;
+ };
+
+ tmp423a@4c {
+ compatible = "ti,tmp423";
+ reg = <0x4c>;
+ };
+
+ tmp423b@4d {
+ compatible = "ti,tmp423";
+ reg = <0x4d>;
+ };
+
+ ir35221@72 {
+ compatible = "infineon,ir35221";
+ reg = <0x72>;
+ };
+
+ ir35221@73 {
+ compatible = "infineon,ir35221";
+ reg = <0x73>;
+ };
+
+ ir35221@74 {
+ compatible = "infineon,ir35221";
+ reg = <0x74>;
+ };
+};
+
+&i2c10 {
+ status = "okay";
+
+ ir35221@42 {
+ compatible = "infineon,ir35221";
+ reg = <0x42>;
+ };
+
+ ir35221@43 {
+ compatible = "infineon,ir35221";
+ reg = <0x43>;
+ };
+
+ ir35221@44 {
+ compatible = "infineon,ir35221";
+ reg = <0x44>;
+ };
+
+ tmp423a@4c {
+ compatible = "ti,tmp423";
+ reg = <0x4c>;
+ };
+
+ tmp423b@4d {
+ compatible = "ti,tmp423";
+ reg = <0x4d>;
+ };
+
+ ir35221@72 {
+ compatible = "infineon,ir35221";
+ reg = <0x72>;
+ };
+
+ ir35221@73 {
+ compatible = "infineon,ir35221";
+ reg = <0x73>;
+ };
+
+ ir35221@74 {
+ compatible = "infineon,ir35221";
+ reg = <0x74>;
+ };
+};
+
+&i2c11 {
+ status = "okay";
+
+ tmp275@48 {
+ compatible = "ti,tmp275";
+ reg = <0x48>;
+ };
+
+ tmp275@49 {
+ compatible = "ti,tmp275";
+ reg = <0x49>;
+ };
+};
+
+&i2c12 {
+ status = "okay";
+};
+
+&i2c13 {
+ status = "okay";
+};
+
+&i2c14 {
+ status = "okay";
+};
+
+&i2c15 {
+ status = "okay";
+};
+
+&lpc_ctrl {
+ status = "okay";
+ memory-region = <&flash_memory>;
+ flash = <&spi1>;
+};
+
+&mac0 {
+ status = "okay";
+};
+
+&mac1 {
+ status = "okay";
+};
+
+&mac2 {
+ status = "okay";
+};
+
+&mac3 {
+ status = "okay";
+};
+
+&sdc {
+ status = "okay";
+};
+
+&sdhci0 {
+ status = "okay";
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_sd1_default>;
+};
+
+&sdhci1 {
+ status = "okay";
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_sd2_default>;
+};
--
2.21.0
^ permalink raw reply related [flat|nested] 24+ messages in thread
* Re: [PATCH v2 linux dev-5.3 0/5] ARM: dts: aspeed-g6 lpc, rainier
2019-09-19 15:23 [PATCH v2 linux dev-5.3 0/5] ARM: dts: aspeed-g6 lpc, rainier Brad Bishop
` (8 preceding siblings ...)
2019-09-19 15:23 ` [PATCH v2 linux dev-5.3 4/4] ARM: dts: aspeed: add Rainier system Brad Bishop
@ 2019-09-19 15:32 ` Brad Bishop
9 siblings, 0 replies; 24+ messages in thread
From: Brad Bishop @ 2019-09-19 15:32 UTC (permalink / raw)
To: Joel Stanley; +Cc: openbmc
at 11:23 AM, Brad Bishop <bradleyb@fuzziesquirrel.com> wrote:
>> This is a quick attempt at wiring up some of the LPC bits on the
>> AST2600, and then using it on a new board, Rainier, a new POWER system
>> with an AST2600. The only verification performed was ensuring the
>> kernel still booted and the ibt device probed using the Rainier device
>> tree atop the ast2600-evb qemu model. Please review.
I’ve sent the v2 of this series twice. Apparently I can’t do email. Sorry
about the spam.
-brad
^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [PATCH v2 linux dev-5.3 1/4] dt-bindings: lpc: add aspeed-g6 compatible strings
2019-09-19 15:23 ` [PATCH v2 linux dev-5.3 1/4] dt-bindings: lpc: add aspeed-g6 compatible strings Brad Bishop
@ 2019-09-19 16:25 ` Eddie James
2019-09-20 6:30 ` Andrew Jeffery
0 siblings, 1 reply; 24+ messages in thread
From: Eddie James @ 2019-09-19 16:25 UTC (permalink / raw)
To: Brad Bishop, joel; +Cc: openbmc
On 9/19/19 10:23 AM, Brad Bishop wrote:
> Assume The AST2600 SoCs contain the same LPC devices as the AST2500.
Reviewed-by: Eddie James <eajames@linux.ibm.com>
>
> Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com>
> ---
> .../devicetree/bindings/ipmi/aspeed,ast2400-ibt-bmc.txt | 3 ++-
> Documentation/devicetree/bindings/mfd/aspeed-lpc.txt | 8 +++++++-
> 2 files changed, 9 insertions(+), 2 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/ipmi/aspeed,ast2400-ibt-bmc.txt b/Documentation/devicetree/bindings/ipmi/aspeed,ast2400-ibt-bmc.txt
> index 028268fd99ee..4b43b7829bd9 100644
> --- a/Documentation/devicetree/bindings/ipmi/aspeed,ast2400-ibt-bmc.txt
> +++ b/Documentation/devicetree/bindings/ipmi/aspeed,ast2400-ibt-bmc.txt
> @@ -1,6 +1,6 @@
> * Aspeed BT (Block Transfer) IPMI interface
>
> -The Aspeed SOCs (AST2400 and AST2500) are commonly used as BMCs
> +The Aspeed SOCs (AST2400, AST2500 and AST2600) are commonly used as BMCs
> (BaseBoard Management Controllers) and the BT interface can be used to
> perform in-band IPMI communication with their host.
>
> @@ -9,6 +9,7 @@ Required properties:
> - compatible : should be one of
> "aspeed,ast2400-ibt-bmc"
> "aspeed,ast2500-ibt-bmc"
> + "aspeed,ast2600-ibt-bmc"
> - reg: physical address and size of the registers
>
> Optional properties:
> diff --git a/Documentation/devicetree/bindings/mfd/aspeed-lpc.txt b/Documentation/devicetree/bindings/mfd/aspeed-lpc.txt
> index 86446074e206..e1197bab57bb 100644
> --- a/Documentation/devicetree/bindings/mfd/aspeed-lpc.txt
> +++ b/Documentation/devicetree/bindings/mfd/aspeed-lpc.txt
> @@ -46,6 +46,7 @@ Required properties
> - compatible: One of:
> "aspeed,ast2400-lpc", "simple-mfd"
> "aspeed,ast2500-lpc", "simple-mfd"
> + "aspeed,ast2600-lpc", "simple-mfd"
>
> - reg: contains the physical address and length values of the Aspeed
> LPC memory region.
> @@ -64,6 +65,7 @@ BMC Node
> - compatible: One of:
> "aspeed,ast2400-lpc-bmc"
> "aspeed,ast2500-lpc-bmc"
> + "aspeed,ast2600-lpc-bmc"
>
> - reg: contains the physical address and length values of the
> H8S/2168-compatible LPC controller memory region
> @@ -74,6 +76,7 @@ Host Node
> - compatible: One of:
> "aspeed,ast2400-lpc-host", "simple-mfd", "syscon"
> "aspeed,ast2500-lpc-host", "simple-mfd", "syscon"
> + "aspeed,ast2600-lpc-host", "simple-mfd", "syscon"
>
> - reg: contains the address and length values of the host-related
> register space for the Aspeed LPC controller
> @@ -128,6 +131,7 @@ Required properties:
> - compatible: One of:
> "aspeed,ast2400-lpc-ctrl";
> "aspeed,ast2500-lpc-ctrl";
> + "aspeed,ast2600-lpc-ctrl";
>
> - reg: contains offset/length values of the host interface controller
> memory regions
> @@ -168,6 +172,7 @@ Required properties:
> - compatible: One of:
> "aspeed,ast2400-lhc";
> "aspeed,ast2500-lhc";
> + "aspeed,ast2600-lhc";
>
> - reg: contains offset/length values of the LHC memory regions. In the
> AST2400 and AST2500 there are two regions.
> @@ -187,7 +192,8 @@ state of the LPC bus. Some systems may chose to modify this configuration.
>
> Required properties:
>
> - - compatible: "aspeed,ast2500-lpc-reset" or
> + - compatible: "aspeed,ast2600-lpc-reset" or
> + "aspeed,ast2500-lpc-reset"
> "aspeed,ast2400-lpc-reset"
> - reg: offset and length of the IP in the LHC memory region
> - #reset-controller indicates the number of reset cells expected
^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [PATCH v2 linux dev-5.3 2/4] ARM: aspeed-g6: lpc: add compatible strings
2019-09-19 15:23 ` [PATCH v2 linux dev-5.3 2/4] ARM: aspeed-g6: lpc: add " Brad Bishop
@ 2019-09-19 16:26 ` Eddie James
0 siblings, 0 replies; 24+ messages in thread
From: Eddie James @ 2019-09-19 16:26 UTC (permalink / raw)
To: Brad Bishop, joel; +Cc: openbmc
On 9/19/19 10:23 AM, Brad Bishop wrote:
> Assume the AST2600 SoC contains the same LPC devices as the AST2500.
Reviewed-by: Eddie James <eajames@linux.ibm.com>
>
> Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com>
> ---
> v2:
> - removed DT binding documentation changes
> ---
> drivers/char/ipmi/bt-bmc.c | 1 +
> drivers/char/ipmi/kcs_bmc_aspeed.c | 1 +
> drivers/reset/reset-simple.c | 1 +
> drivers/soc/aspeed/aspeed-lpc-ctrl.c | 1 +
> drivers/soc/aspeed/aspeed-lpc-snoop.c | 2 ++
> 5 files changed, 6 insertions(+)
>
> diff --git a/drivers/char/ipmi/bt-bmc.c b/drivers/char/ipmi/bt-bmc.c
> index 40b9927c072c..0e600449931b 100644
> --- a/drivers/char/ipmi/bt-bmc.c
> +++ b/drivers/char/ipmi/bt-bmc.c
> @@ -513,6 +513,7 @@ static int bt_bmc_remove(struct platform_device *pdev)
> static const struct of_device_id bt_bmc_match[] = {
> { .compatible = "aspeed,ast2400-ibt-bmc" },
> { .compatible = "aspeed,ast2500-ibt-bmc" },
> + { .compatible = "aspeed,ast2600-ibt-bmc" },
> { },
> };
>
> diff --git a/drivers/char/ipmi/kcs_bmc_aspeed.c b/drivers/char/ipmi/kcs_bmc_aspeed.c
> index 3c955946e647..a0a8bb89c9b3 100644
> --- a/drivers/char/ipmi/kcs_bmc_aspeed.c
> +++ b/drivers/char/ipmi/kcs_bmc_aspeed.c
> @@ -301,6 +301,7 @@ static int aspeed_kcs_remove(struct platform_device *pdev)
> static const struct of_device_id ast_kcs_bmc_match[] = {
> { .compatible = "aspeed,ast2400-kcs-bmc" },
> { .compatible = "aspeed,ast2500-kcs-bmc" },
> + { .compatible = "aspeed,ast2600-kcs-bmc" },
> { }
> };
> MODULE_DEVICE_TABLE(of, ast_kcs_bmc_match);
> diff --git a/drivers/reset/reset-simple.c b/drivers/reset/reset-simple.c
> index 1154f7b1f4dd..2fe9c889a75a 100644
> --- a/drivers/reset/reset-simple.c
> +++ b/drivers/reset/reset-simple.c
> @@ -125,6 +125,7 @@ static const struct of_device_id reset_simple_dt_ids[] = {
> .data = &reset_simple_active_low },
> { .compatible = "aspeed,ast2400-lpc-reset" },
> { .compatible = "aspeed,ast2500-lpc-reset" },
> + { .compatible = "aspeed,ast2600-lpc-reset" },
> { .compatible = "bitmain,bm1880-reset",
> .data = &reset_simple_active_low },
> { /* sentinel */ },
> diff --git a/drivers/soc/aspeed/aspeed-lpc-ctrl.c b/drivers/soc/aspeed/aspeed-lpc-ctrl.c
> index 01ed21e8bfee..12e4421dee37 100644
> --- a/drivers/soc/aspeed/aspeed-lpc-ctrl.c
> +++ b/drivers/soc/aspeed/aspeed-lpc-ctrl.c
> @@ -291,6 +291,7 @@ static int aspeed_lpc_ctrl_remove(struct platform_device *pdev)
> static const struct of_device_id aspeed_lpc_ctrl_match[] = {
> { .compatible = "aspeed,ast2400-lpc-ctrl" },
> { .compatible = "aspeed,ast2500-lpc-ctrl" },
> + { .compatible = "aspeed,ast2600-lpc-ctrl" },
> { },
> };
>
> diff --git a/drivers/soc/aspeed/aspeed-lpc-snoop.c b/drivers/soc/aspeed/aspeed-lpc-snoop.c
> index 48f7ac238861..c7b4ac066b40 100644
> --- a/drivers/soc/aspeed/aspeed-lpc-snoop.c
> +++ b/drivers/soc/aspeed/aspeed-lpc-snoop.c
> @@ -325,6 +325,8 @@ static const struct of_device_id aspeed_lpc_snoop_match[] = {
> .data = &ast2400_model_data },
> { .compatible = "aspeed,ast2500-lpc-snoop",
> .data = &ast2500_model_data },
> + { .compatible = "aspeed,ast2600-lpc-snoop",
> + .data = &ast2500_model_data },
> { },
> };
>
^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [PATCH v2 linux dev-5.3 3/4] ARM: dts: aspeed-g6: Add lpc devices
2019-09-19 15:23 ` [PATCH v2 linux dev-5.3 3/4] ARM: dts: aspeed-g6: Add lpc devices Brad Bishop
@ 2019-09-19 16:29 ` Eddie James
2019-09-20 8:04 ` Andrew Jeffery
1 sibling, 0 replies; 24+ messages in thread
From: Eddie James @ 2019-09-19 16:29 UTC (permalink / raw)
To: Brad Bishop, joel; +Cc: openbmc
On 9/19/19 10:23 AM, Brad Bishop wrote:
> Assume everything is the same as G5, except the interrupt is updated.
BTW I think you could have kept my reviewed-by tag for this one.
Reviewed-by: Eddie James <eajames@linux.ibm.com>
>
> Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com>
> ---
> arch/arm/boot/dts/aspeed-g6.dtsi | 91 ++++++++++++++++++++++++++++++++
> 1 file changed, 91 insertions(+)
>
> diff --git a/arch/arm/boot/dts/aspeed-g6.dtsi b/arch/arm/boot/dts/aspeed-g6.dtsi
> index 72038c16f541..b4991cbe1f36 100644
> --- a/arch/arm/boot/dts/aspeed-g6.dtsi
> +++ b/arch/arm/boot/dts/aspeed-g6.dtsi
> @@ -249,6 +249,97 @@
> status = "disabled";
> };
>
> + lpc: lpc@1e789000 {
> + compatible = "aspeed,ast2600-lpc", "simple-mfd";
> + reg = <0x1e789000 0x1000>;
> +
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges = <0x0 0x1e789000 0x1000>;
> +
> + lpc_bmc: lpc-bmc@0 {
> + compatible = "aspeed,ast2600-lpc-bmc", "simple-mfd", "syscon";
> + reg = <0x0 0x80>;
> + reg-io-width = <4>;
> +
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges = <0x0 0x0 0x80>;
> +
> + kcs1: kcs1@0 {
> + compatible = "aspeed,ast2600-kcs-bmc";
> + interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
> + kcs_chan = <1>;
> + status = "disabled";
> + };
> + kcs2: kcs2@0 {
> + compatible = "aspeed,ast2600-kcs-bmc";
> + interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
> + kcs_chan = <2>;
> + status = "disabled";
> + };
> + kcs3: kcs3@0 {
> + compatible = "aspeed,ast2600-kcs-bmc";
> + interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
> + kcs_chan = <3>;
> + status = "disabled";
> + };
> + };
> +
> + lpc_host: lpc-host@80 {
> + compatible = "aspeed,ast2600-lpc-host", "simple-mfd", "syscon";
> + reg = <0x80 0x1e0>;
> + reg-io-width = <4>;
> +
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges = <0x0 0x80 0x1e0>;
> +
> + kcs4: kcs4@0 {
> + compatible = "aspeed,ast2600-kcs-bmc";
> + interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
> + kcs_chan = <4>;
> + status = "disabled";
> + };
> +
> + lpc_ctrl: lpc-ctrl@0 {
> + compatible = "aspeed,ast2600-lpc-ctrl";
> + reg = <0x0 0x80>;
> + clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
> + status = "disabled";
> + };
> +
> + lpc_snoop: lpc-snoop@0 {
> + compatible = "aspeed,ast2600-lpc-snoop";
> + reg = <0x0 0x80>;
> + interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
> + status = "disabled";
> + };
> +
> + lhc: lhc@20 {
> + compatible = "aspeed,ast2600-lhc";
> + reg = <0x20 0x24 0x48 0x8>;
> + };
> +
> + lpc_reset: reset-controller@18 {
> + compatible = "aspeed,ast2600-lpc-reset";
> + reg = <0x18 0x4>;
> + #reset-cells = <1>;
> + };
> +
> + ibt: ibt@c0 {
> + compatible = "aspeed,ast2600-ibt-bmc";
> + reg = <0xc0 0x18>;
> + interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
> + status = "disabled";
> + };
> +
> + sio_regs: regs {
> + compatible = "aspeed,bmc-misc";
> + };
> + };
> + };
> +
> sdc: sdc@1e740000 {
> compatible = "aspeed,ast2600-sd-controller";
> reg = <0x1e740000 0x100>;
^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [PATCH v2 linux dev-5.3 4/4] ARM: dts: aspeed: add Rainier system
2019-09-19 15:23 ` [PATCH v2 linux dev-5.3 4/4] ARM: dts: aspeed: add Rainier system Brad Bishop
@ 2019-09-19 16:31 ` Eddie James
0 siblings, 0 replies; 24+ messages in thread
From: Eddie James @ 2019-09-19 16:31 UTC (permalink / raw)
To: Brad Bishop, joel; +Cc: openbmc
On 9/19/19 10:23 AM, Brad Bishop wrote:
> Rainier is a new Power system with an AST2600.
Reviewed-by: Eddie James <eajames@linux.ibm.com>
Thanks!
Eddie
>
> Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com>
> ---
> v2:
> - reordered rainier DT elements (alphabetized).
> - added rainier rtc, lpc-ctl, reserved memory, mac devices
> ---
> arch/arm/boot/dts/Makefile | 3 +-
> arch/arm/boot/dts/aspeed-bmc-opp-rainier.dts | 485 +++++++++++++++++++
> 2 files changed, 487 insertions(+), 1 deletion(-)
> create mode 100644 arch/arm/boot/dts/aspeed-bmc-opp-rainier.dts
>
> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
> index 5af075c2f819..2f81a4be50a8 100644
> --- a/arch/arm/boot/dts/Makefile
> +++ b/arch/arm/boot/dts/Makefile
> @@ -1293,4 +1293,5 @@ dtb-$(CONFIG_ARCH_ASPEED) += \
> aspeed-bmc-opp-witherspoon.dtb \
> aspeed-bmc-opp-zaius.dtb \
> aspeed-bmc-portwell-neptune.dtb \
> - aspeed-bmc-quanta-q71l.dtb
> + aspeed-bmc-quanta-q71l.dtb \
> + aspeed-bmc-opp-rainier.dtb
> diff --git a/arch/arm/boot/dts/aspeed-bmc-opp-rainier.dts b/arch/arm/boot/dts/aspeed-bmc-opp-rainier.dts
> new file mode 100644
> index 000000000000..5f45b1effe4a
> --- /dev/null
> +++ b/arch/arm/boot/dts/aspeed-bmc-opp-rainier.dts
> @@ -0,0 +1,485 @@
> +// SPDX-License-Identifier: GPL-2.0-or-later
> +// Copyright 2019 IBM Corp.
> +/dts-v1/;
> +
> +#include "aspeed-g6.dtsi"
> +
> +/ {
> + model = "Rainier";
> + compatible = "ibm,rainier-bmc", "aspeed,ast2600";
> +
> + aliases {
> + serial4 = &uart5;
> + };
> +
> + chosen {
> + stdout-path = &uart5;
> + bootargs = "console=ttyS4,115200n8";
> + };
> +
> + memory@80000000 {
> + device_type = "memory";
> + reg = <0x80000000 0x80000000>;
> + };
> +
> + reserved-memory {
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges;
> +
> + flash_memory: region@98000000 {
> + no-map;
> + reg = <0x98000000 0x04000000>; /* 64M */
> + };
> + };
> +
> +};
> +
> +&emmc_controller {
> + status = "okay";
> +};
> +
> +&emmc {
> + status = "okay";
> +};
> +
> +&fsim0 {
> + status = "okay";
> +};
> +
> +&ibt {
> + status = "okay";
> +};
> +
> +&i2c0 {
> + status = "okay";
> +};
> +
> +&i2c1 {
> + status = "okay";
> +};
> +
> +&i2c2 {
> + status = "okay";
> +};
> +
> +&i2c3 {
> + status = "okay";
> +
> + power-supply@68 {
> + compatible = "ibm,cffps2";
> + reg = <0x68>;
> + };
> +
> + power-supply@69 {
> + compatible = "ibm,cffps2";
> + reg = <0x69>;
> + };
> +
> + power-supply@6a {
> + compatible = "ibm,cffps2";
> + reg = <0x6a>;
> + };
> +
> + power-supply@6b {
> + compatible = "ibm,cffps2";
> + reg = <0x6b>;
> + };
> +};
> +
> +&i2c4 {
> + status = "okay";
> +
> + tmp275@48 {
> + compatible = "ti,tmp275";
> + reg = <0x48>;
> + };
> +
> + tmp275@49 {
> + compatible = "ti,tmp275";
> + reg = <0x49>;
> + };
> +
> + tmp275@4a {
> + compatible = "ti,tmp275";
> + reg = <0x4a>;
> + };
> +};
> +
> +&i2c5 {
> + status = "okay";
> +
> + tmp275@48 {
> + compatible = "ti,tmp275";
> + reg = <0x48>;
> + };
> +
> + tmp275@49 {
> + compatible = "ti,tmp275";
> + reg = <0x49>;
> + };
> +};
> +
> +&i2c6 {
> + status = "okay";
> +
> + tmp275@48 {
> + compatible = "ti,tmp275";
> + reg = <0x48>;
> + };
> +
> + tmp275@4a {
> + compatible = "ti,tmp275";
> + reg = <0x4a>;
> + };
> +
> + tmp275@4b {
> + compatible = "ti,tmp275";
> + reg = <0x4b>;
> + };
> +};
> +
> +&i2c7 {
> + status = "okay";
> +
> + si7021-a20@20 {
> + compatible = "silabs,si7020";
> + reg = <0x20>;
> + };
> +
> + tmp275@48 {
> + compatible = "ti,tmp275";
> + reg = <0x48>;
> + };
> +
> + max31785@52 {
> + compatible = "maxim,max31785a";
> + reg = <0x52>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + fan@0 {
> + compatible = "pmbus-fan";
> + reg = <0>;
> + tach-pulses = <2>;
> + maxim,fan-rotor-input = "tach";
> + maxim,fan-pwm-freq = <25000>;
> + maxim,fan-dual-tach;
> + maxim,fan-no-watchdog;
> + maxim,fan-no-fault-ramp;
> + maxim,fan-ramp = <2>;
> + maxim,fan-fault-pin-mon;
> + };
> +
> + fan@1 {
> + compatible = "pmbus-fan";
> + reg = <1>;
> + tach-pulses = <2>;
> + maxim,fan-rotor-input = "tach";
> + maxim,fan-pwm-freq = <25000>;
> + maxim,fan-dual-tach;
> + maxim,fan-no-watchdog;
> + maxim,fan-no-fault-ramp;
> + maxim,fan-ramp = <2>;
> + maxim,fan-fault-pin-mon;
> + };
> +
> + fan@2 {
> + compatible = "pmbus-fan";
> + reg = <2>;
> + tach-pulses = <2>;
> + maxim,fan-rotor-input = "tach";
> + maxim,fan-pwm-freq = <25000>;
> + maxim,fan-dual-tach;
> + maxim,fan-no-watchdog;
> + maxim,fan-no-fault-ramp;
> + maxim,fan-ramp = <2>;
> + maxim,fan-fault-pin-mon;
> + };
> +
> + fan@3 {
> + compatible = "pmbus-fan";
> + reg = <3>;
> + tach-pulses = <2>;
> + maxim,fan-rotor-input = "tach";
> + maxim,fan-pwm-freq = <25000>;
> + maxim,fan-dual-tach;
> + maxim,fan-no-watchdog;
> + maxim,fan-no-fault-ramp;
> + maxim,fan-ramp = <2>;
> + maxim,fan-fault-pin-mon;
> + };
> + };
> +
> + pca0: pca9552@60 {
> + compatible = "nxp,pca9552";
> + reg = <0x60>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + gpio-controller;
> + #gpio-cells = <2>;
> +
> + gpio@0 {
> + reg = <0>;
> + };
> +
> + gpio@1 {
> + reg = <1>;
> + };
> +
> + gpio@2 {
> + reg = <2>;
> + };
> +
> + gpio@3 {
> + reg = <3>;
> + };
> +
> + gpio@4 {
> + reg = <4>;
> + };
> +
> + gpio@5 {
> + reg = <5>;
> + };
> +
> + gpio@6 {
> + reg = <6>;
> + };
> +
> + gpio@7 {
> + reg = <7>;
> + };
> +
> + gpio@8 {
> + reg = <8>;
> + };
> +
> + gpio@9 {
> + reg = <9>;
> + };
> +
> + gpio@10 {
> + reg = <10>;
> + };
> +
> + gpio@11 {
> + reg = <11>;
> + };
> +
> + gpio@12 {
> + reg = <12>;
> + };
> +
> + gpio@13 {
> + reg = <13>;
> + };
> +
> + gpio@14 {
> + reg = <14>;
> + };
> +
> + gpio@15 {
> + reg = <15>;
> + };
> + };
> +
> + dps: dps310@76 {
> + compatible = "infineon,dps310";
> + reg = <0x76>;
> + #io-channel-cells = <0>;
> + };
> +};
> +
> +&i2c8 {
> + status = "okay";
> +
> + ucd90320@b {
> + compatible = "ti,ucd90160";
> + reg = <0x0b>;
> + };
> +
> + ucd90320@c {
> + compatible = "ti,ucd90160";
> + reg = <0x0c>;
> + };
> +
> + ucd90320@11 {
> + compatible = "ti,ucd90160";
> + reg = <0x11>;
> + };
> +
> + rtc@32 {
> + compatible = "epson,rx8900";
> + reg = <0x32>;
> + };
> +
> + tmp275@48 {
> + compatible = "ti,tmp275";
> + reg = <0x48>;
> + };
> +
> + tmp275@4a {
> + compatible = "ti,tmp275";
> + reg = <0x4a>;
> + };
> +};
> +
> +&i2c9 {
> + status = "okay";
> +
> + ir35221@42 {
> + compatible = "infineon,ir35221";
> + reg = <0x42>;
> + };
> +
> + ir35221@43 {
> + compatible = "infineon,ir35221";
> + reg = <0x43>;
> + };
> +
> + ir35221@44 {
> + compatible = "infineon,ir35221";
> + reg = <0x44>;
> + };
> +
> + tmp423a@4c {
> + compatible = "ti,tmp423";
> + reg = <0x4c>;
> + };
> +
> + tmp423b@4d {
> + compatible = "ti,tmp423";
> + reg = <0x4d>;
> + };
> +
> + ir35221@72 {
> + compatible = "infineon,ir35221";
> + reg = <0x72>;
> + };
> +
> + ir35221@73 {
> + compatible = "infineon,ir35221";
> + reg = <0x73>;
> + };
> +
> + ir35221@74 {
> + compatible = "infineon,ir35221";
> + reg = <0x74>;
> + };
> +};
> +
> +&i2c10 {
> + status = "okay";
> +
> + ir35221@42 {
> + compatible = "infineon,ir35221";
> + reg = <0x42>;
> + };
> +
> + ir35221@43 {
> + compatible = "infineon,ir35221";
> + reg = <0x43>;
> + };
> +
> + ir35221@44 {
> + compatible = "infineon,ir35221";
> + reg = <0x44>;
> + };
> +
> + tmp423a@4c {
> + compatible = "ti,tmp423";
> + reg = <0x4c>;
> + };
> +
> + tmp423b@4d {
> + compatible = "ti,tmp423";
> + reg = <0x4d>;
> + };
> +
> + ir35221@72 {
> + compatible = "infineon,ir35221";
> + reg = <0x72>;
> + };
> +
> + ir35221@73 {
> + compatible = "infineon,ir35221";
> + reg = <0x73>;
> + };
> +
> + ir35221@74 {
> + compatible = "infineon,ir35221";
> + reg = <0x74>;
> + };
> +};
> +
> +&i2c11 {
> + status = "okay";
> +
> + tmp275@48 {
> + compatible = "ti,tmp275";
> + reg = <0x48>;
> + };
> +
> + tmp275@49 {
> + compatible = "ti,tmp275";
> + reg = <0x49>;
> + };
> +};
> +
> +&i2c12 {
> + status = "okay";
> +};
> +
> +&i2c13 {
> + status = "okay";
> +};
> +
> +&i2c14 {
> + status = "okay";
> +};
> +
> +&i2c15 {
> + status = "okay";
> +};
> +
> +&lpc_ctrl {
> + status = "okay";
> + memory-region = <&flash_memory>;
> + flash = <&spi1>;
> +};
> +
> +&mac0 {
> + status = "okay";
> +};
> +
> +&mac1 {
> + status = "okay";
> +};
> +
> +&mac2 {
> + status = "okay";
> +};
> +
> +&mac3 {
> + status = "okay";
> +};
> +
> +&sdc {
> + status = "okay";
> +};
> +
> +&sdhci0 {
> + status = "okay";
> +
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_sd1_default>;
> +};
> +
> +&sdhci1 {
> + status = "okay";
> +
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_sd2_default>;
> +};
^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [PATCH v2 linux dev-5.3 1/4] dt-bindings: lpc: add aspeed-g6 compatible strings
2019-09-19 16:25 ` Eddie James
@ 2019-09-20 6:30 ` Andrew Jeffery
2019-09-24 19:49 ` Brad Bishop
0 siblings, 1 reply; 24+ messages in thread
From: Andrew Jeffery @ 2019-09-20 6:30 UTC (permalink / raw)
To: Eddie James, Brad Bishop, Joel Stanley; +Cc: openbmc
On Fri, 20 Sep 2019, at 01:55, Eddie James wrote:
>
> On 9/19/19 10:23 AM, Brad Bishop wrote:
> > Assume The AST2600 SoCs contain the same LPC devices as the AST2500.
Has anyone validated the assumption?
>
>
> Reviewed-by: Eddie James <eajames@linux.ibm.com>
>
>
> >
> > Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com>
> > ---
> > .../devicetree/bindings/ipmi/aspeed,ast2400-ibt-bmc.txt | 3 ++-
> > Documentation/devicetree/bindings/mfd/aspeed-lpc.txt | 8 +++++++-
This should be split in two for upstream as the IPMI changes will need to go
via Corey while the MFD changes go through Lee.
Otherwise, it's fine in principle.
Andrew
> > 2 files changed, 9 insertions(+), 2 deletions(-)
> >
> > diff --git a/Documentation/devicetree/bindings/ipmi/aspeed,ast2400-ibt-bmc.txt b/Documentation/devicetree/bindings/ipmi/aspeed,ast2400-ibt-bmc.txt
> > index 028268fd99ee..4b43b7829bd9 100644
> > --- a/Documentation/devicetree/bindings/ipmi/aspeed,ast2400-ibt-bmc.txt
> > +++ b/Documentation/devicetree/bindings/ipmi/aspeed,ast2400-ibt-bmc.txt
> > @@ -1,6 +1,6 @@
> > * Aspeed BT (Block Transfer) IPMI interface
> >
> > -The Aspeed SOCs (AST2400 and AST2500) are commonly used as BMCs
> > +The Aspeed SOCs (AST2400, AST2500 and AST2600) are commonly used as BMCs
> > (BaseBoard Management Controllers) and the BT interface can be used to
> > perform in-band IPMI communication with their host.
> >
> > @@ -9,6 +9,7 @@ Required properties:
> > - compatible : should be one of
> > "aspeed,ast2400-ibt-bmc"
> > "aspeed,ast2500-ibt-bmc"
> > + "aspeed,ast2600-ibt-bmc"
> > - reg: physical address and size of the registers
> >
> > Optional properties:
> > diff --git a/Documentation/devicetree/bindings/mfd/aspeed-lpc.txt b/Documentation/devicetree/bindings/mfd/aspeed-lpc.txt
> > index 86446074e206..e1197bab57bb 100644
> > --- a/Documentation/devicetree/bindings/mfd/aspeed-lpc.txt
> > +++ b/Documentation/devicetree/bindings/mfd/aspeed-lpc.txt
> > @@ -46,6 +46,7 @@ Required properties
> > - compatible: One of:
> > "aspeed,ast2400-lpc", "simple-mfd"
> > "aspeed,ast2500-lpc", "simple-mfd"
> > + "aspeed,ast2600-lpc", "simple-mfd"
> >
> > - reg: contains the physical address and length values of the Aspeed
> > LPC memory region.
> > @@ -64,6 +65,7 @@ BMC Node
> > - compatible: One of:
> > "aspeed,ast2400-lpc-bmc"
> > "aspeed,ast2500-lpc-bmc"
> > + "aspeed,ast2600-lpc-bmc"
> >
> > - reg: contains the physical address and length values of the
> > H8S/2168-compatible LPC controller memory region
> > @@ -74,6 +76,7 @@ Host Node
> > - compatible: One of:
> > "aspeed,ast2400-lpc-host", "simple-mfd", "syscon"
> > "aspeed,ast2500-lpc-host", "simple-mfd", "syscon"
> > + "aspeed,ast2600-lpc-host", "simple-mfd", "syscon"
> >
> > - reg: contains the address and length values of the host-related
> > register space for the Aspeed LPC controller
> > @@ -128,6 +131,7 @@ Required properties:
> > - compatible: One of:
> > "aspeed,ast2400-lpc-ctrl";
> > "aspeed,ast2500-lpc-ctrl";
> > + "aspeed,ast2600-lpc-ctrl";
> >
> > - reg: contains offset/length values of the host interface controller
> > memory regions
> > @@ -168,6 +172,7 @@ Required properties:
> > - compatible: One of:
> > "aspeed,ast2400-lhc";
> > "aspeed,ast2500-lhc";
> > + "aspeed,ast2600-lhc";
> >
> > - reg: contains offset/length values of the LHC memory regions. In the
> > AST2400 and AST2500 there are two regions.
> > @@ -187,7 +192,8 @@ state of the LPC bus. Some systems may chose to modify this configuration.
> >
> > Required properties:
> >
> > - - compatible: "aspeed,ast2500-lpc-reset" or
> > + - compatible: "aspeed,ast2600-lpc-reset" or
> > + "aspeed,ast2500-lpc-reset"
> > "aspeed,ast2400-lpc-reset"
> > - reg: offset and length of the IP in the LHC memory region
> > - #reset-controller indicates the number of reset cells expected
>
^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [PATCH v2 linux dev-5.3 2/4] ARM: aspeed-g6: lpc: add compatible strings
2019-09-19 15:23 ` [PATCH v2 linux dev-5.3 2/4] ARM: aspeed-g6: lpc: add " Brad Bishop
@ 2019-09-20 6:31 ` Andrew Jeffery
2019-09-24 19:50 ` Brad Bishop
0 siblings, 1 reply; 24+ messages in thread
From: Andrew Jeffery @ 2019-09-20 6:31 UTC (permalink / raw)
To: Brad Bishop, Joel Stanley; +Cc: openbmc
On Fri, 20 Sep 2019, at 00:53, Brad Bishop wrote:
> Assume the AST2600 SoC contains the same LPC devices as the AST2500.
>
> Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com>
> ---
> v2:
> - removed DT binding documentation changes
> ---
> drivers/char/ipmi/bt-bmc.c | 1 +
> drivers/char/ipmi/kcs_bmc_aspeed.c | 1 +
> drivers/reset/reset-simple.c | 1 +
> drivers/soc/aspeed/aspeed-lpc-ctrl.c | 1 +
> drivers/soc/aspeed/aspeed-lpc-snoop.c | 2 ++
> 5 files changed, 6 insertions(+)
Also should be split for upstreaming, but as with the bindings the changes
are fine in principle.
Andrew
^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [PATCH v2 linux dev-5.3 3/4] ARM: dts: aspeed-g6: Add lpc devices
2019-09-19 15:23 ` [PATCH v2 linux dev-5.3 3/4] ARM: dts: aspeed-g6: Add lpc devices Brad Bishop
@ 2019-09-20 6:37 ` Andrew Jeffery
2019-09-24 19:51 ` Brad Bishop
0 siblings, 1 reply; 24+ messages in thread
From: Andrew Jeffery @ 2019-09-20 6:37 UTC (permalink / raw)
To: Brad Bishop, Joel Stanley; +Cc: openbmc
On Fri, 20 Sep 2019, at 00:53, Brad Bishop wrote:
> Assume everything is the same as G5, except the interrupt is updated.
>
> Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com>
> ---
> arch/arm/boot/dts/aspeed-g6.dtsi | 91 ++++++++++++++++++++++++++++++++
> 1 file changed, 91 insertions(+)
>
> diff --git a/arch/arm/boot/dts/aspeed-g6.dtsi b/arch/arm/boot/dts/aspeed-g6.dtsi
> index 72038c16f541..b4991cbe1f36 100644
> --- a/arch/arm/boot/dts/aspeed-g6.dtsi
> +++ b/arch/arm/boot/dts/aspeed-g6.dtsi
> @@ -249,6 +249,97 @@
> status = "disabled";
> };
>
> + lpc: lpc@1e789000 {
> + compatible = "aspeed,ast2600-lpc", "simple-mfd";
> + reg = <0x1e789000 0x1000>;
> +
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges = <0x0 0x1e789000 0x1000>;
> +
> + lpc_bmc: lpc-bmc@0 {
> + compatible = "aspeed,ast2600-lpc-bmc", "simple-mfd", "syscon";
> + reg = <0x0 0x80>;
> + reg-io-width = <4>;
> +
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges = <0x0 0x0 0x80>;
> +
> + kcs1: kcs1@0 {
> + compatible = "aspeed,ast2600-kcs-bmc";
> + interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
> + kcs_chan = <1>;
> + status = "disabled";
> + };
> + kcs2: kcs2@0 {
> + compatible = "aspeed,ast2600-kcs-bmc";
> + interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
> + kcs_chan = <2>;
> + status = "disabled";
> + };
> + kcs3: kcs3@0 {
> + compatible = "aspeed,ast2600-kcs-bmc";
> + interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
> + kcs_chan = <3>;
> + status = "disabled";
> + };
> + };
> +
> + lpc_host: lpc-host@80 {
> + compatible = "aspeed,ast2600-lpc-host", "simple-mfd", "syscon";
> + reg = <0x80 0x1e0>;
> + reg-io-width = <4>;
> +
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges = <0x0 0x80 0x1e0>;
> +
> + kcs4: kcs4@0 {
> + compatible = "aspeed,ast2600-kcs-bmc";
> + interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
> + kcs_chan = <4>;
> + status = "disabled";
> + };
I've got some patches floating around that I need to respin that adjust the kcs binding.
The new dtsi with the existing binding means we're going to increase the amplification
of dtc warnings :(
> +
> + lpc_ctrl: lpc-ctrl@0 {
> + compatible = "aspeed,ast2600-lpc-ctrl";
> + reg = <0x0 0x80>;
> + clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
> + status = "disabled";
> + };
> +
> + lpc_snoop: lpc-snoop@0 {
> + compatible = "aspeed,ast2600-lpc-snoop";
> + reg = <0x0 0x80>;
> + interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
> + status = "disabled";
> + };
> +
> + lhc: lhc@20 {
> + compatible = "aspeed,ast2600-lhc";
> + reg = <0x20 0x24 0x48 0x8>;
> + };
> +
> + lpc_reset: reset-controller@18 {
> + compatible = "aspeed,ast2600-lpc-reset";
> + reg = <0x18 0x4>;
> + #reset-cells = <1>;
> + };
> +
> + ibt: ibt@c0 {
> + compatible = "aspeed,ast2600-ibt-bmc";
> + reg = <0xc0 0x18>;
> + interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
> + status = "disabled";
> + };
> +
> + sio_regs: regs {
> + compatible = "aspeed,bmc-misc";
> + };
Can you please split the sio_regs one out to a separate patch? The necessary
patches got nak'ed upstream a while back and I haven't circled back around
to implement something more palatable. Put the patch adding it at the top of
your series, then you can send the earlier ones upstream.
Andrew
^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [PATCH v2 linux dev-5.3 4/4] ARM: dts: aspeed: add Rainier system
2019-09-19 15:23 ` [PATCH v2 linux dev-5.3 4/4] ARM: dts: aspeed: add Rainier system Brad Bishop
@ 2019-09-20 7:25 ` Andrew Jeffery
2019-09-24 19:53 ` Brad Bishop
0 siblings, 1 reply; 24+ messages in thread
From: Andrew Jeffery @ 2019-09-20 7:25 UTC (permalink / raw)
To: Brad Bishop, Joel Stanley; +Cc: openbmc
On Fri, 20 Sep 2019, at 00:53, Brad Bishop wrote:
> Rainier is a new Power system with an AST2600.
>
> Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com>
> ---
> v2:
> - reordered rainier DT elements (alphabetized).
> - added rainier rtc, lpc-ctl, reserved memory, mac devices
> ---
> arch/arm/boot/dts/Makefile | 3 +-
> arch/arm/boot/dts/aspeed-bmc-opp-rainier.dts | 485 +++++++++++++++++++
> 2 files changed, 487 insertions(+), 1 deletion(-)
> create mode 100644 arch/arm/boot/dts/aspeed-bmc-opp-rainier.dts
>
> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
> index 5af075c2f819..2f81a4be50a8 100644
> --- a/arch/arm/boot/dts/Makefile
> +++ b/arch/arm/boot/dts/Makefile
> @@ -1293,4 +1293,5 @@ dtb-$(CONFIG_ARCH_ASPEED) += \
> aspeed-bmc-opp-witherspoon.dtb \
> aspeed-bmc-opp-zaius.dtb \
> aspeed-bmc-portwell-neptune.dtb \
> - aspeed-bmc-quanta-q71l.dtb
> + aspeed-bmc-quanta-q71l.dtb \
> + aspeed-bmc-opp-rainier.dtb
Rainier isn't an OpenPOWER Platform so we should drop the 'opp' or
potentially substitute it with 'ibm' ("aspeed-bmc-ibm-rainier.dtb").
> diff --git a/arch/arm/boot/dts/aspeed-bmc-opp-rainier.dts
> b/arch/arm/boot/dts/aspeed-bmc-opp-rainier.dts
> new file mode 100644
> index 000000000000..5f45b1effe4a
> --- /dev/null
> +++ b/arch/arm/boot/dts/aspeed-bmc-opp-rainier.dts
> @@ -0,0 +1,485 @@
> +// SPDX-License-Identifier: GPL-2.0-or-later
> +// Copyright 2019 IBM Corp.
> +/dts-v1/;
> +
> +#include "aspeed-g6.dtsi"
> +
> +/ {
> + model = "Rainier";
> + compatible = "ibm,rainier-bmc", "aspeed,ast2600";
> +
> + aliases {
> + serial4 = &uart5;
> + };
> +
> + chosen {
> + stdout-path = &uart5;
> + bootargs = "console=ttyS4,115200n8";
> + };
> +
> + memory@80000000 {
> + device_type = "memory";
> + reg = <0x80000000 0x80000000>;
Do we have 2GiB? According to the schematic I have it should be 1GiB.
My schematic could be out of date though.
> + };
> +
> + reserved-memory {
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges;
> +
> + flash_memory: region@98000000 {
> + no-map;
> + reg = <0x98000000 0x04000000>; /* 64M */
That's a strange place to put it given we have much more memory :) We
picked that address for the AST2500-based OPP systems because it's
the lowest usable address below the VGA region. If we have more RAM
then we should move it up.
> + };
> + };
> +
> +};
> +
> +&emmc_controller {
> + status = "okay";
> +};
> +
> +&emmc {
> + status = "okay";
> +};
> +
> +&fsim0 {
> + status = "okay";
> +};
> +
> +&ibt {
> + status = "okay";
> +};
> +
> +&i2c0 {
> + status = "okay";
> +};
> +
> +&i2c1 {
> + status = "okay";
> +};
> +
> +&i2c2 {
> + status = "okay";
> +};
> +
> +&i2c3 {
> + status = "okay";
> +
> + power-supply@68 {
> + compatible = "ibm,cffps2";
> + reg = <0x68>;
> + };
> +
> + power-supply@69 {
> + compatible = "ibm,cffps2";
> + reg = <0x69>;
> + };
> +
> + power-supply@6a {
> + compatible = "ibm,cffps2";
> + reg = <0x6a>;
> + };
> +
> + power-supply@6b {
> + compatible = "ibm,cffps2";
> + reg = <0x6b>;
> + };
> +};
> +
> +&i2c4 {
> + status = "okay";
> +
> + tmp275@48 {
> + compatible = "ti,tmp275";
> + reg = <0x48>;
> + };
> +
> + tmp275@49 {
> + compatible = "ti,tmp275";
> + reg = <0x49>;
> + };
> +
> + tmp275@4a {
> + compatible = "ti,tmp275";
> + reg = <0x4a>;
> + };
> +};
> +
> +&i2c5 {
> + status = "okay";
> +
> + tmp275@48 {
> + compatible = "ti,tmp275";
> + reg = <0x48>;
> + };
> +
> + tmp275@49 {
> + compatible = "ti,tmp275";
> + reg = <0x49>;
> + };
> +};
> +
> +&i2c6 {
> + status = "okay";
> +
> + tmp275@48 {
> + compatible = "ti,tmp275";
> + reg = <0x48>;
> + };
> +
> + tmp275@4a {
> + compatible = "ti,tmp275";
> + reg = <0x4a>;
> + };
> +
> + tmp275@4b {
> + compatible = "ti,tmp275";
> + reg = <0x4b>;
> + };
> +};
> +
> +&i2c7 {
> + status = "okay";
> +
> + si7021-a20@20 {
> + compatible = "silabs,si7020";
> + reg = <0x20>;
> + };
> +
> + tmp275@48 {
> + compatible = "ti,tmp275";
> + reg = <0x48>;
> + };
> +
> + max31785@52 {
> + compatible = "maxim,max31785a";
> + reg = <0x52>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + fan@0 {
> + compatible = "pmbus-fan";
> + reg = <0>;
> + tach-pulses = <2>;
> + maxim,fan-rotor-input = "tach";
> + maxim,fan-pwm-freq = <25000>;
> + maxim,fan-dual-tach;
> + maxim,fan-no-watchdog;
> + maxim,fan-no-fault-ramp;
> + maxim,fan-ramp = <2>;
> + maxim,fan-fault-pin-mon;
> + };
> +
> + fan@1 {
> + compatible = "pmbus-fan";
> + reg = <1>;
> + tach-pulses = <2>;
> + maxim,fan-rotor-input = "tach";
> + maxim,fan-pwm-freq = <25000>;
> + maxim,fan-dual-tach;
> + maxim,fan-no-watchdog;
> + maxim,fan-no-fault-ramp;
> + maxim,fan-ramp = <2>;
> + maxim,fan-fault-pin-mon;
> + };
> +
> + fan@2 {
> + compatible = "pmbus-fan";
> + reg = <2>;
> + tach-pulses = <2>;
> + maxim,fan-rotor-input = "tach";
> + maxim,fan-pwm-freq = <25000>;
> + maxim,fan-dual-tach;
> + maxim,fan-no-watchdog;
> + maxim,fan-no-fault-ramp;
> + maxim,fan-ramp = <2>;
> + maxim,fan-fault-pin-mon;
> + };
> +
> + fan@3 {
> + compatible = "pmbus-fan";
> + reg = <3>;
> + tach-pulses = <2>;
> + maxim,fan-rotor-input = "tach";
> + maxim,fan-pwm-freq = <25000>;
> + maxim,fan-dual-tach;
> + maxim,fan-no-watchdog;
> + maxim,fan-no-fault-ramp;
> + maxim,fan-ramp = <2>;
> + maxim,fan-fault-pin-mon;
> + };
> + };
> +
> + pca0: pca9552@60 {
> + compatible = "nxp,pca9552";
> + reg = <0x60>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + gpio-controller;
> + #gpio-cells = <2>;
> +
> + gpio@0 {
> + reg = <0>;
> + };
> +
> + gpio@1 {
> + reg = <1>;
> + };
> +
> + gpio@2 {
> + reg = <2>;
> + };
> +
> + gpio@3 {
> + reg = <3>;
> + };
> +
> + gpio@4 {
> + reg = <4>;
> + };
> +
> + gpio@5 {
> + reg = <5>;
> + };
> +
> + gpio@6 {
> + reg = <6>;
> + };
> +
> + gpio@7 {
> + reg = <7>;
> + };
> +
> + gpio@8 {
> + reg = <8>;
> + };
> +
> + gpio@9 {
> + reg = <9>;
> + };
> +
> + gpio@10 {
> + reg = <10>;
> + };
> +
> + gpio@11 {
> + reg = <11>;
> + };
> +
> + gpio@12 {
> + reg = <12>;
> + };
> +
> + gpio@13 {
> + reg = <13>;
> + };
> +
> + gpio@14 {
> + reg = <14>;
> + };
> +
> + gpio@15 {
> + reg = <15>;
> + };
> + };
> +
> + dps: dps310@76 {
> + compatible = "infineon,dps310";
> + reg = <0x76>;
> + #io-channel-cells = <0>;
> + };
> +};
> +
> +&i2c8 {
> + status = "okay";
> +
> + ucd90320@b {
> + compatible = "ti,ucd90160";
> + reg = <0x0b>;
> + };
> +
> + ucd90320@c {
> + compatible = "ti,ucd90160";
> + reg = <0x0c>;
> + };
> +
> + ucd90320@11 {
> + compatible = "ti,ucd90160";
> + reg = <0x11>;
> + };
> +
> + rtc@32 {
> + compatible = "epson,rx8900";
> + reg = <0x32>;
> + };
> +
> + tmp275@48 {
> + compatible = "ti,tmp275";
> + reg = <0x48>;
> + };
> +
> + tmp275@4a {
> + compatible = "ti,tmp275";
> + reg = <0x4a>;
> + };
> +};
> +
> +&i2c9 {
> + status = "okay";
> +
> + ir35221@42 {
> + compatible = "infineon,ir35221";
> + reg = <0x42>;
> + };
> +
> + ir35221@43 {
> + compatible = "infineon,ir35221";
> + reg = <0x43>;
> + };
> +
> + ir35221@44 {
> + compatible = "infineon,ir35221";
> + reg = <0x44>;
> + };
> +
> + tmp423a@4c {
> + compatible = "ti,tmp423";
> + reg = <0x4c>;
> + };
> +
> + tmp423b@4d {
> + compatible = "ti,tmp423";
> + reg = <0x4d>;
> + };
> +
> + ir35221@72 {
> + compatible = "infineon,ir35221";
> + reg = <0x72>;
> + };
> +
> + ir35221@73 {
> + compatible = "infineon,ir35221";
> + reg = <0x73>;
> + };
> +
> + ir35221@74 {
> + compatible = "infineon,ir35221";
> + reg = <0x74>;
> + };
> +};
> +
> +&i2c10 {
> + status = "okay";
> +
> + ir35221@42 {
> + compatible = "infineon,ir35221";
> + reg = <0x42>;
> + };
> +
> + ir35221@43 {
> + compatible = "infineon,ir35221";
> + reg = <0x43>;
> + };
> +
> + ir35221@44 {
> + compatible = "infineon,ir35221";
> + reg = <0x44>;
> + };
> +
> + tmp423a@4c {
> + compatible = "ti,tmp423";
> + reg = <0x4c>;
> + };
> +
> + tmp423b@4d {
> + compatible = "ti,tmp423";
> + reg = <0x4d>;
> + };
> +
> + ir35221@72 {
> + compatible = "infineon,ir35221";
> + reg = <0x72>;
> + };
> +
> + ir35221@73 {
> + compatible = "infineon,ir35221";
> + reg = <0x73>;
> + };
> +
> + ir35221@74 {
> + compatible = "infineon,ir35221";
> + reg = <0x74>;
> + };
> +};
> +
> +&i2c11 {
> + status = "okay";
> +
> + tmp275@48 {
> + compatible = "ti,tmp275";
> + reg = <0x48>;
> + };
> +
> + tmp275@49 {
> + compatible = "ti,tmp275";
> + reg = <0x49>;
> + };
> +};
> +
> +&i2c12 {
> + status = "okay";
> +};
> +
> +&i2c13 {
> + status = "okay";
> +};
> +
> +&i2c14 {
> + status = "okay";
> +};
> +
> +&i2c15 {
> + status = "okay";
> +};
It might be worth splitting out the i2c bits as the support isn't yet
upstream.
> +
> +&lpc_ctrl {
> + status = "okay";
> + memory-region = <&flash_memory>;
> + flash = <&spi1>;
Drop the flash property as we won't be using that.
> +};
> +
> +&mac0 {
> + status = "okay";
> +};
> +
> +&mac1 {
> + status = "okay";
> +};
> +
> +&mac2 {
> + status = "okay";
> +};
> +
> +&mac3 {
> + status = "okay";
> +};
Only MACs 3 and 4 are connected. Both should also have use-ncsi and request
the RMII pinmux.
> +
> +&sdc {
> + status = "okay";
> +};
> +
> +&sdhci0 {
> + status = "okay";
> +
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_sd1_default>;
> +};
> +
> +&sdhci1 {
> + status = "okay";
> +
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_sd2_default>;
> +};
We're only using the eMMC controller (i.e. neither of the two SD slots),
so we shouldn't be enabling these.
Andrew
^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [PATCH v2 linux dev-5.3 3/4] ARM: dts: aspeed-g6: Add lpc devices
2019-09-19 15:23 ` [PATCH v2 linux dev-5.3 3/4] ARM: dts: aspeed-g6: Add lpc devices Brad Bishop
2019-09-19 16:29 ` Eddie James
@ 2019-09-20 8:04 ` Andrew Jeffery
1 sibling, 0 replies; 24+ messages in thread
From: Andrew Jeffery @ 2019-09-20 8:04 UTC (permalink / raw)
To: Brad Bishop, Joel Stanley; +Cc: openbmc
On Fri, 20 Sep 2019, at 00:53, Brad Bishop wrote:
> Assume everything is the same as G5, except the interrupt is updated.
KCS, BT, mailbox and so forth are actually on separate IRQs now.
Take a look at the SDK devicetree:
https://github.com/AspeedTech-BMC/linux/blob/aspeed-dev-v5.1/arch/arm/boot/dts/aspeed-g6.dtsi
>
> Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com>
> ---
> arch/arm/boot/dts/aspeed-g6.dtsi | 91 ++++++++++++++++++++++++++++++++
> 1 file changed, 91 insertions(+)
>
> diff --git a/arch/arm/boot/dts/aspeed-g6.dtsi b/arch/arm/boot/dts/aspeed-g6.dtsi
> index 72038c16f541..b4991cbe1f36 100644
> --- a/arch/arm/boot/dts/aspeed-g6.dtsi
> +++ b/arch/arm/boot/dts/aspeed-g6.dtsi
> @@ -249,6 +249,97 @@
> status = "disabled";
> };
>
> + lpc: lpc@1e789000 {
> + compatible = "aspeed,ast2600-lpc", "simple-mfd";
> + reg = <0x1e789000 0x1000>;
> +
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges = <0x0 0x1e789000 0x1000>;
> +
> + lpc_bmc: lpc-bmc@0 {
> + compatible = "aspeed,ast2600-lpc-bmc", "simple-mfd", "syscon";
> + reg = <0x0 0x80>;
> + reg-io-width = <4>;
> +
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges = <0x0 0x0 0x80>;
> +
> + kcs1: kcs1@0 {
> + compatible = "aspeed,ast2600-kcs-bmc";
> + interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
> + kcs_chan = <1>;
> + status = "disabled";
> + };
> + kcs2: kcs2@0 {
> + compatible = "aspeed,ast2600-kcs-bmc";
> + interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
> + kcs_chan = <2>;
> + status = "disabled";
> + };
> + kcs3: kcs3@0 {
> + compatible = "aspeed,ast2600-kcs-bmc";
> + interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
> + kcs_chan = <3>;
> + status = "disabled";
> + };
> + };
> +
> + lpc_host: lpc-host@80 {
> + compatible = "aspeed,ast2600-lpc-host", "simple-mfd", "syscon";
> + reg = <0x80 0x1e0>;
> + reg-io-width = <4>;
> +
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges = <0x0 0x80 0x1e0>;
> +
> + kcs4: kcs4@0 {
> + compatible = "aspeed,ast2600-kcs-bmc";
> + interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
> + kcs_chan = <4>;
> + status = "disabled";
> + };
> +
> + lpc_ctrl: lpc-ctrl@0 {
> + compatible = "aspeed,ast2600-lpc-ctrl";
> + reg = <0x0 0x80>;
> + clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
> + status = "disabled";
> + };
> +
> + lpc_snoop: lpc-snoop@0 {
> + compatible = "aspeed,ast2600-lpc-snoop";
> + reg = <0x0 0x80>;
> + interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
> + status = "disabled";
> + };
> +
> + lhc: lhc@20 {
> + compatible = "aspeed,ast2600-lhc";
> + reg = <0x20 0x24 0x48 0x8>;
> + };
> +
> + lpc_reset: reset-controller@18 {
> + compatible = "aspeed,ast2600-lpc-reset";
> + reg = <0x18 0x4>;
> + #reset-cells = <1>;
> + };
> +
> + ibt: ibt@c0 {
> + compatible = "aspeed,ast2600-ibt-bmc";
> + reg = <0xc0 0x18>;
> + interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
> + status = "disabled";
> + };
> +
> + sio_regs: regs {
> + compatible = "aspeed,bmc-misc";
> + };
> + };
> + };
> +
> sdc: sdc@1e740000 {
> compatible = "aspeed,ast2600-sd-controller";
> reg = <0x1e740000 0x100>;
> --
> 2.21.0
>
^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [PATCH v2 linux dev-5.3 1/4] dt-bindings: lpc: add aspeed-g6 compatible strings
2019-09-20 6:30 ` Andrew Jeffery
@ 2019-09-24 19:49 ` Brad Bishop
0 siblings, 0 replies; 24+ messages in thread
From: Brad Bishop @ 2019-09-24 19:49 UTC (permalink / raw)
To: Andrew Jeffery; +Cc: Eddie James, Joel Stanley, openbmc
at 2:30 AM, Andrew Jeffery <andrew@aj.id.au> wrote:
Thanks Andrew, Eddie for the review.
>
>
> On Fri, 20 Sep 2019, at 01:55, Eddie James wrote:
>> On 9/19/19 10:23 AM, Brad Bishop wrote:
>>> Assume The AST2600 SoCs contain the same LPC devices as the AST2500.
>
> Has anyone validated the assumption?
They have the same register set in the LPC space. This is about as far as
I’ve gotten.
>
>> Reviewed-by: Eddie James <eajames@linux.ibm.com>
>>
>>
>>> Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com>
>>> ---
>>> .../devicetree/bindings/ipmi/aspeed,ast2400-ibt-bmc.txt | 3 ++-
>>> Documentation/devicetree/bindings/mfd/aspeed-lpc.txt | 8 +++++++-
>
> This should be split in two for upstream as the IPMI changes will need to
> go
> via Corey while the MFD changes go through Lee.
Split in two in v3.
^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [PATCH v2 linux dev-5.3 2/4] ARM: aspeed-g6: lpc: add compatible strings
2019-09-20 6:31 ` Andrew Jeffery
@ 2019-09-24 19:50 ` Brad Bishop
0 siblings, 0 replies; 24+ messages in thread
From: Brad Bishop @ 2019-09-24 19:50 UTC (permalink / raw)
To: Andrew Jeffery; +Cc: Joel Stanley, openbmc
at 2:31 AM, Andrew Jeffery <andrew@aj.id.au> wrote:
>
>
> On Fri, 20 Sep 2019, at 00:53, Brad Bishop wrote:
>> Assume the AST2600 SoC contains the same LPC devices as the AST2500.
>>
>> Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com>
>> ---
>> v2:
>> - removed DT binding documentation changes
>> ---
>> drivers/char/ipmi/bt-bmc.c | 1 +
>> drivers/char/ipmi/kcs_bmc_aspeed.c | 1 +
>> drivers/reset/reset-simple.c | 1 +
>> drivers/soc/aspeed/aspeed-lpc-ctrl.c | 1 +
>> drivers/soc/aspeed/aspeed-lpc-snoop.c | 2 ++
>> 5 files changed, 6 insertions(+)
>
> Also should be split for upstreaming, but as with the bindings the changes
> are fine in principle.
Split in three (ipmi, reset, socc) in v3.
^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [PATCH v2 linux dev-5.3 3/4] ARM: dts: aspeed-g6: Add lpc devices
2019-09-20 6:37 ` Andrew Jeffery
@ 2019-09-24 19:51 ` Brad Bishop
0 siblings, 0 replies; 24+ messages in thread
From: Brad Bishop @ 2019-09-24 19:51 UTC (permalink / raw)
To: Andrew Jeffery; +Cc: Joel Stanley, openbmc
at 2:37 AM, Andrew Jeffery <andrew@aj.id.au> wrote:
>
>
> On Fri, 20 Sep 2019, at 00:53, Brad Bishop wrote:
>> Assume everything is the same as G5, except the interrupt is updated.
>>
>> Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com>
>> ---
>> arch/arm/boot/dts/aspeed-g6.dtsi | 91 ++++++++++++++++++++++++++++++++
>> 1 file changed, 91 insertions(+)
>>
>> diff --git a/arch/arm/boot/dts/aspeed-g6.dtsi
>> b/arch/arm/boot/dts/aspeed-g6.dtsi
>> index 72038c16f541..b4991cbe1f36 100644
>> --- a/arch/arm/boot/dts/aspeed-g6.dtsi
>> +++ b/arch/arm/boot/dts/aspeed-g6.dtsi
>> @@ -249,6 +249,97 @@
>> status = "disabled";
>> };
>>
>> + lpc: lpc@1e789000 {
>> + compatible = "aspeed,ast2600-lpc", "simple-mfd";
>> + reg = <0x1e789000 0x1000>;
>> +
>> + #address-cells = <1>;
>> + #size-cells = <1>;
>> + ranges = <0x0 0x1e789000 0x1000>;
>> +
>> + lpc_bmc: lpc-bmc@0 {
>> + compatible = "aspeed,ast2600-lpc-bmc", "simple-mfd", "syscon";
>> + reg = <0x0 0x80>;
>> + reg-io-width = <4>;
>> +
>> + #address-cells = <1>;
>> + #size-cells = <1>;
>> + ranges = <0x0 0x0 0x80>;
>> +
>> + kcs1: kcs1@0 {
>> + compatible = "aspeed,ast2600-kcs-bmc";
>> + interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
>> + kcs_chan = <1>;
>> + status = "disabled";
>> + };
>> + kcs2: kcs2@0 {
>> + compatible = "aspeed,ast2600-kcs-bmc";
>> + interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
>> + kcs_chan = <2>;
>> + status = "disabled";
>> + };
>> + kcs3: kcs3@0 {
>> + compatible = "aspeed,ast2600-kcs-bmc";
>> + interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
>> + kcs_chan = <3>;
>> + status = "disabled";
>> + };
>> + };
>> +
>> + lpc_host: lpc-host@80 {
>> + compatible = "aspeed,ast2600-lpc-host", "simple-mfd", "syscon";
>> + reg = <0x80 0x1e0>;
>> + reg-io-width = <4>;
>> +
>> + #address-cells = <1>;
>> + #size-cells = <1>;
>> + ranges = <0x0 0x80 0x1e0>;
>> +
>> + kcs4: kcs4@0 {
>> + compatible = "aspeed,ast2600-kcs-bmc";
>> + interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
>> + kcs_chan = <4>;
>> + status = "disabled";
>> + };
>
> I've got some patches floating around that I need to respin that adjust
> the kcs binding.
> The new dtsi with the existing binding means we're going to increase the
> amplification
> of dtc warnings :(
>
>> +
>> + lpc_ctrl: lpc-ctrl@0 {
>> + compatible = "aspeed,ast2600-lpc-ctrl";
>> + reg = <0x0 0x80>;
>> + clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
>> + status = "disabled";
>> + };
>> +
>> + lpc_snoop: lpc-snoop@0 {
>> + compatible = "aspeed,ast2600-lpc-snoop";
>> + reg = <0x0 0x80>;
>> + interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
>> + status = "disabled";
>> + };
>> +
>> + lhc: lhc@20 {
>> + compatible = "aspeed,ast2600-lhc";
>> + reg = <0x20 0x24 0x48 0x8>;
>> + };
>> +
>> + lpc_reset: reset-controller@18 {
>> + compatible = "aspeed,ast2600-lpc-reset";
>> + reg = <0x18 0x4>;
>> + #reset-cells = <1>;
>> + };
>> +
>> + ibt: ibt@c0 {
>> + compatible = "aspeed,ast2600-ibt-bmc";
>> + reg = <0xc0 0x18>;
>> + interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
>> + status = "disabled";
>> + };
>> +
>> + sio_regs: regs {
>> + compatible = "aspeed,bmc-misc";
>> + };
>
> Can you please split the sio_regs one out to a separate patch?
Split in v3.
> The necessary patches got nak'ed upstream a while back and I haven't
> circled back around
> to implement something more palatable. Put the patch adding it at the top
> of
> your series, then you can send the earlier ones upstream.
>
> Andrew
^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [PATCH v2 linux dev-5.3 4/4] ARM: dts: aspeed: add Rainier system
2019-09-20 7:25 ` Andrew Jeffery
@ 2019-09-24 19:53 ` Brad Bishop
0 siblings, 0 replies; 24+ messages in thread
From: Brad Bishop @ 2019-09-24 19:53 UTC (permalink / raw)
To: Andrew Jeffery; +Cc: Joel Stanley, openbmc
at 3:25 AM, Andrew Jeffery <andrew@aj.id.au> wrote:
>
>
> On Fri, 20 Sep 2019, at 00:53, Brad Bishop wrote:
>> Rainier is a new Power system with an AST2600.
>>
>> Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com>
>> ---
>> v2:
>> - reordered rainier DT elements (alphabetized).
>> - added rainier rtc, lpc-ctl, reserved memory, mac devices
>> ---
>> arch/arm/boot/dts/Makefile | 3 +-
>> arch/arm/boot/dts/aspeed-bmc-opp-rainier.dts | 485 +++++++++++++++++++
>> 2 files changed, 487 insertions(+), 1 deletion(-)
>> create mode 100644 arch/arm/boot/dts/aspeed-bmc-opp-rainier.dts
>>
>> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
>> index 5af075c2f819..2f81a4be50a8 100644
>> --- a/arch/arm/boot/dts/Makefile
>> +++ b/arch/arm/boot/dts/Makefile
>> @@ -1293,4 +1293,5 @@ dtb-$(CONFIG_ARCH_ASPEED) += \
>> aspeed-bmc-opp-witherspoon.dtb \
>> aspeed-bmc-opp-zaius.dtb \
>> aspeed-bmc-portwell-neptune.dtb \
>> - aspeed-bmc-quanta-q71l.dtb
>> + aspeed-bmc-quanta-q71l.dtb \
>> + aspeed-bmc-opp-rainier.dtb
>
> Rainier isn't an OpenPOWER Platform so we should drop the 'opp' or
> potentially substitute it with 'ibm' ("aspeed-bmc-ibm-rainier.dtb”).
I wondered about this. Renamed to aspeed-bmc-ibm-rainier in v3.
>
>> diff --git a/arch/arm/boot/dts/aspeed-bmc-opp-rainier.dts
>> b/arch/arm/boot/dts/aspeed-bmc-opp-rainier.dts
>> new file mode 100644
>> index 000000000000..5f45b1effe4a
>> --- /dev/null
>> +++ b/arch/arm/boot/dts/aspeed-bmc-opp-rainier.dts
>> @@ -0,0 +1,485 @@
>> +// SPDX-License-Identifier: GPL-2.0-or-later
>> +// Copyright 2019 IBM Corp.
>> +/dts-v1/;
>> +
>> +#include "aspeed-g6.dtsi"
>> +
>> +/ {
>> + model = "Rainier";
>> + compatible = "ibm,rainier-bmc", "aspeed,ast2600";
>> +
>> + aliases {
>> + serial4 = &uart5;
>> + };
>> +
>> + chosen {
>> + stdout-path = &uart5;
>> + bootargs = "console=ttyS4,115200n8";
>> + };
>> +
>> + memory@80000000 {
>> + device_type = "memory";
>> + reg = <0x80000000 0x80000000>;
>
> Do we have 2GiB? According to the schematic I have it should be 1GiB.
> My schematic could be out of date though.
You are correct - changed to 1GB in v3.
>
>> + };
>> +
>> + reserved-memory {
>> + #address-cells = <1>;
>> + #size-cells = <1>;
>> + ranges;
>> +
>> + flash_memory: region@98000000 {
>> + no-map;
>> + reg = <0x98000000 0x04000000>; /* 64M */
>
> That's a strange place to put it given we have much more memory :) We
> picked that address for the AST2500-based OPP systems because it's
> the lowest usable address below the VGA region. If we have more RAM
> then we should move it up.
Moved to 0xbb000000 in v3.
>
>> + };
>> + };
>> +
>> +};
>> +
>> +&emmc_controller {
>> + status = "okay";
>> +};
>> +
>> +&emmc {
>> + status = "okay";
>> +};
>> +
>> +&fsim0 {
>> + status = "okay";
>> +};
>> +
>> +&ibt {
>> + status = "okay";
>> +};
>> +
>> +&i2c0 {
>> + status = "okay";
>> +};
>> +
>> +&i2c1 {
>> + status = "okay";
>> +};
>> +
>> +&i2c2 {
>> + status = "okay";
>> +};
>> +
>> +&i2c3 {
>> + status = "okay";
>> +
>> + power-supply@68 {
>> + compatible = "ibm,cffps2";
>> + reg = <0x68>;
>> + };
>> +
>> + power-supply@69 {
>> + compatible = "ibm,cffps2";
>> + reg = <0x69>;
>> + };
>> +
>> + power-supply@6a {
>> + compatible = "ibm,cffps2";
>> + reg = <0x6a>;
>> + };
>> +
>> + power-supply@6b {
>> + compatible = "ibm,cffps2";
>> + reg = <0x6b>;
>> + };
>> +};
>> +
>> +&i2c4 {
>> + status = "okay";
>> +
>> + tmp275@48 {
>> + compatible = "ti,tmp275";
>> + reg = <0x48>;
>> + };
>> +
>> + tmp275@49 {
>> + compatible = "ti,tmp275";
>> + reg = <0x49>;
>> + };
>> +
>> + tmp275@4a {
>> + compatible = "ti,tmp275";
>> + reg = <0x4a>;
>> + };
>> +};
>> +
>> +&i2c5 {
>> + status = "okay";
>> +
>> + tmp275@48 {
>> + compatible = "ti,tmp275";
>> + reg = <0x48>;
>> + };
>> +
>> + tmp275@49 {
>> + compatible = "ti,tmp275";
>> + reg = <0x49>;
>> + };
>> +};
>> +
>> +&i2c6 {
>> + status = "okay";
>> +
>> + tmp275@48 {
>> + compatible = "ti,tmp275";
>> + reg = <0x48>;
>> + };
>> +
>> + tmp275@4a {
>> + compatible = "ti,tmp275";
>> + reg = <0x4a>;
>> + };
>> +
>> + tmp275@4b {
>> + compatible = "ti,tmp275";
>> + reg = <0x4b>;
>> + };
>> +};
>> +
>> +&i2c7 {
>> + status = "okay";
>> +
>> + si7021-a20@20 {
>> + compatible = "silabs,si7020";
>> + reg = <0x20>;
>> + };
>> +
>> + tmp275@48 {
>> + compatible = "ti,tmp275";
>> + reg = <0x48>;
>> + };
>> +
>> + max31785@52 {
>> + compatible = "maxim,max31785a";
>> + reg = <0x52>;
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> +
>> + fan@0 {
>> + compatible = "pmbus-fan";
>> + reg = <0>;
>> + tach-pulses = <2>;
>> + maxim,fan-rotor-input = "tach";
>> + maxim,fan-pwm-freq = <25000>;
>> + maxim,fan-dual-tach;
>> + maxim,fan-no-watchdog;
>> + maxim,fan-no-fault-ramp;
>> + maxim,fan-ramp = <2>;
>> + maxim,fan-fault-pin-mon;
>> + };
>> +
>> + fan@1 {
>> + compatible = "pmbus-fan";
>> + reg = <1>;
>> + tach-pulses = <2>;
>> + maxim,fan-rotor-input = "tach";
>> + maxim,fan-pwm-freq = <25000>;
>> + maxim,fan-dual-tach;
>> + maxim,fan-no-watchdog;
>> + maxim,fan-no-fault-ramp;
>> + maxim,fan-ramp = <2>;
>> + maxim,fan-fault-pin-mon;
>> + };
>> +
>> + fan@2 {
>> + compatible = "pmbus-fan";
>> + reg = <2>;
>> + tach-pulses = <2>;
>> + maxim,fan-rotor-input = "tach";
>> + maxim,fan-pwm-freq = <25000>;
>> + maxim,fan-dual-tach;
>> + maxim,fan-no-watchdog;
>> + maxim,fan-no-fault-ramp;
>> + maxim,fan-ramp = <2>;
>> + maxim,fan-fault-pin-mon;
>> + };
>> +
>> + fan@3 {
>> + compatible = "pmbus-fan";
>> + reg = <3>;
>> + tach-pulses = <2>;
>> + maxim,fan-rotor-input = "tach";
>> + maxim,fan-pwm-freq = <25000>;
>> + maxim,fan-dual-tach;
>> + maxim,fan-no-watchdog;
>> + maxim,fan-no-fault-ramp;
>> + maxim,fan-ramp = <2>;
>> + maxim,fan-fault-pin-mon;
>> + };
>> + };
>> +
>> + pca0: pca9552@60 {
>> + compatible = "nxp,pca9552";
>> + reg = <0x60>;
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> +
>> + gpio-controller;
>> + #gpio-cells = <2>;
>> +
>> + gpio@0 {
>> + reg = <0>;
>> + };
>> +
>> + gpio@1 {
>> + reg = <1>;
>> + };
>> +
>> + gpio@2 {
>> + reg = <2>;
>> + };
>> +
>> + gpio@3 {
>> + reg = <3>;
>> + };
>> +
>> + gpio@4 {
>> + reg = <4>;
>> + };
>> +
>> + gpio@5 {
>> + reg = <5>;
>> + };
>> +
>> + gpio@6 {
>> + reg = <6>;
>> + };
>> +
>> + gpio@7 {
>> + reg = <7>;
>> + };
>> +
>> + gpio@8 {
>> + reg = <8>;
>> + };
>> +
>> + gpio@9 {
>> + reg = <9>;
>> + };
>> +
>> + gpio@10 {
>> + reg = <10>;
>> + };
>> +
>> + gpio@11 {
>> + reg = <11>;
>> + };
>> +
>> + gpio@12 {
>> + reg = <12>;
>> + };
>> +
>> + gpio@13 {
>> + reg = <13>;
>> + };
>> +
>> + gpio@14 {
>> + reg = <14>;
>> + };
>> +
>> + gpio@15 {
>> + reg = <15>;
>> + };
>> + };
>> +
>> + dps: dps310@76 {
>> + compatible = "infineon,dps310";
>> + reg = <0x76>;
>> + #io-channel-cells = <0>;
>> + };
>> +};
>> +
>> +&i2c8 {
>> + status = "okay";
>> +
>> + ucd90320@b {
>> + compatible = "ti,ucd90160";
>> + reg = <0x0b>;
>> + };
>> +
>> + ucd90320@c {
>> + compatible = "ti,ucd90160";
>> + reg = <0x0c>;
>> + };
>> +
>> + ucd90320@11 {
>> + compatible = "ti,ucd90160";
>> + reg = <0x11>;
>> + };
>> +
>> + rtc@32 {
>> + compatible = "epson,rx8900";
>> + reg = <0x32>;
>> + };
>> +
>> + tmp275@48 {
>> + compatible = "ti,tmp275";
>> + reg = <0x48>;
>> + };
>> +
>> + tmp275@4a {
>> + compatible = "ti,tmp275";
>> + reg = <0x4a>;
>> + };
>> +};
>> +
>> +&i2c9 {
>> + status = "okay";
>> +
>> + ir35221@42 {
>> + compatible = "infineon,ir35221";
>> + reg = <0x42>;
>> + };
>> +
>> + ir35221@43 {
>> + compatible = "infineon,ir35221";
>> + reg = <0x43>;
>> + };
>> +
>> + ir35221@44 {
>> + compatible = "infineon,ir35221";
>> + reg = <0x44>;
>> + };
>> +
>> + tmp423a@4c {
>> + compatible = "ti,tmp423";
>> + reg = <0x4c>;
>> + };
>> +
>> + tmp423b@4d {
>> + compatible = "ti,tmp423";
>> + reg = <0x4d>;
>> + };
>> +
>> + ir35221@72 {
>> + compatible = "infineon,ir35221";
>> + reg = <0x72>;
>> + };
>> +
>> + ir35221@73 {
>> + compatible = "infineon,ir35221";
>> + reg = <0x73>;
>> + };
>> +
>> + ir35221@74 {
>> + compatible = "infineon,ir35221";
>> + reg = <0x74>;
>> + };
>> +};
>> +
>> +&i2c10 {
>> + status = "okay";
>> +
>> + ir35221@42 {
>> + compatible = "infineon,ir35221";
>> + reg = <0x42>;
>> + };
>> +
>> + ir35221@43 {
>> + compatible = "infineon,ir35221";
>> + reg = <0x43>;
>> + };
>> +
>> + ir35221@44 {
>> + compatible = "infineon,ir35221";
>> + reg = <0x44>;
>> + };
>> +
>> + tmp423a@4c {
>> + compatible = "ti,tmp423";
>> + reg = <0x4c>;
>> + };
>> +
>> + tmp423b@4d {
>> + compatible = "ti,tmp423";
>> + reg = <0x4d>;
>> + };
>> +
>> + ir35221@72 {
>> + compatible = "infineon,ir35221";
>> + reg = <0x72>;
>> + };
>> +
>> + ir35221@73 {
>> + compatible = "infineon,ir35221";
>> + reg = <0x73>;
>> + };
>> +
>> + ir35221@74 {
>> + compatible = "infineon,ir35221";
>> + reg = <0x74>;
>> + };
>> +};
>> +
>> +&i2c11 {
>> + status = "okay";
>> +
>> + tmp275@48 {
>> + compatible = "ti,tmp275";
>> + reg = <0x48>;
>> + };
>> +
>> + tmp275@49 {
>> + compatible = "ti,tmp275";
>> + reg = <0x49>;
>> + };
>> +};
>> +
>> +&i2c12 {
>> + status = "okay";
>> +};
>> +
>> +&i2c13 {
>> + status = "okay";
>> +};
>> +
>> +&i2c14 {
>> + status = "okay";
>> +};
>> +
>> +&i2c15 {
>> + status = "okay";
>> +};
>
> It might be worth splitting out the i2c bits as the support isn't yet
> upstream.
split out in v3.
>
>> +
>> +&lpc_ctrl {
>> + status = "okay";
>> + memory-region = <&flash_memory>;
>> + flash = <&spi1>;
>
> Drop the flash property as we won't be using that.
dropped in v3.
>
>> +};
>> +
>> +&mac0 {
>> + status = "okay";
>> +};
>> +
>> +&mac1 {
>> + status = "okay";
>> +};
>> +
>> +&mac2 {
>> + status = "okay";
>> +};
>> +
>> +&mac3 {
>> + status = "okay";
>> +};
>
> Only MACs 3 and 4 are connected. Both should also have use-ncsi and request
> the RMII pinmux.
dropped 1 & 2, selected use-ncsi, and requested RMII pinmux in v3.
>
>> +
>> +&sdc {
>> + status = "okay";
>> +};
>> +
>> +&sdhci0 {
>> + status = "okay";
>> +
>> + pinctrl-names = "default";
>> + pinctrl-0 = <&pinctrl_sd1_default>;
>> +};
>> +
>> +&sdhci1 {
>> + status = "okay";
>> +
>> + pinctrl-names = "default";
>> + pinctrl-0 = <&pinctrl_sd2_default>;
>> +};
>
> We're only using the eMMC controller (i.e. neither of the two SD slots),
> so we shouldn't be enabling these.
dropped in v3.
>
> Andrew
^ permalink raw reply [flat|nested] 24+ messages in thread
end of thread, other threads:[~2019-09-24 19:54 UTC | newest]
Thread overview: 24+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2019-09-19 15:23 [PATCH v2 linux dev-5.3 0/5] ARM: dts: aspeed-g6 lpc, rainier Brad Bishop
2019-09-19 15:23 ` [PATCH v2 linux dev-5.3 1/4] dt-bindings: lpc: add aspeed-g6 compatible strings Brad Bishop
2019-09-19 15:23 ` [PATCH v2 linux dev-5.3 2/4] ARM: aspeed-g6: lpc: add " Brad Bishop
2019-09-20 6:31 ` Andrew Jeffery
2019-09-24 19:50 ` Brad Bishop
2019-09-19 15:23 ` [PATCH v2 linux dev-5.3 3/4] ARM: dts: aspeed-g6: Add lpc devices Brad Bishop
2019-09-20 6:37 ` Andrew Jeffery
2019-09-24 19:51 ` Brad Bishop
2019-09-19 15:23 ` [PATCH v2 linux dev-5.3 4/4] ARM: dts: aspeed: add Rainier system Brad Bishop
2019-09-20 7:25 ` Andrew Jeffery
2019-09-24 19:53 ` Brad Bishop
2019-09-19 15:23 ` [PATCH v2 linux dev-5.3 0/5] ARM: dts: aspeed-g6 lpc, rainier Brad Bishop
2019-09-19 15:23 ` [PATCH v2 linux dev-5.3 1/4] dt-bindings: lpc: add aspeed-g6 compatible strings Brad Bishop
2019-09-19 16:25 ` Eddie James
2019-09-20 6:30 ` Andrew Jeffery
2019-09-24 19:49 ` Brad Bishop
2019-09-19 15:23 ` [PATCH v2 linux dev-5.3 2/4] ARM: aspeed-g6: lpc: add " Brad Bishop
2019-09-19 16:26 ` Eddie James
2019-09-19 15:23 ` [PATCH v2 linux dev-5.3 3/4] ARM: dts: aspeed-g6: Add lpc devices Brad Bishop
2019-09-19 16:29 ` Eddie James
2019-09-20 8:04 ` Andrew Jeffery
2019-09-19 15:23 ` [PATCH v2 linux dev-5.3 4/4] ARM: dts: aspeed: add Rainier system Brad Bishop
2019-09-19 16:31 ` Eddie James
2019-09-19 15:32 ` [PATCH v2 linux dev-5.3 0/5] ARM: dts: aspeed-g6 lpc, rainier Brad Bishop
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