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From: Andrew Cooper <andrew.cooper3@citrix.com>
To: Jan Beulich <JBeulich@suse.com>
Cc: Xen-devel <xen-devel@lists.xen.org>
Subject: Re: [PATCH v9 02/11] x86/cpuid: Handling of IBRS/IBPB, STIBP and IBRS for guests
Date: Fri, 19 Jan 2018 13:06:44 +0000	[thread overview]
Message-ID: <e88cedd2-a37d-5725-f6c9-fccfa5fdbfc1@citrix.com> (raw)
In-Reply-To: <5A61F80202000078001A05D6@prv-mh.provo.novell.com>

On 19/01/18 12:52, Jan Beulich wrote:
>>>> On 19.01.18 at 13:36, <andrew.cooper3@citrix.com> wrote:
>> On 19/01/18 12:11, Jan Beulich wrote:
>>>>>> On 19.01.18 at 13:01, <andrew.cooper3@citrix.com> wrote:
>>>> On 19/01/18 11:46, Jan Beulich wrote:
>>>>>>>> On 19.01.18 at 11:53, <andrew.cooper3@citrix.com> wrote:
>>>>>> On 19/01/18 10:40, Jan Beulich wrote:
>>>>>>>>>> On 18.01.18 at 16:46, <andrew.cooper3@citrix.com> wrote:
>>>>>>>> For guest safety, we treat STIBP as special, always override the toolstack
>>>>>>>> choice, and always advertise STIBP if IBRS is available.  This removes the
>>>>>>>> corner case where STIBP is not advertised, but the guest is running on
>>>>>>>> HT-capable hardware where it does matter.
>>>>>>> I guess the answer to my question may live somewhere later in the
>>>>>>> series, but since I haven't got there yet: Is this based on the
>>>>>>> assumption that on HT-capable hardware they would always be
>>>>>>> available together? Otherwise, how do you emulate STIBP for the
>>>>>>> guest if all you've got is IBRS/IBPB?
>>>>>> The safety depends on the guest seeing STIBP and using it if it wants
>>>>>> to.  (Not that I've seen any sign of STIBP in the Linux code, or from
>>>>>> observing what Windows appears to do).
>>>>>>
>>>>>> For topology reasons (despite the other cans of worms in this area), we
>>>>>> unilaterally set HT, so all guests should find themselves on HT-capable
>>>>>> systems.
>>>>> But this doesn't answer my question: What do you do if the guest
>>>>> uses STIBP (because you've told it that it can), but the hardware
>>>>> doesn't support it? Aren't you producing a false sense of security
>>>>> to the guest this way?
>>>> The entire point of SPEC_CTRL_STIBP being ignored on some hardware is to
>>>> let this work.
>>>>
>>>> By advertising STIBP, we are telling the guest "There might be (but not
>>>> definitely) interference from other threads in the BTB.  If you care
>>>> about this, you should set SPEC_CTRL.STIBP".
>>>>
>>>> On hardware where there is definitely no interference, this is a nop.
>>>>
>>>> In any situation where a guest might migrate to a host where there is
>>>> interference, it needs to know about STIBP so (if it cares) it can
>>>> choose to set SPEC_CTRL.STIBP.
>>> This is the part that is clear, but my question remains unanswered:
>>> If HT hardware doesn't support STIBP, how can the guest guard
>>> itself _successfully_?
>> I'm completely lost now.  On hardware which doesn't support STIBP, there
>> is no action required required.
> How that? Do you perhaps mean there's nothing we can do? Yes,
> and the same applies to the guest. Yet if you've got HT hardware
> which supports IBRS but not STIBP

If Intel's microcode fails to advertise STIBP on HT-hardware where it is
required for safety, then its broken microcode.

> you still tell the guest that STIBP is available. Hence the guest seeing (and using) both, it'll
> assume it is safe (and perhaps report so to its users) when in
> fact it's still vulnerable.

Ok - I see your point now, but there is nothing we can do about that.

Even if Xen faithfully reported the (lack of) STIBP to the guest, and
fixed up behind the scenes just in case (as per v8 of my series), the
guest would still be vulnerable.

There are some thing we are simply going to have to trust the microcode
to do right.

~Andrew

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  reply	other threads:[~2018-01-19 13:06 UTC|newest]

Thread overview: 60+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-01-18 15:45 [PATCH v9 00/11] x86: Mitigations for SP2/CVE-2017-5715/Branch Target Injection Andrew Cooper
2018-01-18 15:46 ` [PATCH v9 01/11] x86/thunk: Fix GEN_INDIRECT_THUNK comment Andrew Cooper
2018-01-18 16:06   ` Jan Beulich
2018-01-18 15:46 ` [PATCH v9 02/11] x86/cpuid: Handling of IBRS/IBPB, STIBP and IBRS for guests Andrew Cooper
2018-01-19 10:40   ` Jan Beulich
2018-01-19 10:53     ` Andrew Cooper
2018-01-19 11:46       ` Jan Beulich
2018-01-19 12:01         ` Andrew Cooper
2018-01-19 12:11           ` Jan Beulich
2018-01-19 12:36             ` Andrew Cooper
2018-01-19 12:52               ` Jan Beulich
2018-01-19 13:06                 ` Andrew Cooper [this message]
2018-01-19 13:33                   ` Jan Beulich
2018-01-19 15:00                     ` Andrew Cooper
2018-01-19 15:09                       ` Jan Beulich
2018-01-18 15:46 ` [PATCH v9 03/11] x86/msr: Emulation of MSR_{SPEC_CTRL, PRED_CMD} " Andrew Cooper
2018-01-19 10:45   ` Jan Beulich
2018-01-19 11:05     ` Andrew Cooper
2018-01-22 14:50     ` Andrew Cooper
2018-01-18 15:46 ` [PATCH v9 04/11] x86/migrate: Move MSR_SPEC_CTRL on migrate Andrew Cooper
2018-01-18 15:46 ` [PATCH v9 05/11] x86/hvm: Permit guests direct access to MSR_{SPEC_CTRL, PRED_CMD} Andrew Cooper
2018-01-18 18:04   ` Boris Ostrovsky
2018-01-19 10:52   ` Jan Beulich
2018-01-19 10:54     ` Andrew Cooper
2018-01-22  1:47   ` Tian, Kevin
2018-01-18 15:46 ` [PATCH v9 06/11] x86/entry: Organise the use of MSR_SPEC_CTRL at each entry/exit point Andrew Cooper
2018-01-19 10:39   ` Andrew Cooper
2018-01-19 11:43   ` Jan Beulich
2018-01-19 13:36     ` Andrew Cooper
2018-01-19 13:51       ` Jan Beulich
2018-01-22 11:42         ` Andrew Cooper
2018-01-22 12:06           ` Jan Beulich
2018-01-22 13:52             ` Andrew Cooper
2018-01-22 22:27       ` Boris Ostrovsky
2018-01-23  0:17         ` Andrew Cooper
2018-01-23  2:19           ` Boris Ostrovsky
2018-01-23 20:00             ` Andrew Cooper
2018-01-18 15:46 ` [PATCH v9 07/11] x86/boot: Calculate the most appropriate BTI mitigation to use Andrew Cooper
2018-01-19 12:06   ` Jan Beulich
2018-01-19 13:48     ` Andrew Cooper
2018-01-19 14:01   ` Jan Beulich
2018-01-22 15:11     ` Andrew Cooper
2018-01-18 15:46 ` [PATCH v9 08/11] x86/entry: Clobber the Return Stack Buffer/Return Address Stack on entry to Xen Andrew Cooper
2018-01-19 12:47   ` Jan Beulich
2018-01-19 14:24     ` Andrew Cooper
2018-01-19 15:02       ` Jan Beulich
2018-01-19 16:10         ` Andrew Cooper
2018-01-19 16:19           ` Jan Beulich
2018-01-19 16:43             ` Andrew Cooper
2018-01-22 15:51         ` Andrew Cooper
2018-01-22 16:49           ` Jan Beulich
2018-01-22 17:04             ` Andrew Cooper
2018-01-18 15:46 ` [PATCH v9 09/11] x86/ctxt: Issue a speculation barrier between vcpu contexts Andrew Cooper
2018-01-19 13:25   ` Jan Beulich
2018-01-19 14:48     ` Andrew Cooper
2018-01-19 15:07       ` Jan Beulich
2018-01-20 11:10         ` David Woodhouse
2018-01-22 10:15           ` Jan Beulich
2018-01-18 15:46 ` [PATCH v9 10/11] x86/cpuid: Offer Indirect Branch Controls to guests Andrew Cooper
2018-01-18 15:46 ` [PATCH v9 11/11] x86/idle: Clear SPEC_CTRL while idle Andrew Cooper

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