From: Phil Elwell <phil@raspberrypi.org> To: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>, andrew.murray@arm.com, maz@kernel.org, linux-kernel@vger.kernel.org, Rob Herring <robh+dt@kernel.org>, Mark Rutland <mark.rutland@arm.com>, Eric Anholt <eric@anholt.net>, Stefan Wahren <wahrenst@gmx.net> Cc: james.quinlan@broadcom.com, mbrugger@suse.com, f.fainelli@gmail.com, jeremy.linton@arm.com, linux-pci@vger.kernel.org, linux-rpi-kernel@lists.infradead.org, devicetree@vger.kernel.org, bcm-kernel-feedback-list@broadcom.com, linux-arm-kernel@lists.infradead.org Subject: Re: [PATCH v3 3/7] ARM: dts: bcm2711: Enable PCIe controller Date: Tue, 26 Nov 2019 09:37:08 +0000 [thread overview] Message-ID: <ede90a60-8194-4035-01c2-2673f4a8cfe7@raspberrypi.org> (raw) In-Reply-To: <20191126091946.7970-4-nsaenzjulienne@suse.de> Hi Nicolas, On 26/11/2019 09:19, Nicolas Saenz Julienne wrote: > This enables bcm2711's PCIe bus, which is hardwired to a VIA > Technologies XHCI USB 3.0 controller. > > Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de> > > --- > > This will likely need a rebase once the RPi GENET patches land. > > Changes since v2: > - Remove unused interrupt-map > - correct dma-ranges to it's full size, non power of 2 bus DMA > constraints now supported in linux-next[1] > - add device_type > - rename alias from pcie_0 to pcie0 > > Changes since v1: > - remove linux,pci-domain > > [1] https://lkml.org/lkml/2019/11/21/235 > > arch/arm/boot/dts/bcm2711.dtsi | 41 ++++++++++++++++++++++++++++++++++ > 1 file changed, 41 insertions(+) > > diff --git a/arch/arm/boot/dts/bcm2711.dtsi b/arch/arm/boot/dts/bcm2711.dtsi > index 667658497898..2e121fc8b3d0 100644 > --- a/arch/arm/boot/dts/bcm2711.dtsi > +++ b/arch/arm/boot/dts/bcm2711.dtsi > @@ -288,6 +288,47 @@ IRQ_TYPE_LEVEL_LOW)>, > arm,cpu-registers-not-fw-configured; > }; > > + scb { > + compatible = "simple-bus"; > + #address-cells = <2>; > + #size-cells = <1>; > + > + ranges = <0x0 0x7c000000 0x0 0xfc000000 0x03800000>, > + <0x6 0x00000000 0x6 0x00000000 0x40000000>; > + > + pcie0: pcie@7d500000 { > + compatible = "brcm,bcm2711-pcie"; > + reg = <0x0 0x7d500000 0x9310>; > + device_type = "pci"; > + #address-cells = <3>; > + #interrupt-cells = <1>; > + #size-cells = <2>; > + interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>; > + interrupt-names = "pcie", "msi"; > + interrupt-map-mask = <0x0 0x0 0x0 0x7>; > + interrupt-map = <0 0 0 1 &gicv2 GIC_SPI 143 > + IRQ_TYPE_LEVEL_HIGH>; > + msi-controller; > + msi-parent = <&pcie0>; > + > + ranges = <0x02000000 0x0 0xf8000000 0x6 0x00000000 > + 0x0 0x04000000>; > + /* > + * The wrapper around the PCIe block has a bug > + * preventing it from accessing beyond the first 3GB of > + * memory. As the bus DMA mask is rounded up to the > + * closest power of two of the dma-range size, we're > + * forced to set the limit at 2GB. This can be > + * harmlessly changed in the future once the DMA code > + * handles non power of two DMA limits. > + */ > + dma-ranges = <0x02000000 0x0 0x00000000 0x0 0x00000000 > + 0x0 0xc0000000>; The comment doesn't match the data here - I think for now the size field needs to be reduced to 2GB to match the comment. Phil > + brcm,enable-ssc; > + }; > + }; > + > cpus: cpus { > #address-cells = <1>; > #size-cells = <0>; >
WARNING: multiple messages have this Message-ID (diff)
From: Phil Elwell <phil@raspberrypi.org> To: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>, andrew.murray@arm.com, maz@kernel.org, linux-kernel@vger.kernel.org, Rob Herring <robh+dt@kernel.org>, Mark Rutland <mark.rutland@arm.com>, Eric Anholt <eric@anholt.net>, Stefan Wahren <wahrenst@gmx.net> Cc: devicetree@vger.kernel.org, f.fainelli@gmail.com, linux-pci@vger.kernel.org, jeremy.linton@arm.com, mbrugger@suse.com, bcm-kernel-feedback-list@broadcom.com, linux-rpi-kernel@lists.infradead.org, james.quinlan@broadcom.com, linux-arm-kernel@lists.infradead.org Subject: Re: [PATCH v3 3/7] ARM: dts: bcm2711: Enable PCIe controller Date: Tue, 26 Nov 2019 09:37:08 +0000 [thread overview] Message-ID: <ede90a60-8194-4035-01c2-2673f4a8cfe7@raspberrypi.org> (raw) In-Reply-To: <20191126091946.7970-4-nsaenzjulienne@suse.de> Hi Nicolas, On 26/11/2019 09:19, Nicolas Saenz Julienne wrote: > This enables bcm2711's PCIe bus, which is hardwired to a VIA > Technologies XHCI USB 3.0 controller. > > Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de> > > --- > > This will likely need a rebase once the RPi GENET patches land. > > Changes since v2: > - Remove unused interrupt-map > - correct dma-ranges to it's full size, non power of 2 bus DMA > constraints now supported in linux-next[1] > - add device_type > - rename alias from pcie_0 to pcie0 > > Changes since v1: > - remove linux,pci-domain > > [1] https://lkml.org/lkml/2019/11/21/235 > > arch/arm/boot/dts/bcm2711.dtsi | 41 ++++++++++++++++++++++++++++++++++ > 1 file changed, 41 insertions(+) > > diff --git a/arch/arm/boot/dts/bcm2711.dtsi b/arch/arm/boot/dts/bcm2711.dtsi > index 667658497898..2e121fc8b3d0 100644 > --- a/arch/arm/boot/dts/bcm2711.dtsi > +++ b/arch/arm/boot/dts/bcm2711.dtsi > @@ -288,6 +288,47 @@ IRQ_TYPE_LEVEL_LOW)>, > arm,cpu-registers-not-fw-configured; > }; > > + scb { > + compatible = "simple-bus"; > + #address-cells = <2>; > + #size-cells = <1>; > + > + ranges = <0x0 0x7c000000 0x0 0xfc000000 0x03800000>, > + <0x6 0x00000000 0x6 0x00000000 0x40000000>; > + > + pcie0: pcie@7d500000 { > + compatible = "brcm,bcm2711-pcie"; > + reg = <0x0 0x7d500000 0x9310>; > + device_type = "pci"; > + #address-cells = <3>; > + #interrupt-cells = <1>; > + #size-cells = <2>; > + interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>; > + interrupt-names = "pcie", "msi"; > + interrupt-map-mask = <0x0 0x0 0x0 0x7>; > + interrupt-map = <0 0 0 1 &gicv2 GIC_SPI 143 > + IRQ_TYPE_LEVEL_HIGH>; > + msi-controller; > + msi-parent = <&pcie0>; > + > + ranges = <0x02000000 0x0 0xf8000000 0x6 0x00000000 > + 0x0 0x04000000>; > + /* > + * The wrapper around the PCIe block has a bug > + * preventing it from accessing beyond the first 3GB of > + * memory. As the bus DMA mask is rounded up to the > + * closest power of two of the dma-range size, we're > + * forced to set the limit at 2GB. This can be > + * harmlessly changed in the future once the DMA code > + * handles non power of two DMA limits. > + */ > + dma-ranges = <0x02000000 0x0 0x00000000 0x0 0x00000000 > + 0x0 0xc0000000>; The comment doesn't match the data here - I think for now the size field needs to be reduced to 2GB to match the comment. Phil > + brcm,enable-ssc; > + }; > + }; > + > cpus: cpus { > #address-cells = <1>; > #size-cells = <0>; > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2019-11-26 9:43 UTC|newest] Thread overview: 75+ messages / expand[flat|nested] mbox.gz Atom feed top 2019-11-26 9:19 [PATCH v3 0/7] Raspberry Pi 4 PCIe support Nicolas Saenz Julienne 2019-11-26 9:19 ` Nicolas Saenz Julienne 2019-11-26 9:19 ` Nicolas Saenz Julienne 2019-11-26 9:19 ` [PATCH v3 1/7] linux/log2.h: Add roundup/rounddown_pow_two64() family of functions Nicolas Saenz Julienne 2019-11-26 9:19 ` Nicolas Saenz Julienne 2019-11-26 9:19 ` Nicolas Saenz Julienne 2019-11-26 9:19 ` Nicolas Saenz Julienne 2019-11-26 12:51 ` Leon Romanovsky 2019-11-26 12:51 ` Leon Romanovsky 2019-11-26 12:51 ` Leon Romanovsky 2019-11-26 12:51 ` Leon Romanovsky 2019-11-27 18:06 ` Robin Murphy 2019-11-27 18:06 ` Robin Murphy 2019-11-27 18:06 ` Robin Murphy 2019-11-27 18:06 ` Robin Murphy 2019-11-27 18:24 ` Nicolas Saenz Julienne 2019-11-27 18:24 ` Nicolas Saenz Julienne 2019-11-27 18:24 ` Nicolas Saenz Julienne 2019-11-27 18:24 ` Nicolas Saenz Julienne 2019-11-27 19:06 ` Robin Murphy 2019-11-27 19:06 ` Robin Murphy 2019-11-27 19:06 ` Robin Murphy 2019-11-27 19:06 ` Robin Murphy 2019-11-27 19:12 ` Leon Romanovsky 2019-11-27 19:12 ` Leon Romanovsky 2019-11-27 19:12 ` Leon Romanovsky 2019-11-27 19:12 ` Leon Romanovsky 2019-11-27 19:16 ` Nicolas Saenz Julienne 2019-11-27 19:16 ` Nicolas Saenz Julienne 2019-11-27 19:16 ` Nicolas Saenz Julienne 2019-11-27 19:16 ` Nicolas Saenz Julienne 2019-11-27 17:36 ` Nicolas Saenz Julienne 2019-11-27 17:36 ` Nicolas Saenz Julienne 2019-11-27 17:36 ` Nicolas Saenz Julienne 2019-11-26 9:19 ` [PATCH v3 2/7] dt-bindings: PCI: Add bindings for brcmstb's PCIe device Nicolas Saenz Julienne 2019-11-26 9:19 ` Nicolas Saenz Julienne 2019-12-02 16:39 ` Rob Herring 2019-12-02 16:39 ` Rob Herring 2019-11-26 9:19 ` [PATCH v3 3/7] ARM: dts: bcm2711: Enable PCIe controller Nicolas Saenz Julienne 2019-11-26 9:19 ` Nicolas Saenz Julienne 2019-11-26 9:37 ` Phil Elwell [this message] 2019-11-26 9:37 ` Phil Elwell 2019-11-26 9:43 ` Nicolas Saenz Julienne 2019-11-26 9:43 ` Nicolas Saenz Julienne 2019-11-26 9:19 ` [PATCH v3 4/7] PCI: brcmstb: add Broadcom STB PCIe host controller driver Nicolas Saenz Julienne 2019-11-26 9:19 ` Nicolas Saenz Julienne 2019-12-02 15:01 ` Andrew Murray 2019-12-02 15:01 ` Andrew Murray 2019-12-02 15:49 ` Jim Quinlan 2019-12-02 15:49 ` Jim Quinlan 2019-12-03 16:31 ` Jeremy Linton 2019-12-03 16:31 ` Jeremy Linton 2019-12-03 16:48 ` Robin Murphy 2019-12-03 16:48 ` Robin Murphy 2019-12-03 17:23 ` Nicolas Saenz Julienne 2019-12-03 17:23 ` Nicolas Saenz Julienne 2019-11-26 9:19 ` [PATCH v3 5/7] PCI: brcmstb: add MSI capability Nicolas Saenz Julienne 2019-11-26 9:19 ` Nicolas Saenz Julienne 2019-11-29 15:46 ` Andrew Murray 2019-11-29 15:46 ` Andrew Murray 2019-12-02 9:59 ` Nicolas Saenz Julienne 2019-12-02 9:59 ` Nicolas Saenz Julienne 2019-12-02 12:20 ` Andrew Murray 2019-12-02 12:20 ` Andrew Murray 2019-12-02 12:22 ` Nicolas Saenz Julienne 2019-12-02 12:22 ` Nicolas Saenz Julienne 2019-11-26 9:19 ` [PATCH v3 6/7] MAINTAINERS: Add brcmstb PCIe controller Nicolas Saenz Julienne 2019-11-26 9:19 ` [PATCH v3 7/7] arm64: defconfig: Enable Broadcom's STB " Nicolas Saenz Julienne 2019-11-26 9:19 ` Nicolas Saenz Julienne 2019-11-26 21:50 ` [PATCH v3 0/7] Raspberry Pi 4 PCIe support Bjorn Helgaas 2019-11-26 21:50 ` Bjorn Helgaas 2019-11-26 21:50 ` Bjorn Helgaas 2019-11-27 17:28 ` Nicolas Saenz Julienne 2019-11-27 17:28 ` Nicolas Saenz Julienne 2019-11-27 17:28 ` Nicolas Saenz Julienne
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