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* [PATCH 3/6] pxa: fix pxa168 lcd controller vsync/hsync timing error
@ 2009-11-03  6:45 ` Jun Nie
  0 siblings, 0 replies; 12+ messages in thread
From: Jun Nie @ 2009-11-03  6:45 UTC (permalink / raw)
  To: linux-arm-kernel, linux-fbdev-devel

pxa: fix pxa168 lcd controller vsync/hsync timing error

Signed-off-by: Jun Nie <njun@marvell.com>
---
 drivers/video/pxa168fb.c |    4 ++--
 include/video/pxa168fb.h |    2 --
 2 files changed, 2 insertions(+), 4 deletions(-)

diff --git a/drivers/video/pxa168fb.c b/drivers/video/pxa168fb.c
index 2ba1444..bdd524c 100644
--- a/drivers/video/pxa168fb.c
+++ b/drivers/video/pxa168fb.c
@@ -459,8 +459,8 @@ static void set_dumb_panel_control(struct fb_info *info)
 	x |= mi->invert_composite_blank ? 0x00000040 : 0;
 	x |= (info->var.sync & FB_SYNC_COMP_HIGH_ACT) ? 0x00000020 : 0;
 	x |= mi->invert_pix_val_ena ? 0x00000010 : 0;
-	x |= (info->var.sync & FB_SYNC_VERT_HIGH_ACT) ? 0 : 0x00000008;
-	x |= (info->var.sync & FB_SYNC_HOR_HIGH_ACT) ? 0 : 0x00000004;
+	x |= (info->var.sync & FB_SYNC_VERT_HIGH_ACT) ? 0x00000008 : 0;
+	x |= (info->var.sync & FB_SYNC_HOR_HIGH_ACT) ? 0x00000004 : 0;
 	x |= mi->invert_pixclock ? 0x00000002 : 0;

 	writel(x, fbi->reg_base + LCD_SPU_DUMB_CTRL);
diff --git a/include/video/pxa168fb.h b/include/video/pxa168fb.h
index f0497ae..7206483 100644
--- a/include/video/pxa168fb.h
+++ b/include/video/pxa168fb.h
@@ -117,8 +117,6 @@ struct pxa168fb_mach_info {
 	unsigned	invert_composite_blank:1;
 	unsigned	invert_pix_val_ena:1;
 	unsigned	invert_pixclock:1;
-	unsigned	invert_vsync:1;
-	unsigned	invert_hsync:1;
 	unsigned	panel_rbswap:1;
 	unsigned	active:1;
 	unsigned	enable_lcd:1;
-- 
1.5.4.3

^ permalink raw reply related	[flat|nested] 12+ messages in thread
* [PATCH 3/6] pxa: fix pxa168 lcd controller vsync/hsync timing error
@ 2009-11-03  6:45 ` Jun Nie
  0 siblings, 0 replies; 12+ messages in thread
From: Jun Nie @ 2009-11-03  6:45 UTC (permalink / raw)
  To: linux-arm-kernel

pxa: fix pxa168 lcd controller vsync/hsync timing error

Signed-off-by: Jun Nie <njun@marvell.com>
---
 drivers/video/pxa168fb.c |    4 ++--
 include/video/pxa168fb.h |    2 --
 2 files changed, 2 insertions(+), 4 deletions(-)

diff --git a/drivers/video/pxa168fb.c b/drivers/video/pxa168fb.c
index 2ba1444..bdd524c 100644
--- a/drivers/video/pxa168fb.c
+++ b/drivers/video/pxa168fb.c
@@ -459,8 +459,8 @@ static void set_dumb_panel_control(struct fb_info *info)
 	x |= mi->invert_composite_blank ? 0x00000040 : 0;
 	x |= (info->var.sync & FB_SYNC_COMP_HIGH_ACT) ? 0x00000020 : 0;
 	x |= mi->invert_pix_val_ena ? 0x00000010 : 0;
-	x |= (info->var.sync & FB_SYNC_VERT_HIGH_ACT) ? 0 : 0x00000008;
-	x |= (info->var.sync & FB_SYNC_HOR_HIGH_ACT) ? 0 : 0x00000004;
+	x |= (info->var.sync & FB_SYNC_VERT_HIGH_ACT) ? 0x00000008 : 0;
+	x |= (info->var.sync & FB_SYNC_HOR_HIGH_ACT) ? 0x00000004 : 0;
 	x |= mi->invert_pixclock ? 0x00000002 : 0;

 	writel(x, fbi->reg_base + LCD_SPU_DUMB_CTRL);
diff --git a/include/video/pxa168fb.h b/include/video/pxa168fb.h
index f0497ae..7206483 100644
--- a/include/video/pxa168fb.h
+++ b/include/video/pxa168fb.h
@@ -117,8 +117,6 @@ struct pxa168fb_mach_info {
 	unsigned	invert_composite_blank:1;
 	unsigned	invert_pix_val_ena:1;
 	unsigned	invert_pixclock:1;
-	unsigned	invert_vsync:1;
-	unsigned	invert_hsync:1;
 	unsigned	panel_rbswap:1;
 	unsigned	active:1;
 	unsigned	enable_lcd:1;
-- 
1.5.4.3

^ permalink raw reply related	[flat|nested] 12+ messages in thread
* Re: [PATCH 3/6] pxa: fix pxa168 lcd controller vsync/hsync timing  error
  2009-11-03  6:45 ` Jun Nie
@ 2009-11-03  7:29   ` Jun Nie
  -1 siblings, 0 replies; 12+ messages in thread
From: Jun Nie @ 2009-11-03  7:29 UTC (permalink / raw)
  To: linux-arm-kernel, linux-fbdev-devel, linux-fbdev

2009/11/3 Jun Nie <niej0001@gmail.com>:
> pxa: fix pxa168 lcd controller vsync/hsync timing error
>
> Signed-off-by: Jun Nie <njun@marvell.com>
> ---
>  drivers/video/pxa168fb.c |    4 ++--
>  include/video/pxa168fb.h |    2 --
>  2 files changed, 2 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/video/pxa168fb.c b/drivers/video/pxa168fb.c
> index 2ba1444..bdd524c 100644
> --- a/drivers/video/pxa168fb.c
> +++ b/drivers/video/pxa168fb.c
> @@ -459,8 +459,8 @@ static void set_dumb_panel_control(struct fb_info *info)
>        x |= mi->invert_composite_blank ? 0x00000040 : 0;
>        x |= (info->var.sync & FB_SYNC_COMP_HIGH_ACT) ? 0x00000020 : 0;
>        x |= mi->invert_pix_val_ena ? 0x00000010 : 0;
> -       x |= (info->var.sync & FB_SYNC_VERT_HIGH_ACT) ? 0 : 0x00000008;
> -       x |= (info->var.sync & FB_SYNC_HOR_HIGH_ACT) ? 0 : 0x00000004;
> +       x |= (info->var.sync & FB_SYNC_VERT_HIGH_ACT) ? 0x00000008 : 0;
> +       x |= (info->var.sync & FB_SYNC_HOR_HIGH_ACT) ? 0x00000004 : 0;
>        x |= mi->invert_pixclock ? 0x00000002 : 0;
>
>        writel(x, fbi->reg_base + LCD_SPU_DUMB_CTRL);
> diff --git a/include/video/pxa168fb.h b/include/video/pxa168fb.h
> index f0497ae..7206483 100644
> --- a/include/video/pxa168fb.h
> +++ b/include/video/pxa168fb.h
> @@ -117,8 +117,6 @@ struct pxa168fb_mach_info {
>        unsigned        invert_composite_blank:1;
>        unsigned        invert_pix_val_ena:1;
>        unsigned        invert_pixclock:1;
> -       unsigned        invert_vsync:1;
> -       unsigned        invert_hsync:1;
>        unsigned        panel_rbswap:1;
>        unsigned        active:1;
>        unsigned        enable_lcd:1;
> --
> 1.5.4.3
>

add linux-fbdev@vger.kernel.org

^ permalink raw reply	[flat|nested] 12+ messages in thread
* [PATCH 3/6] pxa: fix pxa168 lcd controller vsync/hsync timing error
@ 2009-11-03  7:29   ` Jun Nie
  0 siblings, 0 replies; 12+ messages in thread
From: Jun Nie @ 2009-11-03  7:29 UTC (permalink / raw)
  To: linux-arm-kernel

2009/11/3 Jun Nie <niej0001@gmail.com>:
> pxa: fix pxa168 lcd controller vsync/hsync timing error
>
> Signed-off-by: Jun Nie <njun@marvell.com>
> ---
> ?drivers/video/pxa168fb.c | ? ?4 ++--
> ?include/video/pxa168fb.h | ? ?2 --
> ?2 files changed, 2 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/video/pxa168fb.c b/drivers/video/pxa168fb.c
> index 2ba1444..bdd524c 100644
> --- a/drivers/video/pxa168fb.c
> +++ b/drivers/video/pxa168fb.c
> @@ -459,8 +459,8 @@ static void set_dumb_panel_control(struct fb_info *info)
> ? ? ? ?x |= mi->invert_composite_blank ? 0x00000040 : 0;
> ? ? ? ?x |= (info->var.sync & FB_SYNC_COMP_HIGH_ACT) ? 0x00000020 : 0;
> ? ? ? ?x |= mi->invert_pix_val_ena ? 0x00000010 : 0;
> - ? ? ? x |= (info->var.sync & FB_SYNC_VERT_HIGH_ACT) ? 0 : 0x00000008;
> - ? ? ? x |= (info->var.sync & FB_SYNC_HOR_HIGH_ACT) ? 0 : 0x00000004;
> + ? ? ? x |= (info->var.sync & FB_SYNC_VERT_HIGH_ACT) ? 0x00000008 : 0;
> + ? ? ? x |= (info->var.sync & FB_SYNC_HOR_HIGH_ACT) ? 0x00000004 : 0;
> ? ? ? ?x |= mi->invert_pixclock ? 0x00000002 : 0;
>
> ? ? ? ?writel(x, fbi->reg_base + LCD_SPU_DUMB_CTRL);
> diff --git a/include/video/pxa168fb.h b/include/video/pxa168fb.h
> index f0497ae..7206483 100644
> --- a/include/video/pxa168fb.h
> +++ b/include/video/pxa168fb.h
> @@ -117,8 +117,6 @@ struct pxa168fb_mach_info {
> ? ? ? ?unsigned ? ? ? ?invert_composite_blank:1;
> ? ? ? ?unsigned ? ? ? ?invert_pix_val_ena:1;
> ? ? ? ?unsigned ? ? ? ?invert_pixclock:1;
> - ? ? ? unsigned ? ? ? ?invert_vsync:1;
> - ? ? ? unsigned ? ? ? ?invert_hsync:1;
> ? ? ? ?unsigned ? ? ? ?panel_rbswap:1;
> ? ? ? ?unsigned ? ? ? ?active:1;
> ? ? ? ?unsigned ? ? ? ?enable_lcd:1;
> --
> 1.5.4.3
>

add linux-fbdev at vger.kernel.org

^ permalink raw reply	[flat|nested] 12+ messages in thread
* Re: [PATCH 3/6] pxa: fix pxa168 lcd controller vsync/hsync timing  error
  2009-11-03  6:45 ` Jun Nie
@ 2009-11-04  7:20   ` Eric Miao
  -1 siblings, 0 replies; 12+ messages in thread
From: Eric Miao @ 2009-11-04  7:20 UTC (permalink / raw)
  To: Jun Nie; +Cc: linux-fbdev-devel, linux-arm-kernel

On Tue, Nov 3, 2009 at 2:45 PM, Jun Nie <niej0001@gmail.com> wrote:
> pxa: fix pxa168 lcd controller vsync/hsync timing error
>
> Signed-off-by: Jun Nie <njun@marvell.com>
> ---
>  drivers/video/pxa168fb.c |    4 ++--
>  include/video/pxa168fb.h |    2 --
>  2 files changed, 2 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/video/pxa168fb.c b/drivers/video/pxa168fb.c
> index 2ba1444..bdd524c 100644
> --- a/drivers/video/pxa168fb.c
> +++ b/drivers/video/pxa168fb.c
> @@ -459,8 +459,8 @@ static void set_dumb_panel_control(struct fb_info *info)
>        x |= mi->invert_composite_blank ? 0x00000040 : 0;
>        x |= (info->var.sync & FB_SYNC_COMP_HIGH_ACT) ? 0x00000020 : 0;
>        x |= mi->invert_pix_val_ena ? 0x00000010 : 0;
> -       x |= (info->var.sync & FB_SYNC_VERT_HIGH_ACT) ? 0 : 0x00000008;
> -       x |= (info->var.sync & FB_SYNC_HOR_HIGH_ACT) ? 0 : 0x00000004;
> +       x |= (info->var.sync & FB_SYNC_VERT_HIGH_ACT) ? 0x00000008 : 0;
> +       x |= (info->var.sync & FB_SYNC_HOR_HIGH_ACT) ? 0x00000004 : 0;

Hi Jun,

Could you please help double check this? My understanding is
FB_SYNC_VERT_HIGH_ACT means it's a positive pulse covering all the
valid HSYNCs, and a rising edge of VSYNC means a start of the frame.

However, CFG_INV_VSYNC is '1' means the opposite.

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply	[flat|nested] 12+ messages in thread
* [PATCH 3/6] pxa: fix pxa168 lcd controller vsync/hsync timing error
@ 2009-11-04  7:20   ` Eric Miao
  0 siblings, 0 replies; 12+ messages in thread
From: Eric Miao @ 2009-11-04  7:20 UTC (permalink / raw)
  To: linux-arm-kernel

On Tue, Nov 3, 2009 at 2:45 PM, Jun Nie <niej0001@gmail.com> wrote:
> pxa: fix pxa168 lcd controller vsync/hsync timing error
>
> Signed-off-by: Jun Nie <njun@marvell.com>
> ---
> ?drivers/video/pxa168fb.c | ? ?4 ++--
> ?include/video/pxa168fb.h | ? ?2 --
> ?2 files changed, 2 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/video/pxa168fb.c b/drivers/video/pxa168fb.c
> index 2ba1444..bdd524c 100644
> --- a/drivers/video/pxa168fb.c
> +++ b/drivers/video/pxa168fb.c
> @@ -459,8 +459,8 @@ static void set_dumb_panel_control(struct fb_info *info)
> ? ? ? ?x |= mi->invert_composite_blank ? 0x00000040 : 0;
> ? ? ? ?x |= (info->var.sync & FB_SYNC_COMP_HIGH_ACT) ? 0x00000020 : 0;
> ? ? ? ?x |= mi->invert_pix_val_ena ? 0x00000010 : 0;
> - ? ? ? x |= (info->var.sync & FB_SYNC_VERT_HIGH_ACT) ? 0 : 0x00000008;
> - ? ? ? x |= (info->var.sync & FB_SYNC_HOR_HIGH_ACT) ? 0 : 0x00000004;
> + ? ? ? x |= (info->var.sync & FB_SYNC_VERT_HIGH_ACT) ? 0x00000008 : 0;
> + ? ? ? x |= (info->var.sync & FB_SYNC_HOR_HIGH_ACT) ? 0x00000004 : 0;

Hi Jun,

Could you please help double check this? My understanding is
FB_SYNC_VERT_HIGH_ACT means it's a positive pulse covering all the
valid HSYNCs, and a rising edge of VSYNC means a start of the frame.

However, CFG_INV_VSYNC is '1' means the opposite.

^ permalink raw reply	[flat|nested] 12+ messages in thread
* Re: [PATCH 3/6] pxa: fix pxa168 lcd controller vsync/hsync timing  error
  2009-11-04  7:20   ` Eric Miao
@ 2009-11-05  2:15     ` Jun Nie
  -1 siblings, 0 replies; 12+ messages in thread
From: Jun Nie @ 2009-11-05  2:15 UTC (permalink / raw)
  To: Eric Miao; +Cc: linux-fbdev-devel, linux-arm-kernel

2009/11/4 Eric Miao <eric.y.miao@gmail.com>:
> On Tue, Nov 3, 2009 at 2:45 PM, Jun Nie <niej0001@gmail.com> wrote:
>> pxa: fix pxa168 lcd controller vsync/hsync timing error
>>
>> Signed-off-by: Jun Nie <njun@marvell.com>
>> ---
>>  drivers/video/pxa168fb.c |    4 ++--
>>  include/video/pxa168fb.h |    2 --
>>  2 files changed, 2 insertions(+), 4 deletions(-)
>>
>> diff --git a/drivers/video/pxa168fb.c b/drivers/video/pxa168fb.c
>> index 2ba1444..bdd524c 100644
>> --- a/drivers/video/pxa168fb.c
>> +++ b/drivers/video/pxa168fb.c
>> @@ -459,8 +459,8 @@ static void set_dumb_panel_control(struct fb_info *info)
>>        x |= mi->invert_composite_blank ? 0x00000040 : 0;
>>        x |= (info->var.sync & FB_SYNC_COMP_HIGH_ACT) ? 0x00000020 : 0;
>>        x |= mi->invert_pix_val_ena ? 0x00000010 : 0;
>> -       x |= (info->var.sync & FB_SYNC_VERT_HIGH_ACT) ? 0 : 0x00000008;
>> -       x |= (info->var.sync & FB_SYNC_HOR_HIGH_ACT) ? 0 : 0x00000004;
>> +       x |= (info->var.sync & FB_SYNC_VERT_HIGH_ACT) ? 0x00000008 : 0;
>> +       x |= (info->var.sync & FB_SYNC_HOR_HIGH_ACT) ? 0x00000004 : 0;
>
> Hi Jun,
>
> Could you please help double check this? My understanding is
> FB_SYNC_VERT_HIGH_ACT means it's a positive pulse covering all the
> valid HSYNCs, and a rising edge of VSYNC means a start of the frame.
>
> However, CFG_INV_VSYNC is '1' means the opposite.
>

My understanding is that high active means high level trigger new
frame/line. Below page support my point if it is not wrong.

http://www.arcadecollecting.com/info/Sync_fixing.txt

Jun

^ permalink raw reply	[flat|nested] 12+ messages in thread
* [PATCH 3/6] pxa: fix pxa168 lcd controller vsync/hsync timing error
@ 2009-11-05  2:15     ` Jun Nie
  0 siblings, 0 replies; 12+ messages in thread
From: Jun Nie @ 2009-11-05  2:15 UTC (permalink / raw)
  To: linux-arm-kernel

2009/11/4 Eric Miao <eric.y.miao@gmail.com>:
> On Tue, Nov 3, 2009 at 2:45 PM, Jun Nie <niej0001@gmail.com> wrote:
>> pxa: fix pxa168 lcd controller vsync/hsync timing error
>>
>> Signed-off-by: Jun Nie <njun@marvell.com>
>> ---
>> ?drivers/video/pxa168fb.c | ? ?4 ++--
>> ?include/video/pxa168fb.h | ? ?2 --
>> ?2 files changed, 2 insertions(+), 4 deletions(-)
>>
>> diff --git a/drivers/video/pxa168fb.c b/drivers/video/pxa168fb.c
>> index 2ba1444..bdd524c 100644
>> --- a/drivers/video/pxa168fb.c
>> +++ b/drivers/video/pxa168fb.c
>> @@ -459,8 +459,8 @@ static void set_dumb_panel_control(struct fb_info *info)
>> ? ? ? ?x |= mi->invert_composite_blank ? 0x00000040 : 0;
>> ? ? ? ?x |= (info->var.sync & FB_SYNC_COMP_HIGH_ACT) ? 0x00000020 : 0;
>> ? ? ? ?x |= mi->invert_pix_val_ena ? 0x00000010 : 0;
>> - ? ? ? x |= (info->var.sync & FB_SYNC_VERT_HIGH_ACT) ? 0 : 0x00000008;
>> - ? ? ? x |= (info->var.sync & FB_SYNC_HOR_HIGH_ACT) ? 0 : 0x00000004;
>> + ? ? ? x |= (info->var.sync & FB_SYNC_VERT_HIGH_ACT) ? 0x00000008 : 0;
>> + ? ? ? x |= (info->var.sync & FB_SYNC_HOR_HIGH_ACT) ? 0x00000004 : 0;
>
> Hi Jun,
>
> Could you please help double check this? My understanding is
> FB_SYNC_VERT_HIGH_ACT means it's a positive pulse covering all the
> valid HSYNCs, and a rising edge of VSYNC means a start of the frame.
>
> However, CFG_INV_VSYNC is '1' means the opposite.
>

My understanding is that high active means high level trigger new
frame/line. Below page support my point if it is not wrong.

http://www.arcadecollecting.com/info/Sync_fixing.txt

Jun

^ permalink raw reply	[flat|nested] 12+ messages in thread
* Re: [PATCH 3/6] pxa: fix pxa168 lcd controller vsync/hsync timing error
  2009-11-05  2:15     ` Jun Nie
@ 2009-11-09  3:39       ` Eric Miao
  -1 siblings, 0 replies; 12+ messages in thread
From: Eric Miao @ 2009-11-09  3:39 UTC (permalink / raw)
  To: Jun Nie; +Cc: linux-fbdev-devel, linux-arm-kernel

>> Could you please help double check this? My understanding is
>> FB_SYNC_VERT_HIGH_ACT means it's a positive pulse covering all the
>> valid HSYNCs, and a rising edge of VSYNC means a start of the frame.
>>
>> However, CFG_INV_VSYNC is '1' means the opposite.
>>
>
> My understanding is that high active means high level trigger new
> frame/line. Below page support my point if it is not wrong.
>
> http://www.arcadecollecting.com/info/Sync_fixing.txt
>

Tried to find the specific diagram in the spec on what CFG_INV_* means
but failed, can you help verified this with an oscilloscope and let know
the result? This is a fix then, and I'd like it to get into .32, sorry for late
reply.

------------------------------------------------------------------------------
Let Crystal Reports handle the reporting - Free Crystal Reports 2008 30-Day 
trial. Simplify your report design, integration and deployment - and focus on 
what you do best, core application coding. Discover what's new with
Crystal Reports now.  http://p.sf.net/sfu/bobj-july

^ permalink raw reply	[flat|nested] 12+ messages in thread
* [PATCH 3/6] pxa: fix pxa168 lcd controller vsync/hsync timing error
@ 2009-11-09  3:39       ` Eric Miao
  0 siblings, 0 replies; 12+ messages in thread
From: Eric Miao @ 2009-11-09  3:39 UTC (permalink / raw)
  To: linux-arm-kernel

>> Could you please help double check this? My understanding is
>> FB_SYNC_VERT_HIGH_ACT means it's a positive pulse covering all the
>> valid HSYNCs, and a rising edge of VSYNC means a start of the frame.
>>
>> However, CFG_INV_VSYNC is '1' means the opposite.
>>
>
> My understanding is that high active means high level trigger new
> frame/line. Below page support my point if it is not wrong.
>
> http://www.arcadecollecting.com/info/Sync_fixing.txt
>

Tried to find the specific diagram in the spec on what CFG_INV_* means
but failed, can you help verified this with an oscilloscope and let know
the result? This is a fix then, and I'd like it to get into .32, sorry for late
reply.

^ permalink raw reply	[flat|nested] 12+ messages in thread
* Re: [PATCH 3/6] pxa: fix pxa168 lcd controller vsync/hsync timing error
  2009-11-09  3:39       ` Eric Miao
@ 2009-11-10  5:18         ` Jun Nie
  -1 siblings, 0 replies; 12+ messages in thread
From: Jun Nie @ 2009-11-10  5:18 UTC (permalink / raw)
  To: Eric Miao; +Cc: linux-fbdev-devel, linux-arm-kernel

2009/11/9 Eric Miao <eric.y.miao@gmail.com>:
>>> Could you please help double check this? My understanding is
>>> FB_SYNC_VERT_HIGH_ACT means it's a positive pulse covering all the
>>> valid HSYNCs, and a rising edge of VSYNC means a start of the frame.
>>>
>>> However, CFG_INV_VSYNC is '1' means the opposite.
>>>
>>
>> My understanding is that high active means high level trigger new
>> frame/line. Below page support my point if it is not wrong.
>>
>> http://www.arcadecollecting.com/info/Sync_fixing.txt
>>
>
> Tried to find the specific diagram in the spec on what CFG_INV_* means
> but failed, can you help verified this with an oscilloscope and let know
> the result? This is a fix then, and I'd like it to get into .32, sorry for late
> reply.
>

Hi, Eric
If do not set CFG_INV_VSYNC and CFG_INV_HSYNC bits, controller output
is as below in oscilloscope.

                  ||               ||                ||
.._________||_________||_________||____... HSYNC (active high)

                                                    _____
                                                     |     |
.._____________________________|     |_... VSYNC (active high)

So I should mark HSYNC_HIGH and VSYNC_HIGH in platform code and keep
driver code as  below original code.
       x |= (info->var.sync & FB_SYNC_VERT_HIGH_ACT) ? 0 : 0x00000008;
       x |= (info->var.sync & FB_SYNC_HOR_HIGH_ACT) ? 0 : 0x00000004;

Thanks!

Jun

------------------------------------------------------------------------------
Let Crystal Reports handle the reporting - Free Crystal Reports 2008 30-Day 
trial. Simplify your report design, integration and deployment - and focus on 
what you do best, core application coding. Discover what's new with
Crystal Reports now.  http://p.sf.net/sfu/bobj-july

^ permalink raw reply	[flat|nested] 12+ messages in thread
* [PATCH 3/6] pxa: fix pxa168 lcd controller vsync/hsync timing error
@ 2009-11-10  5:18         ` Jun Nie
  0 siblings, 0 replies; 12+ messages in thread
From: Jun Nie @ 2009-11-10  5:18 UTC (permalink / raw)
  To: linux-arm-kernel

2009/11/9 Eric Miao <eric.y.miao@gmail.com>:
>>> Could you please help double check this? My understanding is
>>> FB_SYNC_VERT_HIGH_ACT means it's a positive pulse covering all the
>>> valid HSYNCs, and a rising edge of VSYNC means a start of the frame.
>>>
>>> However, CFG_INV_VSYNC is '1' means the opposite.
>>>
>>
>> My understanding is that high active means high level trigger new
>> frame/line. Below page support my point if it is not wrong.
>>
>> http://www.arcadecollecting.com/info/Sync_fixing.txt
>>
>
> Tried to find the specific diagram in the spec on what CFG_INV_* means
> but failed, can you help verified this with an oscilloscope and let know
> the result? This is a fix then, and I'd like it to get into .32, sorry for late
> reply.
>

Hi, Eric
If do not set CFG_INV_VSYNC and CFG_INV_HSYNC bits, controller output
is as below in oscilloscope.

                  ||               ||                ||
.._________||_________||_________||____... HSYNC (active high)

                                                    _____
                                                     |     |
.._____________________________|     |_... VSYNC (active high)

So I should mark HSYNC_HIGH and VSYNC_HIGH in platform code and keep
driver code as  below original code.
       x |= (info->var.sync & FB_SYNC_VERT_HIGH_ACT) ? 0 : 0x00000008;
       x |= (info->var.sync & FB_SYNC_HOR_HIGH_ACT) ? 0 : 0x00000004;

Thanks!

Jun

^ permalink raw reply	[flat|nested] 12+ messages in thread
end of thread, other threads:[~2009-11-10  5:18 UTC | newest]

Thread overview: 12+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2009-11-03  6:45 [PATCH 3/6] pxa: fix pxa168 lcd controller vsync/hsync timing error Jun Nie
2009-11-03  6:45 ` Jun Nie
2009-11-03  7:29 ` Jun Nie
2009-11-03  7:29   ` Jun Nie
2009-11-04  7:20 ` Eric Miao
2009-11-04  7:20   ` Eric Miao
2009-11-05  2:15   ` Jun Nie
2009-11-05  2:15     ` Jun Nie
2009-11-09  3:39     ` Eric Miao
2009-11-09  3:39       ` Eric Miao
2009-11-10  5:18       ` Jun Nie
2009-11-10  5:18         ` Jun Nie

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