* [PATCH v4 00/11] Fixes for Rockchip NFC driver part 1
@ 2023-02-18 15:23 Johan Jonker
2023-02-18 15:26 ` [PATCH v4 01/11] include: fdtdec: decouple fdt_addr_t and phys_addr_t size Johan Jonker
` (10 more replies)
0 siblings, 11 replies; 38+ messages in thread
From: Johan Jonker @ 2023-02-18 15:23 UTC (permalink / raw)
To: dario.binacchi, michael, sjg
Cc: philipp.tomsich, kever.yang, u-boot, yifeng.zhao
This serie contains fixes for the Rockchip NFC driver,
which was ported to U-boot and merged with little review
and testing it seems.
Part 1 aims at passing the probe function without errors.
Fixed are:
64bit FDT parsing
compatible string removal
add missing layout structure
add missing flash_node pointer
add missing chip ID
Changed V4:
fix cast and divider in syscon-uclass.c
Changed V3:
use dev_read_addr_ptr
fix oobfree
Johan Jonker (10):
include: fdtdec: decouple fdt_addr_t and phys_addr_t size
include: dm: ofnode: fix headers
core: remap: convert regmap_init_mem_plat() input to phys_addr_t
rockchip: adc: rockchip-saradc: use dev_read_addr_ptr
rockchip: timer: dw-apb-timer: convert dev_read_addr output to
phys_addr_t
mtd: nand: raw: rockchip_nfc: use dev_read_addr_ptr
mtd: nand: raw: rockchip_nfc: remove the compatible string
"rockchip,rk3308-nfc"
mtd: nand: raw: rockchip_nfc: add layout structure
mtd: nand: raw: rockchip_nfc: add flash_node to chip structure
mtd: nand: raw: rockchip_nfc: fix oobfree offset and description
Paweł Jarosz (1):
mtd: nand: add support for the Sandisk SDTNQGAMA chip
Kconfig | 8 +++
drivers/adc/rockchip-saradc.c | 4 +-
drivers/core/regmap.c | 2 +-
drivers/core/syscon-uclass.c | 4 +-
drivers/mtd/nand/raw/nand_ids.c | 3 ++
drivers/mtd/nand/raw/rockchip_nfc.c | 78 ++++++++++-------------------
drivers/ram/rockchip/sdram_rk3066.c | 2 +-
drivers/ram/rockchip/sdram_rk3188.c | 2 +-
drivers/ram/rockchip/sdram_rk322x.c | 2 +-
drivers/ram/rockchip/sdram_rk3288.c | 2 +-
drivers/ram/rockchip/sdram_rk3328.c | 2 +-
drivers/ram/rockchip/sdram_rk3399.c | 2 +-
drivers/timer/dw-apb-timer.c | 4 +-
include/dm/ofnode.h | 16 +++---
include/fdtdec.h | 13 +++--
include/regmap.h | 2 +-
include/syscon.h | 13 ++---
17 files changed, 76 insertions(+), 83 deletions(-)
--
2.20.1
^ permalink raw reply [flat|nested] 38+ messages in thread
* [PATCH v4 01/11] include: fdtdec: decouple fdt_addr_t and phys_addr_t size
2023-02-18 15:23 [PATCH v4 00/11] Fixes for Rockchip NFC driver part 1 Johan Jonker
@ 2023-02-18 15:26 ` Johan Jonker
2023-02-23 0:47 ` Kever Yang
2023-02-18 15:26 ` [PATCH v4 02/11] include: dm: ofnode: fix headers Johan Jonker
` (9 subsequent siblings)
10 siblings, 1 reply; 38+ messages in thread
From: Johan Jonker @ 2023-02-18 15:26 UTC (permalink / raw)
To: dario.binacchi, michael, sjg
Cc: philipp.tomsich, kever.yang, u-boot, yifeng.zhao
The DT specification supports CPUs with both 32-bit and 64-bit addressing
capabilities. In U-boot the fdt_addr_t and phys_addr_t size are coupled
by a typedef. The MTD NAND drivers for 32-bit CPU's can describe partitions
with a 64-bit reg property. These partitions synced from Linux end up with
the wrong offset and sizes when only the lower 32-bit is passed.
Decouple the fdt_addr_t and phys_addr_t size as they don't necessary
match.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
---
Changed V2:
reword
---
Note:
Most drivers still assume that FDT and CPU capabilities are identical.
In order to use these variables a cast is needed.
---
Kconfig | 8 ++++++++
include/fdtdec.h | 13 +++++++++----
2 files changed, 17 insertions(+), 4 deletions(-)
diff --git a/Kconfig b/Kconfig
index a75cce7e..7697dade 100644
--- a/Kconfig
+++ b/Kconfig
@@ -422,11 +422,19 @@ endif # EXPERT
config PHYS_64BIT
bool "64bit physical address support"
+ select FDT_64BIT
help
Say Y here to support 64bit physical memory address.
This can be used not only for 64bit SoCs, but also for
large physical address extension on 32bit SoCs.
+config FDT_64BIT
+ bool "64bit fdt address support"
+ help
+ Say Y here to support 64bit fdt addresses.
+ This can be used not only for 64bit SoCs, but also
+ for large address extensions on 32bit SoCs.
+
config HAS_ROM
bool
select BINMAN
diff --git a/include/fdtdec.h b/include/fdtdec.h
index 12355afd..af29ac0c 100644
--- a/include/fdtdec.h
+++ b/include/fdtdec.h
@@ -18,15 +18,18 @@
#include <pci.h>
/*
- * A typedef for a physical address. Note that fdt data is always big
+ * Support for 64bit fdt addresses.
+ * This can be used not only for 64bit SoCs, but also
+ * for large address extensions on 32bit SoCs.
+ * Note that fdt data is always big
* endian even on a litle endian machine.
*/
-typedef phys_addr_t fdt_addr_t;
-typedef phys_size_t fdt_size_t;
#define FDT_SIZE_T_NONE (-1U)
-#ifdef CONFIG_PHYS_64BIT
+#ifdef CONFIG_FDT_64BIT
+typedef u64 fdt_addr_t;
+typedef u64 fdt_size_t;
#define FDT_ADDR_T_NONE ((ulong)(-1))
#define fdt_addr_to_cpu(reg) be64_to_cpu(reg)
@@ -35,6 +38,8 @@ typedef phys_size_t fdt_size_t;
#define cpu_to_fdt_size(reg) cpu_to_be64(reg)
typedef fdt64_t fdt_val_t;
#else
+typedef u32 fdt_addr_t;
+typedef u32 fdt_size_t;
#define FDT_ADDR_T_NONE (-1U)
#define fdt_addr_to_cpu(reg) be32_to_cpu(reg)
--
2.20.1
^ permalink raw reply related [flat|nested] 38+ messages in thread
* [PATCH v4 02/11] include: dm: ofnode: fix headers
2023-02-18 15:23 [PATCH v4 00/11] Fixes for Rockchip NFC driver part 1 Johan Jonker
2023-02-18 15:26 ` [PATCH v4 01/11] include: fdtdec: decouple fdt_addr_t and phys_addr_t size Johan Jonker
@ 2023-02-18 15:26 ` Johan Jonker
2023-02-18 15:27 ` [PATCH v4 03/11] core: remap: convert regmap_init_mem_plat() input to phys_addr_t Johan Jonker
` (8 subsequent siblings)
10 siblings, 0 replies; 38+ messages in thread
From: Johan Jonker @ 2023-02-18 15:26 UTC (permalink / raw)
To: dario.binacchi, michael, sjg
Cc: philipp.tomsich, kever.yang, u-boot, yifeng.zhao
When fdt_addr_t and phys_addr_t are split it turns out that
the header don't match the functions, so fix the headers.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
---
include/dm/ofnode.h | 16 ++++++++--------
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/include/dm/ofnode.h b/include/dm/ofnode.h
index fa986560..287b0c35 100644
--- a/include/dm/ofnode.h
+++ b/include/dm/ofnode.h
@@ -678,8 +678,8 @@ int ofnode_read_size(ofnode node, const char *propname);
* @size: Pointer to size of the address
* Return: address, or FDT_ADDR_T_NONE if not present or invalid
*/
-phys_addr_t ofnode_get_addr_size_index(ofnode node, int index,
- fdt_size_t *size);
+fdt_addr_t ofnode_get_addr_size_index(ofnode node, int index,
+ fdt_size_t *size);
/**
* ofnode_get_addr_size_index_notrans() - get an address/size from a node
@@ -695,8 +695,8 @@ phys_addr_t ofnode_get_addr_size_index(ofnode node, int index,
* @size: Pointer to size of the address
* Return: address, or FDT_ADDR_T_NONE if not present or invalid
*/
-phys_addr_t ofnode_get_addr_size_index_notrans(ofnode node, int index,
- fdt_size_t *size);
+fdt_addr_t ofnode_get_addr_size_index_notrans(ofnode node, int index,
+ fdt_size_t *size);
/**
* ofnode_get_addr_index() - get an address from a node
@@ -707,7 +707,7 @@ phys_addr_t ofnode_get_addr_size_index_notrans(ofnode node, int index,
* @index: Index of address to read (0 for first)
* Return: address, or FDT_ADDR_T_NONE if not present or invalid
*/
-phys_addr_t ofnode_get_addr_index(ofnode node, int index);
+fdt_addr_t ofnode_get_addr_index(ofnode node, int index);
/**
* ofnode_get_addr() - get an address from a node
@@ -717,7 +717,7 @@ phys_addr_t ofnode_get_addr_index(ofnode node, int index);
* @node: node to read from
* Return: address, or FDT_ADDR_T_NONE if not present or invalid
*/
-phys_addr_t ofnode_get_addr(ofnode node);
+fdt_addr_t ofnode_get_addr(ofnode node);
/**
* ofnode_get_size() - get size from a node
@@ -1055,8 +1055,8 @@ const void *ofprop_get_property(const struct ofprop *prop,
* @sizep: place to put size value (on success)
* Return: address value, or FDT_ADDR_T_NONE on error
*/
-phys_addr_t ofnode_get_addr_size(ofnode node, const char *propname,
- phys_size_t *sizep);
+fdt_addr_t ofnode_get_addr_size(ofnode node, const char *propname,
+ fdt_size_t *sizep);
/**
* ofnode_read_u8_array_ptr() - find an 8-bit array
--
2.20.1
^ permalink raw reply related [flat|nested] 38+ messages in thread
* [PATCH v4 03/11] core: remap: convert regmap_init_mem_plat() input to phys_addr_t
2023-02-18 15:23 [PATCH v4 00/11] Fixes for Rockchip NFC driver part 1 Johan Jonker
2023-02-18 15:26 ` [PATCH v4 01/11] include: fdtdec: decouple fdt_addr_t and phys_addr_t size Johan Jonker
2023-02-18 15:26 ` [PATCH v4 02/11] include: dm: ofnode: fix headers Johan Jonker
@ 2023-02-18 15:27 ` Johan Jonker
2023-02-22 7:59 ` Kever Yang
2023-02-18 15:27 ` [PATCH v4 04/11] rockchip: adc: rockchip-saradc: use dev_read_addr_ptr Johan Jonker
` (7 subsequent siblings)
10 siblings, 1 reply; 38+ messages in thread
From: Johan Jonker @ 2023-02-18 15:27 UTC (permalink / raw)
To: dario.binacchi, michael, sjg
Cc: philipp.tomsich, kever.yang, u-boot, yifeng.zhao
The fdt_addr_t and phys_addr_t size have been decoupled.
A 32bit CPU can expect 64-bit data from the device tree parser,
so convert regmap_init_mem_plat() input to phys_addr_t in files
that use this function. Also correct struct syscon_base_plat
depending on CONFIG_PHYS_64BIT setting and fix ARRAY_SIZE
divider.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
---
Changed V4:
Fix cast and divider in syscon-uclass.c
---
drivers/core/regmap.c | 2 +-
drivers/core/syscon-uclass.c | 4 ++--
drivers/ram/rockchip/sdram_rk3066.c | 2 +-
drivers/ram/rockchip/sdram_rk3188.c | 2 +-
drivers/ram/rockchip/sdram_rk322x.c | 2 +-
drivers/ram/rockchip/sdram_rk3288.c | 2 +-
drivers/ram/rockchip/sdram_rk3328.c | 2 +-
drivers/ram/rockchip/sdram_rk3399.c | 2 +-
include/regmap.h | 2 +-
include/syscon.h | 13 +++++++------
10 files changed, 17 insertions(+), 16 deletions(-)
diff --git a/drivers/core/regmap.c b/drivers/core/regmap.c
index e33bb9d7..37da64b2 100644
--- a/drivers/core/regmap.c
+++ b/drivers/core/regmap.c
@@ -79,7 +79,7 @@ static struct regmap *regmap_alloc(int count)
}
#if CONFIG_IS_ENABLED(OF_PLATDATA)
-int regmap_init_mem_plat(struct udevice *dev, fdt_val_t *reg, int count,
+int regmap_init_mem_plat(struct udevice *dev, phys_addr_t *reg, int count,
struct regmap **mapp)
{
struct regmap_range *range;
diff --git a/drivers/core/syscon-uclass.c b/drivers/core/syscon-uclass.c
index 25fdb66e..b557a24f 100644
--- a/drivers/core/syscon-uclass.c
+++ b/drivers/core/syscon-uclass.c
@@ -58,8 +58,8 @@ static int syscon_pre_probe(struct udevice *dev)
#if CONFIG_IS_ENABLED(OF_PLATDATA)
struct syscon_base_plat *plat = dev_get_plat(dev);
- return regmap_init_mem_plat(dev, plat->reg, ARRAY_SIZE(plat->reg),
- &priv->regmap);
+ return regmap_init_mem_plat(dev, (phys_addr_t *)plat->reg,
+ ARRAY_SIZE(plat->reg) / 2, &priv->regmap);
#else
return regmap_init_mem(dev_ofnode(dev), &priv->regmap);
#endif
diff --git a/drivers/ram/rockchip/sdram_rk3066.c b/drivers/ram/rockchip/sdram_rk3066.c
index a2425f22..9bb26b64 100644
--- a/drivers/ram/rockchip/sdram_rk3066.c
+++ b/drivers/ram/rockchip/sdram_rk3066.c
@@ -801,7 +801,7 @@ static int rk3066_dmc_conv_of_plat(struct udevice *dev)
memcpy(&plat->base, of_plat->rockchip_sdram_params, sizeof(plat->base));
/* RK3066 supports dual-channel, set default channel num to 2. */
plat->num_channels = 1;
- ret = regmap_init_mem_plat(dev, of_plat->reg,
+ ret = regmap_init_mem_plat(dev, (phys_addr_t *)of_plat->reg,
ARRAY_SIZE(of_plat->reg) / 2, &plat->map);
if (ret)
return ret;
diff --git a/drivers/ram/rockchip/sdram_rk3188.c b/drivers/ram/rockchip/sdram_rk3188.c
index 272b1b2d..1838985c 100644
--- a/drivers/ram/rockchip/sdram_rk3188.c
+++ b/drivers/ram/rockchip/sdram_rk3188.c
@@ -867,7 +867,7 @@ static int conv_of_plat(struct udevice *dev)
memcpy(&plat->base, of_plat->rockchip_sdram_params, sizeof(plat->base));
/* rk3188 supports dual-channel, set default channel num to 2 */
plat->num_channels = 1;
- ret = regmap_init_mem_plat(dev, of_plat->reg,
+ ret = regmap_init_mem_plat(dev, (phys_addr_t *)of_plat->reg,
ARRAY_SIZE(of_plat->reg) / 2, &plat->map);
if (ret)
return ret;
diff --git a/drivers/ram/rockchip/sdram_rk322x.c b/drivers/ram/rockchip/sdram_rk322x.c
index 1b204fb5..33599dc5 100644
--- a/drivers/ram/rockchip/sdram_rk322x.c
+++ b/drivers/ram/rockchip/sdram_rk322x.c
@@ -769,7 +769,7 @@ static int conv_of_plat(struct udevice *dev)
memcpy(&plat->base, of_plat->rockchip_sdram_params, sizeof(plat->base));
plat->num_channels = 1;
- ret = regmap_init_mem_plat(dev, of_plat->reg,
+ ret = regmap_init_mem_plat(dev, (phys_addr_t *)of_plat->reg,
ARRAY_SIZE(of_plat->reg) / 2, &plat->map);
if (ret)
return ret;
diff --git a/drivers/ram/rockchip/sdram_rk3288.c b/drivers/ram/rockchip/sdram_rk3288.c
index 83778ad1..1a548da5 100644
--- a/drivers/ram/rockchip/sdram_rk3288.c
+++ b/drivers/ram/rockchip/sdram_rk3288.c
@@ -1029,7 +1029,7 @@ static int conv_of_plat(struct udevice *dev)
memcpy(&plat->base, of_plat->rockchip_sdram_params, sizeof(plat->base));
/* Rk3288 supports dual-channel, set default channel num to 2 */
plat->num_channels = 2;
- ret = regmap_init_mem_plat(dev, of_plat->reg,
+ ret = regmap_init_mem_plat(dev, (phys_addr_t *)of_plat->reg,
ARRAY_SIZE(of_plat->reg) / 2, &plat->map);
if (ret)
return ret;
diff --git a/drivers/ram/rockchip/sdram_rk3328.c b/drivers/ram/rockchip/sdram_rk3328.c
index b511c6bf..2427efe0 100644
--- a/drivers/ram/rockchip/sdram_rk3328.c
+++ b/drivers/ram/rockchip/sdram_rk3328.c
@@ -54,7 +54,7 @@ static int conv_of_plat(struct udevice *dev)
struct dtd_rockchip_rk3328_dmc *dtplat = &plat->dtplat;
int ret;
- ret = regmap_init_mem_plat(dev, dtplat->reg,
+ ret = regmap_init_mem_plat(dev, (phys_addr_t *)dtplat->reg,
ARRAY_SIZE(dtplat->reg) / 2, &plat->map);
if (ret)
return ret;
diff --git a/drivers/ram/rockchip/sdram_rk3399.c b/drivers/ram/rockchip/sdram_rk3399.c
index 136e4ede..c88fdbb3 100644
--- a/drivers/ram/rockchip/sdram_rk3399.c
+++ b/drivers/ram/rockchip/sdram_rk3399.c
@@ -3049,7 +3049,7 @@ static int conv_of_plat(struct udevice *dev)
struct dtd_rockchip_rk3399_dmc *dtplat = &plat->dtplat;
int ret;
- ret = regmap_init_mem_plat(dev, dtplat->reg,
+ ret = regmap_init_mem_plat(dev, (phys_addr_t *)dtplat->reg,
ARRAY_SIZE(dtplat->reg) / 2, &plat->map);
if (ret)
return ret;
diff --git a/include/regmap.h b/include/regmap.h
index e81a3602..a274fb27 100644
--- a/include/regmap.h
+++ b/include/regmap.h
@@ -388,7 +388,7 @@ int regmap_init_mem(ofnode node, struct regmap **mapp);
* Use regmap_uninit() to free it.
*
*/
-int regmap_init_mem_plat(struct udevice *dev, fdt_val_t *reg, int count,
+int regmap_init_mem_plat(struct udevice *dev, phys_addr_t *reg, int count,
struct regmap **mapp);
int regmap_init_mem_index(ofnode node, struct regmap **mapp, int index);
diff --git a/include/syscon.h b/include/syscon.h
index f5e6cc1a..836ae07c 100644
--- a/include/syscon.h
+++ b/include/syscon.h
@@ -27,14 +27,15 @@ struct syscon_ops {
#if CONFIG_IS_ENABLED(OF_PLATDATA)
/*
- * We don't support 64-bit machines. If they are so resource-contrained that
- * they need to use OF_PLATDATA, something is horribly wrong with the
- * education of our hardware engineers.
- *
- * Update: 64-bit is now supported and we have an education crisis.
+ * Support for 64bit or 32bit fdt addresses
+ * depending on the physical SoC properties.
*/
struct syscon_base_plat {
- fdt_val_t reg[2];
+#ifdef CONFIG_PHYS_64BIT
+ fdt64_t reg[2];
+#else
+ fdt32_t reg[2];
+#endif
};
#endif
--
2.20.1
^ permalink raw reply related [flat|nested] 38+ messages in thread
* [PATCH v4 04/11] rockchip: adc: rockchip-saradc: use dev_read_addr_ptr
2023-02-18 15:23 [PATCH v4 00/11] Fixes for Rockchip NFC driver part 1 Johan Jonker
` (2 preceding siblings ...)
2023-02-18 15:27 ` [PATCH v4 03/11] core: remap: convert regmap_init_mem_plat() input to phys_addr_t Johan Jonker
@ 2023-02-18 15:27 ` Johan Jonker
2023-02-22 8:00 ` Kever Yang
2023-02-18 15:27 ` [PATCH v4 05/11] rockchip: timer: dw-apb-timer: convert dev_read_addr output to phys_addr_t Johan Jonker
` (6 subsequent siblings)
10 siblings, 1 reply; 38+ messages in thread
From: Johan Jonker @ 2023-02-18 15:27 UTC (permalink / raw)
To: dario.binacchi, michael, sjg
Cc: philipp.tomsich, kever.yang, u-boot, yifeng.zhao
The fdt_addr_t and phys_addr_t size have been decoupled.
A 32bit CPU can expext 64-bit data from the device tree parser,
so use dev_read_addr_ptr in the rockchip-saradc.c file.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
---
drivers/adc/rockchip-saradc.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/adc/rockchip-saradc.c b/drivers/adc/rockchip-saradc.c
index 760f8fe6..de9298a2 100644
--- a/drivers/adc/rockchip-saradc.c
+++ b/drivers/adc/rockchip-saradc.c
@@ -145,8 +145,8 @@ int rockchip_saradc_of_to_plat(struct udevice *dev)
struct rockchip_saradc_data *data;
data = (struct rockchip_saradc_data *)dev_get_driver_data(dev);
- priv->regs = (struct rockchip_saradc_regs *)dev_read_addr(dev);
- if (priv->regs == (struct rockchip_saradc_regs *)FDT_ADDR_T_NONE) {
+ priv->regs = (struct rockchip_saradc_regs *)dev_read_addr_ptr(dev);
+ if (!priv->regs) {
pr_err("Dev: %s - can't get address!", dev->name);
return -ENODATA;
}
--
2.20.1
^ permalink raw reply related [flat|nested] 38+ messages in thread
* [PATCH v4 05/11] rockchip: timer: dw-apb-timer: convert dev_read_addr output to phys_addr_t
2023-02-18 15:23 [PATCH v4 00/11] Fixes for Rockchip NFC driver part 1 Johan Jonker
` (3 preceding siblings ...)
2023-02-18 15:27 ` [PATCH v4 04/11] rockchip: adc: rockchip-saradc: use dev_read_addr_ptr Johan Jonker
@ 2023-02-18 15:27 ` Johan Jonker
2023-02-18 15:27 ` [PATCH v4 06/11] mtd: nand: raw: rockchip_nfc: use dev_read_addr_ptr Johan Jonker
` (5 subsequent siblings)
10 siblings, 0 replies; 38+ messages in thread
From: Johan Jonker @ 2023-02-18 15:27 UTC (permalink / raw)
To: dario.binacchi, michael, sjg
Cc: philipp.tomsich, kever.yang, u-boot, yifeng.zhao
The fdt_addr_t and phys_addr_t size have been decoupled.
A 32bit CPU can expect 64-bit data from the device tree parser,
so convert dev_read_addr output to phys_addr_t in the
dw-apb-timer.c file.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
---
drivers/timer/dw-apb-timer.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/timer/dw-apb-timer.c b/drivers/timer/dw-apb-timer.c
index 10f0a9f6..f55a3c54 100644
--- a/drivers/timer/dw-apb-timer.c
+++ b/drivers/timer/dw-apb-timer.c
@@ -23,7 +23,7 @@
#define DW_APB_CTRL 0x8
struct dw_apb_timer_priv {
- fdt_addr_t regs;
+ phys_addr_t regs;
struct reset_ctl_bulk resets;
};
@@ -92,7 +92,7 @@ static int dw_apb_timer_of_to_plat(struct udevice *dev)
if (CONFIG_IS_ENABLED(OF_REAL)) {
struct dw_apb_timer_priv *priv = dev_get_priv(dev);
- priv->regs = dev_read_addr(dev);
+ priv->regs = (phys_addr_t)dev_read_addr(dev);
}
return 0;
--
2.20.1
^ permalink raw reply related [flat|nested] 38+ messages in thread
* [PATCH v4 06/11] mtd: nand: raw: rockchip_nfc: use dev_read_addr_ptr
2023-02-18 15:23 [PATCH v4 00/11] Fixes for Rockchip NFC driver part 1 Johan Jonker
` (4 preceding siblings ...)
2023-02-18 15:27 ` [PATCH v4 05/11] rockchip: timer: dw-apb-timer: convert dev_read_addr output to phys_addr_t Johan Jonker
@ 2023-02-18 15:27 ` Johan Jonker
2023-02-18 15:28 ` [PATCH v4 07/11] mtd: nand: raw: rockchip_nfc: remove the compatible string "rockchip,rk3308-nfc" Johan Jonker
` (4 subsequent siblings)
10 siblings, 0 replies; 38+ messages in thread
From: Johan Jonker @ 2023-02-18 15:27 UTC (permalink / raw)
To: dario.binacchi, michael, sjg
Cc: philipp.tomsich, kever.yang, u-boot, yifeng.zhao
The fdt_addr_t and phys_addr_t size have been decoupled.
A 32bit CPU can expext 64-bit data from the device tree parser,
so use dev_read_addr_ptr in the rockchip_nfc.c file.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com>
---
drivers/mtd/nand/raw/rockchip_nfc.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/mtd/nand/raw/rockchip_nfc.c b/drivers/mtd/nand/raw/rockchip_nfc.c
index d016d255..5d444133 100644
--- a/drivers/mtd/nand/raw/rockchip_nfc.c
+++ b/drivers/mtd/nand/raw/rockchip_nfc.c
@@ -1180,9 +1180,9 @@ static int rk_nfc_probe(struct udevice *dev)
nfc->cfg = (void *)dev_get_driver_data(dev);
nfc->dev = dev;
- nfc->regs = (void *)dev_read_addr(dev);
- if (IS_ERR(nfc->regs)) {
- ret = PTR_ERR(nfc->regs);
+ nfc->regs = dev_read_addr_ptr(dev);
+ if (!nfc->regs) {
+ ret = -ENODATA;
goto release_nfc;
}
--
2.20.1
^ permalink raw reply related [flat|nested] 38+ messages in thread
* [PATCH v4 07/11] mtd: nand: raw: rockchip_nfc: remove the compatible string "rockchip,rk3308-nfc"
2023-02-18 15:23 [PATCH v4 00/11] Fixes for Rockchip NFC driver part 1 Johan Jonker
` (5 preceding siblings ...)
2023-02-18 15:27 ` [PATCH v4 06/11] mtd: nand: raw: rockchip_nfc: use dev_read_addr_ptr Johan Jonker
@ 2023-02-18 15:28 ` Johan Jonker
2023-02-18 15:28 ` [PATCH v4 08/11] mtd: nand: raw: rockchip_nfc: add layout structure Johan Jonker
` (3 subsequent siblings)
10 siblings, 0 replies; 38+ messages in thread
From: Johan Jonker @ 2023-02-18 15:28 UTC (permalink / raw)
To: dario.binacchi, michael, sjg
Cc: philipp.tomsich, kever.yang, u-boot, yifeng.zhao
The compatible string for rk3308 has as fallback string "rockchip,rv1108-nfc".
As there is no logic in probe priority between the SoC orientated string
and the fall back, so remove the compatible string "rockchip,rk3308-nfc"
from the driver.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
---
drivers/mtd/nand/raw/rockchip_nfc.c | 4 ----
1 file changed, 4 deletions(-)
diff --git a/drivers/mtd/nand/raw/rockchip_nfc.c b/drivers/mtd/nand/raw/rockchip_nfc.c
index 5d444133..a8ec6bfc 100644
--- a/drivers/mtd/nand/raw/rockchip_nfc.c
+++ b/drivers/mtd/nand/raw/rockchip_nfc.c
@@ -1165,10 +1165,6 @@ static const struct udevice_id rk_nfc_id_table[] = {
.compatible = "rockchip,rv1108-nfc",
.data = (unsigned long)&nfc_v8_cfg
},
- {
- .compatible = "rockchip,rk3308-nfc",
- .data = (unsigned long)&nfc_v8_cfg
- },
{ /* sentinel */ }
};
--
2.20.1
^ permalink raw reply related [flat|nested] 38+ messages in thread
* [PATCH v4 08/11] mtd: nand: raw: rockchip_nfc: add layout structure
2023-02-18 15:23 [PATCH v4 00/11] Fixes for Rockchip NFC driver part 1 Johan Jonker
` (6 preceding siblings ...)
2023-02-18 15:28 ` [PATCH v4 07/11] mtd: nand: raw: rockchip_nfc: remove the compatible string "rockchip,rk3308-nfc" Johan Jonker
@ 2023-02-18 15:28 ` Johan Jonker
2023-02-18 15:28 ` [PATCH v4 09/11] mtd: nand: raw: rockchip_nfc: add flash_node to chip structure Johan Jonker
` (2 subsequent siblings)
10 siblings, 0 replies; 38+ messages in thread
From: Johan Jonker @ 2023-02-18 15:28 UTC (permalink / raw)
To: dario.binacchi, michael, sjg
Cc: philipp.tomsich, kever.yang, u-boot, yifeng.zhao
The MTD framework in U-boot is not identical for drivers ported
from Linux. The rockchip_nfc driver was ported with OOB ops functions
while the framework expects a layout structure per chip.
Fix by adding a structure with OOB data and remove unused functions.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
---
drivers/mtd/nand/raw/rockchip_nfc.c | 61 ++++++++++-------------------
1 file changed, 20 insertions(+), 41 deletions(-)
diff --git a/drivers/mtd/nand/raw/rockchip_nfc.c b/drivers/mtd/nand/raw/rockchip_nfc.c
index a8ec6bfc..ab13e52c 100644
--- a/drivers/mtd/nand/raw/rockchip_nfc.c
+++ b/drivers/mtd/nand/raw/rockchip_nfc.c
@@ -814,47 +814,9 @@ static void rk_nfc_disable_clks(struct rk_nfc *nfc)
clk_disable_unprepare(nfc->ahb_clk);
}
-static int rk_nfc_ooblayout_free(struct mtd_info *mtd, int section,
- struct mtd_oob_region *oob_region)
-{
- struct nand_chip *chip = mtd_to_nand(mtd);
- struct rk_nfc_nand_chip *rknand = rk_nfc_to_rknand(chip);
-
- if (section)
- return -ERANGE;
-
- /*
- * The beginning of the OOB area stores the reserved data for the NFC,
- * the size of the reserved data is NFC_SYS_DATA_SIZE bytes.
- */
- oob_region->length = rknand->metadata_size - NFC_SYS_DATA_SIZE - 2;
- oob_region->offset = NFC_SYS_DATA_SIZE + 2;
-
- return 0;
-}
-
-static int rk_nfc_ooblayout_ecc(struct mtd_info *mtd, int section,
- struct mtd_oob_region *oob_region)
-{
- struct nand_chip *chip = mtd_to_nand(mtd);
- struct rk_nfc_nand_chip *rknand = rk_nfc_to_rknand(chip);
-
- if (section)
- return -ERANGE;
-
- oob_region->length = mtd->oobsize - rknand->metadata_size;
- oob_region->offset = rknand->metadata_size;
-
- return 0;
-}
-
-static const struct mtd_ooblayout_ops rk_nfc_ooblayout_ops = {
- .rfree = rk_nfc_ooblayout_free,
- .ecc = rk_nfc_ooblayout_ecc,
-};
-
static int rk_nfc_ecc_init(struct rk_nfc *nfc, struct nand_chip *chip)
{
+ struct rk_nfc_nand_chip *rknand = rk_nfc_to_rknand(chip);
const u8 *strengths = nfc->cfg->ecc_strengths;
struct mtd_info *mtd = nand_to_mtd(chip);
struct nand_ecc_ctrl *ecc = &chip->ecc;
@@ -892,6 +854,21 @@ static int rk_nfc_ecc_init(struct rk_nfc *nfc, struct nand_chip *chip)
ecc->steps = mtd->writesize / ecc->size;
ecc->bytes = DIV_ROUND_UP(ecc->strength * fls(8 * chip->ecc.size), 8);
+ if (ecc->bytes * ecc->steps > mtd->oobsize - rknand->metadata_size)
+ return -EINVAL;
+
+ ecc->layout = kzalloc(sizeof(*ecc->layout), GFP_KERNEL);
+ if (!ecc->layout)
+ return -ENOMEM;
+
+ ecc->layout->eccbytes = ecc->bytes * ecc->steps;
+
+ for (i = 0; i < ecc->layout->eccbytes; i++)
+ ecc->layout->eccpos[i] = rknand->metadata_size + i;
+
+ ecc->layout->oobfree[0].length = rknand->metadata_size - NFC_SYS_DATA_SIZE - 2;
+ ecc->layout->oobfree[0].offset = NFC_SYS_DATA_SIZE + 2;
+
return 0;
}
@@ -969,7 +946,6 @@ static int rk_nfc_nand_chip_init(ofnode node, struct rk_nfc *nfc, int devnum)
chip->bbt_options = NAND_BBT_USE_FLASH | NAND_BBT_NO_OOB;
chip->options |= NAND_NO_SUBPAGE_WRITE | NAND_USE_BOUNCE_BUFFER;
- mtd_set_ooblayout(mtd, &rk_nfc_ooblayout_ops);
rk_nfc_hw_init(nfc);
ret = nand_scan_ident(mtd, nsels, NULL);
if (ret)
@@ -998,13 +974,16 @@ static int rk_nfc_nand_chip_init(ofnode node, struct rk_nfc *nfc, int devnum)
if (!nfc->page_buf) {
nfc->page_buf = kzalloc(NFC_MAX_PAGE_SIZE, GFP_KERNEL);
- if (!nfc->page_buf)
+ if (!nfc->page_buf) {
+ kfree(ecc->layout);
return -ENOMEM;
+ }
}
if (!nfc->oob_buf) {
nfc->oob_buf = kzalloc(NFC_MAX_OOB_SIZE, GFP_KERNEL);
if (!nfc->oob_buf) {
+ kfree(ecc->layout);
kfree(nfc->page_buf);
nfc->page_buf = NULL;
return -ENOMEM;
--
2.20.1
^ permalink raw reply related [flat|nested] 38+ messages in thread
* [PATCH v4 09/11] mtd: nand: raw: rockchip_nfc: add flash_node to chip structure
2023-02-18 15:23 [PATCH v4 00/11] Fixes for Rockchip NFC driver part 1 Johan Jonker
` (7 preceding siblings ...)
2023-02-18 15:28 ` [PATCH v4 08/11] mtd: nand: raw: rockchip_nfc: add layout structure Johan Jonker
@ 2023-02-18 15:28 ` Johan Jonker
2023-02-18 15:28 ` [PATCH v4 10/11] mtd: nand: add support for the Sandisk SDTNQGAMA chip Johan Jonker
2023-02-18 15:29 ` [PATCH v4 11/11] mtd: nand: raw: rockchip_nfc: fix oobfree offset and description Johan Jonker
10 siblings, 0 replies; 38+ messages in thread
From: Johan Jonker @ 2023-02-18 15:28 UTC (permalink / raw)
To: dario.binacchi, michael, sjg
Cc: philipp.tomsich, kever.yang, u-boot, yifeng.zhao
Add flash_node to the rockchip_nfc driver chip structure in order
to find the partitions in the add_mtd_partitions_of() function.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
---
drivers/mtd/nand/raw/rockchip_nfc.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/mtd/nand/raw/rockchip_nfc.c b/drivers/mtd/nand/raw/rockchip_nfc.c
index ab13e52c..ca5e7313 100644
--- a/drivers/mtd/nand/raw/rockchip_nfc.c
+++ b/drivers/mtd/nand/raw/rockchip_nfc.c
@@ -934,6 +934,7 @@ static int rk_nfc_nand_chip_init(ofnode node, struct rk_nfc *nfc, int devnum)
nand_set_controller_data(chip, nfc);
+ chip->flash_node = node;
chip->chip_delay = NFC_RB_DELAY_US;
chip->select_chip = rk_nfc_select_chip;
chip->cmd_ctrl = rk_nfc_cmd;
--
2.20.1
^ permalink raw reply related [flat|nested] 38+ messages in thread
* [PATCH v4 10/11] mtd: nand: add support for the Sandisk SDTNQGAMA chip
2023-02-18 15:23 [PATCH v4 00/11] Fixes for Rockchip NFC driver part 1 Johan Jonker
` (8 preceding siblings ...)
2023-02-18 15:28 ` [PATCH v4 09/11] mtd: nand: raw: rockchip_nfc: add flash_node to chip structure Johan Jonker
@ 2023-02-18 15:28 ` Johan Jonker
2023-02-18 15:29 ` [PATCH v4 11/11] mtd: nand: raw: rockchip_nfc: fix oobfree offset and description Johan Jonker
10 siblings, 0 replies; 38+ messages in thread
From: Johan Jonker @ 2023-02-18 15:28 UTC (permalink / raw)
To: dario.binacchi, michael, sjg
Cc: philipp.tomsich, kever.yang, u-boot, yifeng.zhao
Sandisk SDTNQGAMA is a 8GB size, 3.3V 8 bit chip with 16KB page size, 1KB write size and 40 bit ecc support
Signed-off-by: Paweł Jarosz <paweljarosz3691@gmail.com>
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
---
drivers/mtd/nand/raw/nand_ids.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/mtd/nand/raw/nand_ids.c b/drivers/mtd/nand/raw/nand_ids.c
index d0cfacc6..22ea5e2f 100644
--- a/drivers/mtd/nand/raw/nand_ids.c
+++ b/drivers/mtd/nand/raw/nand_ids.c
@@ -48,6 +48,9 @@ struct nand_flash_dev nand_flash_ids[] = {
{"TC58NVG6D2 64G 3.3V 8-bit",
{ .id = {0x98, 0xde, 0x94, 0x82, 0x76, 0x56, 0x04, 0x20} },
SZ_8K, SZ_8K, SZ_2M, 0, 8, 640, NAND_ECC_INFO(40, SZ_1K) },
+ {"SDTNQGAMA 64G 3.3V 8-bit",
+ { .id = {0x45, 0xde, 0x94, 0x93, 0x76, 0x57} },
+ SZ_16K, SZ_8K, SZ_4M, 0, 6, 1280, NAND_ECC_INFO(40, SZ_1K) },
{"SDTNRGAMA 64G 3.3V 8-bit",
{ .id = {0x45, 0xde, 0x94, 0x93, 0x76, 0x50} },
SZ_16K, SZ_8K, SZ_4M, 0, 6, 1280, NAND_ECC_INFO(40, SZ_1K) },
--
2.20.1
^ permalink raw reply related [flat|nested] 38+ messages in thread
* [PATCH v4 11/11] mtd: nand: raw: rockchip_nfc: fix oobfree offset and description
2023-02-18 15:23 [PATCH v4 00/11] Fixes for Rockchip NFC driver part 1 Johan Jonker
` (9 preceding siblings ...)
2023-02-18 15:28 ` [PATCH v4 10/11] mtd: nand: add support for the Sandisk SDTNQGAMA chip Johan Jonker
@ 2023-02-18 15:29 ` Johan Jonker
2023-02-22 8:01 ` Kever Yang
10 siblings, 1 reply; 38+ messages in thread
From: Johan Jonker @ 2023-02-18 15:29 UTC (permalink / raw)
To: dario.binacchi, michael, sjg
Cc: philipp.tomsich, kever.yang, u-boot, yifeng.zhao
The MTD framework reserves 1 or 2 bytes for the bad block marker
depending on the bus size. The rockchip_nfc driver currently only
supports a 8 bit bus, but reserves standard 2 bytes for the BBM.
The first free OOB byte is therefore OOB2 at offset 2.
Page address(PA) bytes are moved to the last 4 positions before
ECC. Update the description for U-boot.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
---
drivers/mtd/nand/raw/rockchip_nfc.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/mtd/nand/raw/rockchip_nfc.c b/drivers/mtd/nand/raw/rockchip_nfc.c
index ca5e7313..5ca7eeb8 100644
--- a/drivers/mtd/nand/raw/rockchip_nfc.c
+++ b/drivers/mtd/nand/raw/rockchip_nfc.c
@@ -487,10 +487,10 @@ static int rk_nfc_write_page_raw(struct mtd_info *mtd,
*
* BBM OOB1 OOB2 OOB3 |......| PA0 PA1 PA2 PA3
*
- * The rk_nfc_ooblayout_free() function already has reserved
- * these 4 bytes with:
+ * The oobfree structure already has reserved these 4 bytes
+ * together with 2 bytes for BBM by reducing it's length:
*
- * oob_region->offset = NFC_SYS_DATA_SIZE + 2;
+ * oobfree[0].length = rknand->metadata_size - NFC_SYS_DATA_SIZE - 2;
*/
if (!i)
memcpy(rk_nfc_oob_ptr(chip, i),
@@ -867,7 +867,7 @@ static int rk_nfc_ecc_init(struct rk_nfc *nfc, struct nand_chip *chip)
ecc->layout->eccpos[i] = rknand->metadata_size + i;
ecc->layout->oobfree[0].length = rknand->metadata_size - NFC_SYS_DATA_SIZE - 2;
- ecc->layout->oobfree[0].offset = NFC_SYS_DATA_SIZE + 2;
+ ecc->layout->oobfree[0].offset = 2;
return 0;
}
--
2.20.1
^ permalink raw reply related [flat|nested] 38+ messages in thread
* Re: [PATCH v4 03/11] core: remap: convert regmap_init_mem_plat() input to phys_addr_t
2023-02-18 15:27 ` [PATCH v4 03/11] core: remap: convert regmap_init_mem_plat() input to phys_addr_t Johan Jonker
@ 2023-02-22 7:59 ` Kever Yang
0 siblings, 0 replies; 38+ messages in thread
From: Kever Yang @ 2023-02-22 7:59 UTC (permalink / raw)
To: Johan Jonker, dario.binacchi, michael, sjg
Cc: philipp.tomsich, u-boot, yifeng.zhao
On 2023/2/18 23:27, Johan Jonker wrote:
> The fdt_addr_t and phys_addr_t size have been decoupled.
> A 32bit CPU can expect 64-bit data from the device tree parser,
> so convert regmap_init_mem_plat() input to phys_addr_t in files
> that use this function. Also correct struct syscon_base_plat
> depending on CONFIG_PHYS_64BIT setting and fix ARRAY_SIZE
> divider.
>
> Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Thanks,
- Kever
> ---
>
> Changed V4:
> Fix cast and divider in syscon-uclass.c
> ---
> drivers/core/regmap.c | 2 +-
> drivers/core/syscon-uclass.c | 4 ++--
> drivers/ram/rockchip/sdram_rk3066.c | 2 +-
> drivers/ram/rockchip/sdram_rk3188.c | 2 +-
> drivers/ram/rockchip/sdram_rk322x.c | 2 +-
> drivers/ram/rockchip/sdram_rk3288.c | 2 +-
> drivers/ram/rockchip/sdram_rk3328.c | 2 +-
> drivers/ram/rockchip/sdram_rk3399.c | 2 +-
> include/regmap.h | 2 +-
> include/syscon.h | 13 +++++++------
> 10 files changed, 17 insertions(+), 16 deletions(-)
>
> diff --git a/drivers/core/regmap.c b/drivers/core/regmap.c
> index e33bb9d7..37da64b2 100644
> --- a/drivers/core/regmap.c
> +++ b/drivers/core/regmap.c
> @@ -79,7 +79,7 @@ static struct regmap *regmap_alloc(int count)
> }
>
> #if CONFIG_IS_ENABLED(OF_PLATDATA)
> -int regmap_init_mem_plat(struct udevice *dev, fdt_val_t *reg, int count,
> +int regmap_init_mem_plat(struct udevice *dev, phys_addr_t *reg, int count,
> struct regmap **mapp)
> {
> struct regmap_range *range;
> diff --git a/drivers/core/syscon-uclass.c b/drivers/core/syscon-uclass.c
> index 25fdb66e..b557a24f 100644
> --- a/drivers/core/syscon-uclass.c
> +++ b/drivers/core/syscon-uclass.c
> @@ -58,8 +58,8 @@ static int syscon_pre_probe(struct udevice *dev)
> #if CONFIG_IS_ENABLED(OF_PLATDATA)
> struct syscon_base_plat *plat = dev_get_plat(dev);
>
> - return regmap_init_mem_plat(dev, plat->reg, ARRAY_SIZE(plat->reg),
> - &priv->regmap);
> + return regmap_init_mem_plat(dev, (phys_addr_t *)plat->reg,
> + ARRAY_SIZE(plat->reg) / 2, &priv->regmap);
> #else
> return regmap_init_mem(dev_ofnode(dev), &priv->regmap);
> #endif
> diff --git a/drivers/ram/rockchip/sdram_rk3066.c b/drivers/ram/rockchip/sdram_rk3066.c
> index a2425f22..9bb26b64 100644
> --- a/drivers/ram/rockchip/sdram_rk3066.c
> +++ b/drivers/ram/rockchip/sdram_rk3066.c
> @@ -801,7 +801,7 @@ static int rk3066_dmc_conv_of_plat(struct udevice *dev)
> memcpy(&plat->base, of_plat->rockchip_sdram_params, sizeof(plat->base));
> /* RK3066 supports dual-channel, set default channel num to 2. */
> plat->num_channels = 1;
> - ret = regmap_init_mem_plat(dev, of_plat->reg,
> + ret = regmap_init_mem_plat(dev, (phys_addr_t *)of_plat->reg,
> ARRAY_SIZE(of_plat->reg) / 2, &plat->map);
> if (ret)
> return ret;
> diff --git a/drivers/ram/rockchip/sdram_rk3188.c b/drivers/ram/rockchip/sdram_rk3188.c
> index 272b1b2d..1838985c 100644
> --- a/drivers/ram/rockchip/sdram_rk3188.c
> +++ b/drivers/ram/rockchip/sdram_rk3188.c
> @@ -867,7 +867,7 @@ static int conv_of_plat(struct udevice *dev)
> memcpy(&plat->base, of_plat->rockchip_sdram_params, sizeof(plat->base));
> /* rk3188 supports dual-channel, set default channel num to 2 */
> plat->num_channels = 1;
> - ret = regmap_init_mem_plat(dev, of_plat->reg,
> + ret = regmap_init_mem_plat(dev, (phys_addr_t *)of_plat->reg,
> ARRAY_SIZE(of_plat->reg) / 2, &plat->map);
> if (ret)
> return ret;
> diff --git a/drivers/ram/rockchip/sdram_rk322x.c b/drivers/ram/rockchip/sdram_rk322x.c
> index 1b204fb5..33599dc5 100644
> --- a/drivers/ram/rockchip/sdram_rk322x.c
> +++ b/drivers/ram/rockchip/sdram_rk322x.c
> @@ -769,7 +769,7 @@ static int conv_of_plat(struct udevice *dev)
> memcpy(&plat->base, of_plat->rockchip_sdram_params, sizeof(plat->base));
>
> plat->num_channels = 1;
> - ret = regmap_init_mem_plat(dev, of_plat->reg,
> + ret = regmap_init_mem_plat(dev, (phys_addr_t *)of_plat->reg,
> ARRAY_SIZE(of_plat->reg) / 2, &plat->map);
> if (ret)
> return ret;
> diff --git a/drivers/ram/rockchip/sdram_rk3288.c b/drivers/ram/rockchip/sdram_rk3288.c
> index 83778ad1..1a548da5 100644
> --- a/drivers/ram/rockchip/sdram_rk3288.c
> +++ b/drivers/ram/rockchip/sdram_rk3288.c
> @@ -1029,7 +1029,7 @@ static int conv_of_plat(struct udevice *dev)
> memcpy(&plat->base, of_plat->rockchip_sdram_params, sizeof(plat->base));
> /* Rk3288 supports dual-channel, set default channel num to 2 */
> plat->num_channels = 2;
> - ret = regmap_init_mem_plat(dev, of_plat->reg,
> + ret = regmap_init_mem_plat(dev, (phys_addr_t *)of_plat->reg,
> ARRAY_SIZE(of_plat->reg) / 2, &plat->map);
> if (ret)
> return ret;
> diff --git a/drivers/ram/rockchip/sdram_rk3328.c b/drivers/ram/rockchip/sdram_rk3328.c
> index b511c6bf..2427efe0 100644
> --- a/drivers/ram/rockchip/sdram_rk3328.c
> +++ b/drivers/ram/rockchip/sdram_rk3328.c
> @@ -54,7 +54,7 @@ static int conv_of_plat(struct udevice *dev)
> struct dtd_rockchip_rk3328_dmc *dtplat = &plat->dtplat;
> int ret;
>
> - ret = regmap_init_mem_plat(dev, dtplat->reg,
> + ret = regmap_init_mem_plat(dev, (phys_addr_t *)dtplat->reg,
> ARRAY_SIZE(dtplat->reg) / 2, &plat->map);
> if (ret)
> return ret;
> diff --git a/drivers/ram/rockchip/sdram_rk3399.c b/drivers/ram/rockchip/sdram_rk3399.c
> index 136e4ede..c88fdbb3 100644
> --- a/drivers/ram/rockchip/sdram_rk3399.c
> +++ b/drivers/ram/rockchip/sdram_rk3399.c
> @@ -3049,7 +3049,7 @@ static int conv_of_plat(struct udevice *dev)
> struct dtd_rockchip_rk3399_dmc *dtplat = &plat->dtplat;
> int ret;
>
> - ret = regmap_init_mem_plat(dev, dtplat->reg,
> + ret = regmap_init_mem_plat(dev, (phys_addr_t *)dtplat->reg,
> ARRAY_SIZE(dtplat->reg) / 2, &plat->map);
> if (ret)
> return ret;
> diff --git a/include/regmap.h b/include/regmap.h
> index e81a3602..a274fb27 100644
> --- a/include/regmap.h
> +++ b/include/regmap.h
> @@ -388,7 +388,7 @@ int regmap_init_mem(ofnode node, struct regmap **mapp);
> * Use regmap_uninit() to free it.
> *
> */
> -int regmap_init_mem_plat(struct udevice *dev, fdt_val_t *reg, int count,
> +int regmap_init_mem_plat(struct udevice *dev, phys_addr_t *reg, int count,
> struct regmap **mapp);
>
> int regmap_init_mem_index(ofnode node, struct regmap **mapp, int index);
> diff --git a/include/syscon.h b/include/syscon.h
> index f5e6cc1a..836ae07c 100644
> --- a/include/syscon.h
> +++ b/include/syscon.h
> @@ -27,14 +27,15 @@ struct syscon_ops {
>
> #if CONFIG_IS_ENABLED(OF_PLATDATA)
> /*
> - * We don't support 64-bit machines. If they are so resource-contrained that
> - * they need to use OF_PLATDATA, something is horribly wrong with the
> - * education of our hardware engineers.
> - *
> - * Update: 64-bit is now supported and we have an education crisis.
> + * Support for 64bit or 32bit fdt addresses
> + * depending on the physical SoC properties.
> */
> struct syscon_base_plat {
> - fdt_val_t reg[2];
> +#ifdef CONFIG_PHYS_64BIT
> + fdt64_t reg[2];
> +#else
> + fdt32_t reg[2];
> +#endif
> };
> #endif
>
> --
> 2.20.1
>
^ permalink raw reply [flat|nested] 38+ messages in thread
* Re: [PATCH v4 04/11] rockchip: adc: rockchip-saradc: use dev_read_addr_ptr
2023-02-18 15:27 ` [PATCH v4 04/11] rockchip: adc: rockchip-saradc: use dev_read_addr_ptr Johan Jonker
@ 2023-02-22 8:00 ` Kever Yang
0 siblings, 0 replies; 38+ messages in thread
From: Kever Yang @ 2023-02-22 8:00 UTC (permalink / raw)
To: Johan Jonker, dario.binacchi, michael, sjg
Cc: philipp.tomsich, u-boot, yifeng.zhao
On 2023/2/18 23:27, Johan Jonker wrote:
> The fdt_addr_t and phys_addr_t size have been decoupled.
> A 32bit CPU can expext 64-bit data from the device tree parser,
> so use dev_read_addr_ptr in the rockchip-saradc.c file.
>
> Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Thanks,
- Kever
> ---
> drivers/adc/rockchip-saradc.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/adc/rockchip-saradc.c b/drivers/adc/rockchip-saradc.c
> index 760f8fe6..de9298a2 100644
> --- a/drivers/adc/rockchip-saradc.c
> +++ b/drivers/adc/rockchip-saradc.c
> @@ -145,8 +145,8 @@ int rockchip_saradc_of_to_plat(struct udevice *dev)
> struct rockchip_saradc_data *data;
>
> data = (struct rockchip_saradc_data *)dev_get_driver_data(dev);
> - priv->regs = (struct rockchip_saradc_regs *)dev_read_addr(dev);
> - if (priv->regs == (struct rockchip_saradc_regs *)FDT_ADDR_T_NONE) {
> + priv->regs = (struct rockchip_saradc_regs *)dev_read_addr_ptr(dev);
> + if (!priv->regs) {
> pr_err("Dev: %s - can't get address!", dev->name);
> return -ENODATA;
> }
> --
> 2.20.1
>
^ permalink raw reply [flat|nested] 38+ messages in thread
* Re: [PATCH v4 11/11] mtd: nand: raw: rockchip_nfc: fix oobfree offset and description
2023-02-18 15:29 ` [PATCH v4 11/11] mtd: nand: raw: rockchip_nfc: fix oobfree offset and description Johan Jonker
@ 2023-02-22 8:01 ` Kever Yang
0 siblings, 0 replies; 38+ messages in thread
From: Kever Yang @ 2023-02-22 8:01 UTC (permalink / raw)
To: Johan Jonker, dario.binacchi, michael, sjg
Cc: philipp.tomsich, u-boot, yifeng.zhao
On 2023/2/18 23:29, Johan Jonker wrote:
> The MTD framework reserves 1 or 2 bytes for the bad block marker
> depending on the bus size. The rockchip_nfc driver currently only
> supports a 8 bit bus, but reserves standard 2 bytes for the BBM.
> The first free OOB byte is therefore OOB2 at offset 2.
> Page address(PA) bytes are moved to the last 4 positions before
> ECC. Update the description for U-boot.
>
> Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Thanks,
- Kever
> ---
> drivers/mtd/nand/raw/rockchip_nfc.c | 8 ++++----
> 1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/mtd/nand/raw/rockchip_nfc.c b/drivers/mtd/nand/raw/rockchip_nfc.c
> index ca5e7313..5ca7eeb8 100644
> --- a/drivers/mtd/nand/raw/rockchip_nfc.c
> +++ b/drivers/mtd/nand/raw/rockchip_nfc.c
> @@ -487,10 +487,10 @@ static int rk_nfc_write_page_raw(struct mtd_info *mtd,
> *
> * BBM OOB1 OOB2 OOB3 |......| PA0 PA1 PA2 PA3
> *
> - * The rk_nfc_ooblayout_free() function already has reserved
> - * these 4 bytes with:
> + * The oobfree structure already has reserved these 4 bytes
> + * together with 2 bytes for BBM by reducing it's length:
> *
> - * oob_region->offset = NFC_SYS_DATA_SIZE + 2;
> + * oobfree[0].length = rknand->metadata_size - NFC_SYS_DATA_SIZE - 2;
> */
> if (!i)
> memcpy(rk_nfc_oob_ptr(chip, i),
> @@ -867,7 +867,7 @@ static int rk_nfc_ecc_init(struct rk_nfc *nfc, struct nand_chip *chip)
> ecc->layout->eccpos[i] = rknand->metadata_size + i;
>
> ecc->layout->oobfree[0].length = rknand->metadata_size - NFC_SYS_DATA_SIZE - 2;
> - ecc->layout->oobfree[0].offset = NFC_SYS_DATA_SIZE + 2;
> + ecc->layout->oobfree[0].offset = 2;
>
> return 0;
> }
> --
> 2.20.1
>
^ permalink raw reply [flat|nested] 38+ messages in thread
* Re: [PATCH v4 01/11] include: fdtdec: decouple fdt_addr_t and phys_addr_t size
2023-02-18 15:26 ` [PATCH v4 01/11] include: fdtdec: decouple fdt_addr_t and phys_addr_t size Johan Jonker
@ 2023-02-23 0:47 ` Kever Yang
2023-02-23 14:06 ` [PATCH v1] spi: spi-aspeed-smc: convert devfdt_get_addr_index output to phys_addr_t Johan Jonker
` (3 more replies)
0 siblings, 4 replies; 38+ messages in thread
From: Kever Yang @ 2023-02-23 0:47 UTC (permalink / raw)
To: Johan Jonker, dario.binacchi, michael, sjg; +Cc: u-boot, yifeng.zhao
Hi Johan,
This update will cause below error on evb-ast2500/2600:
$ tools/buildman/buildman -o ${UBOOT_TRAVIS_BUILD_DIR} -w -E -W -e
--board ${TEST_PY_BD} ${OVERRIDE}
Building current source for 1 boards (1 thread, 24 jobs per thread)
arm: + evb-ast2600
+drivers/spi/spi-aspeed-smc.c: In function 'apseed_spi_of_to_plat':
+drivers/spi/spi-aspeed-smc.c:1154:22: error: format '%lx' expects
argument of type 'long unsigned int', but argument 4 has type
'fdt_size_t' {aka 'unsigned int'} [-Werror=format=]
+ 1154 | dev_dbg(bus, "ctrl_base = 0x%x, ahb_base = 0x%p, size =
0x%lx\n",
+ | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+ 1155 | (u32)priv->regs, plat->ahb_base, plat->ahb_sz);
+ | ~~~~~~~~~~~~
+ | |
+ | fdt_size_t {aka unsigned int}
+include/dm/device_compat.h:50:24: note: in definition of macro
'dev_printk_emit'
+ 50 | printf(fmt, ##__VA_ARGS__); \
+ | ^~~
+include/dm/device_compat.h:117:9: note: in expansion of macro
'__dev_printk'
+ 117 | __dev_printk(LOGL_DEBUG, dev, fmt, ##__VA_ARGS__)
+ | ^~~~~~~~~~~~
+drivers/spi/spi-aspeed-smc.c:1154:9: note: in expansion of macro 'dev_dbg'
+ | ^~~~~~~
+drivers/spi/spi-aspeed-smc.c:1154:69: note: format string is defined here
+ | ~~^
+ | |
+ | long unsigned int
+ | %x
+In file included from include/linux/printk.h:4,
+ from include/linux/kernel.h:5,
+ from arch/arm/include/asm/io.h:14,
+ from drivers/spi/spi-aspeed-smc.c:13:
+include/log.h:222:24: note: in definition of macro 'log'
+ 222 | printf(_fmt, ##_args); \
+ | ^~~~
+include/dm/device_compat.h:85:17: note: in expansion of macro
'dev_printk_emit'
+ 85 | dev_printk_emit(LOG_CATEGORY, level, fmt,
##__VA_ARGS__); \
+ | ^~~~~~~~~~~~~~~
+include/dm/device_compat.h:54:24: note: in definition of macro
'dev_printk_emit'
+ 54 | printf(fmt, ##__VA_ARGS__); \
+include/dm/device_compat.h:91:41: error: format '%lx' expects argument
of type 'long unsigned int', but argument 6 has type 'fdt_size_t' {aka
'unsigned int'} [-Werror=format=]
+ 91 | "%s %s: " fmt, \
+ | ^~~~~~~~~
+include/dm/device_compat.h:90:25: note: in expansion of macro
'dev_printk_emit'
+ 90 | dev_printk_emit(__dev->driver->id, level, \
+ | ^~~~~~~~~~~~~~~
+include/dm/device_compat.h:96:41: error: format '%lx' expects argument
of type 'long unsigned int', but argument 6 has type 'fdt_size_t' {aka
'unsigned int'} [-Werror=format=]
+ 96 | "%s %s: " fmt, \
+include/dm/device_compat.h:95:25: note: in expansion of macro
'dev_printk_emit'
+ 95 | dev_printk_emit(LOG_CATEGORY, level, \
+cc1: all warnings being treated as errors
+make[3]: *** [scripts/Makefile.build:256: drivers/spi/spi-aspeed-smc.o]
Error 1
+make[2]: *** [scripts/Makefile.build:397: drivers/spi] Error 2
+make[1]: *** [Makefile:1846: drivers] Error 2
+make: *** [Makefile:177: sub-make] Error 2
0 0 1 /1 evb-ast2600
Thanks,
- Kever
On 2023/2/18 23:26, Johan Jonker wrote:
> The DT specification supports CPUs with both 32-bit and 64-bit addressing
> capabilities. In U-boot the fdt_addr_t and phys_addr_t size are coupled
> by a typedef. The MTD NAND drivers for 32-bit CPU's can describe partitions
> with a 64-bit reg property. These partitions synced from Linux end up with
> the wrong offset and sizes when only the lower 32-bit is passed.
> Decouple the fdt_addr_t and phys_addr_t size as they don't necessary
> match.
>
> Signed-off-by: Johan Jonker <jbx6244@gmail.com>
> Reviewed-by: Simon Glass <sjg@chromium.org>
> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
> ---
>
> Changed V2:
> reword
>
> ---
>
> Note:
> Most drivers still assume that FDT and CPU capabilities are identical.
> In order to use these variables a cast is needed.
> ---
> Kconfig | 8 ++++++++
> include/fdtdec.h | 13 +++++++++----
> 2 files changed, 17 insertions(+), 4 deletions(-)
>
> diff --git a/Kconfig b/Kconfig
> index a75cce7e..7697dade 100644
> --- a/Kconfig
> +++ b/Kconfig
> @@ -422,11 +422,19 @@ endif # EXPERT
>
> config PHYS_64BIT
> bool "64bit physical address support"
> + select FDT_64BIT
> help
> Say Y here to support 64bit physical memory address.
> This can be used not only for 64bit SoCs, but also for
> large physical address extension on 32bit SoCs.
>
> +config FDT_64BIT
> + bool "64bit fdt address support"
> + help
> + Say Y here to support 64bit fdt addresses.
> + This can be used not only for 64bit SoCs, but also
> + for large address extensions on 32bit SoCs.
> +
> config HAS_ROM
> bool
> select BINMAN
> diff --git a/include/fdtdec.h b/include/fdtdec.h
> index 12355afd..af29ac0c 100644
> --- a/include/fdtdec.h
> +++ b/include/fdtdec.h
> @@ -18,15 +18,18 @@
> #include <pci.h>
>
> /*
> - * A typedef for a physical address. Note that fdt data is always big
> + * Support for 64bit fdt addresses.
> + * This can be used not only for 64bit SoCs, but also
> + * for large address extensions on 32bit SoCs.
> + * Note that fdt data is always big
> * endian even on a litle endian machine.
> */
> -typedef phys_addr_t fdt_addr_t;
> -typedef phys_size_t fdt_size_t;
>
> #define FDT_SIZE_T_NONE (-1U)
>
> -#ifdef CONFIG_PHYS_64BIT
> +#ifdef CONFIG_FDT_64BIT
> +typedef u64 fdt_addr_t;
> +typedef u64 fdt_size_t;
> #define FDT_ADDR_T_NONE ((ulong)(-1))
>
> #define fdt_addr_to_cpu(reg) be64_to_cpu(reg)
> @@ -35,6 +38,8 @@ typedef phys_size_t fdt_size_t;
> #define cpu_to_fdt_size(reg) cpu_to_be64(reg)
> typedef fdt64_t fdt_val_t;
> #else
> +typedef u32 fdt_addr_t;
> +typedef u32 fdt_size_t;
> #define FDT_ADDR_T_NONE (-1U)
>
> #define fdt_addr_to_cpu(reg) be32_to_cpu(reg)
> --
> 2.20.1
>
^ permalink raw reply [flat|nested] 38+ messages in thread
* [PATCH v1] spi: spi-aspeed-smc: convert devfdt_get_addr_index output to phys_addr_t
2023-02-23 0:47 ` Kever Yang
@ 2023-02-23 14:06 ` Johan Jonker
2023-02-25 9:26 ` Michael Nazzareno Trimarchi
2023-02-25 9:11 ` [PATCH v4 01/11] include: fdtdec: decouple fdt_addr_t and phys_addr_t size Johan Jonker
` (2 subsequent siblings)
3 siblings, 1 reply; 38+ messages in thread
From: Johan Jonker @ 2023-02-23 14:06 UTC (permalink / raw)
To: chin-ting_kuo, clg, sjg, kever.yang
Cc: BMC-SW, jagan, ryan_chen, chiawei_wang, joel, dario.binacchi,
michael, philipp.tomsich, u-boot, yifeng.zhao
The fdt_addr_t and phys_addr_t size have been decoupled.
A 32bit CPU can expect 64-bit data from the device tree parser,
so convert devfdt_get_addr_index output to phys_addr_t in the
spi-aspeed-smc.c file. Also fix dev_dbg to be able to handle
both sizes.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
---
Note:
This is needed for a Rockchip patch serie to pass the test and
must be merged before by Rockchip maintainers:
[PATCH v4 00/11] Fixes for Rockchip NFC driver part 1
https://lore.kernel.org/u-boot/f3dba231-4a55-0a94-dfab-5cab1419d132@gmail.com/
Request for hardware test by Aspeed people.
---
drivers/spi/spi-aspeed-smc.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/spi/spi-aspeed-smc.c b/drivers/spi/spi-aspeed-smc.c
index a3c96333..17696441 100644
--- a/drivers/spi/spi-aspeed-smc.c
+++ b/drivers/spi/spi-aspeed-smc.c
@@ -1125,14 +1125,14 @@ static int apseed_spi_of_to_plat(struct udevice *bus)
int ret;
struct clk hclk;
- priv->regs = (void __iomem *)devfdt_get_addr_index(bus, 0);
+ priv->regs = (void __iomem *)((phys_addr_t)devfdt_get_addr_index(bus, 0));
if ((u32)priv->regs == FDT_ADDR_T_NONE) {
dev_err(bus, "wrong ctrl base\n");
return -ENODEV;
}
plat->ahb_base =
- (void __iomem *)devfdt_get_addr_size_index(bus, 1, &plat->ahb_sz);
+ (void __iomem *)((phys_addr_t)devfdt_get_addr_size_index(bus, 1, &plat->ahb_sz));
if ((u32)plat->ahb_base == FDT_ADDR_T_NONE) {
dev_err(bus, "wrong AHB base\n");
return -ENODEV;
@@ -1151,8 +1151,8 @@ static int apseed_spi_of_to_plat(struct udevice *bus)
plat->hclk_rate = clk_get_rate(&hclk);
clk_free(&hclk);
- dev_dbg(bus, "ctrl_base = 0x%x, ahb_base = 0x%p, size = 0x%lx\n",
- (u32)priv->regs, plat->ahb_base, plat->ahb_sz);
+ dev_dbg(bus, "ctrl_base = 0x%x, ahb_base = 0x%p, size = 0x%llx\n",
+ (u32)priv->regs, plat->ahb_base, (fdt64_t)plat->ahb_sz);
dev_dbg(bus, "hclk = %dMHz, max_cs = %d\n",
plat->hclk_rate / 1000000, plat->max_cs);
--
2.20.1
^ permalink raw reply related [flat|nested] 38+ messages in thread
* Re: [PATCH v4 01/11] include: fdtdec: decouple fdt_addr_t and phys_addr_t size
2023-02-23 0:47 ` Kever Yang
2023-02-23 14:06 ` [PATCH v1] spi: spi-aspeed-smc: convert devfdt_get_addr_index output to phys_addr_t Johan Jonker
@ 2023-02-25 9:11 ` Johan Jonker
2023-02-25 9:15 ` Michael Nazzareno Trimarchi
2023-02-25 11:43 ` [PATCH v2 1/2] core: fdtaddr: add devfdt_get_addr_size_index_ptr function Johan Jonker
2023-02-25 19:16 ` [RFC PATCH v1 1/4] drivers: use dev_read_addr_index_ptr when cast to pointer Johan Jonker
3 siblings, 1 reply; 38+ messages in thread
From: Johan Jonker @ 2023-02-25 9:11 UTC (permalink / raw)
To: Kever Yang, dario.binacchi, michael, sjg; +Cc: u-boot, yifeng.zhao
On 2/23/23 01:47, Kever Yang wrote:
> Hi Johan,
>
> This update will cause below error on evb-ast2500/2600:
Hi Kever, Simon,
For "spi-aspeed-smc.c" I have submitted a patch proposal.
The changes in patch 1 possible involves a lot more boards that might need a change to which the external MAINTAINERS may or may not respond to.
As that becomes a lengthy time consuming process. Is it maybe possible to skip patch 1 for now and get at least the more essential patches 2-11 merged?
Please advise what's the best option here to get forward.
Johan
>
> $ tools/buildman/buildman -o ${UBOOT_TRAVIS_BUILD_DIR} -w -E -W -e --board ${TEST_PY_BD} ${OVERRIDE}
> Building current source for 1 boards (1 thread, 24 jobs per thread)
> arm: + evb-ast2600
> +drivers/spi/spi-aspeed-smc.c: In function 'apseed_spi_of_to_plat':
> +drivers/spi/spi-aspeed-smc.c:1154:22: error: format '%lx' expects argument of type 'long unsigned int', but argument 4 has type 'fdt_size_t' {aka 'unsigned int'} [-Werror=format=]
> + 1154 | dev_dbg(bus, "ctrl_base = 0x%x, ahb_base = 0x%p, size = 0x%lx\n",
> + | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
> + 1155 | (u32)priv->regs, plat->ahb_base, plat->ahb_sz);
> + | ~~~~~~~~~~~~
> + | |
> + | fdt_size_t {aka unsigned int}
> +include/dm/device_compat.h:50:24: note: in definition of macro 'dev_printk_emit'
> + 50 | printf(fmt, ##__VA_ARGS__); \
> + | ^~~
> +include/dm/device_compat.h:117:9: note: in expansion of macro '__dev_printk'
> + 117 | __dev_printk(LOGL_DEBUG, dev, fmt, ##__VA_ARGS__)
> + | ^~~~~~~~~~~~
> +drivers/spi/spi-aspeed-smc.c:1154:9: note: in expansion of macro 'dev_dbg'
> + | ^~~~~~~
> +drivers/spi/spi-aspeed-smc.c:1154:69: note: format string is defined here
> + | ~~^
> + | |
> + | long unsigned int
> + | %x
> +In file included from include/linux/printk.h:4,
> + from include/linux/kernel.h:5,
> + from arch/arm/include/asm/io.h:14,
> + from drivers/spi/spi-aspeed-smc.c:13:
> +include/log.h:222:24: note: in definition of macro 'log'
> + 222 | printf(_fmt, ##_args); \
> + | ^~~~
> +include/dm/device_compat.h:85:17: note: in expansion of macro 'dev_printk_emit'
> + 85 | dev_printk_emit(LOG_CATEGORY, level, fmt, ##__VA_ARGS__); \
> + | ^~~~~~~~~~~~~~~
> +include/dm/device_compat.h:54:24: note: in definition of macro 'dev_printk_emit'
> + 54 | printf(fmt, ##__VA_ARGS__); \
> +include/dm/device_compat.h:91:41: error: format '%lx' expects argument of type 'long unsigned int', but argument 6 has type 'fdt_size_t' {aka 'unsigned int'} [-Werror=format=]
> + 91 | "%s %s: " fmt, \
> + | ^~~~~~~~~
> +include/dm/device_compat.h:90:25: note: in expansion of macro 'dev_printk_emit'
> + 90 | dev_printk_emit(__dev->driver->id, level, \
> + | ^~~~~~~~~~~~~~~
> +include/dm/device_compat.h:96:41: error: format '%lx' expects argument of type 'long unsigned int', but argument 6 has type 'fdt_size_t' {aka 'unsigned int'} [-Werror=format=]
> + 96 | "%s %s: " fmt, \
> +include/dm/device_compat.h:95:25: note: in expansion of macro 'dev_printk_emit'
> + 95 | dev_printk_emit(LOG_CATEGORY, level, \
> +cc1: all warnings being treated as errors
> +make[3]: *** [scripts/Makefile.build:256: drivers/spi/spi-aspeed-smc.o] Error 1
> +make[2]: *** [scripts/Makefile.build:397: drivers/spi] Error 2
> +make[1]: *** [Makefile:1846: drivers] Error 2
> +make: *** [Makefile:177: sub-make] Error 2
> 0 0 1 /1 evb-ast2600
>
>
> Thanks,
>
> - Kever
>
> On 2023/2/18 23:26, Johan Jonker wrote:
>> The DT specification supports CPUs with both 32-bit and 64-bit addressing
>> capabilities. In U-boot the fdt_addr_t and phys_addr_t size are coupled
>> by a typedef. The MTD NAND drivers for 32-bit CPU's can describe partitions
>> with a 64-bit reg property. These partitions synced from Linux end up with
>> the wrong offset and sizes when only the lower 32-bit is passed.
>> Decouple the fdt_addr_t and phys_addr_t size as they don't necessary
>> match.
>>
>> Signed-off-by: Johan Jonker <jbx6244@gmail.com>
>> Reviewed-by: Simon Glass <sjg@chromium.org>
>> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
>> ---
>>
>> Changed V2:
>> reword
>>
>> ---
>>
>> Note:
>> Most drivers still assume that FDT and CPU capabilities are identical.
>> In order to use these variables a cast is needed.
>> ---
>> Kconfig | 8 ++++++++
>> include/fdtdec.h | 13 +++++++++----
>> 2 files changed, 17 insertions(+), 4 deletions(-)
>>
>> diff --git a/Kconfig b/Kconfig
>> index a75cce7e..7697dade 100644
>> --- a/Kconfig
>> +++ b/Kconfig
>> @@ -422,11 +422,19 @@ endif # EXPERT
>>
>> config PHYS_64BIT
>> bool "64bit physical address support"
>> + select FDT_64BIT
>> help
>> Say Y here to support 64bit physical memory address.
>> This can be used not only for 64bit SoCs, but also for
>> large physical address extension on 32bit SoCs.
>>
>> +config FDT_64BIT
>> + bool "64bit fdt address support"
>> + help
>> + Say Y here to support 64bit fdt addresses.
>> + This can be used not only for 64bit SoCs, but also
>> + for large address extensions on 32bit SoCs.
>> +
>> config HAS_ROM
>> bool
>> select BINMAN
>> diff --git a/include/fdtdec.h b/include/fdtdec.h
>> index 12355afd..af29ac0c 100644
>> --- a/include/fdtdec.h
>> +++ b/include/fdtdec.h
>> @@ -18,15 +18,18 @@
>> #include <pci.h>
>>
>> /*
>> - * A typedef for a physical address. Note that fdt data is always big
>> + * Support for 64bit fdt addresses.
>> + * This can be used not only for 64bit SoCs, but also
>> + * for large address extensions on 32bit SoCs.
>> + * Note that fdt data is always big
>> * endian even on a litle endian machine.
>> */
>> -typedef phys_addr_t fdt_addr_t;
>> -typedef phys_size_t fdt_size_t;
>>
>> #define FDT_SIZE_T_NONE (-1U)
>>
>> -#ifdef CONFIG_PHYS_64BIT
>> +#ifdef CONFIG_FDT_64BIT
>> +typedef u64 fdt_addr_t;
>> +typedef u64 fdt_size_t;
>> #define FDT_ADDR_T_NONE ((ulong)(-1))
>>
>> #define fdt_addr_to_cpu(reg) be64_to_cpu(reg)
>> @@ -35,6 +38,8 @@ typedef phys_size_t fdt_size_t;
>> #define cpu_to_fdt_size(reg) cpu_to_be64(reg)
>> typedef fdt64_t fdt_val_t;
>> #else
>> +typedef u32 fdt_addr_t;
>> +typedef u32 fdt_size_t;
>> #define FDT_ADDR_T_NONE (-1U)
>>
>> #define fdt_addr_to_cpu(reg) be32_to_cpu(reg)
>> --
>> 2.20.1
>>
^ permalink raw reply [flat|nested] 38+ messages in thread
* Re: [PATCH v4 01/11] include: fdtdec: decouple fdt_addr_t and phys_addr_t size
2023-02-25 9:11 ` [PATCH v4 01/11] include: fdtdec: decouple fdt_addr_t and phys_addr_t size Johan Jonker
@ 2023-02-25 9:15 ` Michael Nazzareno Trimarchi
2023-02-25 9:20 ` Johan Jonker
0 siblings, 1 reply; 38+ messages in thread
From: Michael Nazzareno Trimarchi @ 2023-02-25 9:15 UTC (permalink / raw)
To: Johan Jonker; +Cc: Kever Yang, dario.binacchi, sjg, u-boot, yifeng.zhao
Hi Johan
On Sat, Feb 25, 2023 at 10:11 AM Johan Jonker <jbx6244@gmail.com> wrote:
>
>
>
> On 2/23/23 01:47, Kever Yang wrote:
> > Hi Johan,
> >
> > This update will cause below error on evb-ast2500/2600:
>
> Hi Kever, Simon,
>
> For "spi-aspeed-smc.c" I have submitted a patch proposal.
> The changes in patch 1 possible involves a lot more boards that might need a change to which the external MAINTAINERS may or may not respond to.
> As that becomes a lengthy time consuming process. Is it maybe possible to skip patch 1 for now and get at least the more essential patches 2-11 merged?
> Please advise what's the best option here to get forward.
>
> Johan
Please point to the patch you mentioned.
Kever if you are going to pick the nand patches part let me know
Michael
>
>
> >
> > $ tools/buildman/buildman -o ${UBOOT_TRAVIS_BUILD_DIR} -w -E -W -e --board ${TEST_PY_BD} ${OVERRIDE}
> > Building current source for 1 boards (1 thread, 24 jobs per thread)
> > arm: + evb-ast2600
> > +drivers/spi/spi-aspeed-smc.c: In function 'apseed_spi_of_to_plat':
> > +drivers/spi/spi-aspeed-smc.c:1154:22: error: format '%lx' expects argument of type 'long unsigned int', but argument 4 has type 'fdt_size_t' {aka 'unsigned int'} [-Werror=format=]
> > + 1154 | dev_dbg(bus, "ctrl_base = 0x%x, ahb_base = 0x%p, size = 0x%lx\n",
> > + | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
> > + 1155 | (u32)priv->regs, plat->ahb_base, plat->ahb_sz);
> > + | ~~~~~~~~~~~~
> > + | |
> > + | fdt_size_t {aka unsigned int}
> > +include/dm/device_compat.h:50:24: note: in definition of macro 'dev_printk_emit'
> > + 50 | printf(fmt, ##__VA_ARGS__); \
> > + | ^~~
> > +include/dm/device_compat.h:117:9: note: in expansion of macro '__dev_printk'
> > + 117 | __dev_printk(LOGL_DEBUG, dev, fmt, ##__VA_ARGS__)
> > + | ^~~~~~~~~~~~
> > +drivers/spi/spi-aspeed-smc.c:1154:9: note: in expansion of macro 'dev_dbg'
> > + | ^~~~~~~
> > +drivers/spi/spi-aspeed-smc.c:1154:69: note: format string is defined here
> > + | ~~^
> > + | |
> > + | long unsigned int
> > + | %x
> > +In file included from include/linux/printk.h:4,
> > + from include/linux/kernel.h:5,
> > + from arch/arm/include/asm/io.h:14,
> > + from drivers/spi/spi-aspeed-smc.c:13:
> > +include/log.h:222:24: note: in definition of macro 'log'
> > + 222 | printf(_fmt, ##_args); \
> > + | ^~~~
> > +include/dm/device_compat.h:85:17: note: in expansion of macro 'dev_printk_emit'
> > + 85 | dev_printk_emit(LOG_CATEGORY, level, fmt, ##__VA_ARGS__); \
> > + | ^~~~~~~~~~~~~~~
> > +include/dm/device_compat.h:54:24: note: in definition of macro 'dev_printk_emit'
> > + 54 | printf(fmt, ##__VA_ARGS__); \
> > +include/dm/device_compat.h:91:41: error: format '%lx' expects argument of type 'long unsigned int', but argument 6 has type 'fdt_size_t' {aka 'unsigned int'} [-Werror=format=]
> > + 91 | "%s %s: " fmt, \
> > + | ^~~~~~~~~
> > +include/dm/device_compat.h:90:25: note: in expansion of macro 'dev_printk_emit'
> > + 90 | dev_printk_emit(__dev->driver->id, level, \
> > + | ^~~~~~~~~~~~~~~
> > +include/dm/device_compat.h:96:41: error: format '%lx' expects argument of type 'long unsigned int', but argument 6 has type 'fdt_size_t' {aka 'unsigned int'} [-Werror=format=]
> > + 96 | "%s %s: " fmt, \
> > +include/dm/device_compat.h:95:25: note: in expansion of macro 'dev_printk_emit'
> > + 95 | dev_printk_emit(LOG_CATEGORY, level, \
> > +cc1: all warnings being treated as errors
> > +make[3]: *** [scripts/Makefile.build:256: drivers/spi/spi-aspeed-smc.o] Error 1
> > +make[2]: *** [scripts/Makefile.build:397: drivers/spi] Error 2
> > +make[1]: *** [Makefile:1846: drivers] Error 2
> > +make: *** [Makefile:177: sub-make] Error 2
> > 0 0 1 /1 evb-ast2600
> >
> >
> > Thanks,
> >
> > - Kever
> >
> > On 2023/2/18 23:26, Johan Jonker wrote:
> >> The DT specification supports CPUs with both 32-bit and 64-bit addressing
> >> capabilities. In U-boot the fdt_addr_t and phys_addr_t size are coupled
> >> by a typedef. The MTD NAND drivers for 32-bit CPU's can describe partitions
> >> with a 64-bit reg property. These partitions synced from Linux end up with
> >> the wrong offset and sizes when only the lower 32-bit is passed.
> >> Decouple the fdt_addr_t and phys_addr_t size as they don't necessary
> >> match.
> >>
> >> Signed-off-by: Johan Jonker <jbx6244@gmail.com>
> >> Reviewed-by: Simon Glass <sjg@chromium.org>
> >> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
> >> ---
> >>
> >> Changed V2:
> >> reword
> >>
> >> ---
> >>
> >> Note:
> >> Most drivers still assume that FDT and CPU capabilities are identical.
> >> In order to use these variables a cast is needed.
> >> ---
> >> Kconfig | 8 ++++++++
> >> include/fdtdec.h | 13 +++++++++----
> >> 2 files changed, 17 insertions(+), 4 deletions(-)
> >>
> >> diff --git a/Kconfig b/Kconfig
> >> index a75cce7e..7697dade 100644
> >> --- a/Kconfig
> >> +++ b/Kconfig
> >> @@ -422,11 +422,19 @@ endif # EXPERT
> >>
> >> config PHYS_64BIT
> >> bool "64bit physical address support"
> >> + select FDT_64BIT
> >> help
> >> Say Y here to support 64bit physical memory address.
> >> This can be used not only for 64bit SoCs, but also for
> >> large physical address extension on 32bit SoCs.
> >>
> >> +config FDT_64BIT
> >> + bool "64bit fdt address support"
> >> + help
> >> + Say Y here to support 64bit fdt addresses.
> >> + This can be used not only for 64bit SoCs, but also
> >> + for large address extensions on 32bit SoCs.
> >> +
> >> config HAS_ROM
> >> bool
> >> select BINMAN
> >> diff --git a/include/fdtdec.h b/include/fdtdec.h
> >> index 12355afd..af29ac0c 100644
> >> --- a/include/fdtdec.h
> >> +++ b/include/fdtdec.h
> >> @@ -18,15 +18,18 @@
> >> #include <pci.h>
> >>
> >> /*
> >> - * A typedef for a physical address. Note that fdt data is always big
> >> + * Support for 64bit fdt addresses.
> >> + * This can be used not only for 64bit SoCs, but also
> >> + * for large address extensions on 32bit SoCs.
> >> + * Note that fdt data is always big
> >> * endian even on a litle endian machine.
> >> */
> >> -typedef phys_addr_t fdt_addr_t;
> >> -typedef phys_size_t fdt_size_t;
> >>
> >> #define FDT_SIZE_T_NONE (-1U)
> >>
> >> -#ifdef CONFIG_PHYS_64BIT
> >> +#ifdef CONFIG_FDT_64BIT
> >> +typedef u64 fdt_addr_t;
> >> +typedef u64 fdt_size_t;
> >> #define FDT_ADDR_T_NONE ((ulong)(-1))
> >>
> >> #define fdt_addr_to_cpu(reg) be64_to_cpu(reg)
> >> @@ -35,6 +38,8 @@ typedef phys_size_t fdt_size_t;
> >> #define cpu_to_fdt_size(reg) cpu_to_be64(reg)
> >> typedef fdt64_t fdt_val_t;
> >> #else
> >> +typedef u32 fdt_addr_t;
> >> +typedef u32 fdt_size_t;
> >> #define FDT_ADDR_T_NONE (-1U)
> >>
> >> #define fdt_addr_to_cpu(reg) be32_to_cpu(reg)
> >> --
> >> 2.20.1
> >>
--
Michael Nazzareno Trimarchi
Co-Founder & Chief Executive Officer
M. +39 347 913 2170
michael@amarulasolutions.com
__________________________________
Amarula Solutions BV
Joop Geesinkweg 125, 1114 AB, Amsterdam, NL
T. +31 (0)85 111 9172
info@amarulasolutions.com
www.amarulasolutions.com
^ permalink raw reply [flat|nested] 38+ messages in thread
* Re: [PATCH v4 01/11] include: fdtdec: decouple fdt_addr_t and phys_addr_t size
2023-02-25 9:15 ` Michael Nazzareno Trimarchi
@ 2023-02-25 9:20 ` Johan Jonker
0 siblings, 0 replies; 38+ messages in thread
From: Johan Jonker @ 2023-02-25 9:20 UTC (permalink / raw)
To: Michael Nazzareno Trimarchi
Cc: Kever Yang, dario.binacchi, sjg, u-boot, yifeng.zhao
On 2/25/23 10:15, Michael Nazzareno Trimarchi wrote:
> Hi Johan
>
> On Sat, Feb 25, 2023 at 10:11 AM Johan Jonker <jbx6244@gmail.com> wrote:
>>
>>
>>
>> On 2/23/23 01:47, Kever Yang wrote:
>>> Hi Johan,
>>>
>>> This update will cause below error on evb-ast2500/2600:
>>
>> Hi Kever, Simon,
>>
>> For "spi-aspeed-smc.c" I have submitted a patch proposal.
>> The changes in patch 1 possible involves a lot more boards that might need a change to which the external MAINTAINERS may or may not respond to.
>> As that becomes a lengthy time consuming process. Is it maybe possible to skip patch 1 for now and get at least the more essential patches 2-11 merged?
>> Please advise what's the best option here to get forward.
>>
>> Johan
>
> Please point to the patch you mentioned.
[PATCH v1] spi: spi-aspeed-smc: convert devfdt_get_addr_index output to phys_addr_t
https://lore.kernel.org/u-boot/f3dba231-4a55-0a94-dfab-5cab1419d132@gmail.com/T/#m167646537956e20dc9ae60957f6d54f8a00866d7
>
> Kever if you are going to pick the nand patches part let me know
>
> Michael
>
>>
>>
>>>
>>> $ tools/buildman/buildman -o ${UBOOT_TRAVIS_BUILD_DIR} -w -E -W -e --board ${TEST_PY_BD} ${OVERRIDE}
>>> Building current source for 1 boards (1 thread, 24 jobs per thread)
>>> arm: + evb-ast2600
>>> +drivers/spi/spi-aspeed-smc.c: In function 'apseed_spi_of_to_plat':
>>> +drivers/spi/spi-aspeed-smc.c:1154:22: error: format '%lx' expects argument of type 'long unsigned int', but argument 4 has type 'fdt_size_t' {aka 'unsigned int'} [-Werror=format=]
>>> + 1154 | dev_dbg(bus, "ctrl_base = 0x%x, ahb_base = 0x%p, size = 0x%lx\n",
>>> + | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
>>> + 1155 | (u32)priv->regs, plat->ahb_base, plat->ahb_sz);
>>> + | ~~~~~~~~~~~~
>>> + | |
>>> + | fdt_size_t {aka unsigned int}
>>> +include/dm/device_compat.h:50:24: note: in definition of macro 'dev_printk_emit'
>>> + 50 | printf(fmt, ##__VA_ARGS__); \
>>> + | ^~~
>>> +include/dm/device_compat.h:117:9: note: in expansion of macro '__dev_printk'
>>> + 117 | __dev_printk(LOGL_DEBUG, dev, fmt, ##__VA_ARGS__)
>>> + | ^~~~~~~~~~~~
>>> +drivers/spi/spi-aspeed-smc.c:1154:9: note: in expansion of macro 'dev_dbg'
>>> + | ^~~~~~~
>>> +drivers/spi/spi-aspeed-smc.c:1154:69: note: format string is defined here
>>> + | ~~^
>>> + | |
>>> + | long unsigned int
>>> + | %x
>>> +In file included from include/linux/printk.h:4,
>>> + from include/linux/kernel.h:5,
>>> + from arch/arm/include/asm/io.h:14,
>>> + from drivers/spi/spi-aspeed-smc.c:13:
>>> +include/log.h:222:24: note: in definition of macro 'log'
>>> + 222 | printf(_fmt, ##_args); \
>>> + | ^~~~
>>> +include/dm/device_compat.h:85:17: note: in expansion of macro 'dev_printk_emit'
>>> + 85 | dev_printk_emit(LOG_CATEGORY, level, fmt, ##__VA_ARGS__); \
>>> + | ^~~~~~~~~~~~~~~
>>> +include/dm/device_compat.h:54:24: note: in definition of macro 'dev_printk_emit'
>>> + 54 | printf(fmt, ##__VA_ARGS__); \
>>> +include/dm/device_compat.h:91:41: error: format '%lx' expects argument of type 'long unsigned int', but argument 6 has type 'fdt_size_t' {aka 'unsigned int'} [-Werror=format=]
>>> + 91 | "%s %s: " fmt, \
>>> + | ^~~~~~~~~
>>> +include/dm/device_compat.h:90:25: note: in expansion of macro 'dev_printk_emit'
>>> + 90 | dev_printk_emit(__dev->driver->id, level, \
>>> + | ^~~~~~~~~~~~~~~
>>> +include/dm/device_compat.h:96:41: error: format '%lx' expects argument of type 'long unsigned int', but argument 6 has type 'fdt_size_t' {aka 'unsigned int'} [-Werror=format=]
>>> + 96 | "%s %s: " fmt, \
>>> +include/dm/device_compat.h:95:25: note: in expansion of macro 'dev_printk_emit'
>>> + 95 | dev_printk_emit(LOG_CATEGORY, level, \
>>> +cc1: all warnings being treated as errors
>>> +make[3]: *** [scripts/Makefile.build:256: drivers/spi/spi-aspeed-smc.o] Error 1
>>> +make[2]: *** [scripts/Makefile.build:397: drivers/spi] Error 2
>>> +make[1]: *** [Makefile:1846: drivers] Error 2
>>> +make: *** [Makefile:177: sub-make] Error 2
>>> 0 0 1 /1 evb-ast2600
>>>
>>>
>>> Thanks,
>>>
>>> - Kever
>>>
>>> On 2023/2/18 23:26, Johan Jonker wrote:
>>>> The DT specification supports CPUs with both 32-bit and 64-bit addressing
>>>> capabilities. In U-boot the fdt_addr_t and phys_addr_t size are coupled
>>>> by a typedef. The MTD NAND drivers for 32-bit CPU's can describe partitions
>>>> with a 64-bit reg property. These partitions synced from Linux end up with
>>>> the wrong offset and sizes when only the lower 32-bit is passed.
>>>> Decouple the fdt_addr_t and phys_addr_t size as they don't necessary
>>>> match.
>>>>
>>>> Signed-off-by: Johan Jonker <jbx6244@gmail.com>
>>>> Reviewed-by: Simon Glass <sjg@chromium.org>
>>>> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
>>>> ---
>>>>
>>>> Changed V2:
>>>> reword
>>>>
>>>> ---
>>>>
>>>> Note:
>>>> Most drivers still assume that FDT and CPU capabilities are identical.
>>>> In order to use these variables a cast is needed.
>>>> ---
>>>> Kconfig | 8 ++++++++
>>>> include/fdtdec.h | 13 +++++++++----
>>>> 2 files changed, 17 insertions(+), 4 deletions(-)
>>>>
>>>> diff --git a/Kconfig b/Kconfig
>>>> index a75cce7e..7697dade 100644
>>>> --- a/Kconfig
>>>> +++ b/Kconfig
>>>> @@ -422,11 +422,19 @@ endif # EXPERT
>>>>
>>>> config PHYS_64BIT
>>>> bool "64bit physical address support"
>>>> + select FDT_64BIT
>>>> help
>>>> Say Y here to support 64bit physical memory address.
>>>> This can be used not only for 64bit SoCs, but also for
>>>> large physical address extension on 32bit SoCs.
>>>>
>>>> +config FDT_64BIT
>>>> + bool "64bit fdt address support"
>>>> + help
>>>> + Say Y here to support 64bit fdt addresses.
>>>> + This can be used not only for 64bit SoCs, but also
>>>> + for large address extensions on 32bit SoCs.
>>>> +
>>>> config HAS_ROM
>>>> bool
>>>> select BINMAN
>>>> diff --git a/include/fdtdec.h b/include/fdtdec.h
>>>> index 12355afd..af29ac0c 100644
>>>> --- a/include/fdtdec.h
>>>> +++ b/include/fdtdec.h
>>>> @@ -18,15 +18,18 @@
>>>> #include <pci.h>
>>>>
>>>> /*
>>>> - * A typedef for a physical address. Note that fdt data is always big
>>>> + * Support for 64bit fdt addresses.
>>>> + * This can be used not only for 64bit SoCs, but also
>>>> + * for large address extensions on 32bit SoCs.
>>>> + * Note that fdt data is always big
>>>> * endian even on a litle endian machine.
>>>> */
>>>> -typedef phys_addr_t fdt_addr_t;
>>>> -typedef phys_size_t fdt_size_t;
>>>>
>>>> #define FDT_SIZE_T_NONE (-1U)
>>>>
>>>> -#ifdef CONFIG_PHYS_64BIT
>>>> +#ifdef CONFIG_FDT_64BIT
>>>> +typedef u64 fdt_addr_t;
>>>> +typedef u64 fdt_size_t;
>>>> #define FDT_ADDR_T_NONE ((ulong)(-1))
>>>>
>>>> #define fdt_addr_to_cpu(reg) be64_to_cpu(reg)
>>>> @@ -35,6 +38,8 @@ typedef phys_size_t fdt_size_t;
>>>> #define cpu_to_fdt_size(reg) cpu_to_be64(reg)
>>>> typedef fdt64_t fdt_val_t;
>>>> #else
>>>> +typedef u32 fdt_addr_t;
>>>> +typedef u32 fdt_size_t;
>>>> #define FDT_ADDR_T_NONE (-1U)
>>>>
>>>> #define fdt_addr_to_cpu(reg) be32_to_cpu(reg)
>>>> --
>>>> 2.20.1
>>>>
>
>
>
^ permalink raw reply [flat|nested] 38+ messages in thread
* Re: [PATCH v1] spi: spi-aspeed-smc: convert devfdt_get_addr_index output to phys_addr_t
2023-02-23 14:06 ` [PATCH v1] spi: spi-aspeed-smc: convert devfdt_get_addr_index output to phys_addr_t Johan Jonker
@ 2023-02-25 9:26 ` Michael Nazzareno Trimarchi
2023-02-25 9:50 ` Johan Jonker
0 siblings, 1 reply; 38+ messages in thread
From: Michael Nazzareno Trimarchi @ 2023-02-25 9:26 UTC (permalink / raw)
To: Johan Jonker
Cc: chin-ting_kuo, clg, sjg, kever.yang, BMC-SW, jagan, ryan_chen,
chiawei_wang, joel, dario.binacchi, philipp.tomsich, u-boot,
yifeng.zhao
Hi Johan
On Thu, Feb 23, 2023 at 3:06 PM Johan Jonker <jbx6244@gmail.com> wrote:
>
> The fdt_addr_t and phys_addr_t size have been decoupled.
> A 32bit CPU can expect 64-bit data from the device tree parser,
> so convert devfdt_get_addr_index output to phys_addr_t in the
> spi-aspeed-smc.c file. Also fix dev_dbg to be able to handle
> both sizes.
>
> Signed-off-by: Johan Jonker <jbx6244@gmail.com>
> ---
>
> Note:
>
> This is needed for a Rockchip patch serie to pass the test and
> must be merged before by Rockchip maintainers:
>
> [PATCH v4 00/11] Fixes for Rockchip NFC driver part 1
> https://lore.kernel.org/u-boot/f3dba231-4a55-0a94-dfab-5cab1419d132@gmail.com/
>
> Request for hardware test by Aspeed people.
> ---
> drivers/spi/spi-aspeed-smc.c | 8 ++++----
> 1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/spi/spi-aspeed-smc.c b/drivers/spi/spi-aspeed-smc.c
> index a3c96333..17696441 100644
> --- a/drivers/spi/spi-aspeed-smc.c
> +++ b/drivers/spi/spi-aspeed-smc.c
> @@ -1125,14 +1125,14 @@ static int apseed_spi_of_to_plat(struct udevice *bus)
> int ret;
> struct clk hclk;
>
> - priv->regs = (void __iomem *)devfdt_get_addr_index(bus, 0);
> + priv->regs = (void __iomem *)((phys_addr_t)devfdt_get_addr_index(bus, 0));
devfdt_get_addr_index_ptr is not the right way?
> if ((u32)priv->regs == FDT_ADDR_T_NONE) {
> dev_err(bus, "wrong ctrl base\n");
> return -ENODEV;
> }
>
> plat->ahb_base =
> - (void __iomem *)devfdt_get_addr_size_index(bus, 1, &plat->ahb_sz);
> + (void __iomem *)((phys_addr_t)devfdt_get_addr_size_index(bus, 1, &plat->ahb_sz));
devfdt_get_addr_index_ptr, same here
> if ((u32)plat->ahb_base == FDT_ADDR_T_NONE) {
> dev_err(bus, "wrong AHB base\n");
> return -ENODEV;
> @@ -1151,8 +1151,8 @@ static int apseed_spi_of_to_plat(struct udevice *bus)
> plat->hclk_rate = clk_get_rate(&hclk);
> clk_free(&hclk);
>
> - dev_dbg(bus, "ctrl_base = 0x%x, ahb_base = 0x%p, size = 0x%lx\n",
> - (u32)priv->regs, plat->ahb_base, plat->ahb_sz);
> + dev_dbg(bus, "ctrl_base = 0x%x, ahb_base = 0x%p, size = 0x%llx\n",
> + (u32)priv->regs, plat->ahb_base, (fdt64_t)plat->ahb_sz);
> dev_dbg(bus, "hclk = %dMHz, max_cs = %d\n",
> plat->hclk_rate / 1000000, plat->max_cs);
>
> --
Michael
> 2.20.1
>
--
Michael Nazzareno Trimarchi
Co-Founder & Chief Executive Officer
M. +39 347 913 2170
michael@amarulasolutions.com
__________________________________
Amarula Solutions BV
Joop Geesinkweg 125, 1114 AB, Amsterdam, NL
T. +31 (0)85 111 9172
info@amarulasolutions.com
www.amarulasolutions.com
^ permalink raw reply [flat|nested] 38+ messages in thread
* Re: [PATCH v1] spi: spi-aspeed-smc: convert devfdt_get_addr_index output to phys_addr_t
2023-02-25 9:26 ` Michael Nazzareno Trimarchi
@ 2023-02-25 9:50 ` Johan Jonker
2023-02-25 9:53 ` Michael Nazzareno Trimarchi
0 siblings, 1 reply; 38+ messages in thread
From: Johan Jonker @ 2023-02-25 9:50 UTC (permalink / raw)
To: Michael Nazzareno Trimarchi
Cc: chin-ting_kuo, clg, sjg, kever.yang, BMC-SW, jagan, ryan_chen,
chiawei_wang, joel, dario.binacchi, philipp.tomsich, u-boot,
yifeng.zhao
On 2/25/23 10:26, Michael Nazzareno Trimarchi wrote:
> Hi Johan
>
> On Thu, Feb 23, 2023 at 3:06 PM Johan Jonker <jbx6244@gmail.com> wrote:
>>
>> The fdt_addr_t and phys_addr_t size have been decoupled.
>> A 32bit CPU can expect 64-bit data from the device tree parser,
>> so convert devfdt_get_addr_index output to phys_addr_t in the
>> spi-aspeed-smc.c file. Also fix dev_dbg to be able to handle
>> both sizes.
>>
>> Signed-off-by: Johan Jonker <jbx6244@gmail.com>
>> ---
>>
>> Note:
>>
>> This is needed for a Rockchip patch serie to pass the test and
>> must be merged before by Rockchip maintainers:
>>
>> [PATCH v4 00/11] Fixes for Rockchip NFC driver part 1
>> https://lore.kernel.org/u-boot/f3dba231-4a55-0a94-dfab-5cab1419d132@gmail.com/
>>
>> Request for hardware test by Aspeed people.
>> ---
>> drivers/spi/spi-aspeed-smc.c | 8 ++++----
>> 1 file changed, 4 insertions(+), 4 deletions(-)
>>
>> diff --git a/drivers/spi/spi-aspeed-smc.c b/drivers/spi/spi-aspeed-smc.c
>> index a3c96333..17696441 100644
>> --- a/drivers/spi/spi-aspeed-smc.c
>> +++ b/drivers/spi/spi-aspeed-smc.c
>> @@ -1125,14 +1125,14 @@ static int apseed_spi_of_to_plat(struct udevice *bus)
>> int ret;
>> struct clk hclk;
>>
>> - priv->regs = (void __iomem *)devfdt_get_addr_index(bus, 0);
>> + priv->regs = (void __iomem *)((phys_addr_t)devfdt_get_addr_index(bus, 0));
>
> devfdt_get_addr_index_ptr is not the right way?
That may work.
>
>> if ((u32)priv->regs == FDT_ADDR_T_NONE) {
>> dev_err(bus, "wrong ctrl base\n");
>> return -ENODEV;
>> }
>>
>> plat->ahb_base =
>> - (void __iomem *)devfdt_get_addr_size_index(bus, 1, &plat->ahb_sz);
>> + (void __iomem *)((phys_addr_t)devfdt_get_addr_size_index(bus, 1, &plat->ahb_sz));
>
> devfdt_get_addr_index_ptr, same here
fdt_addr_t devfdt_get_addr_size_index(const struct udevice *dev, int index,
fdt_size_t *size)
vs
void *devfdt_get_addr_index_ptr(const struct udevice *dev, int index)
===
devfdt_get_addr_index_ptr does not offer the ahb_sz size.
https://elixir.bootlin.com/u-boot/latest/source/drivers/core/fdtaddr.c#L112
This function is used for that in devfdt_get_addr_size_index:
fdtdec_get_addr_size_auto_noparent(gd->fdt_blob, dev_of_offset(dev),
"reg", index, size, false);
What would you suggest? Keep the cast or use fdtdec_get_addr_size_auto_noparent ?
I'm a little bit "reluctant" to poke in code that I don't have hardware for.
Johan
>
>> if ((u32)plat->ahb_base == FDT_ADDR_T_NONE) {
>> dev_err(bus, "wrong AHB base\n");
>> return -ENODEV;
>> @@ -1151,8 +1151,8 @@ static int apseed_spi_of_to_plat(struct udevice *bus)
>> plat->hclk_rate = clk_get_rate(&hclk);
>> clk_free(&hclk);
>>
>> - dev_dbg(bus, "ctrl_base = 0x%x, ahb_base = 0x%p, size = 0x%lx\n",
>> - (u32)priv->regs, plat->ahb_base, plat->ahb_sz);
>> + dev_dbg(bus, "ctrl_base = 0x%x, ahb_base = 0x%p, size = 0x%llx\n",
>> + (u32)priv->regs, plat->ahb_base, (fdt64_t)plat->ahb_sz);
>> dev_dbg(bus, "hclk = %dMHz, max_cs = %d\n",
>> plat->hclk_rate / 1000000, plat->max_cs);
>>
>> --
>
> Michael
>
>> 2.20.1
>>
>
>
^ permalink raw reply [flat|nested] 38+ messages in thread
* Re: [PATCH v1] spi: spi-aspeed-smc: convert devfdt_get_addr_index output to phys_addr_t
2023-02-25 9:50 ` Johan Jonker
@ 2023-02-25 9:53 ` Michael Nazzareno Trimarchi
2023-02-25 11:40 ` Michael Nazzareno Trimarchi
0 siblings, 1 reply; 38+ messages in thread
From: Michael Nazzareno Trimarchi @ 2023-02-25 9:53 UTC (permalink / raw)
To: Johan Jonker
Cc: chin-ting_kuo, clg, sjg, kever.yang, BMC-SW, jagan, ryan_chen,
chiawei_wang, joel, dario.binacchi, philipp.tomsich, u-boot,
yifeng.zhao
Hi Johan
On Sat, Feb 25, 2023 at 10:50 AM Johan Jonker <jbx6244@gmail.com> wrote:
>
>
>
> On 2/25/23 10:26, Michael Nazzareno Trimarchi wrote:
> > Hi Johan
> >
> > On Thu, Feb 23, 2023 at 3:06 PM Johan Jonker <jbx6244@gmail.com> wrote:
> >>
> >> The fdt_addr_t and phys_addr_t size have been decoupled.
> >> A 32bit CPU can expect 64-bit data from the device tree parser,
> >> so convert devfdt_get_addr_index output to phys_addr_t in the
> >> spi-aspeed-smc.c file. Also fix dev_dbg to be able to handle
> >> both sizes.
> >>
> >> Signed-off-by: Johan Jonker <jbx6244@gmail.com>
> >> ---
> >>
> >> Note:
> >>
> >> This is needed for a Rockchip patch serie to pass the test and
> >> must be merged before by Rockchip maintainers:
> >>
> >> [PATCH v4 00/11] Fixes for Rockchip NFC driver part 1
> >> https://lore.kernel.org/u-boot/f3dba231-4a55-0a94-dfab-5cab1419d132@gmail.com/
> >>
> >> Request for hardware test by Aspeed people.
> >> ---
> >> drivers/spi/spi-aspeed-smc.c | 8 ++++----
> >> 1 file changed, 4 insertions(+), 4 deletions(-)
> >>
> >> diff --git a/drivers/spi/spi-aspeed-smc.c b/drivers/spi/spi-aspeed-smc.c
> >> index a3c96333..17696441 100644
> >> --- a/drivers/spi/spi-aspeed-smc.c
> >> +++ b/drivers/spi/spi-aspeed-smc.c
> >> @@ -1125,14 +1125,14 @@ static int apseed_spi_of_to_plat(struct udevice *bus)
> >> int ret;
> >> struct clk hclk;
> >>
> >> - priv->regs = (void __iomem *)devfdt_get_addr_index(bus, 0);
> >> + priv->regs = (void __iomem *)((phys_addr_t)devfdt_get_addr_index(bus, 0));
> >
>
> > devfdt_get_addr_index_ptr is not the right way?
>
> That may work.
>
> >
> >> if ((u32)priv->regs == FDT_ADDR_T_NONE) {
> >> dev_err(bus, "wrong ctrl base\n");
> >> return -ENODEV;
> >> }
> >>
> >> plat->ahb_base =
> >> - (void __iomem *)devfdt_get_addr_size_index(bus, 1, &plat->ahb_sz);
> >> + (void __iomem *)((phys_addr_t)devfdt_get_addr_size_index(bus, 1, &plat->ahb_sz));
> >
>
> > devfdt_get_addr_index_ptr, same here
>
> fdt_addr_t devfdt_get_addr_size_index(const struct udevice *dev, int index,
> fdt_size_t *size)
> vs
>
> void *devfdt_get_addr_index_ptr(const struct udevice *dev, int index)
>
> ===
>
> devfdt_get_addr_index_ptr does not offer the ahb_sz size.
>
> https://elixir.bootlin.com/u-boot/latest/source/drivers/core/fdtaddr.c#L112
>
> This function is used for that in devfdt_get_addr_size_index:
>
> fdtdec_get_addr_size_auto_noparent(gd->fdt_blob, dev_of_offset(dev),
> "reg", index, size, false);
>
> What would you suggest? Keep the cast or use fdtdec_get_addr_size_auto_noparent ?
>
> I'm a little bit "reluctant" to poke in code that I don't have hardware for.
>
Something like this
diff --git a/drivers/core/fdtaddr.c b/drivers/core/fdtaddr.c
index 91bcd1a2c2..d18749c3fd 100644
--- a/drivers/core/fdtaddr.c
+++ b/drivers/core/fdtaddr.c
@@ -122,6 +122,14 @@ fdt_addr_t devfdt_get_addr_size_index(const
struct udevice *dev, int index,
#endif
}
+void *devfdt_get_addr_size_index_ptr(const struct udevice *dev, int index,
+ fdt_size_t *size)
+{
+ fdt_addr_t addr = devfdt_get_addr_size_index(dev, index, size);
+
+ return (addr == FDT_ADDR_T_NONE) ? NULL : (void *)(uintptr_t)addr;
+}
+
Michael
> Johan
>
> >
> >> if ((u32)plat->ahb_base == FDT_ADDR_T_NONE) {
> >> dev_err(bus, "wrong AHB base\n");
> >> return -ENODEV;
> >> @@ -1151,8 +1151,8 @@ static int apseed_spi_of_to_plat(struct udevice *bus)
> >> plat->hclk_rate = clk_get_rate(&hclk);
> >> clk_free(&hclk);
> >>
> >> - dev_dbg(bus, "ctrl_base = 0x%x, ahb_base = 0x%p, size = 0x%lx\n",
> >> - (u32)priv->regs, plat->ahb_base, plat->ahb_sz);
> >> + dev_dbg(bus, "ctrl_base = 0x%x, ahb_base = 0x%p, size = 0x%llx\n",
> >> + (u32)priv->regs, plat->ahb_base, (fdt64_t)plat->ahb_sz);
> >> dev_dbg(bus, "hclk = %dMHz, max_cs = %d\n",
> >> plat->hclk_rate / 1000000, plat->max_cs);
> >>
> >> --
> >
> > Michael
> >
> >> 2.20.1
> >>
> >
> >
--
Michael Nazzareno Trimarchi
Co-Founder & Chief Executive Officer
M. +39 347 913 2170
michael@amarulasolutions.com
__________________________________
Amarula Solutions BV
Joop Geesinkweg 125, 1114 AB, Amsterdam, NL
T. +31 (0)85 111 9172
info@amarulasolutions.com
www.amarulasolutions.com
^ permalink raw reply related [flat|nested] 38+ messages in thread
* Re: [PATCH v1] spi: spi-aspeed-smc: convert devfdt_get_addr_index output to phys_addr_t
2023-02-25 9:53 ` Michael Nazzareno Trimarchi
@ 2023-02-25 11:40 ` Michael Nazzareno Trimarchi
0 siblings, 0 replies; 38+ messages in thread
From: Michael Nazzareno Trimarchi @ 2023-02-25 11:40 UTC (permalink / raw)
To: Johan Jonker
Cc: chin-ting_kuo, clg, sjg, kever.yang, BMC-SW, jagan, ryan_chen,
chiawei_wang, joel, dario.binacchi, philipp.tomsich, u-boot,
yifeng.zhao
Hi Johan
On Sat, Feb 25, 2023 at 10:53 AM Michael Nazzareno Trimarchi
<michael@amarulasolutions.com> wrote:
>
> Hi Johan
>
> On Sat, Feb 25, 2023 at 10:50 AM Johan Jonker <jbx6244@gmail.com> wrote:
> >
> >
> >
> > On 2/25/23 10:26, Michael Nazzareno Trimarchi wrote:
> > > Hi Johan
> > >
> > > On Thu, Feb 23, 2023 at 3:06 PM Johan Jonker <jbx6244@gmail.com> wrote:
> > >>
> > >> The fdt_addr_t and phys_addr_t size have been decoupled.
> > >> A 32bit CPU can expect 64-bit data from the device tree parser,
> > >> so convert devfdt_get_addr_index output to phys_addr_t in the
> > >> spi-aspeed-smc.c file. Also fix dev_dbg to be able to handle
> > >> both sizes.
> > >>
> > >> Signed-off-by: Johan Jonker <jbx6244@gmail.com>
> > >> ---
> > >>
> > >> Note:
> > >>
> > >> This is needed for a Rockchip patch serie to pass the test and
> > >> must be merged before by Rockchip maintainers:
> > >>
> > >> [PATCH v4 00/11] Fixes for Rockchip NFC driver part 1
> > >> https://lore.kernel.org/u-boot/f3dba231-4a55-0a94-dfab-5cab1419d132@gmail.com/
> > >>
> > >> Request for hardware test by Aspeed people.
> > >> ---
> > >> drivers/spi/spi-aspeed-smc.c | 8 ++++----
> > >> 1 file changed, 4 insertions(+), 4 deletions(-)
> > >>
> > >> diff --git a/drivers/spi/spi-aspeed-smc.c b/drivers/spi/spi-aspeed-smc.c
> > >> index a3c96333..17696441 100644
> > >> --- a/drivers/spi/spi-aspeed-smc.c
> > >> +++ b/drivers/spi/spi-aspeed-smc.c
> > >> @@ -1125,14 +1125,14 @@ static int apseed_spi_of_to_plat(struct udevice *bus)
> > >> int ret;
> > >> struct clk hclk;
> > >>
> > >> - priv->regs = (void __iomem *)devfdt_get_addr_index(bus, 0);
> > >> + priv->regs = (void __iomem *)((phys_addr_t)devfdt_get_addr_index(bus, 0));
> > >
> >
> > > devfdt_get_addr_index_ptr is not the right way?
> >
> > That may work.
> >
> > >
> > >> if ((u32)priv->regs == FDT_ADDR_T_NONE) {
> > >> dev_err(bus, "wrong ctrl base\n");
> > >> return -ENODEV;
> > >> }
> > >>
> > >> plat->ahb_base =
> > >> - (void __iomem *)devfdt_get_addr_size_index(bus, 1, &plat->ahb_sz);
> > >> + (void __iomem *)((phys_addr_t)devfdt_get_addr_size_index(bus, 1, &plat->ahb_sz));
> > >
> >
> > > devfdt_get_addr_index_ptr, same here
> >
> > fdt_addr_t devfdt_get_addr_size_index(const struct udevice *dev, int index,
> > fdt_size_t *size)
> > vs
> >
> > void *devfdt_get_addr_index_ptr(const struct udevice *dev, int index)
> >
> > ===
> >
> > devfdt_get_addr_index_ptr does not offer the ahb_sz size.
> >
> > https://elixir.bootlin.com/u-boot/latest/source/drivers/core/fdtaddr.c#L112
> >
> > This function is used for that in devfdt_get_addr_size_index:
> >
> > fdtdec_get_addr_size_auto_noparent(gd->fdt_blob, dev_of_offset(dev),
> > "reg", index, size, false);
> >
> > What would you suggest? Keep the cast or use fdtdec_get_addr_size_auto_noparent ?
> >
> > I'm a little bit "reluctant" to poke in code that I don't have hardware for.
> >
>
> Something like this
>
> diff --git a/drivers/core/fdtaddr.c b/drivers/core/fdtaddr.c
> index 91bcd1a2c2..d18749c3fd 100644
> --- a/drivers/core/fdtaddr.c
> +++ b/drivers/core/fdtaddr.c
> @@ -122,6 +122,14 @@ fdt_addr_t devfdt_get_addr_size_index(const
> struct udevice *dev, int index,
> #endif
> }
>
> +void *devfdt_get_addr_size_index_ptr(const struct udevice *dev, int index,
> + fdt_size_t *size)
> +{
> + fdt_addr_t addr = devfdt_get_addr_size_index(dev, index, size);
> +
> + return (addr == FDT_ADDR_T_NONE) ? NULL : (void *)(uintptr_t)addr;
> +}
> +
>
> Michael
>
Is this ok? if so you can repost with changes
Michael
>
> > Johan
> >
> > >
> > >> if ((u32)plat->ahb_base == FDT_ADDR_T_NONE) {
> > >> dev_err(bus, "wrong AHB base\n");
> > >> return -ENODEV;
> > >> @@ -1151,8 +1151,8 @@ static int apseed_spi_of_to_plat(struct udevice *bus)
> > >> plat->hclk_rate = clk_get_rate(&hclk);
> > >> clk_free(&hclk);
> > >>
> > >> - dev_dbg(bus, "ctrl_base = 0x%x, ahb_base = 0x%p, size = 0x%lx\n",
> > >> - (u32)priv->regs, plat->ahb_base, plat->ahb_sz);
> > >> + dev_dbg(bus, "ctrl_base = 0x%x, ahb_base = 0x%p, size = 0x%llx\n",
> > >> + (u32)priv->regs, plat->ahb_base, (fdt64_t)plat->ahb_sz);
> > >> dev_dbg(bus, "hclk = %dMHz, max_cs = %d\n",
> > >> plat->hclk_rate / 1000000, plat->max_cs);
> > >>
> > >> --
> > >
> > > Michael
> > >
> > >> 2.20.1
> > >>
> > >
> > >
>
>
>
> --
> Michael Nazzareno Trimarchi
> Co-Founder & Chief Executive Officer
> M. +39 347 913 2170
> michael@amarulasolutions.com
> __________________________________
>
> Amarula Solutions BV
> Joop Geesinkweg 125, 1114 AB, Amsterdam, NL
> T. +31 (0)85 111 9172
> info@amarulasolutions.com
> www.amarulasolutions.com
--
Michael Nazzareno Trimarchi
Co-Founder & Chief Executive Officer
M. +39 347 913 2170
michael@amarulasolutions.com
__________________________________
Amarula Solutions BV
Joop Geesinkweg 125, 1114 AB, Amsterdam, NL
T. +31 (0)85 111 9172
info@amarulasolutions.com
www.amarulasolutions.com
^ permalink raw reply [flat|nested] 38+ messages in thread
* [PATCH v2 1/2] core: fdtaddr: add devfdt_get_addr_size_index_ptr function
2023-02-23 0:47 ` Kever Yang
2023-02-23 14:06 ` [PATCH v1] spi: spi-aspeed-smc: convert devfdt_get_addr_index output to phys_addr_t Johan Jonker
2023-02-25 9:11 ` [PATCH v4 01/11] include: fdtdec: decouple fdt_addr_t and phys_addr_t size Johan Jonker
@ 2023-02-25 11:43 ` Johan Jonker
2023-02-25 11:44 ` [PATCH v2 2/2] spi: spi-aspeed-smc: use devfdt_get_addr_index_ptr Johan Jonker
2023-02-25 11:47 ` [PATCH v2 1/2] core: fdtaddr: add devfdt_get_addr_size_index_ptr function Michael Nazzareno Trimarchi
2023-02-25 19:16 ` [RFC PATCH v1 1/4] drivers: use dev_read_addr_index_ptr when cast to pointer Johan Jonker
3 siblings, 2 replies; 38+ messages in thread
From: Johan Jonker @ 2023-02-25 11:43 UTC (permalink / raw)
To: chin-ting_kuo, clg, sjg, kever.yang
Cc: BMC-SW, jagan, ryan_chen, chiawei_wang, joel, dario.binacchi,
michael, philipp.tomsich, u-boot, yifeng.zhao
Add devfdt_get_addr_size_index_ptr function with the same
functionality as devfdt_get_addr_size_index, but instead
a return pointer is given.
Suggested-by: Michael Nazzareno Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
---
drivers/core/fdtaddr.c | 8 ++++++++
include/dm/fdtaddr.h | 15 +++++++++++++++
2 files changed, 23 insertions(+)
diff --git a/drivers/core/fdtaddr.c b/drivers/core/fdtaddr.c
index 91bcd1a2..84bb8d8b 100644
--- a/drivers/core/fdtaddr.c
+++ b/drivers/core/fdtaddr.c
@@ -122,6 +122,14 @@ fdt_addr_t devfdt_get_addr_size_index(const struct udevice *dev, int index,
#endif
}
+void *devfdt_get_addr_size_index_ptr(const struct udevice *dev, int index,
+ fdt_size_t *size)
+{
+ fdt_addr_t addr = devfdt_get_addr_size_index(dev, index, size);
+
+ return (addr == FDT_ADDR_T_NONE) ? NULL : (void *)(uintptr_t)addr;
+}
+
fdt_addr_t devfdt_get_addr_name(const struct udevice *dev, const char *name)
{
#if CONFIG_IS_ENABLED(OF_CONTROL)
diff --git a/include/dm/fdtaddr.h b/include/dm/fdtaddr.h
index c9d2b27b..7fc3ea5c 100644
--- a/include/dm/fdtaddr.h
+++ b/include/dm/fdtaddr.h
@@ -119,6 +119,21 @@ void *devfdt_get_addr_index_ptr(const struct udevice *dev, int index);
fdt_addr_t devfdt_get_addr_size_index(const struct udevice *dev, int index,
fdt_size_t *size);
+/**
+ * devfdt_get_addr_size_index_ptr() - Return indexed pointer to the address of the
+ * reg property of a device
+ *
+ * @dev: Pointer to a device
+ * @index: the 'reg' property can hold a list of <addr, size> pairs
+ * and @index is used to select which one is required
+ * @size: Pointer to size varible - this function returns the size
+ * specified in the 'reg' property here
+ *
+ * Return: Pointer to addr, or NULL if there is no such property
+ */
+void *devfdt_get_addr_size_index_ptr(const struct udevice *dev, int index,
+ fdt_size_t *size);
+
/**
* devfdt_get_addr_name() - Get the reg property of a device, indexed by name
*
--
2.20.1
^ permalink raw reply related [flat|nested] 38+ messages in thread
* [PATCH v2 2/2] spi: spi-aspeed-smc: use devfdt_get_addr_index_ptr
2023-02-25 11:43 ` [PATCH v2 1/2] core: fdtaddr: add devfdt_get_addr_size_index_ptr function Johan Jonker
@ 2023-02-25 11:44 ` Johan Jonker
2023-02-25 11:47 ` Michael Nazzareno Trimarchi
2023-02-25 11:47 ` [PATCH v2 1/2] core: fdtaddr: add devfdt_get_addr_size_index_ptr function Michael Nazzareno Trimarchi
1 sibling, 1 reply; 38+ messages in thread
From: Johan Jonker @ 2023-02-25 11:44 UTC (permalink / raw)
To: chin-ting_kuo, clg, sjg, kever.yang
Cc: BMC-SW, jagan, ryan_chen, chiawei_wang, joel, dario.binacchi,
michael, philipp.tomsich, u-boot, yifeng.zhao
The fdt_addr_t and phys_addr_t size have been decoupled.
A 32bit CPU can expect 64-bit data from the device tree parser,
so use devfdt_get_addr_index_ptr and devfdt_get_addr_size_index_ptr
function in the spi-aspeed-smc.c file. Also fix dev_dbg to be able
to handle both sizes.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
---
Note:
This is needed for a Rockchip patch serie to pass the test and
must be merged before by Rockchip maintainers:
[PATCH v4 00/11] Fixes for Rockchip NFC driver part 1
https://lore.kernel.org/u-boot/f3dba231-4a55-0a94-dfab-5cab1419d132@gmail.com/
Changed V2:
Use devfdt_get_addr_index_ptr and devfdt_get_addr_size_index_ptr
---
drivers/spi/spi-aspeed-smc.c | 13 ++++++-------
1 file changed, 6 insertions(+), 7 deletions(-)
diff --git a/drivers/spi/spi-aspeed-smc.c b/drivers/spi/spi-aspeed-smc.c
index a3c96333..fedcaad6 100644
--- a/drivers/spi/spi-aspeed-smc.c
+++ b/drivers/spi/spi-aspeed-smc.c
@@ -1125,15 +1125,14 @@ static int apseed_spi_of_to_plat(struct udevice *bus)
int ret;
struct clk hclk;
- priv->regs = (void __iomem *)devfdt_get_addr_index(bus, 0);
- if ((u32)priv->regs == FDT_ADDR_T_NONE) {
+ priv->regs = devfdt_get_addr_index_ptr(bus, 0);
+ if (!priv->regs) {
dev_err(bus, "wrong ctrl base\n");
return -ENODEV;
}
- plat->ahb_base =
- (void __iomem *)devfdt_get_addr_size_index(bus, 1, &plat->ahb_sz);
- if ((u32)plat->ahb_base == FDT_ADDR_T_NONE) {
+ plat->ahb_base = devfdt_get_addr_size_index_ptr(bus, 1, &plat->ahb_sz);
+ if (!plat->ahb_base) {
dev_err(bus, "wrong AHB base\n");
return -ENODEV;
}
@@ -1151,8 +1150,8 @@ static int apseed_spi_of_to_plat(struct udevice *bus)
plat->hclk_rate = clk_get_rate(&hclk);
clk_free(&hclk);
- dev_dbg(bus, "ctrl_base = 0x%x, ahb_base = 0x%p, size = 0x%lx\n",
- (u32)priv->regs, plat->ahb_base, plat->ahb_sz);
+ dev_dbg(bus, "ctrl_base = 0x%x, ahb_base = 0x%p, size = 0x%llx\n",
+ (u32)priv->regs, plat->ahb_base, (fdt64_t)plat->ahb_sz);
dev_dbg(bus, "hclk = %dMHz, max_cs = %d\n",
plat->hclk_rate / 1000000, plat->max_cs);
--
2.20.1
^ permalink raw reply related [flat|nested] 38+ messages in thread
* Re: [PATCH v2 2/2] spi: spi-aspeed-smc: use devfdt_get_addr_index_ptr
2023-02-25 11:44 ` [PATCH v2 2/2] spi: spi-aspeed-smc: use devfdt_get_addr_index_ptr Johan Jonker
@ 2023-02-25 11:47 ` Michael Nazzareno Trimarchi
0 siblings, 0 replies; 38+ messages in thread
From: Michael Nazzareno Trimarchi @ 2023-02-25 11:47 UTC (permalink / raw)
To: Johan Jonker
Cc: chin-ting_kuo, clg, sjg, kever.yang, BMC-SW, jagan, ryan_chen,
chiawei_wang, joel, dario.binacchi, philipp.tomsich, u-boot,
yifeng.zhao
Hi
On Sat, Feb 25, 2023 at 12:44 PM Johan Jonker <jbx6244@gmail.com> wrote:
>
> The fdt_addr_t and phys_addr_t size have been decoupled.
> A 32bit CPU can expect 64-bit data from the device tree parser,
> so use devfdt_get_addr_index_ptr and devfdt_get_addr_size_index_ptr
> function in the spi-aspeed-smc.c file. Also fix dev_dbg to be able
> to handle both sizes.
>
> Signed-off-by: Johan Jonker <jbx6244@gmail.com>
> ---
>
> Note:
>
> This is needed for a Rockchip patch serie to pass the test and
> must be merged before by Rockchip maintainers:
>
> [PATCH v4 00/11] Fixes for Rockchip NFC driver part 1
> https://lore.kernel.org/u-boot/f3dba231-4a55-0a94-dfab-5cab1419d132@gmail.com/
>
> Changed V2:
> Use devfdt_get_addr_index_ptr and devfdt_get_addr_size_index_ptr
> ---
> drivers/spi/spi-aspeed-smc.c | 13 ++++++-------
> 1 file changed, 6 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/spi/spi-aspeed-smc.c b/drivers/spi/spi-aspeed-smc.c
> index a3c96333..fedcaad6 100644
> --- a/drivers/spi/spi-aspeed-smc.c
> +++ b/drivers/spi/spi-aspeed-smc.c
> @@ -1125,15 +1125,14 @@ static int apseed_spi_of_to_plat(struct udevice *bus)
> int ret;
> struct clk hclk;
>
> - priv->regs = (void __iomem *)devfdt_get_addr_index(bus, 0);
> - if ((u32)priv->regs == FDT_ADDR_T_NONE) {
> + priv->regs = devfdt_get_addr_index_ptr(bus, 0);
> + if (!priv->regs) {
> dev_err(bus, "wrong ctrl base\n");
> return -ENODEV;
> }
>
> - plat->ahb_base =
> - (void __iomem *)devfdt_get_addr_size_index(bus, 1, &plat->ahb_sz);
> - if ((u32)plat->ahb_base == FDT_ADDR_T_NONE) {
> + plat->ahb_base = devfdt_get_addr_size_index_ptr(bus, 1, &plat->ahb_sz);
> + if (!plat->ahb_base) {
> dev_err(bus, "wrong AHB base\n");
> return -ENODEV;
> }
> @@ -1151,8 +1150,8 @@ static int apseed_spi_of_to_plat(struct udevice *bus)
> plat->hclk_rate = clk_get_rate(&hclk);
> clk_free(&hclk);
>
> - dev_dbg(bus, "ctrl_base = 0x%x, ahb_base = 0x%p, size = 0x%lx\n",
> - (u32)priv->regs, plat->ahb_base, plat->ahb_sz);
> + dev_dbg(bus, "ctrl_base = 0x%x, ahb_base = 0x%p, size = 0x%llx\n",
> + (u32)priv->regs, plat->ahb_base, (fdt64_t)plat->ahb_sz);
> dev_dbg(bus, "hclk = %dMHz, max_cs = %d\n",
> plat->hclk_rate / 1000000, plat->max_cs);
>
> --
> 2.20.1
>
Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com>
--
Michael Nazzareno Trimarchi
Co-Founder & Chief Executive Officer
M. +39 347 913 2170
michael@amarulasolutions.com
__________________________________
Amarula Solutions BV
Joop Geesinkweg 125, 1114 AB, Amsterdam, NL
T. +31 (0)85 111 9172
info@amarulasolutions.com
www.amarulasolutions.com
^ permalink raw reply [flat|nested] 38+ messages in thread
* Re: [PATCH v2 1/2] core: fdtaddr: add devfdt_get_addr_size_index_ptr function
2023-02-25 11:43 ` [PATCH v2 1/2] core: fdtaddr: add devfdt_get_addr_size_index_ptr function Johan Jonker
2023-02-25 11:44 ` [PATCH v2 2/2] spi: spi-aspeed-smc: use devfdt_get_addr_index_ptr Johan Jonker
@ 2023-02-25 11:47 ` Michael Nazzareno Trimarchi
2023-02-25 16:52 ` Michael Nazzareno Trimarchi
1 sibling, 1 reply; 38+ messages in thread
From: Michael Nazzareno Trimarchi @ 2023-02-25 11:47 UTC (permalink / raw)
To: Johan Jonker
Cc: chin-ting_kuo, clg, sjg, kever.yang, BMC-SW, jagan, ryan_chen,
chiawei_wang, joel, dario.binacchi, philipp.tomsich, u-boot,
yifeng.zhao
Hi
On Sat, Feb 25, 2023 at 12:43 PM Johan Jonker <jbx6244@gmail.com> wrote:
>
> Add devfdt_get_addr_size_index_ptr function with the same
> functionality as devfdt_get_addr_size_index, but instead
> a return pointer is given.
>
> Suggested-by: Michael Nazzareno Trimarchi <michael@amarulasolutions.com>
> Signed-off-by: Johan Jonker <jbx6244@gmail.com>
> ---
> drivers/core/fdtaddr.c | 8 ++++++++
> include/dm/fdtaddr.h | 15 +++++++++++++++
> 2 files changed, 23 insertions(+)
>
> diff --git a/drivers/core/fdtaddr.c b/drivers/core/fdtaddr.c
> index 91bcd1a2..84bb8d8b 100644
> --- a/drivers/core/fdtaddr.c
> +++ b/drivers/core/fdtaddr.c
> @@ -122,6 +122,14 @@ fdt_addr_t devfdt_get_addr_size_index(const struct udevice *dev, int index,
> #endif
> }
>
> +void *devfdt_get_addr_size_index_ptr(const struct udevice *dev, int index,
> + fdt_size_t *size)
> +{
> + fdt_addr_t addr = devfdt_get_addr_size_index(dev, index, size);
> +
> + return (addr == FDT_ADDR_T_NONE) ? NULL : (void *)(uintptr_t)addr;
> +}
> +
> fdt_addr_t devfdt_get_addr_name(const struct udevice *dev, const char *name)
> {
> #if CONFIG_IS_ENABLED(OF_CONTROL)
> diff --git a/include/dm/fdtaddr.h b/include/dm/fdtaddr.h
> index c9d2b27b..7fc3ea5c 100644
> --- a/include/dm/fdtaddr.h
> +++ b/include/dm/fdtaddr.h
> @@ -119,6 +119,21 @@ void *devfdt_get_addr_index_ptr(const struct udevice *dev, int index);
> fdt_addr_t devfdt_get_addr_size_index(const struct udevice *dev, int index,
> fdt_size_t *size);
>
> +/**
> + * devfdt_get_addr_size_index_ptr() - Return indexed pointer to the address of the
> + * reg property of a device
> + *
> + * @dev: Pointer to a device
> + * @index: the 'reg' property can hold a list of <addr, size> pairs
> + * and @index is used to select which one is required
> + * @size: Pointer to size varible - this function returns the size
> + * specified in the 'reg' property here
> + *
> + * Return: Pointer to addr, or NULL if there is no such property
> + */
> +void *devfdt_get_addr_size_index_ptr(const struct udevice *dev, int index,
> + fdt_size_t *size);
> +
> /**
> * devfdt_get_addr_name() - Get the reg property of a device, indexed by name
> *
> --
> 2.20.1
>
Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
--
Michael Nazzareno Trimarchi
Co-Founder & Chief Executive Officer
M. +39 347 913 2170
michael@amarulasolutions.com
__________________________________
Amarula Solutions BV
Joop Geesinkweg 125, 1114 AB, Amsterdam, NL
T. +31 (0)85 111 9172
info@amarulasolutions.com
www.amarulasolutions.com
^ permalink raw reply [flat|nested] 38+ messages in thread
* Re: [PATCH v2 1/2] core: fdtaddr: add devfdt_get_addr_size_index_ptr function
2023-02-25 11:47 ` [PATCH v2 1/2] core: fdtaddr: add devfdt_get_addr_size_index_ptr function Michael Nazzareno Trimarchi
@ 2023-02-25 16:52 ` Michael Nazzareno Trimarchi
0 siblings, 0 replies; 38+ messages in thread
From: Michael Nazzareno Trimarchi @ 2023-02-25 16:52 UTC (permalink / raw)
To: Johan Jonker
Cc: chin-ting_kuo, clg, sjg, kever.yang, BMC-SW, jagan, ryan_chen,
chiawei_wang, joel, dario.binacchi, philipp.tomsich, u-boot,
yifeng.zhao
Hi Johan
On Sat, Feb 25, 2023 at 12:47 PM Michael Nazzareno Trimarchi
<michael@amarulasolutions.com> wrote:
>
> Hi
>
> On Sat, Feb 25, 2023 at 12:43 PM Johan Jonker <jbx6244@gmail.com> wrote:
> >
> > Add devfdt_get_addr_size_index_ptr function with the same
> > functionality as devfdt_get_addr_size_index, but instead
> > a return pointer is given.
> >
> > Suggested-by: Michael Nazzareno Trimarchi <michael@amarulasolutions.com>
> > Signed-off-by: Johan Jonker <jbx6244@gmail.com>
> > ---
> > drivers/core/fdtaddr.c | 8 ++++++++
> > include/dm/fdtaddr.h | 15 +++++++++++++++
> > 2 files changed, 23 insertions(+)
> >
> > diff --git a/drivers/core/fdtaddr.c b/drivers/core/fdtaddr.c
> > index 91bcd1a2..84bb8d8b 100644
[snip]
> > +/**
> > + * devfdt_get_addr_size_index_ptr() - Return indexed pointer to the address of the
> > + * reg property of a device
> > + *
> > + * @dev: Pointer to a device
> > + * @index: the 'reg' property can hold a list of <addr, size> pairs
> > + * and @index is used to select which one is required
> > + * @size: Pointer to size varible - this function returns the size
> > + * specified in the 'reg' property here
> > + *
> > + * Return: Pointer to addr, or NULL if there is no such property
> > + */
> > +void *devfdt_get_addr_size_index_ptr(const struct udevice *dev, int index,
> > + fdt_size_t *size);
> > +
> > /**
> > * devfdt_get_addr_name() - Get the reg property of a device, indexed by name
> > *
> > --
> > 2.20.1
> >
git grep "== FDT_ADDR_T_NONE"
I think using both function some of use cases can be rewritten now
MIchael
--
Michael Nazzareno Trimarchi
Co-Founder & Chief Executive Officer
M. +39 347 913 2170
michael@amarulasolutions.com
__________________________________
Amarula Solutions BV
Joop Geesinkweg 125, 1114 AB, Amsterdam, NL
T. +31 (0)85 111 9172
info@amarulasolutions.com
www.amarulasolutions.com
^ permalink raw reply [flat|nested] 38+ messages in thread
* [RFC PATCH v1 1/4] drivers: use dev_read_addr_index_ptr when cast to pointer
2023-02-23 0:47 ` Kever Yang
` (2 preceding siblings ...)
2023-02-25 11:43 ` [PATCH v2 1/2] core: fdtaddr: add devfdt_get_addr_size_index_ptr function Johan Jonker
@ 2023-02-25 19:16 ` Johan Jonker
2023-02-25 19:19 ` [RFC PATCH v1 2/4] drivers: use dev_read_addr_ptr " Johan Jonker
` (3 more replies)
3 siblings, 4 replies; 38+ messages in thread
From: Johan Jonker @ 2023-02-25 19:16 UTC (permalink / raw)
To: dario.binacchi, michael, sjg, philipp.tomsich, kever.yang; +Cc: u-boot
The fdt_addr_t and phys_addr_t size have been decoupled.
A 32bit CPU can expect 64-bit data from the device tree parser,
so use dev_read_addr_index_ptr instead of the dev_read_addr_index
function in the various files in the drivers directory that cast
to a pointer.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
---
Note:
This is needed for a Rockchip patch serie to pass the test and
must be merged before by Rockchip maintainers:
[PATCH v4 00/11] Fixes for Rockchip NFC driver part 1
https://lore.kernel.org/u-boot/f3dba231-4a55-0a94-dfab-5cab1419d132@gmail.com/
Replacement command used:
find . -type f -exec sed -i 's/*)dev_read_addr_index(/
*)dev_read_addr_index_ptr(/g' {} +
---
drivers/mtd/nand/raw/cortina_nand.c | 4 ++--
drivers/net/dm9000x.c | 2 +-
drivers/net/dwmac_meson8b.c | 4 ++--
drivers/pci/pcie_dw_meson.c | 4 ++--
drivers/pci/pcie_dw_rockchip.c | 4 ++--
drivers/watchdog/sbsa_gwdt.c | 12 ++++++------
6 files changed, 15 insertions(+), 15 deletions(-)
diff --git a/drivers/mtd/nand/raw/cortina_nand.c b/drivers/mtd/nand/raw/cortina_nand.c
index 88798f23..b03f3821 100644
--- a/drivers/mtd/nand/raw/cortina_nand.c
+++ b/drivers/mtd/nand/raw/cortina_nand.c
@@ -1175,8 +1175,8 @@ static int fdt_decode_nand(struct udevice *dev, struct nand_drv *info)
int ecc_strength;
info->reg = (struct nand_ctlr *)dev_read_addr(dev);
- info->dma_glb = (struct dma_global *)dev_read_addr_index(dev, 1);
- info->dma_nand = (struct dma_ssp *)dev_read_addr_index(dev, 2);
+ info->dma_glb = (struct dma_global *)dev_read_addr_index_ptr(dev, 1);
+ info->dma_nand = (struct dma_ssp *)dev_read_addr_index_ptr(dev, 2);
info->config.enabled = dev_read_enabled(dev);
ecc_strength = dev_read_u32_default(dev, "nand-ecc-strength", 16);
info->flash_base =
diff --git a/drivers/net/dm9000x.c b/drivers/net/dm9000x.c
index b46bdeb2..5855f16b 100644
--- a/drivers/net/dm9000x.c
+++ b/drivers/net/dm9000x.c
@@ -651,7 +651,7 @@ static int dm9000_of_to_plat(struct udevice *dev)
pdata->iobase = dev_read_addr_index(dev, 0);
db->base_io = (void __iomem *)pdata->iobase;
- db->base_data = (void __iomem *)dev_read_addr_index(dev, 1);
+ db->base_data = (void __iomem *)dev_read_addr_index_ptr(dev, 1);
return 0;
}
diff --git a/drivers/net/dwmac_meson8b.c b/drivers/net/dwmac_meson8b.c
index ddbaa87d..871171e1 100644
--- a/drivers/net/dwmac_meson8b.c
+++ b/drivers/net/dwmac_meson8b.c
@@ -41,8 +41,8 @@ static int dwmac_meson8b_of_to_plat(struct udevice *dev)
{
struct dwmac_meson8b_plat *pdata = dev_get_plat(dev);
- pdata->regs = (void *)dev_read_addr_index(dev, 1);
- if ((fdt_addr_t)pdata->regs == FDT_ADDR_T_NONE)
+ pdata->regs = dev_read_addr_index_ptr(dev, 1);
+ if (!pdata->regs)
return -EINVAL;
pdata->dwmac_setup = (void *)dev_get_driver_data(dev);
diff --git a/drivers/pci/pcie_dw_meson.c b/drivers/pci/pcie_dw_meson.c
index 07da9fa5..59567883 100644
--- a/drivers/pci/pcie_dw_meson.c
+++ b/drivers/pci/pcie_dw_meson.c
@@ -337,13 +337,13 @@ static int meson_pcie_parse_dt(struct udevice *dev)
struct meson_pcie *priv = dev_get_priv(dev);
int ret;
- priv->dw.dbi_base = (void *)dev_read_addr_index(dev, 0);
+ priv->dw.dbi_base = dev_read_addr_index_ptr(dev, 0);
if (!priv->dw.dbi_base)
return -ENODEV;
dev_dbg(dev, "ELBI address is 0x%p\n", priv->dw.dbi_base);
- priv->meson_cfg_base = (void *)dev_read_addr_index(dev, 1);
+ priv->meson_cfg_base = dev_read_addr_index_ptr(dev, 1);
if (!priv->meson_cfg_base)
return -ENODEV;
diff --git a/drivers/pci/pcie_dw_rockchip.c b/drivers/pci/pcie_dw_rockchip.c
index 9322e735..2608106b 100644
--- a/drivers/pci/pcie_dw_rockchip.c
+++ b/drivers/pci/pcie_dw_rockchip.c
@@ -353,13 +353,13 @@ static int rockchip_pcie_parse_dt(struct udevice *dev)
struct rk_pcie *priv = dev_get_priv(dev);
int ret;
- priv->dw.dbi_base = (void *)dev_read_addr_index(dev, 0);
+ priv->dw.dbi_base = dev_read_addr_index_ptr(dev, 0);
if (!priv->dw.dbi_base)
return -ENODEV;
dev_dbg(dev, "DBI address is 0x%p\n", priv->dw.dbi_base);
- priv->apb_base = (void *)dev_read_addr_index(dev, 1);
+ priv->apb_base = dev_read_addr_index_ptr(dev, 1);
if (!priv->apb_base)
return -ENODEV;
diff --git a/drivers/watchdog/sbsa_gwdt.c b/drivers/watchdog/sbsa_gwdt.c
index f43cd3fd..ef402898 100644
--- a/drivers/watchdog/sbsa_gwdt.c
+++ b/drivers/watchdog/sbsa_gwdt.c
@@ -98,13 +98,13 @@ static int sbsa_gwdt_of_to_plat(struct udevice *dev)
{
struct sbsa_gwdt_priv *priv = dev_get_priv(dev);
- priv->reg_control = (void __iomem *)dev_read_addr_index(dev, 0);
- if (IS_ERR(priv->reg_control))
- return PTR_ERR(priv->reg_control);
+ priv->reg_control = (void __iomem *)dev_read_addr_index_ptr(dev, 0);
+ if (!priv->reg_control)
+ return -EINVAL;
- priv->reg_refresh = (void __iomem *)dev_read_addr_index(dev, 1);
- if (IS_ERR(priv->reg_refresh))
- return PTR_ERR(priv->reg_refresh);
+ priv->reg_refresh = (void __iomem *)dev_read_addr_index_ptr(dev, 1);
+ if (!priv->reg_refresh)
+ return -EINVAL;
return 0;
}
--
2.20.1
^ permalink raw reply related [flat|nested] 38+ messages in thread
* [RFC PATCH v1 2/4] drivers: use dev_read_addr_ptr when cast to pointer
2023-02-25 19:16 ` [RFC PATCH v1 1/4] drivers: use dev_read_addr_index_ptr when cast to pointer Johan Jonker
@ 2023-02-25 19:19 ` Johan Jonker
2023-02-25 23:05 ` Johan Jonker
2023-02-25 19:19 ` [RFC PATCH v1 3/4] drivers: use devfdt_get_addr_size_index_ptr " Johan Jonker
` (2 subsequent siblings)
3 siblings, 1 reply; 38+ messages in thread
From: Johan Jonker @ 2023-02-25 19:19 UTC (permalink / raw)
To: dario.binacchi, michael, sjg, philipp.tomsich, kever.yang
Cc: u-boot, yifeng.zhao
The fdt_addr_t and phys_addr_t size have been decoupled.
A 32bit CPU can expect 64-bit data from the device tree parser,
so use dev_read_addr_ptr instead of the dev_read_addr
function in the various files in the drivers directory that cast
to a pointer.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
---
Note:
This is needed for a Rockchip patch serie to pass the test and
must be merged before by Rockchip maintainers:
[PATCH v4 00/11] Fixes for Rockchip NFC driver part 1
https://lore.kernel.org/u-boot/f3dba231-4a55-0a94-dfab-5cab1419d132@gmail.com/
Replacement command used:
find . -type f -exec sed -i 's/*)dev_read_addr(/
*)dev_read_addr_ptr(/g' {} +
---
drivers/ata/dwc_ahsata.c | 2 +-
drivers/cache/cache-l2x0.c | 2 +-
drivers/cache/cache-v5l2.c | 2 +-
drivers/gpio/mscc_sgpio.c | 2 +-
drivers/gpio/tegra_gpio.c | 4 ++--
drivers/gpio/xilinx_gpio.c | 2 +-
drivers/i2c/i2c-cdns.c | 2 +-
drivers/i2c/tegra_i2c.c | 4 ++--
drivers/mmc/am654_sdhci.c | 2 +-
drivers/mmc/davinci_mmc.c | 2 +-
drivers/mmc/piton_mmc.c | 2 +-
drivers/mmc/tegra_mmc.c | 2 +-
drivers/mmc/zynq_sdhci.c | 6 +++---
drivers/mtd/nand/raw/arasan_nfc.c | 2 +-
drivers/mtd/nand/raw/cortina_nand.c | 2 +-
drivers/mtd/nand/raw/mxic_nand.c | 2 +-
drivers/mtd/nand/raw/tegra_nand.c | 2 +-
drivers/mtd/nand/raw/zynq_nand.c | 2 +-
drivers/net/mvmdio.c | 2 +-
drivers/net/qe/dm_qe_uec_phy.c | 2 +-
drivers/pci/pci-aardvark.c | 4 ++--
drivers/phy/allwinner/phy-sun50i-usb3.c | 6 +++---
drivers/phy/qcom/phy-qcom-usb-hs-28nm.c | 4 ++--
drivers/phy/qcom/phy-qcom-usb-ss.c | 4 ++--
drivers/phy/rockchip/phy-rockchip-snps-pcie3.c | 4 ++--
drivers/phy/rockchip/phy-rockchip-typec.c | 6 +++---
drivers/pwm/tegra_pwm.c | 2 +-
drivers/serial/serial_zynq.c | 6 +++---
drivers/spi/mpc8xxx_spi.c | 2 +-
drivers/spi/mscc_bb_spi.c | 2 +-
drivers/spi/sh_qspi.c | 2 +-
drivers/spi/spi-mxic.c | 2 +-
drivers/spi/xilinx_spi.c | 2 +-
drivers/ufs/ufs.c | 2 +-
drivers/usb/host/ehci-tegra.c | 2 +-
drivers/video/dw_mipi_dsi.c | 4 ++--
drivers/video/rockchip/rk_vop.c | 2 +-
drivers/video/stm32/stm32_dsi.c | 4 ++--
drivers/video/stm32/stm32_ltdc.c | 4 ++--
drivers/video/tegra124/display.c | 2 +-
drivers/video/tegra124/sor.c | 6 +++---
drivers/watchdog/cdns_wdt.c | 6 +++---
drivers/watchdog/sp805_wdt.c | 6 +++---
drivers/watchdog/xilinx_tb_wdt.c | 6 +++---
44 files changed, 69 insertions(+), 69 deletions(-)
diff --git a/drivers/ata/dwc_ahsata.c b/drivers/ata/dwc_ahsata.c
index 167b5a39..9ed7348b 100644
--- a/drivers/ata/dwc_ahsata.c
+++ b/drivers/ata/dwc_ahsata.c
@@ -912,7 +912,7 @@ int dwc_ahsata_probe(struct udevice *dev)
#endif
uc_priv->host_flags = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY |
ATA_FLAG_MMIO | ATA_FLAG_PIO_DMA | ATA_FLAG_NO_ATAPI;
- uc_priv->mmio_base = (void __iomem *)dev_read_addr(dev);
+ uc_priv->mmio_base = (void __iomem *)dev_read_addr_ptr(dev);
/* initialize adapter */
ret = ahci_host_init(uc_priv);
diff --git a/drivers/cache/cache-l2x0.c b/drivers/cache/cache-l2x0.c
index a1556fbf..70b31899 100644
--- a/drivers/cache/cache-l2x0.c
+++ b/drivers/cache/cache-l2x0.c
@@ -13,7 +13,7 @@ static void l2c310_of_parse_and_init(struct udevice *dev)
{
u32 tag[3] = { 0, 0, 0 };
u32 saved_reg, prefetch;
- struct pl310_regs *regs = (struct pl310_regs *)dev_read_addr(dev);
+ struct pl310_regs *regs = (struct pl310_regs *)dev_read_addr_ptr(dev);
/* Disable the L2 Cache */
clrbits_le32(®s->pl310_ctrl, L2X0_CTRL_EN);
diff --git a/drivers/cache/cache-v5l2.c b/drivers/cache/cache-v5l2.c
index bbdb76bd..fd7dd51b 100644
--- a/drivers/cache/cache-v5l2.c
+++ b/drivers/cache/cache-v5l2.c
@@ -110,7 +110,7 @@ static int v5l2_of_to_plat(struct udevice *dev)
struct v5l2_plat *plat = dev_get_plat(dev);
struct l2cache *regs;
- regs = (struct l2cache *)dev_read_addr(dev);
+ regs = (struct l2cache *)dev_read_addr_ptr(dev);
plat->regs = regs;
plat->iprefetch = -EINVAL;
diff --git a/drivers/gpio/mscc_sgpio.c b/drivers/gpio/mscc_sgpio.c
index 1cbcc434..980f9f1e 100644
--- a/drivers/gpio/mscc_sgpio.c
+++ b/drivers/gpio/mscc_sgpio.c
@@ -232,7 +232,7 @@ static int mscc_sgpio_probe(struct udevice *dev)
debug("probe: gpios = %d, bit-count = %d\n",
uc_priv->gpio_count, priv->bitcount);
- priv->regs = (u32 __iomem *)dev_read_addr(dev);
+ priv->regs = (u32 __iomem *)dev_read_addr_ptr(dev);
uc_priv->bank_name = "sgpio";
sgpio_clrsetbits(priv, REG_SIO_CONFIG, 0,
diff --git a/drivers/gpio/tegra_gpio.c b/drivers/gpio/tegra_gpio.c
index 4291e496..f7a41b39 100644
--- a/drivers/gpio/tegra_gpio.c
+++ b/drivers/gpio/tegra_gpio.c
@@ -339,8 +339,8 @@ static int gpio_tegra_bind(struct udevice *parent)
if (len < 0)
return len;
bank_count = len / 3 / sizeof(u32);
- ctlr = (struct gpio_ctlr *)dev_read_addr(parent);
- if ((ulong)ctlr == FDT_ADDR_T_NONE)
+ ctlr = (struct gpio_ctlr *)dev_read_addr_ptr(parent);
+ if (!ctlr)
return -EINVAL;
}
#endif
diff --git a/drivers/gpio/xilinx_gpio.c b/drivers/gpio/xilinx_gpio.c
index 510838d2..55ae0536 100644
--- a/drivers/gpio/xilinx_gpio.c
+++ b/drivers/gpio/xilinx_gpio.c
@@ -268,7 +268,7 @@ static int xilinx_gpio_of_to_plat(struct udevice *dev)
struct xilinx_gpio_plat *plat = dev_get_plat(dev);
int is_dual;
- plat->regs = (struct gpio_regs *)dev_read_addr(dev);
+ plat->regs = (struct gpio_regs *)dev_read_addr_ptr(dev);
plat->bank_max[0] = dev_read_u32_default(dev, "xlnx,gpio-width", 0);
plat->bank_input[0] = dev_read_u32_default(dev, "xlnx,all-inputs", 0);
diff --git a/drivers/i2c/i2c-cdns.c b/drivers/i2c/i2c-cdns.c
index 0da9f6f3..f3d05cb4 100644
--- a/drivers/i2c/i2c-cdns.c
+++ b/drivers/i2c/i2c-cdns.c
@@ -477,7 +477,7 @@ static int cdns_i2c_of_to_plat(struct udevice *dev)
struct clk clk;
int ret;
- i2c_bus->regs = (struct cdns_i2c_regs *)dev_read_addr(dev);
+ i2c_bus->regs = (struct cdns_i2c_regs *)dev_read_addr_ptr(dev);
if (!i2c_bus->regs)
return -ENOMEM;
diff --git a/drivers/i2c/tegra_i2c.c b/drivers/i2c/tegra_i2c.c
index 2394e9d0..7e3a2da1 100644
--- a/drivers/i2c/tegra_i2c.c
+++ b/drivers/i2c/tegra_i2c.c
@@ -364,8 +364,8 @@ static int tegra_i2c_probe(struct udevice *dev)
i2c_bus->id = dev_seq(dev);
i2c_bus->type = dev_get_driver_data(dev);
- i2c_bus->regs = (struct i2c_ctlr *)dev_read_addr(dev);
- if ((ulong)i2c_bus->regs == FDT_ADDR_T_NONE) {
+ i2c_bus->regs = (struct i2c_ctlr *)dev_read_addr_ptr(dev);
+ if (!i2c_bus->regs) {
debug("%s: Cannot get regs address\n", __func__);
return -EINVAL;
}
diff --git a/drivers/mmc/am654_sdhci.c b/drivers/mmc/am654_sdhci.c
index 42a61343..fd667aea 100644
--- a/drivers/mmc/am654_sdhci.c
+++ b/drivers/mmc/am654_sdhci.c
@@ -584,7 +584,7 @@ static int am654_sdhci_of_to_plat(struct udevice *dev)
int ret;
host->name = dev->name;
- host->ioaddr = (void *)dev_read_addr(dev);
+ host->ioaddr = dev_read_addr_ptr(dev);
plat->non_removable = dev_read_bool(dev, "non-removable");
if (plat->flags & DLL_PRESENT) {
diff --git a/drivers/mmc/davinci_mmc.c b/drivers/mmc/davinci_mmc.c
index 05ca3612..407289fa 100644
--- a/drivers/mmc/davinci_mmc.c
+++ b/drivers/mmc/davinci_mmc.c
@@ -506,7 +506,7 @@ static int davinci_mmc_of_to_plat(struct udevice *dev)
struct davinci_mmc_plat *plat = dev_get_plat(dev);
struct mmc_config *cfg = &plat->cfg;
- plat->reg_base = (struct davinci_mmc_regs *)dev_read_addr(dev);
+ plat->reg_base = (struct davinci_mmc_regs *)dev_read_addr_ptr(dev);
cfg->f_min = 200000;
cfg->f_max = 25000000;
cfg->voltages = MMC_VDD_32_33 | MMC_VDD_33_34,
diff --git a/drivers/mmc/piton_mmc.c b/drivers/mmc/piton_mmc.c
index 9f5da6d6..a330bbf8 100644
--- a/drivers/mmc/piton_mmc.c
+++ b/drivers/mmc/piton_mmc.c
@@ -74,7 +74,7 @@ static int piton_mmc_ofdata_to_platdata(struct udevice *dev)
struct mmc *mmc;
struct blk_desc *bdesc;
- priv->base_addr = (void *)dev_read_addr(dev);
+ priv->base_addr = dev_read_addr_ptr(dev);
cfg = &plat->cfg;
cfg->name = "PITON MMC";
cfg->host_caps = MMC_MODE_8BIT;
diff --git a/drivers/mmc/tegra_mmc.c b/drivers/mmc/tegra_mmc.c
index 760eca40..f76fee3e 100644
--- a/drivers/mmc/tegra_mmc.c
+++ b/drivers/mmc/tegra_mmc.c
@@ -708,7 +708,7 @@ static int tegra_mmc_probe(struct udevice *dev)
cfg->b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT;
- priv->reg = (void *)dev_read_addr(dev);
+ priv->reg = dev_read_addr_ptr(dev);
ret = reset_get_by_name(dev, "sdhci", &priv->reset_ctl);
if (ret) {
diff --git a/drivers/mmc/zynq_sdhci.c b/drivers/mmc/zynq_sdhci.c
index 7dcf6ad8..dfc8d146 100644
--- a/drivers/mmc/zynq_sdhci.c
+++ b/drivers/mmc/zynq_sdhci.c
@@ -910,9 +910,9 @@ static int arasan_sdhci_of_to_plat(struct udevice *dev)
arasan_dt_parse_clk_phases(dev);
#endif
- priv->host->ioaddr = (void *)dev_read_addr(dev);
- if (IS_ERR(priv->host->ioaddr))
- return PTR_ERR(priv->host->ioaddr);
+ priv->host->ioaddr = dev_read_addr_ptr(dev);
+ if (!priv->host->ioaddr)
+ return -EINVAL;
priv->bank = dev_read_u32_default(dev, "xlnx,mio-bank", 0);
priv->no_1p8 = dev_read_bool(dev, "no-1-8-v");
diff --git a/drivers/mtd/nand/raw/arasan_nfc.c b/drivers/mtd/nand/raw/arasan_nfc.c
index 4621bfb0..03faa961 100644
--- a/drivers/mtd/nand/raw/arasan_nfc.c
+++ b/drivers/mtd/nand/raw/arasan_nfc.c
@@ -1232,7 +1232,7 @@ static int arasan_probe(struct udevice *dev)
struct mtd_info *mtd;
int err = -1;
- info->reg = (struct nand_regs *)dev_read_addr(dev);
+ info->reg = (struct nand_regs *)dev_read_addr_ptr(dev);
mtd = nand_to_mtd(nand_chip);
nand_set_controller_data(nand_chip, &arasan->nand_ctrl);
diff --git a/drivers/mtd/nand/raw/cortina_nand.c b/drivers/mtd/nand/raw/cortina_nand.c
index b03f3821..8095d2e1 100644
--- a/drivers/mtd/nand/raw/cortina_nand.c
+++ b/drivers/mtd/nand/raw/cortina_nand.c
@@ -1174,7 +1174,7 @@ static int fdt_decode_nand(struct udevice *dev, struct nand_drv *info)
{
int ecc_strength;
- info->reg = (struct nand_ctlr *)dev_read_addr(dev);
+ info->reg = (struct nand_ctlr *)dev_read_addr_ptr(dev);
info->dma_glb = (struct dma_global *)dev_read_addr_index_ptr(dev, 1);
info->dma_nand = (struct dma_ssp *)dev_read_addr_index_ptr(dev, 2);
info->config.enabled = dev_read_enabled(dev);
diff --git a/drivers/mtd/nand/raw/mxic_nand.c b/drivers/mtd/nand/raw/mxic_nand.c
index e54df461..6abdc24b 100644
--- a/drivers/mtd/nand/raw/mxic_nand.c
+++ b/drivers/mtd/nand/raw/mxic_nand.c
@@ -538,7 +538,7 @@ static int mxic_nfc_probe(struct udevice *dev)
ofnode child;
int err;
- nfc->regs = (void *)dev_read_addr(dev);
+ nfc->regs = dev_read_addr_ptr(dev);
nfc->send_clk = devm_clk_get(dev, "send");
if (IS_ERR(nfc->send_clk))
diff --git a/drivers/mtd/nand/raw/tegra_nand.c b/drivers/mtd/nand/raw/tegra_nand.c
index d2801d48..316f18bc 100644
--- a/drivers/mtd/nand/raw/tegra_nand.c
+++ b/drivers/mtd/nand/raw/tegra_nand.c
@@ -906,7 +906,7 @@ static int fdt_decode_nand(struct udevice *dev, struct fdt_nand *config)
{
int err;
- config->reg = (struct nand_ctlr *)dev_read_addr(dev);
+ config->reg = (struct nand_ctlr *)dev_read_addr_ptr(dev);
config->enabled = dev_read_enabled(dev);
config->width = dev_read_u32_default(dev, "nvidia,nand-width", 8);
err = gpio_request_by_name(dev, "nvidia,wp-gpios", 0, &config->wp_gpio,
diff --git a/drivers/mtd/nand/raw/zynq_nand.c b/drivers/mtd/nand/raw/zynq_nand.c
index 14cb2ba7..b57785d9 100644
--- a/drivers/mtd/nand/raw/zynq_nand.c
+++ b/drivers/mtd/nand/raw/zynq_nand.c
@@ -1085,7 +1085,7 @@ static int zynq_nand_probe(struct udevice *dev)
int ondie_ecc_enabled = 0;
int is_16bit_bw;
- smc->reg = (struct zynq_nand_smc_regs *)dev_read_addr(dev);
+ smc->reg = (struct zynq_nand_smc_regs *)dev_read_addr_ptr(dev);
of_nand = dev_read_subnode(dev, "nand-controller@0,0");
if (!ofnode_valid(of_nand)) {
of_nand = dev_read_subnode(dev, "flash@e1000000");
diff --git a/drivers/net/mvmdio.c b/drivers/net/mvmdio.c
index 6fb8a985..c0ebcdb1 100644
--- a/drivers/net/mvmdio.c
+++ b/drivers/net/mvmdio.c
@@ -208,7 +208,7 @@ static int mvmdio_probe(struct udevice *dev)
{
struct mvmdio_priv *priv = dev_get_priv(dev);
- priv->mdio_base = (void *)dev_read_addr(dev);
+ priv->mdio_base = dev_read_addr_ptr(dev);
priv->type = (enum mvmdio_bus_type)dev_get_driver_data(dev);
return 0;
diff --git a/drivers/net/qe/dm_qe_uec_phy.c b/drivers/net/qe/dm_qe_uec_phy.c
index 038b8104..e1a8bf16 100644
--- a/drivers/net/qe/dm_qe_uec_phy.c
+++ b/drivers/net/qe/dm_qe_uec_phy.c
@@ -97,7 +97,7 @@ static int qe_uec_mdio_probe(struct udevice *dev)
u32 num = 0;
int ret = -ENODEV;
- priv->base = (struct ucc_mii_mng *)dev_read_addr(dev);
+ priv->base = (struct ucc_mii_mng *)dev_read_addr_ptr(dev);
base = (fdt_size_t)priv->base;
/*
diff --git a/drivers/pci/pci-aardvark.c b/drivers/pci/pci-aardvark.c
index b0fc9caa..af0e55cd 100644
--- a/drivers/pci/pci-aardvark.c
+++ b/drivers/pci/pci-aardvark.c
@@ -983,8 +983,8 @@ static int pcie_advk_of_to_plat(struct udevice *dev)
struct pcie_advk *pcie = dev_get_priv(dev);
/* Get the register base address */
- pcie->base = (void *)dev_read_addr(dev);
- if ((fdt_addr_t)pcie->base == FDT_ADDR_T_NONE)
+ pcie->base = dev_read_addr_ptr(dev);
+ if (!pcie->base)
return -EINVAL;
return 0;
diff --git a/drivers/phy/allwinner/phy-sun50i-usb3.c b/drivers/phy/allwinner/phy-sun50i-usb3.c
index e5a3d2d9..e88df8f9 100644
--- a/drivers/phy/allwinner/phy-sun50i-usb3.c
+++ b/drivers/phy/allwinner/phy-sun50i-usb3.c
@@ -149,9 +149,9 @@ static int sun50i_usb3_phy_probe(struct udevice *dev)
return ret;
}
- priv->regs = (void __iomem *)dev_read_addr(dev);
- if (IS_ERR(priv->regs))
- return PTR_ERR(priv->regs);
+ priv->regs = (void __iomem *)dev_read_addr_ptr(dev);
+ if (!priv->regs)
+ return -EINVAL;
return 0;
}
diff --git a/drivers/phy/qcom/phy-qcom-usb-hs-28nm.c b/drivers/phy/qcom/phy-qcom-usb-hs-28nm.c
index 14c3d839..05a9a2cf 100644
--- a/drivers/phy/qcom/phy-qcom-usb-hs-28nm.c
+++ b/drivers/phy/qcom/phy-qcom-usb-hs-28nm.c
@@ -184,8 +184,8 @@ static int hsphy_probe(struct udevice *dev)
struct hsphy_priv *priv = dev_get_priv(dev);
int ret;
- priv->base = (void *)dev_read_addr(dev);
- if ((ulong)priv->base == FDT_ADDR_T_NONE)
+ priv->base = dev_read_addr_ptr(dev);
+ if (!priv->base)
return -EINVAL;
ret = reset_get_by_name(dev, "phy", &priv->phy_rst);
diff --git a/drivers/phy/qcom/phy-qcom-usb-ss.c b/drivers/phy/qcom/phy-qcom-usb-ss.c
index 4e816879..1b03a3c4 100644
--- a/drivers/phy/qcom/phy-qcom-usb-ss.c
+++ b/drivers/phy/qcom/phy-qcom-usb-ss.c
@@ -115,8 +115,8 @@ static int ssphy_probe(struct udevice *dev)
struct ssphy_priv *priv = dev_get_priv(dev);
int ret;
- priv->base = (void *)dev_read_addr(dev);
- if ((ulong)priv->base == FDT_ADDR_T_NONE)
+ priv->base = dev_read_addr_ptr(dev);
+ if (!priv->base)
return -EINVAL;
ret = ssphy_clk_init(dev, priv);
diff --git a/drivers/phy/rockchip/phy-rockchip-snps-pcie3.c b/drivers/phy/rockchip/phy-rockchip-snps-pcie3.c
index 5ae41fbe..64cf00fd 100644
--- a/drivers/phy/rockchip/phy-rockchip-snps-pcie3.c
+++ b/drivers/phy/rockchip/phy-rockchip-snps-pcie3.c
@@ -93,8 +93,8 @@ static int rockchip_p3phy_probe(struct udevice *dev)
struct udevice *syscon;
int ret;
- priv->mmio = (void __iomem *)dev_read_addr(dev);
- if ((fdt_addr_t)priv->mmio == FDT_ADDR_T_NONE)
+ priv->mmio = (void __iomem *)dev_read_addr_ptr(dev);
+ if (!priv->mmio)
return -EINVAL;
ret = uclass_get_device_by_phandle(UCLASS_SYSCON, dev,
diff --git a/drivers/phy/rockchip/phy-rockchip-typec.c b/drivers/phy/rockchip/phy-rockchip-typec.c
index ca63b856..c4d4d4c7 100644
--- a/drivers/phy/rockchip/phy-rockchip-typec.c
+++ b/drivers/phy/rockchip/phy-rockchip-typec.c
@@ -674,9 +674,9 @@ static int rockchip_tcphy_probe(struct udevice *dev)
unsigned int reg;
int index, ret;
- priv->reg_base = (void __iomem *)dev_read_addr(dev);
- if (IS_ERR(priv->reg_base))
- return PTR_ERR(priv->reg_base);
+ priv->reg_base = (void __iomem *)dev_read_addr_ptr(dev);
+ if (!priv->reg_base)
+ return -EINVAL;
ret = dev_read_u32_index(dev, "reg", 1, ®);
if (ret) {
diff --git a/drivers/pwm/tegra_pwm.c b/drivers/pwm/tegra_pwm.c
index 36c35c60..0d6ac44f 100644
--- a/drivers/pwm/tegra_pwm.c
+++ b/drivers/pwm/tegra_pwm.c
@@ -57,7 +57,7 @@ static int tegra_pwm_of_to_plat(struct udevice *dev)
{
struct tegra_pwm_priv *priv = dev_get_priv(dev);
- priv->regs = (struct pwm_ctlr *)dev_read_addr(dev);
+ priv->regs = (struct pwm_ctlr *)dev_read_addr_ptr(dev);
return 0;
}
diff --git a/drivers/serial/serial_zynq.c b/drivers/serial/serial_zynq.c
index 4b181831..4e43afd1 100644
--- a/drivers/serial/serial_zynq.c
+++ b/drivers/serial/serial_zynq.c
@@ -259,9 +259,9 @@ static int zynq_serial_of_to_plat(struct udevice *dev)
{
struct zynq_uart_plat *plat = dev_get_plat(dev);
- plat->regs = (struct uart_zynq *)dev_read_addr(dev);
- if (IS_ERR(plat->regs))
- return PTR_ERR(plat->regs);
+ plat->regs = (struct uart_zynq *)dev_read_addr_ptr(dev);
+ if (!plat->regs)
+ return -EINVAL;
return 0;
}
diff --git a/drivers/spi/mpc8xxx_spi.c b/drivers/spi/mpc8xxx_spi.c
index 6869d60d..60b850f8 100644
--- a/drivers/spi/mpc8xxx_spi.c
+++ b/drivers/spi/mpc8xxx_spi.c
@@ -54,7 +54,7 @@ static int mpc8xxx_spi_of_to_plat(struct udevice *dev)
struct clk clk;
int ret;
- priv->spi = (spi8xxx_t *)dev_read_addr(dev);
+ priv->spi = (spi8xxx_t *)dev_read_addr_ptr(dev);
ret = gpio_request_list_by_name(dev, "gpios", priv->gpios,
ARRAY_SIZE(priv->gpios), GPIOD_IS_OUT | GPIOD_ACTIVE_LOW);
diff --git a/drivers/spi/mscc_bb_spi.c b/drivers/spi/mscc_bb_spi.c
index 2a01ea06..5819af5e 100644
--- a/drivers/spi/mscc_bb_spi.c
+++ b/drivers/spi/mscc_bb_spi.c
@@ -217,7 +217,7 @@ static int mscc_bb_spi_probe(struct udevice *bus)
debug("%s: loaded, priv %p\n", __func__, priv);
- priv->regs = (void __iomem *)dev_read_addr(bus);
+ priv->regs = (void __iomem *)dev_read_addr_ptr(bus);
priv->deactivate_delay_us =
dev_read_u32_default(bus, "spi-deactivate-delay", 0);
diff --git a/drivers/spi/sh_qspi.c b/drivers/spi/sh_qspi.c
index 5ba8a8ea..eca180aa 100644
--- a/drivers/spi/sh_qspi.c
+++ b/drivers/spi/sh_qspi.c
@@ -332,7 +332,7 @@ static int sh_qspi_of_to_plat(struct udevice *dev)
{
struct sh_qspi_slave *plat = dev_get_plat(dev);
- plat->regs = (struct sh_qspi_regs *)dev_read_addr(dev);
+ plat->regs = (struct sh_qspi_regs *)dev_read_addr_ptr(dev);
return 0;
}
diff --git a/drivers/spi/spi-mxic.c b/drivers/spi/spi-mxic.c
index 6aae9f79..f663b9dc 100644
--- a/drivers/spi/spi-mxic.c
+++ b/drivers/spi/spi-mxic.c
@@ -508,7 +508,7 @@ static int mxic_spi_probe(struct udevice *bus)
{
struct mxic_spi_priv *priv = dev_get_priv(bus);
- priv->regs = (void *)dev_read_addr(bus);
+ priv->regs = dev_read_addr_ptr(bus);
priv->send_clk = devm_clk_get(bus, "send_clk");
if (IS_ERR(priv->send_clk))
diff --git a/drivers/spi/xilinx_spi.c b/drivers/spi/xilinx_spi.c
index 4e9115da..72ee9214 100644
--- a/drivers/spi/xilinx_spi.c
+++ b/drivers/spi/xilinx_spi.c
@@ -114,7 +114,7 @@ static int xilinx_spi_probe(struct udevice *bus)
struct xilinx_spi_priv *priv = dev_get_priv(bus);
struct xilinx_spi_regs *regs = priv->regs;
- priv->regs = (struct xilinx_spi_regs *)dev_read_addr(bus);
+ priv->regs = (struct xilinx_spi_regs *)dev_read_addr_ptr(bus);
priv->fifo_depth = dev_read_u32_default(bus, "fifo-size", 0);
diff --git a/drivers/ufs/ufs.c b/drivers/ufs/ufs.c
index 13e730b8..8dd29edd 100644
--- a/drivers/ufs/ufs.c
+++ b/drivers/ufs/ufs.c
@@ -1880,7 +1880,7 @@ int ufshcd_probe(struct udevice *ufs_dev, struct ufs_hba_ops *hba_ops)
hba->dev = ufs_dev;
hba->ops = hba_ops;
- hba->mmio_base = (void *)dev_read_addr(ufs_dev);
+ hba->mmio_base = dev_read_addr_ptr(ufs_dev);
/* Set descriptor lengths to specification defaults */
ufshcd_def_desc_sizes(hba);
diff --git a/drivers/usb/host/ehci-tegra.c b/drivers/usb/host/ehci-tegra.c
index b02ee89c..7cc564f8 100644
--- a/drivers/usb/host/ehci-tegra.c
+++ b/drivers/usb/host/ehci-tegra.c
@@ -695,7 +695,7 @@ static int fdt_decode_usb(struct udevice *dev, struct fdt_usb *config)
{
const char *phy, *mode;
- config->reg = (struct usb_ctlr *)dev_read_addr(dev);
+ config->reg = (struct usb_ctlr *)dev_read_addr_ptr(dev);
debug("reg=%p\n", config->reg);
mode = dev_read_string(dev, "dr_mode");
if (mode) {
diff --git a/drivers/video/dw_mipi_dsi.c b/drivers/video/dw_mipi_dsi.c
index 6d9c5a94..7c6892cf 100644
--- a/drivers/video/dw_mipi_dsi.c
+++ b/drivers/video/dw_mipi_dsi.c
@@ -800,8 +800,8 @@ static int dw_mipi_dsi_init(struct udevice *dev,
dsi->dsi_host.ops = &dw_mipi_dsi_host_ops;
device->host = &dsi->dsi_host;
- dsi->base = (void *)dev_read_addr(device->dev);
- if ((fdt_addr_t)dsi->base == FDT_ADDR_T_NONE) {
+ dsi->base = dev_read_addr_ptr(device->dev);
+ if ((!dsi->base) {
dev_err(device->dev, "dsi dt register address error\n");
return -EINVAL;
}
diff --git a/drivers/video/rockchip/rk_vop.c b/drivers/video/rockchip/rk_vop.c
index bc98ab68..246eb10c 100644
--- a/drivers/video/rockchip/rk_vop.c
+++ b/drivers/video/rockchip/rk_vop.c
@@ -446,7 +446,7 @@ int rk_vop_probe(struct udevice *dev)
efi_add_memory_map(plat->base, plat->size, EFI_RESERVED_MEMORY_TYPE);
#endif
- priv->regs = (struct rk3288_vop *)dev_read_addr(dev);
+ priv->regs = (struct rk3288_vop *)dev_read_addr_ptr(dev);
/*
* Try all the ports until we find one that works. In practice this
diff --git a/drivers/video/stm32/stm32_dsi.c b/drivers/video/stm32/stm32_dsi.c
index e6347bb8..a7420fb2 100644
--- a/drivers/video/stm32/stm32_dsi.c
+++ b/drivers/video/stm32/stm32_dsi.c
@@ -427,8 +427,8 @@ static int stm32_dsi_probe(struct udevice *dev)
device->dev = dev;
- priv->base = (void *)dev_read_addr(dev);
- if ((fdt_addr_t)priv->base == FDT_ADDR_T_NONE) {
+ priv->base = dev_read_addr_ptr(dev);
+ if (!priv->base) {
dev_err(dev, "dsi dt register address error\n");
return -EINVAL;
}
diff --git a/drivers/video/stm32/stm32_ltdc.c b/drivers/video/stm32/stm32_ltdc.c
index 58b6434a..f48badc5 100644
--- a/drivers/video/stm32/stm32_ltdc.c
+++ b/drivers/video/stm32/stm32_ltdc.c
@@ -507,8 +507,8 @@ static int stm32_ltdc_probe(struct udevice *dev)
ulong rate;
int ret;
- priv->regs = (void *)dev_read_addr(dev);
- if ((fdt_addr_t)priv->regs == FDT_ADDR_T_NONE) {
+ priv->regs = dev_read_addr_ptr(dev);
+ if (!priv->regs) {
dev_err(dev, "ltdc dt register address error\n");
return -EINVAL;
}
diff --git a/drivers/video/tegra124/display.c b/drivers/video/tegra124/display.c
index 78ab3f99..e769b31b 100644
--- a/drivers/video/tegra124/display.c
+++ b/drivers/video/tegra124/display.c
@@ -361,7 +361,7 @@ static int display_init(struct udevice *dev, void *lcdbase,
return ret;
}
- dc_ctlr = (struct dc_ctlr *)dev_read_addr(dev);
+ dc_ctlr = (struct dc_ctlr *)dev_read_addr_ptr(dev);
if (ofnode_decode_display_timing(dev_ofnode(dev), 0, timing)) {
debug("%s: Failed to decode display timing\n", __func__);
return -EINVAL;
diff --git a/drivers/video/tegra124/sor.c b/drivers/video/tegra124/sor.c
index ef1a2e6d..96854b7a 100644
--- a/drivers/video/tegra124/sor.c
+++ b/drivers/video/tegra124/sor.c
@@ -765,7 +765,7 @@ int tegra_dc_sor_attach(struct udevice *dc_dev, struct udevice *dev,
/* Use the first display controller */
debug("%s\n", __func__);
- disp_ctrl = (struct dc_ctlr *)dev_read_addr(dc_dev);
+ disp_ctrl = (struct dc_ctlr *)dev_read_addr_ptr(dc_dev);
tegra_dc_sor_enable_dc(disp_ctrl);
tegra_dc_sor_config_panel(sor, 0, link_cfg, timing);
@@ -978,7 +978,7 @@ int tegra_dc_sor_detach(struct udevice *dc_dev, struct udevice *dev)
debug("%s\n", __func__);
/* Use the first display controller */
- disp_ctrl = (struct dc_ctlr *)dev_read_addr(dev);
+ disp_ctrl = (struct dc_ctlr *)dev_read_addr_ptr(dev);
/* Sleep mode */
tegra_sor_writel(sor, SUPER_STATE1, SUPER_STATE1_ASY_HEAD_OP_SLEEP |
@@ -1047,7 +1047,7 @@ static int tegra_sor_of_to_plat(struct udevice *dev)
struct tegra_dc_sor_data *priv = dev_get_priv(dev);
int ret;
- priv->base = (void *)dev_read_addr(dev);
+ priv->base = dev_read_addr_ptr(dev);
priv->pmc_base = (void *)syscon_get_first_range(TEGRA_SYSCON_PMC);
if (IS_ERR(priv->pmc_base))
diff --git a/drivers/watchdog/cdns_wdt.c b/drivers/watchdog/cdns_wdt.c
index 6dfdd31c..a6537c1a 100644
--- a/drivers/watchdog/cdns_wdt.c
+++ b/drivers/watchdog/cdns_wdt.c
@@ -271,9 +271,9 @@ static int cdns_wdt_of_to_plat(struct udevice *dev)
{
struct cdns_wdt_priv *priv = dev_get_priv(dev);
- priv->regs = (struct cdns_regs *)dev_read_addr(dev);
- if (IS_ERR(priv->regs))
- return PTR_ERR(priv->regs);
+ priv->regs = (struct cdns_regs *)dev_read_addr_ptr(dev);
+ if (!priv->regs)
+ return -EINVAL;
priv->rst = dev_read_bool(dev, "reset-on-timeout");
diff --git a/drivers/watchdog/sp805_wdt.c b/drivers/watchdog/sp805_wdt.c
index 0d6fb120..e4e0797c 100644
--- a/drivers/watchdog/sp805_wdt.c
+++ b/drivers/watchdog/sp805_wdt.c
@@ -116,9 +116,9 @@ static int sp805_wdt_of_to_plat(struct udevice *dev)
struct sp805_wdt_priv *priv = dev_get_priv(dev);
struct clk clk;
- priv->reg = (void __iomem *)dev_read_addr(dev);
- if (IS_ERR(priv->reg))
- return PTR_ERR(priv->reg);
+ priv->reg = (void __iomem *)dev_read_addr_ptr(dev);
+ if (!priv->reg)
+ return -EINVAL;
if (!clk_get_by_index(dev, 0, &clk))
priv->clk_rate = clk_get_rate(&clk);
diff --git a/drivers/watchdog/xilinx_tb_wdt.c b/drivers/watchdog/xilinx_tb_wdt.c
index 1687a459..9dce5a99 100644
--- a/drivers/watchdog/xilinx_tb_wdt.c
+++ b/drivers/watchdog/xilinx_tb_wdt.c
@@ -94,9 +94,9 @@ static int xlnx_wdt_of_to_plat(struct udevice *dev)
{
struct xlnx_wdt_plat *plat = dev_get_plat(dev);
- plat->regs = (struct watchdog_regs *)dev_read_addr(dev);
- if (IS_ERR(plat->regs))
- return PTR_ERR(plat->regs);
+ plat->regs = (struct watchdog_regs *)dev_read_addr_ptr(dev);
+ if (!plat->regs)
+ return -EINVAL;
plat->enable_once = dev_read_u32_default(dev, "xlnx,wdt-enable-once",
0);
--
2.20.1
^ permalink raw reply related [flat|nested] 38+ messages in thread
* [RFC PATCH v1 3/4] drivers: use devfdt_get_addr_size_index_ptr when cast to pointer
2023-02-25 19:16 ` [RFC PATCH v1 1/4] drivers: use dev_read_addr_index_ptr when cast to pointer Johan Jonker
2023-02-25 19:19 ` [RFC PATCH v1 2/4] drivers: use dev_read_addr_ptr " Johan Jonker
@ 2023-02-25 19:19 ` Johan Jonker
2023-02-25 20:39 ` Michael Nazzareno Trimarchi
2023-02-27 15:17 ` Dario Binacchi
2023-02-25 19:19 ` [RFC PATCH v1 4/4] drivers: use devfdt_get_addr_index_ptr " Johan Jonker
2023-02-25 20:37 ` [RFC PATCH v1 1/4] drivers: use dev_read_addr_index_ptr " Michael Nazzareno Trimarchi
3 siblings, 2 replies; 38+ messages in thread
From: Johan Jonker @ 2023-02-25 19:19 UTC (permalink / raw)
To: dario.binacchi, michael, sjg, philipp.tomsich, kever.yang
Cc: u-boot, yifeng.zhao
The fdt_addr_t and phys_addr_t size have been decoupled.
A 32bit CPU can expect 64-bit data from the device tree parser,
so use devfdt_get_addr_size_index_ptr instead of
the devfdt_get_addr_size_index function in the various files
in the drivers directory that cast to a pointer.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
---
Note:
This is needed for a Rockchip patch serie to pass the test and
must be merged before by Rockchip maintainers:
[PATCH v4 00/11] Fixes for Rockchip NFC driver part 1
https://lore.kernel.org/u-boot/f3dba231-4a55-0a94-dfab-5cab1419d132@gmail.com/
Replacement command used:
find . -type f -exec sed -i 's/*)devfdt_get_addr_size_index(/
*)devfdt_get_addr_size_index_ptr(/g' {} +
---
drivers/pci/pcie_dw_mvebu.c | 6 +++---
drivers/spi/cadence_qspi.c | 3 +--
2 files changed, 4 insertions(+), 5 deletions(-)
diff --git a/drivers/pci/pcie_dw_mvebu.c b/drivers/pci/pcie_dw_mvebu.c
index a0b82c78..3b2ada54 100644
--- a/drivers/pci/pcie_dw_mvebu.c
+++ b/drivers/pci/pcie_dw_mvebu.c
@@ -569,9 +569,9 @@ static int pcie_dw_mvebu_of_to_plat(struct udevice *dev)
return -EINVAL;
/* Get the config space base address and size */
- pcie->cfg_base = (void *)devfdt_get_addr_size_index(dev, 1,
- &pcie->cfg_size);
- if ((fdt_addr_t)pcie->cfg_base == FDT_ADDR_T_NONE)
+ pcie->cfg_base = devfdt_get_addr_size_index_ptr(dev, 1,
+ &pcie->cfg_size);
+ if (!pcie->cfg_base)
return -EINVAL;
return 0;
diff --git a/drivers/spi/cadence_qspi.c b/drivers/spi/cadence_qspi.c
index ab0a681c..93e57a54 100644
--- a/drivers/spi/cadence_qspi.c
+++ b/drivers/spi/cadence_qspi.c
@@ -378,8 +378,7 @@ static int cadence_spi_of_to_plat(struct udevice *bus)
ofnode subnode;
plat->regbase = (void *)devfdt_get_addr_index(bus, 0);
- plat->ahbbase = (void *)devfdt_get_addr_size_index(bus, 1,
- &plat->ahbsize);
+ plat->ahbbase = devfdt_get_addr_size_index_ptr(bus, 1, &plat->ahbsize);
plat->is_decoded_cs = dev_read_bool(bus, "cdns,is-decoded-cs");
plat->fifo_depth = dev_read_u32_default(bus, "cdns,fifo-depth", 128);
plat->fifo_width = dev_read_u32_default(bus, "cdns,fifo-width", 4);
--
2.20.1
^ permalink raw reply related [flat|nested] 38+ messages in thread
* [RFC PATCH v1 4/4] drivers: use devfdt_get_addr_index_ptr when cast to pointer
2023-02-25 19:16 ` [RFC PATCH v1 1/4] drivers: use dev_read_addr_index_ptr when cast to pointer Johan Jonker
2023-02-25 19:19 ` [RFC PATCH v1 2/4] drivers: use dev_read_addr_ptr " Johan Jonker
2023-02-25 19:19 ` [RFC PATCH v1 3/4] drivers: use devfdt_get_addr_size_index_ptr " Johan Jonker
@ 2023-02-25 19:19 ` Johan Jonker
2023-02-25 20:40 ` Michael Nazzareno Trimarchi
2023-02-25 20:37 ` [RFC PATCH v1 1/4] drivers: use dev_read_addr_index_ptr " Michael Nazzareno Trimarchi
3 siblings, 1 reply; 38+ messages in thread
From: Johan Jonker @ 2023-02-25 19:19 UTC (permalink / raw)
To: dario.binacchi, michael, sjg, philipp.tomsich, kever.yang
Cc: u-boot, yifeng.zhao
The fdt_addr_t and phys_addr_t size have been decoupled.
A 32bit CPU can expect 64-bit data from the device tree parser,
so use devfdt_get_addr_index_ptr instead of
the devfdt_get_addr_index function in the various files
in the drivers directory that cast to a pointer.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
---
Note:
This is needed for a Rockchip patch serie to pass the test and
must be merged before by Rockchip maintainers:
[PATCH v4 00/11] Fixes for Rockchip NFC driver part 1
https://lore.kernel.org/u-boot/f3dba231-4a55-0a94-dfab-5cab1419d132@gmail.com/
Replacement command used:
find . -type f -exec sed -i 's/*)devfdt_get_addr_index(/
*)devfdt_get_addr_index_ptr(/g' {} +
---
drivers/clk/clk-hsdk-cgu.c | 4 ++--
drivers/ddr/altera/sdram_gen5.c | 2 +-
drivers/mmc/xenon_sdhci.c | 2 +-
drivers/net/mvpp2.c | 24 ++++++++++++------------
drivers/pci/pcie_dw_mvebu.c | 4 ++--
drivers/pci/pcie_imx.c | 4 ++--
drivers/pci/pcie_layerscape_ep.c | 4 ++--
drivers/phy/marvell/comphy_core.c | 12 ++++++------
drivers/spi/cadence_qspi.c | 2 +-
drivers/usb/musb-new/ti-musb.c | 2 +-
10 files changed, 30 insertions(+), 30 deletions(-)
diff --git a/drivers/clk/clk-hsdk-cgu.c b/drivers/clk/clk-hsdk-cgu.c
index 26b0aa9a..cf3d0fd3 100644
--- a/drivers/clk/clk-hsdk-cgu.c
+++ b/drivers/clk/clk-hsdk-cgu.c
@@ -753,11 +753,11 @@ static int hsdk_cgu_clk_probe(struct udevice *dev)
else
hsdk_clk->map = hsdk_4xd_clk_map;
- hsdk_clk->cgu_regs = (void __iomem *)devfdt_get_addr_index(dev, 0);
+ hsdk_clk->cgu_regs = (void __iomem *)devfdt_get_addr_index_ptr(dev, 0);
if (!hsdk_clk->cgu_regs)
return -EINVAL;
- hsdk_clk->creg_regs = (void __iomem *)devfdt_get_addr_index(dev, 1);
+ hsdk_clk->creg_regs = (void __iomem *)devfdt_get_addr_index_ptr(dev, 1);
if (!hsdk_clk->creg_regs)
return -EINVAL;
diff --git a/drivers/ddr/altera/sdram_gen5.c b/drivers/ddr/altera/sdram_gen5.c
index 8d3ce495..2cdfdd42 100644
--- a/drivers/ddr/altera/sdram_gen5.c
+++ b/drivers/ddr/altera/sdram_gen5.c
@@ -567,7 +567,7 @@ static int altera_gen5_sdram_of_to_plat(struct udevice *dev)
{
struct altera_gen5_sdram_plat *plat = dev_get_plat(dev);
- plat->sdr = (struct socfpga_sdr *)devfdt_get_addr_index(dev, 0);
+ plat->sdr = (struct socfpga_sdr *)devfdt_get_addr_index_ptr(dev, 0);
if (!plat->sdr)
return -ENODEV;
diff --git a/drivers/mmc/xenon_sdhci.c b/drivers/mmc/xenon_sdhci.c
index 2f880509..16ac84a2 100644
--- a/drivers/mmc/xenon_sdhci.c
+++ b/drivers/mmc/xenon_sdhci.c
@@ -537,7 +537,7 @@ static int xenon_sdhci_of_to_plat(struct udevice *dev)
host->ioaddr = dev_read_addr_ptr(dev);
if (device_is_compatible(dev, "marvell,armada-3700-sdhci"))
- priv->pad_ctrl_reg = (void *)devfdt_get_addr_index(dev, 1);
+ priv->pad_ctrl_reg = devfdt_get_addr_index_ptr(dev, 1);
name = fdt_getprop(gd->fdt_blob, dev_of_offset(dev), "marvell,pad-type",
NULL);
diff --git a/drivers/net/mvpp2.c b/drivers/net/mvpp2.c
index 8c9afdf7..907d826d 100644
--- a/drivers/net/mvpp2.c
+++ b/drivers/net/mvpp2.c
@@ -5351,18 +5351,18 @@ static int mvpp2_base_probe(struct udevice *dev)
}
/* Save base addresses for later use */
- priv->base = (void *)devfdt_get_addr_index(dev, 0);
- if (IS_ERR(priv->base))
- return PTR_ERR(priv->base);
+ priv->base = devfdt_get_addr_index_ptr(dev, 0);
+ if (!priv->base)
+ return -EINVAL;
if (priv->hw_version == MVPP21) {
- priv->lms_base = (void *)devfdt_get_addr_index(dev, 1);
- if (IS_ERR(priv->lms_base))
- return PTR_ERR(priv->lms_base);
+ priv->lms_base = devfdt_get_addr_index_ptr(dev, 1);
+ if (!priv->lms_base)
+ return -EINVAL;
} else {
- priv->iface_base = (void *)devfdt_get_addr_index(dev, 1);
- if (IS_ERR(priv->iface_base))
- return PTR_ERR(priv->iface_base);
+ priv->iface_base = devfdt_get_addr_index_ptr(dev, 1);
+ if (!priv->iface_base)
+ return -EINVAL;
/* Store common base addresses for all ports */
priv->mpcs_base = priv->iface_base + MVPP22_MPCS;
@@ -5401,10 +5401,10 @@ static int mvpp2_probe(struct udevice *dev)
if (priv->hw_version == MVPP21) {
int priv_common_regs_num = 2;
- port->base = (void __iomem *)devfdt_get_addr_index(
+ port->base = (void __iomem *)devfdt_get_addr_index_ptr(
dev->parent, priv_common_regs_num + port->id);
- if (IS_ERR(port->base))
- return PTR_ERR(port->base);
+ if (!port->base)
+ return -EINVAL;
} else {
port->gop_id = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev),
"gop-port-id", -1);
diff --git a/drivers/pci/pcie_dw_mvebu.c b/drivers/pci/pcie_dw_mvebu.c
index 3b2ada54..c41f3f15 100644
--- a/drivers/pci/pcie_dw_mvebu.c
+++ b/drivers/pci/pcie_dw_mvebu.c
@@ -564,8 +564,8 @@ static int pcie_dw_mvebu_of_to_plat(struct udevice *dev)
struct pcie_dw_mvebu *pcie = dev_get_priv(dev);
/* Get the controller base address */
- pcie->ctrl_base = (void *)devfdt_get_addr_index(dev, 0);
- if ((fdt_addr_t)pcie->ctrl_base == FDT_ADDR_T_NONE)
+ pcie->ctrl_base = devfdt_get_addr_index_ptr(dev, 0);
+ if (!pcie->ctrl_base)
return -EINVAL;
/* Get the config space base address and size */
diff --git a/drivers/pci/pcie_imx.c b/drivers/pci/pcie_imx.c
index da484664..bf1ca5b6 100644
--- a/drivers/pci/pcie_imx.c
+++ b/drivers/pci/pcie_imx.c
@@ -751,8 +751,8 @@ static int imx_pcie_of_to_plat(struct udevice *dev)
{
struct imx_pcie_priv *priv = dev_get_priv(dev);
- priv->dbi_base = (void __iomem *)devfdt_get_addr_index(dev, 0);
- priv->cfg_base = (void __iomem *)devfdt_get_addr_index(dev, 1);
+ priv->dbi_base = (void __iomem *)devfdt_get_addr_index_ptr(dev, 0);
+ priv->cfg_base = (void __iomem *)devfdt_get_addr_index_ptr(dev, 1);
if (!priv->dbi_base || !priv->cfg_base)
return -EINVAL;
diff --git a/drivers/pci/pcie_layerscape_ep.c b/drivers/pci/pcie_layerscape_ep.c
index ff26a5cd..f4a0d1f2 100644
--- a/drivers/pci/pcie_layerscape_ep.c
+++ b/drivers/pci/pcie_layerscape_ep.c
@@ -250,11 +250,11 @@ static int ls_pcie_ep_probe(struct udevice *dev)
pcie_ep->pcie = pcie;
- pcie->dbi = (void __iomem *)devfdt_get_addr_index(dev, 0);
+ pcie->dbi = (void __iomem *)devfdt_get_addr_index_ptr(dev, 0);
if (!pcie->dbi)
return -ENOMEM;
- pcie->ctrl = (void __iomem *)devfdt_get_addr_index(dev, 1);
+ pcie->ctrl = (void __iomem *)devfdt_get_addr_index_ptr(dev, 1);
if (!pcie->ctrl)
return -ENOMEM;
diff --git a/drivers/phy/marvell/comphy_core.c b/drivers/phy/marvell/comphy_core.c
index df2460db..7272dfb9 100644
--- a/drivers/phy/marvell/comphy_core.c
+++ b/drivers/phy/marvell/comphy_core.c
@@ -88,13 +88,13 @@ static int comphy_probe(struct udevice *dev)
int res;
/* Save base addresses for later use */
- chip_cfg->comphy_base_addr = (void *)devfdt_get_addr_index(dev, 0);
- if (IS_ERR(chip_cfg->comphy_base_addr))
- return PTR_ERR(chip_cfg->comphy_base_addr);
+ chip_cfg->comphy_base_addr = devfdt_get_addr_index_ptr(dev, 0);
+ if (!chip_cfg->comphy_base_addr)
+ return -EINVAL;
- chip_cfg->hpipe3_base_addr = (void *)devfdt_get_addr_index(dev, 1);
- if (IS_ERR(chip_cfg->hpipe3_base_addr))
- return PTR_ERR(chip_cfg->hpipe3_base_addr);
+ chip_cfg->hpipe3_base_addr = devfdt_get_addr_index_ptr(dev, 1);
+ if (!chip_cfg->hpipe3_base_addr)
+ return -EINVAL;
if (device_is_compatible(dev, "marvell,comphy-a3700")) {
chip_cfg->comphy_init_map = comphy_a3700_init_serdes_map;
diff --git a/drivers/spi/cadence_qspi.c b/drivers/spi/cadence_qspi.c
index 93e57a54..ce069b96 100644
--- a/drivers/spi/cadence_qspi.c
+++ b/drivers/spi/cadence_qspi.c
@@ -377,7 +377,7 @@ static int cadence_spi_of_to_plat(struct udevice *bus)
struct cadence_spi_priv *priv = dev_get_priv(bus);
ofnode subnode;
- plat->regbase = (void *)devfdt_get_addr_index(bus, 0);
+ plat->regbase = devfdt_get_addr_index_ptr(bus, 0);
plat->ahbbase = devfdt_get_addr_size_index_ptr(bus, 1, &plat->ahbsize);
plat->is_decoded_cs = dev_read_bool(bus, "cdns,is-decoded-cs");
plat->fifo_depth = dev_read_u32_default(bus, "cdns,fifo-depth", 128);
diff --git a/drivers/usb/musb-new/ti-musb.c b/drivers/usb/musb-new/ti-musb.c
index 91042935..3be3f93d 100644
--- a/drivers/usb/musb-new/ti-musb.c
+++ b/drivers/usb/musb-new/ti-musb.c
@@ -88,7 +88,7 @@ static int ti_musb_of_to_plat(struct udevice *dev)
int usb_index;
struct musb_hdrc_config *musb_config;
- plat->base = (void *)devfdt_get_addr_index(dev, 1);
+ plat->base = devfdt_get_addr_index_ptr(dev, 1);
phys = fdtdec_lookup_phandle(fdt, node, "phys");
ctrl_mod = fdtdec_lookup_phandle(fdt, phys, "ti,ctrl_mod");
--
2.20.1
^ permalink raw reply related [flat|nested] 38+ messages in thread
* Re: [RFC PATCH v1 1/4] drivers: use dev_read_addr_index_ptr when cast to pointer
2023-02-25 19:16 ` [RFC PATCH v1 1/4] drivers: use dev_read_addr_index_ptr when cast to pointer Johan Jonker
` (2 preceding siblings ...)
2023-02-25 19:19 ` [RFC PATCH v1 4/4] drivers: use devfdt_get_addr_index_ptr " Johan Jonker
@ 2023-02-25 20:37 ` Michael Nazzareno Trimarchi
3 siblings, 0 replies; 38+ messages in thread
From: Michael Nazzareno Trimarchi @ 2023-02-25 20:37 UTC (permalink / raw)
To: Johan Jonker; +Cc: dario.binacchi, sjg, philipp.tomsich, kever.yang, u-boot
On Sat, Feb 25, 2023 at 8:16 PM Johan Jonker <jbx6244@gmail.com> wrote:
>
> The fdt_addr_t and phys_addr_t size have been decoupled.
> A 32bit CPU can expect 64-bit data from the device tree parser,
> so use dev_read_addr_index_ptr instead of the dev_read_addr_index
> function in the various files in the drivers directory that cast
> to a pointer.
I think you can use a bit more of 60 chars x line
>
> Signed-off-by: Johan Jonker <jbx6244@gmail.com>
> ---
>
> Note:
>
> This is needed for a Rockchip patch serie to pass the test and
> must be merged before by Rockchip maintainers:
>
> [PATCH v4 00/11] Fixes for Rockchip NFC driver part 1
> https://lore.kernel.org/u-boot/f3dba231-4a55-0a94-dfab-5cab1419d132@gmail.com/
>
> Replacement command used:
> find . -type f -exec sed -i 's/*)dev_read_addr_index(/
> *)dev_read_addr_index_ptr(/g' {} +
> ---
> drivers/mtd/nand/raw/cortina_nand.c | 4 ++--
> drivers/net/dm9000x.c | 2 +-
> drivers/net/dwmac_meson8b.c | 4 ++--
> drivers/pci/pcie_dw_meson.c | 4 ++--
> drivers/pci/pcie_dw_rockchip.c | 4 ++--
> drivers/watchdog/sbsa_gwdt.c | 12 ++++++------
> 6 files changed, 15 insertions(+), 15 deletions(-)
>
> diff --git a/drivers/mtd/nand/raw/cortina_nand.c b/drivers/mtd/nand/raw/cortina_nand.c
> index 88798f23..b03f3821 100644
> --- a/drivers/mtd/nand/raw/cortina_nand.c
> +++ b/drivers/mtd/nand/raw/cortina_nand.c
> @@ -1175,8 +1175,8 @@ static int fdt_decode_nand(struct udevice *dev, struct nand_drv *info)
> int ecc_strength;
>
> info->reg = (struct nand_ctlr *)dev_read_addr(dev);
> - info->dma_glb = (struct dma_global *)dev_read_addr_index(dev, 1);
> - info->dma_nand = (struct dma_ssp *)dev_read_addr_index(dev, 2);
> + info->dma_glb = (struct dma_global *)dev_read_addr_index_ptr(dev, 1);
> + info->dma_nand = (struct dma_ssp *)dev_read_addr_index_ptr(dev, 2);
> info->config.enabled = dev_read_enabled(dev);
> ecc_strength = dev_read_u32_default(dev, "nand-ecc-strength", 16);
> info->flash_base =
> diff --git a/drivers/net/dm9000x.c b/drivers/net/dm9000x.c
> index b46bdeb2..5855f16b 100644
> --- a/drivers/net/dm9000x.c
> +++ b/drivers/net/dm9000x.c
> @@ -651,7 +651,7 @@ static int dm9000_of_to_plat(struct udevice *dev)
>
> pdata->iobase = dev_read_addr_index(dev, 0);
> db->base_io = (void __iomem *)pdata->iobase;
> - db->base_data = (void __iomem *)dev_read_addr_index(dev, 1);
> + db->base_data = (void __iomem *)dev_read_addr_index_ptr(dev, 1);
>
> return 0;
> }
> diff --git a/drivers/net/dwmac_meson8b.c b/drivers/net/dwmac_meson8b.c
> index ddbaa87d..871171e1 100644
> --- a/drivers/net/dwmac_meson8b.c
> +++ b/drivers/net/dwmac_meson8b.c
> @@ -41,8 +41,8 @@ static int dwmac_meson8b_of_to_plat(struct udevice *dev)
> {
> struct dwmac_meson8b_plat *pdata = dev_get_plat(dev);
>
> - pdata->regs = (void *)dev_read_addr_index(dev, 1);
> - if ((fdt_addr_t)pdata->regs == FDT_ADDR_T_NONE)
> + pdata->regs = dev_read_addr_index_ptr(dev, 1);
> + if (!pdata->regs)
> return -EINVAL;
>
> pdata->dwmac_setup = (void *)dev_get_driver_data(dev);
> diff --git a/drivers/pci/pcie_dw_meson.c b/drivers/pci/pcie_dw_meson.c
> index 07da9fa5..59567883 100644
> --- a/drivers/pci/pcie_dw_meson.c
> +++ b/drivers/pci/pcie_dw_meson.c
> @@ -337,13 +337,13 @@ static int meson_pcie_parse_dt(struct udevice *dev)
> struct meson_pcie *priv = dev_get_priv(dev);
> int ret;
>
> - priv->dw.dbi_base = (void *)dev_read_addr_index(dev, 0);
> + priv->dw.dbi_base = dev_read_addr_index_ptr(dev, 0);
> if (!priv->dw.dbi_base)
> return -ENODEV;
>
> dev_dbg(dev, "ELBI address is 0x%p\n", priv->dw.dbi_base);
>
> - priv->meson_cfg_base = (void *)dev_read_addr_index(dev, 1);
> + priv->meson_cfg_base = dev_read_addr_index_ptr(dev, 1);
> if (!priv->meson_cfg_base)
> return -ENODEV;
>
> diff --git a/drivers/pci/pcie_dw_rockchip.c b/drivers/pci/pcie_dw_rockchip.c
> index 9322e735..2608106b 100644
> --- a/drivers/pci/pcie_dw_rockchip.c
> +++ b/drivers/pci/pcie_dw_rockchip.c
> @@ -353,13 +353,13 @@ static int rockchip_pcie_parse_dt(struct udevice *dev)
> struct rk_pcie *priv = dev_get_priv(dev);
> int ret;
>
> - priv->dw.dbi_base = (void *)dev_read_addr_index(dev, 0);
> + priv->dw.dbi_base = dev_read_addr_index_ptr(dev, 0);
> if (!priv->dw.dbi_base)
> return -ENODEV;
>
> dev_dbg(dev, "DBI address is 0x%p\n", priv->dw.dbi_base);
>
> - priv->apb_base = (void *)dev_read_addr_index(dev, 1);
> + priv->apb_base = dev_read_addr_index_ptr(dev, 1);
> if (!priv->apb_base)
> return -ENODEV;
>
> diff --git a/drivers/watchdog/sbsa_gwdt.c b/drivers/watchdog/sbsa_gwdt.c
> index f43cd3fd..ef402898 100644
> --- a/drivers/watchdog/sbsa_gwdt.c
> +++ b/drivers/watchdog/sbsa_gwdt.c
> @@ -98,13 +98,13 @@ static int sbsa_gwdt_of_to_plat(struct udevice *dev)
> {
> struct sbsa_gwdt_priv *priv = dev_get_priv(dev);
>
> - priv->reg_control = (void __iomem *)dev_read_addr_index(dev, 0);
> - if (IS_ERR(priv->reg_control))
> - return PTR_ERR(priv->reg_control);
> + priv->reg_control = (void __iomem *)dev_read_addr_index_ptr(dev, 0);
> + if (!priv->reg_control)
> + return -EINVAL;
>
> - priv->reg_refresh = (void __iomem *)dev_read_addr_index(dev, 1);
> - if (IS_ERR(priv->reg_refresh))
> - return PTR_ERR(priv->reg_refresh);
> + priv->reg_refresh = (void __iomem *)dev_read_addr_index_ptr(dev, 1);
> + if (!priv->reg_refresh)
> + return -EINVAL;
>
Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
> return 0;
> }
> --
> 2.20.1
>
^ permalink raw reply [flat|nested] 38+ messages in thread
* Re: [RFC PATCH v1 3/4] drivers: use devfdt_get_addr_size_index_ptr when cast to pointer
2023-02-25 19:19 ` [RFC PATCH v1 3/4] drivers: use devfdt_get_addr_size_index_ptr " Johan Jonker
@ 2023-02-25 20:39 ` Michael Nazzareno Trimarchi
2023-02-27 15:17 ` Dario Binacchi
1 sibling, 0 replies; 38+ messages in thread
From: Michael Nazzareno Trimarchi @ 2023-02-25 20:39 UTC (permalink / raw)
To: Johan Jonker
Cc: dario.binacchi, sjg, philipp.tomsich, kever.yang, u-boot, yifeng.zhao
Hi
On Sat, Feb 25, 2023 at 8:19 PM Johan Jonker <jbx6244@gmail.com> wrote:
>
> The fdt_addr_t and phys_addr_t size have been decoupled.
> A 32bit CPU can expect 64-bit data from the device tree parser,
> so use devfdt_get_addr_size_index_ptr instead of
> the devfdt_get_addr_size_index function in the various files
> in the drivers directory that cast to a pointer.
>
Nice if you use more size for each line ;)
> Signed-off-by: Johan Jonker <jbx6244@gmail.com>
> ---
>
> Note:
>
> This is needed for a Rockchip patch serie to pass the test and
> must be merged before by Rockchip maintainers:
>
> [PATCH v4 00/11] Fixes for Rockchip NFC driver part 1
> https://lore.kernel.org/u-boot/f3dba231-4a55-0a94-dfab-5cab1419d132@gmail.com/
>
> Replacement command used:
> find . -type f -exec sed -i 's/*)devfdt_get_addr_size_index(/
> *)devfdt_get_addr_size_index_ptr(/g' {} +
> ---
> drivers/pci/pcie_dw_mvebu.c | 6 +++---
> drivers/spi/cadence_qspi.c | 3 +--
> 2 files changed, 4 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/pci/pcie_dw_mvebu.c b/drivers/pci/pcie_dw_mvebu.c
> index a0b82c78..3b2ada54 100644
> --- a/drivers/pci/pcie_dw_mvebu.c
> +++ b/drivers/pci/pcie_dw_mvebu.c
> @@ -569,9 +569,9 @@ static int pcie_dw_mvebu_of_to_plat(struct udevice *dev)
> return -EINVAL;
>
> /* Get the config space base address and size */
> - pcie->cfg_base = (void *)devfdt_get_addr_size_index(dev, 1,
> - &pcie->cfg_size);
> - if ((fdt_addr_t)pcie->cfg_base == FDT_ADDR_T_NONE)
> + pcie->cfg_base = devfdt_get_addr_size_index_ptr(dev, 1,
> + &pcie->cfg_size);
> + if (!pcie->cfg_base)
> return -EINVAL;
>
> return 0;
> diff --git a/drivers/spi/cadence_qspi.c b/drivers/spi/cadence_qspi.c
> index ab0a681c..93e57a54 100644
> --- a/drivers/spi/cadence_qspi.c
> +++ b/drivers/spi/cadence_qspi.c
> @@ -378,8 +378,7 @@ static int cadence_spi_of_to_plat(struct udevice *bus)
> ofnode subnode;
>
> plat->regbase = (void *)devfdt_get_addr_index(bus, 0);
> - plat->ahbbase = (void *)devfdt_get_addr_size_index(bus, 1,
> - &plat->ahbsize);
> + plat->ahbbase = devfdt_get_addr_size_index_ptr(bus, 1, &plat->ahbsize);
hope that ahbbase then is checked if is NULL
> plat->is_decoded_cs = dev_read_bool(bus, "cdns,is-decoded-cs");
> plat->fifo_depth = dev_read_u32_default(bus, "cdns,fifo-depth", 128);
> plat->fifo_width = dev_read_u32_default(bus, "cdns,fifo-width", 4);
Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
> --
> 2.20.1
>
--
Michael Nazzareno Trimarchi
Co-Founder & Chief Executive Officer
M. +39 347 913 2170
michael@amarulasolutions.com
__________________________________
Amarula Solutions BV
Joop Geesinkweg 125, 1114 AB, Amsterdam, NL
T. +31 (0)85 111 9172
info@amarulasolutions.com
www.amarulasolutions.com
^ permalink raw reply [flat|nested] 38+ messages in thread
* Re: [RFC PATCH v1 4/4] drivers: use devfdt_get_addr_index_ptr when cast to pointer
2023-02-25 19:19 ` [RFC PATCH v1 4/4] drivers: use devfdt_get_addr_index_ptr " Johan Jonker
@ 2023-02-25 20:40 ` Michael Nazzareno Trimarchi
0 siblings, 0 replies; 38+ messages in thread
From: Michael Nazzareno Trimarchi @ 2023-02-25 20:40 UTC (permalink / raw)
To: Johan Jonker
Cc: dario.binacchi, sjg, philipp.tomsich, kever.yang, u-boot, yifeng.zhao
Hi Johan
On Sat, Feb 25, 2023 at 8:19 PM Johan Jonker <jbx6244@gmail.com> wrote:
>
> The fdt_addr_t and phys_addr_t size have been decoupled.
> A 32bit CPU can expect 64-bit data from the device tree parser,
> so use devfdt_get_addr_index_ptr instead of
> the devfdt_get_addr_index function in the various files
> in the drivers directory that cast to a pointer.
>
> Signed-off-by: Johan Jonker <jbx6244@gmail.com>
> ---
>
Thank you. We should wait now Simon on those patches
Michael
> Note:
>
> This is needed for a Rockchip patch serie to pass the test and
> must be merged before by Rockchip maintainers:
>
> [PATCH v4 00/11] Fixes for Rockchip NFC driver part 1
> https://lore.kernel.org/u-boot/f3dba231-4a55-0a94-dfab-5cab1419d132@gmail.com/
>
> Replacement command used:
> find . -type f -exec sed -i 's/*)devfdt_get_addr_index(/
> *)devfdt_get_addr_index_ptr(/g' {} +
> ---
> drivers/clk/clk-hsdk-cgu.c | 4 ++--
> drivers/ddr/altera/sdram_gen5.c | 2 +-
> drivers/mmc/xenon_sdhci.c | 2 +-
> drivers/net/mvpp2.c | 24 ++++++++++++------------
> drivers/pci/pcie_dw_mvebu.c | 4 ++--
> drivers/pci/pcie_imx.c | 4 ++--
> drivers/pci/pcie_layerscape_ep.c | 4 ++--
> drivers/phy/marvell/comphy_core.c | 12 ++++++------
> drivers/spi/cadence_qspi.c | 2 +-
> drivers/usb/musb-new/ti-musb.c | 2 +-
> 10 files changed, 30 insertions(+), 30 deletions(-)
>
> diff --git a/drivers/clk/clk-hsdk-cgu.c b/drivers/clk/clk-hsdk-cgu.c
> index 26b0aa9a..cf3d0fd3 100644
> --- a/drivers/clk/clk-hsdk-cgu.c
> +++ b/drivers/clk/clk-hsdk-cgu.c
> @@ -753,11 +753,11 @@ static int hsdk_cgu_clk_probe(struct udevice *dev)
> else
> hsdk_clk->map = hsdk_4xd_clk_map;
>
> - hsdk_clk->cgu_regs = (void __iomem *)devfdt_get_addr_index(dev, 0);
> + hsdk_clk->cgu_regs = (void __iomem *)devfdt_get_addr_index_ptr(dev, 0);
> if (!hsdk_clk->cgu_regs)
> return -EINVAL;
>
> - hsdk_clk->creg_regs = (void __iomem *)devfdt_get_addr_index(dev, 1);
> + hsdk_clk->creg_regs = (void __iomem *)devfdt_get_addr_index_ptr(dev, 1);
> if (!hsdk_clk->creg_regs)
> return -EINVAL;
>
> diff --git a/drivers/ddr/altera/sdram_gen5.c b/drivers/ddr/altera/sdram_gen5.c
> index 8d3ce495..2cdfdd42 100644
> --- a/drivers/ddr/altera/sdram_gen5.c
> +++ b/drivers/ddr/altera/sdram_gen5.c
> @@ -567,7 +567,7 @@ static int altera_gen5_sdram_of_to_plat(struct udevice *dev)
> {
> struct altera_gen5_sdram_plat *plat = dev_get_plat(dev);
>
> - plat->sdr = (struct socfpga_sdr *)devfdt_get_addr_index(dev, 0);
> + plat->sdr = (struct socfpga_sdr *)devfdt_get_addr_index_ptr(dev, 0);
> if (!plat->sdr)
> return -ENODEV;
>
> diff --git a/drivers/mmc/xenon_sdhci.c b/drivers/mmc/xenon_sdhci.c
> index 2f880509..16ac84a2 100644
> --- a/drivers/mmc/xenon_sdhci.c
> +++ b/drivers/mmc/xenon_sdhci.c
> @@ -537,7 +537,7 @@ static int xenon_sdhci_of_to_plat(struct udevice *dev)
> host->ioaddr = dev_read_addr_ptr(dev);
>
> if (device_is_compatible(dev, "marvell,armada-3700-sdhci"))
> - priv->pad_ctrl_reg = (void *)devfdt_get_addr_index(dev, 1);
> + priv->pad_ctrl_reg = devfdt_get_addr_index_ptr(dev, 1);
>
> name = fdt_getprop(gd->fdt_blob, dev_of_offset(dev), "marvell,pad-type",
> NULL);
> diff --git a/drivers/net/mvpp2.c b/drivers/net/mvpp2.c
> index 8c9afdf7..907d826d 100644
> --- a/drivers/net/mvpp2.c
> +++ b/drivers/net/mvpp2.c
> @@ -5351,18 +5351,18 @@ static int mvpp2_base_probe(struct udevice *dev)
> }
>
> /* Save base addresses for later use */
> - priv->base = (void *)devfdt_get_addr_index(dev, 0);
> - if (IS_ERR(priv->base))
> - return PTR_ERR(priv->base);
> + priv->base = devfdt_get_addr_index_ptr(dev, 0);
> + if (!priv->base)
> + return -EINVAL;
>
> if (priv->hw_version == MVPP21) {
> - priv->lms_base = (void *)devfdt_get_addr_index(dev, 1);
> - if (IS_ERR(priv->lms_base))
> - return PTR_ERR(priv->lms_base);
> + priv->lms_base = devfdt_get_addr_index_ptr(dev, 1);
> + if (!priv->lms_base)
> + return -EINVAL;
> } else {
> - priv->iface_base = (void *)devfdt_get_addr_index(dev, 1);
> - if (IS_ERR(priv->iface_base))
> - return PTR_ERR(priv->iface_base);
> + priv->iface_base = devfdt_get_addr_index_ptr(dev, 1);
> + if (!priv->iface_base)
> + return -EINVAL;
>
> /* Store common base addresses for all ports */
> priv->mpcs_base = priv->iface_base + MVPP22_MPCS;
> @@ -5401,10 +5401,10 @@ static int mvpp2_probe(struct udevice *dev)
> if (priv->hw_version == MVPP21) {
> int priv_common_regs_num = 2;
>
> - port->base = (void __iomem *)devfdt_get_addr_index(
> + port->base = (void __iomem *)devfdt_get_addr_index_ptr(
> dev->parent, priv_common_regs_num + port->id);
> - if (IS_ERR(port->base))
> - return PTR_ERR(port->base);
> + if (!port->base)
> + return -EINVAL;
> } else {
> port->gop_id = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev),
> "gop-port-id", -1);
> diff --git a/drivers/pci/pcie_dw_mvebu.c b/drivers/pci/pcie_dw_mvebu.c
> index 3b2ada54..c41f3f15 100644
> --- a/drivers/pci/pcie_dw_mvebu.c
> +++ b/drivers/pci/pcie_dw_mvebu.c
> @@ -564,8 +564,8 @@ static int pcie_dw_mvebu_of_to_plat(struct udevice *dev)
> struct pcie_dw_mvebu *pcie = dev_get_priv(dev);
>
> /* Get the controller base address */
> - pcie->ctrl_base = (void *)devfdt_get_addr_index(dev, 0);
> - if ((fdt_addr_t)pcie->ctrl_base == FDT_ADDR_T_NONE)
> + pcie->ctrl_base = devfdt_get_addr_index_ptr(dev, 0);
> + if (!pcie->ctrl_base)
> return -EINVAL;
>
> /* Get the config space base address and size */
> diff --git a/drivers/pci/pcie_imx.c b/drivers/pci/pcie_imx.c
> index da484664..bf1ca5b6 100644
> --- a/drivers/pci/pcie_imx.c
> +++ b/drivers/pci/pcie_imx.c
> @@ -751,8 +751,8 @@ static int imx_pcie_of_to_plat(struct udevice *dev)
> {
> struct imx_pcie_priv *priv = dev_get_priv(dev);
>
> - priv->dbi_base = (void __iomem *)devfdt_get_addr_index(dev, 0);
> - priv->cfg_base = (void __iomem *)devfdt_get_addr_index(dev, 1);
> + priv->dbi_base = (void __iomem *)devfdt_get_addr_index_ptr(dev, 0);
> + priv->cfg_base = (void __iomem *)devfdt_get_addr_index_ptr(dev, 1);
> if (!priv->dbi_base || !priv->cfg_base)
> return -EINVAL;
>
> diff --git a/drivers/pci/pcie_layerscape_ep.c b/drivers/pci/pcie_layerscape_ep.c
> index ff26a5cd..f4a0d1f2 100644
> --- a/drivers/pci/pcie_layerscape_ep.c
> +++ b/drivers/pci/pcie_layerscape_ep.c
> @@ -250,11 +250,11 @@ static int ls_pcie_ep_probe(struct udevice *dev)
>
> pcie_ep->pcie = pcie;
>
> - pcie->dbi = (void __iomem *)devfdt_get_addr_index(dev, 0);
> + pcie->dbi = (void __iomem *)devfdt_get_addr_index_ptr(dev, 0);
> if (!pcie->dbi)
> return -ENOMEM;
>
> - pcie->ctrl = (void __iomem *)devfdt_get_addr_index(dev, 1);
> + pcie->ctrl = (void __iomem *)devfdt_get_addr_index_ptr(dev, 1);
> if (!pcie->ctrl)
> return -ENOMEM;
>
> diff --git a/drivers/phy/marvell/comphy_core.c b/drivers/phy/marvell/comphy_core.c
> index df2460db..7272dfb9 100644
> --- a/drivers/phy/marvell/comphy_core.c
> +++ b/drivers/phy/marvell/comphy_core.c
> @@ -88,13 +88,13 @@ static int comphy_probe(struct udevice *dev)
> int res;
>
> /* Save base addresses for later use */
> - chip_cfg->comphy_base_addr = (void *)devfdt_get_addr_index(dev, 0);
> - if (IS_ERR(chip_cfg->comphy_base_addr))
> - return PTR_ERR(chip_cfg->comphy_base_addr);
> + chip_cfg->comphy_base_addr = devfdt_get_addr_index_ptr(dev, 0);
> + if (!chip_cfg->comphy_base_addr)
> + return -EINVAL;
>
> - chip_cfg->hpipe3_base_addr = (void *)devfdt_get_addr_index(dev, 1);
> - if (IS_ERR(chip_cfg->hpipe3_base_addr))
> - return PTR_ERR(chip_cfg->hpipe3_base_addr);
> + chip_cfg->hpipe3_base_addr = devfdt_get_addr_index_ptr(dev, 1);
> + if (!chip_cfg->hpipe3_base_addr)
> + return -EINVAL;
>
> if (device_is_compatible(dev, "marvell,comphy-a3700")) {
> chip_cfg->comphy_init_map = comphy_a3700_init_serdes_map;
> diff --git a/drivers/spi/cadence_qspi.c b/drivers/spi/cadence_qspi.c
> index 93e57a54..ce069b96 100644
> --- a/drivers/spi/cadence_qspi.c
> +++ b/drivers/spi/cadence_qspi.c
> @@ -377,7 +377,7 @@ static int cadence_spi_of_to_plat(struct udevice *bus)
> struct cadence_spi_priv *priv = dev_get_priv(bus);
> ofnode subnode;
>
> - plat->regbase = (void *)devfdt_get_addr_index(bus, 0);
> + plat->regbase = devfdt_get_addr_index_ptr(bus, 0);
> plat->ahbbase = devfdt_get_addr_size_index_ptr(bus, 1, &plat->ahbsize);
> plat->is_decoded_cs = dev_read_bool(bus, "cdns,is-decoded-cs");
> plat->fifo_depth = dev_read_u32_default(bus, "cdns,fifo-depth", 128);
> diff --git a/drivers/usb/musb-new/ti-musb.c b/drivers/usb/musb-new/ti-musb.c
> index 91042935..3be3f93d 100644
> --- a/drivers/usb/musb-new/ti-musb.c
> +++ b/drivers/usb/musb-new/ti-musb.c
> @@ -88,7 +88,7 @@ static int ti_musb_of_to_plat(struct udevice *dev)
> int usb_index;
> struct musb_hdrc_config *musb_config;
>
> - plat->base = (void *)devfdt_get_addr_index(dev, 1);
> + plat->base = devfdt_get_addr_index_ptr(dev, 1);
>
> phys = fdtdec_lookup_phandle(fdt, node, "phys");
> ctrl_mod = fdtdec_lookup_phandle(fdt, phys, "ti,ctrl_mod");
> --
> 2.20.1
>
--
Michael Nazzareno Trimarchi
Co-Founder & Chief Executive Officer
M. +39 347 913 2170
michael@amarulasolutions.com
__________________________________
Amarula Solutions BV
Joop Geesinkweg 125, 1114 AB, Amsterdam, NL
T. +31 (0)85 111 9172
info@amarulasolutions.com
www.amarulasolutions.com
^ permalink raw reply [flat|nested] 38+ messages in thread
* Re: [RFC PATCH v1 2/4] drivers: use dev_read_addr_ptr when cast to pointer
2023-02-25 19:19 ` [RFC PATCH v1 2/4] drivers: use dev_read_addr_ptr " Johan Jonker
@ 2023-02-25 23:05 ` Johan Jonker
0 siblings, 0 replies; 38+ messages in thread
From: Johan Jonker @ 2023-02-25 23:05 UTC (permalink / raw)
To: dario.binacchi, michael, sjg, philipp.tomsich, kever.yang
Cc: u-boot, yifeng.zhao
On 2/25/23 20:19, Johan Jonker wrote:
> The fdt_addr_t and phys_addr_t size have been decoupled.
> A 32bit CPU can expect 64-bit data from the device tree parser,
> so use dev_read_addr_ptr instead of the dev_read_addr
> function in the various files in the drivers directory that cast
> to a pointer.
>
> Signed-off-by: Johan Jonker <jbx6244@gmail.com>
> ---
>
> Note:
>
> This is needed for a Rockchip patch serie to pass the test and
> must be merged before by Rockchip maintainers:
>
> [PATCH v4 00/11] Fixes for Rockchip NFC driver part 1
> https://lore.kernel.org/u-boot/f3dba231-4a55-0a94-dfab-5cab1419d132@gmail.com/
>
> Replacement command used:
> find . -type f -exec sed -i 's/*)dev_read_addr(/
> *)dev_read_addr_ptr(/g' {} +
> ---
> drivers/ata/dwc_ahsata.c | 2 +-
> drivers/cache/cache-l2x0.c | 2 +-
> drivers/cache/cache-v5l2.c | 2 +-
> drivers/gpio/mscc_sgpio.c | 2 +-
> drivers/gpio/tegra_gpio.c | 4 ++--
> drivers/gpio/xilinx_gpio.c | 2 +-
> drivers/i2c/i2c-cdns.c | 2 +-
> drivers/i2c/tegra_i2c.c | 4 ++--
> drivers/mmc/am654_sdhci.c | 2 +-
> drivers/mmc/davinci_mmc.c | 2 +-
> drivers/mmc/piton_mmc.c | 2 +-
> drivers/mmc/tegra_mmc.c | 2 +-
> drivers/mmc/zynq_sdhci.c | 6 +++---
> drivers/mtd/nand/raw/arasan_nfc.c | 2 +-
> drivers/mtd/nand/raw/cortina_nand.c | 2 +-
> drivers/mtd/nand/raw/mxic_nand.c | 2 +-
> drivers/mtd/nand/raw/tegra_nand.c | 2 +-
> drivers/mtd/nand/raw/zynq_nand.c | 2 +-
> drivers/net/mvmdio.c | 2 +-
> drivers/net/qe/dm_qe_uec_phy.c | 2 +-
> drivers/pci/pci-aardvark.c | 4 ++--
> drivers/phy/allwinner/phy-sun50i-usb3.c | 6 +++---
> drivers/phy/qcom/phy-qcom-usb-hs-28nm.c | 4 ++--
> drivers/phy/qcom/phy-qcom-usb-ss.c | 4 ++--
> drivers/phy/rockchip/phy-rockchip-snps-pcie3.c | 4 ++--
> drivers/phy/rockchip/phy-rockchip-typec.c | 6 +++---
> drivers/pwm/tegra_pwm.c | 2 +-
> drivers/serial/serial_zynq.c | 6 +++---
> drivers/spi/mpc8xxx_spi.c | 2 +-
> drivers/spi/mscc_bb_spi.c | 2 +-
> drivers/spi/sh_qspi.c | 2 +-
> drivers/spi/spi-mxic.c | 2 +-
> drivers/spi/xilinx_spi.c | 2 +-
> drivers/ufs/ufs.c | 2 +-
> drivers/usb/host/ehci-tegra.c | 2 +-
> drivers/video/dw_mipi_dsi.c | 4 ++--
> drivers/video/rockchip/rk_vop.c | 2 +-
> drivers/video/stm32/stm32_dsi.c | 4 ++--
> drivers/video/stm32/stm32_ltdc.c | 4 ++--
> drivers/video/tegra124/display.c | 2 +-
> drivers/video/tegra124/sor.c | 6 +++---
> drivers/watchdog/cdns_wdt.c | 6 +++---
> drivers/watchdog/sp805_wdt.c | 6 +++---
> drivers/watchdog/xilinx_tb_wdt.c | 6 +++---
> 44 files changed, 69 insertions(+), 69 deletions(-)
>
[..]
> diff --git a/drivers/video/dw_mipi_dsi.c b/drivers/video/dw_mipi_dsi.c
> index 6d9c5a94..7c6892cf 100644
> --- a/drivers/video/dw_mipi_dsi.c
> +++ b/drivers/video/dw_mipi_dsi.c
> @@ -800,8 +800,8 @@ static int dw_mipi_dsi_init(struct udevice *dev,
> dsi->dsi_host.ops = &dw_mipi_dsi_host_ops;
> device->host = &dsi->dsi_host;
>
> - dsi->base = (void *)dev_read_addr(device->dev);
> - if ((fdt_addr_t)dsi->base == FDT_ADDR_T_NONE) {
> + dsi->base = dev_read_addr_ptr(device->dev);
> + if ((!dsi->base) {
if (!dsi->base) {
Oops typo, sorry..
> dev_err(device->dev, "dsi dt register address error\n");
> return -EINVAL;
> }
[..]
0);
> --
> 2.20.1
>
^ permalink raw reply [flat|nested] 38+ messages in thread
* Re: [RFC PATCH v1 3/4] drivers: use devfdt_get_addr_size_index_ptr when cast to pointer
2023-02-25 19:19 ` [RFC PATCH v1 3/4] drivers: use devfdt_get_addr_size_index_ptr " Johan Jonker
2023-02-25 20:39 ` Michael Nazzareno Trimarchi
@ 2023-02-27 15:17 ` Dario Binacchi
1 sibling, 0 replies; 38+ messages in thread
From: Dario Binacchi @ 2023-02-27 15:17 UTC (permalink / raw)
To: Johan Jonker
Cc: michael, sjg, philipp.tomsich, kever.yang, u-boot, yifeng.zhao
Hi Johan,
On Sat, Feb 25, 2023 at 8:19 PM Johan Jonker <jbx6244@gmail.com> wrote:
>
> The fdt_addr_t and phys_addr_t size have been decoupled.
> A 32bit CPU can expect 64-bit data from the device tree parser,
> so use devfdt_get_addr_size_index_ptr instead of
> the devfdt_get_addr_size_index function in the various files
> in the drivers directory that cast to a pointer.
>
> Signed-off-by: Johan Jonker <jbx6244@gmail.com>
> ---
>
> Note:
>
> This is needed for a Rockchip patch serie to pass the test and
> must be merged before by Rockchip maintainers:
>
> [PATCH v4 00/11] Fixes for Rockchip NFC driver part 1
> https://lore.kernel.org/u-boot/f3dba231-4a55-0a94-dfab-5cab1419d132@gmail.com/
>
> Replacement command used:
> find . -type f -exec sed -i 's/*)devfdt_get_addr_size_index(/
> *)devfdt_get_addr_size_index_ptr(/g' {} +
> ---
> drivers/pci/pcie_dw_mvebu.c | 6 +++---
> drivers/spi/cadence_qspi.c | 3 +--
> 2 files changed, 4 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/pci/pcie_dw_mvebu.c b/drivers/pci/pcie_dw_mvebu.c
> index a0b82c78..3b2ada54 100644
> --- a/drivers/pci/pcie_dw_mvebu.c
> +++ b/drivers/pci/pcie_dw_mvebu.c
> @@ -569,9 +569,9 @@ static int pcie_dw_mvebu_of_to_plat(struct udevice *dev)
> return -EINVAL;
>
> /* Get the config space base address and size */
> - pcie->cfg_base = (void *)devfdt_get_addr_size_index(dev, 1,
> - &pcie->cfg_size);
> - if ((fdt_addr_t)pcie->cfg_base == FDT_ADDR_T_NONE)
> + pcie->cfg_base = devfdt_get_addr_size_index_ptr(dev, 1,
> + &pcie->cfg_size);
> + if (!pcie->cfg_base)
> return -EINVAL;
>
> return 0;
> diff --git a/drivers/spi/cadence_qspi.c b/drivers/spi/cadence_qspi.c
> index ab0a681c..93e57a54 100644
> --- a/drivers/spi/cadence_qspi.c
> +++ b/drivers/spi/cadence_qspi.c
> @@ -378,8 +378,7 @@ static int cadence_spi_of_to_plat(struct udevice *bus)
> ofnode subnode;
>
> plat->regbase = (void *)devfdt_get_addr_index(bus, 0);
> - plat->ahbbase = (void *)devfdt_get_addr_size_index(bus, 1,
> - &plat->ahbsize);
> + plat->ahbbase = devfdt_get_addr_size_index_ptr(bus, 1, &plat->ahbsize);
Please rebase the series on master (I have fixed a conflict) and test
with buildman.
The CI pipeline outputs this error:
Building current source for 1 boards (1 thread, 64 jobs per thread)
52 aarch64: + xilinx_versal_virt
53+drivers/spi/cadence_qspi.c: In function 'cadence_spi_of_to_plat':
54+drivers/spi/cadence_qspi.c:387:25: error: implicit declaration of
function 'devfdt_get_addr_size_index_ptr'; did you mean
'devfdt_get_addr_size_index'? [-Werror=implicit-function-declaration]
55+ 387 | plat->ahbbase = devfdt_get_addr_size_index_ptr(bus, 1,
&plat->ahbsize);
56+ | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
57+ | devfdt_get_addr_size_index
58+drivers/spi/cadence_qspi.c:387:23: error: assignment to 'void *'
from 'int' makes pointer from integer without a cast
[-Werror=int-conversion]
Thanks and regards,
Dario
> plat->is_decoded_cs = dev_read_bool(bus, "cdns,is-decoded-cs");
> plat->fifo_depth = dev_read_u32_default(bus, "cdns,fifo-depth", 128);
> plat->fifo_width = dev_read_u32_default(bus, "cdns,fifo-width", 4);
> --
> 2.20.1
>
--
Dario Binacchi
Senior Embedded Linux Developer
dario.binacchi@amarulasolutions.com
__________________________________
Amarula Solutions SRL
Via Le Canevare 30, 31100 Treviso, Veneto, IT
T. +39 042 243 5310
info@amarulasolutions.com
www.amarulasolutions.com
^ permalink raw reply [flat|nested] 38+ messages in thread
end of thread, other threads:[~2023-02-27 15:17 UTC | newest]
Thread overview: 38+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2023-02-18 15:23 [PATCH v4 00/11] Fixes for Rockchip NFC driver part 1 Johan Jonker
2023-02-18 15:26 ` [PATCH v4 01/11] include: fdtdec: decouple fdt_addr_t and phys_addr_t size Johan Jonker
2023-02-23 0:47 ` Kever Yang
2023-02-23 14:06 ` [PATCH v1] spi: spi-aspeed-smc: convert devfdt_get_addr_index output to phys_addr_t Johan Jonker
2023-02-25 9:26 ` Michael Nazzareno Trimarchi
2023-02-25 9:50 ` Johan Jonker
2023-02-25 9:53 ` Michael Nazzareno Trimarchi
2023-02-25 11:40 ` Michael Nazzareno Trimarchi
2023-02-25 9:11 ` [PATCH v4 01/11] include: fdtdec: decouple fdt_addr_t and phys_addr_t size Johan Jonker
2023-02-25 9:15 ` Michael Nazzareno Trimarchi
2023-02-25 9:20 ` Johan Jonker
2023-02-25 11:43 ` [PATCH v2 1/2] core: fdtaddr: add devfdt_get_addr_size_index_ptr function Johan Jonker
2023-02-25 11:44 ` [PATCH v2 2/2] spi: spi-aspeed-smc: use devfdt_get_addr_index_ptr Johan Jonker
2023-02-25 11:47 ` Michael Nazzareno Trimarchi
2023-02-25 11:47 ` [PATCH v2 1/2] core: fdtaddr: add devfdt_get_addr_size_index_ptr function Michael Nazzareno Trimarchi
2023-02-25 16:52 ` Michael Nazzareno Trimarchi
2023-02-25 19:16 ` [RFC PATCH v1 1/4] drivers: use dev_read_addr_index_ptr when cast to pointer Johan Jonker
2023-02-25 19:19 ` [RFC PATCH v1 2/4] drivers: use dev_read_addr_ptr " Johan Jonker
2023-02-25 23:05 ` Johan Jonker
2023-02-25 19:19 ` [RFC PATCH v1 3/4] drivers: use devfdt_get_addr_size_index_ptr " Johan Jonker
2023-02-25 20:39 ` Michael Nazzareno Trimarchi
2023-02-27 15:17 ` Dario Binacchi
2023-02-25 19:19 ` [RFC PATCH v1 4/4] drivers: use devfdt_get_addr_index_ptr " Johan Jonker
2023-02-25 20:40 ` Michael Nazzareno Trimarchi
2023-02-25 20:37 ` [RFC PATCH v1 1/4] drivers: use dev_read_addr_index_ptr " Michael Nazzareno Trimarchi
2023-02-18 15:26 ` [PATCH v4 02/11] include: dm: ofnode: fix headers Johan Jonker
2023-02-18 15:27 ` [PATCH v4 03/11] core: remap: convert regmap_init_mem_plat() input to phys_addr_t Johan Jonker
2023-02-22 7:59 ` Kever Yang
2023-02-18 15:27 ` [PATCH v4 04/11] rockchip: adc: rockchip-saradc: use dev_read_addr_ptr Johan Jonker
2023-02-22 8:00 ` Kever Yang
2023-02-18 15:27 ` [PATCH v4 05/11] rockchip: timer: dw-apb-timer: convert dev_read_addr output to phys_addr_t Johan Jonker
2023-02-18 15:27 ` [PATCH v4 06/11] mtd: nand: raw: rockchip_nfc: use dev_read_addr_ptr Johan Jonker
2023-02-18 15:28 ` [PATCH v4 07/11] mtd: nand: raw: rockchip_nfc: remove the compatible string "rockchip,rk3308-nfc" Johan Jonker
2023-02-18 15:28 ` [PATCH v4 08/11] mtd: nand: raw: rockchip_nfc: add layout structure Johan Jonker
2023-02-18 15:28 ` [PATCH v4 09/11] mtd: nand: raw: rockchip_nfc: add flash_node to chip structure Johan Jonker
2023-02-18 15:28 ` [PATCH v4 10/11] mtd: nand: add support for the Sandisk SDTNQGAMA chip Johan Jonker
2023-02-18 15:29 ` [PATCH v4 11/11] mtd: nand: raw: rockchip_nfc: fix oobfree offset and description Johan Jonker
2023-02-22 8:01 ` Kever Yang
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