From: Marc Zyngier <maz@kernel.org>
To: Rasmus Villemoes <linux@rasmusvillemoes.dk>
Cc: Biwen Li <biwen.li@oss.nxp.com>,
shawnguo@kernel.org, robh+dt@kernel.org, mark.rutland@arm.com,
leoyang.li@nxp.com, zhiqiang.hou@nxp.com, tglx@linutronix.de,
jason@lakedaemon.net, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, jiafei.pan@nxp.com,
xiaobo.xie@nxp.com, linux-arm-kernel@lists.infradead.org,
Biwen Li <biwen.li@nxp.com>
Subject: Re: [RESEND 01/11] irqchip: ls-extirq: Add LS1043A, LS1088A external interrupt
Date: Mon, 26 Oct 2020 09:22:40 +0000 [thread overview]
Message-ID: <b65acafab54b62a2a22aa942089b8033@kernel.org> (raw)
In-Reply-To: <3448c822-31b1-7f9d-fedf-49912418fc3f@rasmusvillemoes.dk>
On 2020-10-26 09:06, Rasmus Villemoes wrote:
> On 26/10/2020 09.44, Marc Zyngier wrote:
>> On 2020-10-26 08:01, Biwen Li wrote:
>>> From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
>>>
>>> Add an new IRQ chip declaration for LS1043A and LS1088A
>>> - compatible "fsl,ls1043a-extirq" for LS1043A, LS1046A
>>> - compatible "fsl,ls1088a-extirq" for LS1088A, LS208xA, LX216xA
>>
>> Three things:
>> - This commit message doesn't describe the bit_reverse change
>
> Yeah, please elaborate on that, as the RM for 1043 or 1046 doesn't
> mention anything about bit reversal for the scfg registers - they don't
> seem to have the utter nonsense that is SCFG_SCFGREVCR, but perhaps,
> instead of removing it, that has just become a hard-coded part of the
> IP.
>
> Also, IANAL etc., but
>
>>> +// Copyright 2019-2020 NXP
>
> really? Seems to be a bit of a stretch.
>
> At the very least, cc'ing the original author and only person to ever
> touch that file would have been appreciated.
Huh. Well spotted. That's definitely not on.
NXP people, please talk to your legal department.
M.
--
Jazz is not dead. It just smells funny...
WARNING: multiple messages have this Message-ID (diff)
From: Marc Zyngier <maz@kernel.org>
To: Rasmus Villemoes <linux@rasmusvillemoes.dk>
Cc: mark.rutland@arm.com, devicetree@vger.kernel.org,
jason@lakedaemon.net, Biwen Li <biwen.li@nxp.com>,
zhiqiang.hou@nxp.com, linux-kernel@vger.kernel.org,
Biwen Li <biwen.li@oss.nxp.com>,
leoyang.li@nxp.com, robh+dt@kernel.org,
linux-arm-kernel@lists.infradead.org, tglx@linutronix.de,
shawnguo@kernel.org, jiafei.pan@nxp.com, xiaobo.xie@nxp.com
Subject: Re: [RESEND 01/11] irqchip: ls-extirq: Add LS1043A, LS1088A external interrupt
Date: Mon, 26 Oct 2020 09:22:40 +0000 [thread overview]
Message-ID: <b65acafab54b62a2a22aa942089b8033@kernel.org> (raw)
In-Reply-To: <3448c822-31b1-7f9d-fedf-49912418fc3f@rasmusvillemoes.dk>
On 2020-10-26 09:06, Rasmus Villemoes wrote:
> On 26/10/2020 09.44, Marc Zyngier wrote:
>> On 2020-10-26 08:01, Biwen Li wrote:
>>> From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
>>>
>>> Add an new IRQ chip declaration for LS1043A and LS1088A
>>> - compatible "fsl,ls1043a-extirq" for LS1043A, LS1046A
>>> - compatible "fsl,ls1088a-extirq" for LS1088A, LS208xA, LX216xA
>>
>> Three things:
>> - This commit message doesn't describe the bit_reverse change
>
> Yeah, please elaborate on that, as the RM for 1043 or 1046 doesn't
> mention anything about bit reversal for the scfg registers - they don't
> seem to have the utter nonsense that is SCFG_SCFGREVCR, but perhaps,
> instead of removing it, that has just become a hard-coded part of the
> IP.
>
> Also, IANAL etc., but
>
>>> +// Copyright 2019-2020 NXP
>
> really? Seems to be a bit of a stretch.
>
> At the very least, cc'ing the original author and only person to ever
> touch that file would have been appreciated.
Huh. Well spotted. That's definitely not on.
NXP people, please talk to your legal department.
M.
--
Jazz is not dead. It just smells funny...
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http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2020-10-26 9:22 UTC|newest]
Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-10-26 8:01 [RESEND 01/11] irqchip: ls-extirq: Add LS1043A, LS1088A external interrupt Biwen Li
2020-10-26 8:01 ` Biwen Li
2020-10-26 8:01 ` [RESEND 02/11] arm64: dts: ls1043a: add DT node for external interrupt lines Biwen Li
2020-10-26 8:01 ` Biwen Li
2020-10-26 8:01 ` [RESEND 03/11] arm64: dts: ls1046a: " Biwen Li
2020-10-26 8:01 ` Biwen Li
2020-10-26 8:01 ` [RESEND 04/11] arm64: dts: ls1046ardb: Add interrupt line for RTC node Biwen Li
2020-10-26 8:01 ` Biwen Li
2020-10-26 8:01 ` [RESEND 05/11] arm64: dts: ls1088a: add DT node for external interrupt lines Biwen Li
2020-10-26 8:01 ` Biwen Li
2020-10-26 8:01 ` [RESEND 06/11] arm64: dts: ls1088ardb: fix interrupt line for RTC node Biwen Li
2020-10-26 8:01 ` Biwen Li
2020-10-26 8:01 ` [RESEND 07/11] arm64: dts: ls208xa: add DT node for external interrupt lines Biwen Li
2020-10-26 8:01 ` Biwen Li
2020-10-26 8:01 ` [RESEND 08/11] arm64: dts: ls208xa-rdb: add interrupt line for RTC node Biwen Li
2020-10-26 8:01 ` Biwen Li
2020-10-26 8:01 ` [RESEND 09/11] arm64: dts: lx2160a: add DT node for external interrupt lines Biwen Li
2020-10-26 8:01 ` Biwen Li
2020-10-26 8:01 ` [RESEND 10/11] arm64: dts: lx2160ardb: fix interrupt line for RTC node Biwen Li
2020-10-26 8:01 ` Biwen Li
2020-10-26 8:01 ` [RESEND 11/11] dt-bindings: interrupt-controller: update bindings for supporting more SoCs Biwen Li
2020-10-26 8:01 ` Biwen Li
2020-10-26 8:44 ` [RESEND 01/11] irqchip: ls-extirq: Add LS1043A, LS1088A external interrupt Marc Zyngier
2020-10-26 8:44 ` Marc Zyngier
2020-10-26 9:06 ` Rasmus Villemoes
2020-10-26 9:06 ` Rasmus Villemoes
2020-10-26 9:22 ` Marc Zyngier [this message]
2020-10-26 9:22 ` Marc Zyngier
2020-10-26 15:06 ` Leo Li
2020-10-26 15:06 ` Leo Li
2020-10-26 15:42 ` Marc Zyngier
2020-10-26 15:42 ` Marc Zyngier
2020-10-27 3:14 ` Biwen Li
2020-10-27 3:14 ` Biwen Li
2020-10-27 3:25 ` Biwen Li (OSS)
2020-10-27 3:25 ` Biwen Li (OSS)
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