* [cip-dev] [PATCH 4.4.y-cip 1/9] dt-bindings: watchdog: renesas,wdt: Document r8a7742 support
2020-09-02 16:05 [cip-dev] [PATCH 4.4.y-cip 0/9] Add RZ/G1H WDT/Thermal/CMT/MSIOF support Biju Das
@ 2020-09-02 16:05 ` Biju Das
2020-09-02 16:05 ` [cip-dev] [PATCH 4.4.y-cip 2/9] ARM: dts: r8a7742: Add RWDT node Biju Das
` (12 subsequent siblings)
13 siblings, 0 replies; 17+ messages in thread
From: Biju Das @ 2020-09-02 16:05 UTC (permalink / raw)
To: cip-dev, Nobuhiro Iwamatsu, Pavel Machek
Cc: Chris Paterson, Biju Das, Prabhakar Mahadev Lad
[-- Attachment #1: Type: text/plain, Size: 1411 bytes --]
From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
commit 06c3b7a60b4b248ed12229ea39399be0501532de upstream.
RZ/G1H (R8A7742) watchdog implementation is compatible with R-Car Gen2,
therefore add relevant documentation.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Rob Herring <robh@kernel.org>
[biju: Patched text version of bindings file]
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
Documentation/devicetree/bindings/watchdog/renesas-wdt.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/watchdog/renesas-wdt.txt b/Documentation/devicetree/bindings/watchdog/renesas-wdt.txt
index 050bcf0e3e00..0541781344af 100644
--- a/Documentation/devicetree/bindings/watchdog/renesas-wdt.txt
+++ b/Documentation/devicetree/bindings/watchdog/renesas-wdt.txt
@@ -5,6 +5,7 @@ Required properties:
fallback compatible string when compatible with the generic
version.
Examples with soctypes are:
+ - "renesas,r8a7742-wdt" (RZ/G1H)
- "renesas,r8a7743-wdt" (RZ/G1M)
- "renesas,r8a7744-wdt" (RZ/G1N)
- "renesas,r8a7745-wdt" (RZ/G1E)
--
2.17.1
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^ permalink raw reply related [flat|nested] 17+ messages in thread* [cip-dev] [PATCH 4.4.y-cip 2/9] ARM: dts: r8a7742: Add RWDT node
2020-09-02 16:05 [cip-dev] [PATCH 4.4.y-cip 0/9] Add RZ/G1H WDT/Thermal/CMT/MSIOF support Biju Das
2020-09-02 16:05 ` [cip-dev] [PATCH 4.4.y-cip 1/9] dt-bindings: watchdog: renesas,wdt: Document r8a7742 support Biju Das
@ 2020-09-02 16:05 ` Biju Das
2020-09-02 16:05 ` [cip-dev] [PATCH 4.4.y-cip 3/5] ARM: dts: r8a7742: Add MMC0 node Biju Das
` (11 subsequent siblings)
13 siblings, 0 replies; 17+ messages in thread
From: Biju Das @ 2020-09-02 16:05 UTC (permalink / raw)
To: cip-dev, Nobuhiro Iwamatsu, Pavel Machek
Cc: Chris Paterson, Biju Das, Prabhakar Mahadev Lad
[-- Attachment #1: Type: text/plain, Size: 1477 bytes --]
From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
commit 72d1a34e3cedbb48513db50bb651c5ccf53e5a27 upstream.
Add a device node for the Watchdog Timer (RWDT) controller on the Renesas
RZ/G1H (r8a7742) SoC.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/1590172641-1556-1-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
[biju: changed clocks and power-domain properties, removed resets property]
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
arch/arm/boot/dts/r8a7742.dtsi | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7742.dtsi b/arch/arm/boot/dts/r8a7742.dtsi
index fd4da0d6269e..50f70b358bce 100644
--- a/arch/arm/boot/dts/r8a7742.dtsi
+++ b/arch/arm/boot/dts/r8a7742.dtsi
@@ -607,6 +607,16 @@
#size-cells = <2>;
ranges;
+ rwdt: watchdog@e6020000 {
+ compatible = "renesas,r8a7742-wdt",
+ "renesas,rcar-gen2-wdt";
+ reg = <0 0xe6020000 0 0x0c>;
+ interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&mstp4_clks R8A7742_CLK_RWDT>;
+ power-domains = <&cpg_clocks>;
+ status = "disabled";
+ };
+
gpio0: gpio@e6050000 {
compatible = "renesas,gpio-r8a7742",
"renesas,rcar-gen2-gpio";
--
2.17.1
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^ permalink raw reply related [flat|nested] 17+ messages in thread* [cip-dev] [PATCH 4.4.y-cip 3/5] ARM: dts: r8a7742: Add MMC0 node
2020-09-02 16:05 [cip-dev] [PATCH 4.4.y-cip 0/9] Add RZ/G1H WDT/Thermal/CMT/MSIOF support Biju Das
2020-09-02 16:05 ` [cip-dev] [PATCH 4.4.y-cip 1/9] dt-bindings: watchdog: renesas,wdt: Document r8a7742 support Biju Das
2020-09-02 16:05 ` [cip-dev] [PATCH 4.4.y-cip 2/9] ARM: dts: r8a7742: Add RWDT node Biju Das
@ 2020-09-02 16:05 ` Biju Das
2020-09-02 16:05 ` [cip-dev] [PATCH 4.4.y-cip 3/9] ARM: dts: r8a7742-iwg21d-q7: Add RWDT support Biju Das
` (10 subsequent siblings)
13 siblings, 0 replies; 17+ messages in thread
From: Biju Das @ 2020-09-02 16:05 UTC (permalink / raw)
To: cip-dev, Nobuhiro Iwamatsu, Pavel Machek
Cc: Chris Paterson, Biju Das, Prabhakar Mahadev Lad
[-- Attachment #1: Type: text/plain, Size: 1610 bytes --]
From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
commit 9493c8c34cb4b683917a0d2e82cc5df859b1e5a4 upstream.
Describe MMC0 device node in the R8A7742 device tree.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/1589555337-5498-8-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
[biju: changed clocks and power-domains properties, removed resets property]
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
arch/arm/boot/dts/r8a7742.dtsi | 15 +++++++++++++++
1 file changed, 15 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7742.dtsi b/arch/arm/boot/dts/r8a7742.dtsi
index 70dcd59b36ca..f4d571b4a4db 100644
--- a/arch/arm/boot/dts/r8a7742.dtsi
+++ b/arch/arm/boot/dts/r8a7742.dtsi
@@ -1011,6 +1011,21 @@
status = "disabled";
};
+ mmcif0: mmc@ee200000 {
+ compatible = "renesas,mmcif-r8a7742",
+ "renesas,sh-mmcif";
+ reg = <0 0xee200000 0 0x80>;
+ interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&mstp3_clks R8A7742_CLK_MMCIF0>;
+ dmas = <&dmac0 0xd1>, <&dmac0 0xd2>,
+ <&dmac1 0xd1>, <&dmac1 0xd2>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&cpg_clocks>;
+ reg-io-width = <4>;
+ status = "disabled";
+ max-frequency = <97500000>;
+ };
+
mmcif1: mmc@ee220000 {
compatible = "renesas,mmcif-r8a7742",
"renesas,sh-mmcif";
--
2.17.1
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^ permalink raw reply related [flat|nested] 17+ messages in thread* [cip-dev] [PATCH 4.4.y-cip 3/9] ARM: dts: r8a7742-iwg21d-q7: Add RWDT support
2020-09-02 16:05 [cip-dev] [PATCH 4.4.y-cip 0/9] Add RZ/G1H WDT/Thermal/CMT/MSIOF support Biju Das
` (2 preceding siblings ...)
2020-09-02 16:05 ` [cip-dev] [PATCH 4.4.y-cip 3/5] ARM: dts: r8a7742: Add MMC0 node Biju Das
@ 2020-09-02 16:05 ` Biju Das
2020-09-02 16:05 ` [cip-dev] [PATCH 4.4.y-cip 4/5] ARM: dts: r8a7742-iwg21d-q7: Enable SDHI2 controller Biju Das
` (9 subsequent siblings)
13 siblings, 0 replies; 17+ messages in thread
From: Biju Das @ 2020-09-02 16:05 UTC (permalink / raw)
To: cip-dev, Nobuhiro Iwamatsu, Pavel Machek
Cc: Chris Paterson, Biju Das, Prabhakar Mahadev Lad
[-- Attachment #1: Type: text/plain, Size: 1028 bytes --]
From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
commit 5a07fe33b8d4db72f825de90f8361a6a8680ba5f upstream.
Enable RWDT and use 60 seconds as default timeout.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Link: https://lore.kernel.org/r/1590420129-7531-5-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
arch/arm/boot/dts/r8a7742-iwg21d-q7.dts | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7742-iwg21d-q7.dts b/arch/arm/boot/dts/r8a7742-iwg21d-q7.dts
index 82abbb758046..3197aa5852f9 100644
--- a/arch/arm/boot/dts/r8a7742-iwg21d-q7.dts
+++ b/arch/arm/boot/dts/r8a7742-iwg21d-q7.dts
@@ -78,6 +78,11 @@
};
};
+&rwdt {
+ timeout-sec = <60>;
+ status = "okay";
+};
+
&scifa2 {
pinctrl-0 = <&scifa2_pins>;
pinctrl-names = "default";
--
2.17.1
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^ permalink raw reply related [flat|nested] 17+ messages in thread* [cip-dev] [PATCH 4.4.y-cip 4/5] ARM: dts: r8a7742-iwg21d-q7: Enable SDHI2 controller
2020-09-02 16:05 [cip-dev] [PATCH 4.4.y-cip 0/9] Add RZ/G1H WDT/Thermal/CMT/MSIOF support Biju Das
` (3 preceding siblings ...)
2020-09-02 16:05 ` [cip-dev] [PATCH 4.4.y-cip 3/9] ARM: dts: r8a7742-iwg21d-q7: Add RWDT support Biju Das
@ 2020-09-02 16:05 ` Biju Das
2020-09-02 16:05 ` [cip-dev] [PATCH 4.4.y-cip 4/9] dt-bindings: thermal: rcar-thermal: Add device tree support for r8a7742 Biju Das
` (8 subsequent siblings)
13 siblings, 0 replies; 17+ messages in thread
From: Biju Das @ 2020-09-02 16:05 UTC (permalink / raw)
To: cip-dev, Nobuhiro Iwamatsu, Pavel Machek
Cc: Chris Paterson, Biju Das, Prabhakar Mahadev Lad
[-- Attachment #1: Type: text/plain, Size: 2163 bytes --]
From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
commit b3850cd90edc0baad2ec47293f4ec3c929de6f76 upstream.
Enable the SDHI2 controller on iWave RZ/G1H carrier board.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Link: https://lore.kernel.org/r/1590420129-7531-3-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
[biju: removed sd-uhs-sdr50 property, since voltage switching is not supported in 4.4 kernel]
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
arch/arm/boot/dts/r8a7742-iwg21d-q7.dts | 39 +++++++++++++++++++++++++
1 file changed, 39 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7742-iwg21d-q7.dts b/arch/arm/boot/dts/r8a7742-iwg21d-q7.dts
index 8ce82ad3d946..82abbb758046 100644
--- a/arch/arm/boot/dts/r8a7742-iwg21d-q7.dts
+++ b/arch/arm/boot/dts/r8a7742-iwg21d-q7.dts
@@ -21,6 +21,28 @@
bootargs = "ignore_loglevel root=/dev/mmcblk0p1 rw rootwait";
stdout-path = "serial2:115200n8";
};
+
+ vcc_sdhi2: regulator-vcc-sdhi2 {
+ compatible = "regulator-fixed";
+
+ regulator-name = "SDHI2 Vcc";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+
+ gpio = <&gpio1 27 GPIO_ACTIVE_LOW>;
+ };
+
+ vccq_sdhi2: regulator-vccq-sdhi2 {
+ compatible = "regulator-gpio";
+
+ regulator-name = "SDHI2 VccQ";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3300000>;
+
+ gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>;
+ gpios-states = <1>;
+ states = <3300000 1>, <1800000 0>;
+ };
};
&avb {
@@ -48,6 +70,12 @@
groups = "scifa2_data_c";
function = "scifa2";
};
+
+ sdhi2_pins: sd2 {
+ groups = "sdhi2_data4", "sdhi2_ctrl";
+ function = "sdhi2";
+ power-source = <3300>;
+ };
};
&scifa2 {
@@ -56,3 +84,14 @@
status = "okay";
};
+
+&sdhi2 {
+ pinctrl-0 = <&sdhi2_pins>;
+ pinctrl-names = "default";
+
+ vmmc-supply = <&vcc_sdhi2>;
+ vqmmc-supply = <&vccq_sdhi2>;
+ cd-gpios = <&gpio3 22 GPIO_ACTIVE_LOW>;
+ wp-gpios = <&gpio3 23 GPIO_ACTIVE_HIGH>;
+ status = "okay";
+};
--
2.17.1
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^ permalink raw reply related [flat|nested] 17+ messages in thread* [cip-dev] [PATCH 4.4.y-cip 4/9] dt-bindings: thermal: rcar-thermal: Add device tree support for r8a7742
2020-09-02 16:05 [cip-dev] [PATCH 4.4.y-cip 0/9] Add RZ/G1H WDT/Thermal/CMT/MSIOF support Biju Das
` (4 preceding siblings ...)
2020-09-02 16:05 ` [cip-dev] [PATCH 4.4.y-cip 4/5] ARM: dts: r8a7742-iwg21d-q7: Enable SDHI2 controller Biju Das
@ 2020-09-02 16:05 ` Biju Das
2020-09-02 16:05 ` [cip-dev] [PATCH 4.4.y-cip 5/9] ARM: dts: r8a7742: Add thermal device to DT Biju Das
` (7 subsequent siblings)
13 siblings, 0 replies; 17+ messages in thread
From: Biju Das @ 2020-09-02 16:05 UTC (permalink / raw)
To: cip-dev, Nobuhiro Iwamatsu, Pavel Machek
Cc: Chris Paterson, Biju Das, Prabhakar Mahadev Lad
[-- Attachment #1: Type: text/plain, Size: 1494 bytes --]
From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
commit fafcc40fd5261db9de1cef34f9a0694bad507504 upstream.
Add thermal sensor support for r8a7742 SoC. The Renesas RZ/G1H
(r8a7742) thermal sensor module is identical to the R-Car Gen2 family.
No driver change is needed due to the fallback compatible value
"renesas,rcar-gen2-thermal".
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Rob Herring <robh@kernel.org>
[biju: Patched text version of bindings file]
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
Documentation/devicetree/bindings/thermal/rcar-thermal.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/thermal/rcar-thermal.txt b/Documentation/devicetree/bindings/thermal/rcar-thermal.txt
index 1e0f8377a949..0772137fa6cc 100644
--- a/Documentation/devicetree/bindings/thermal/rcar-thermal.txt
+++ b/Documentation/devicetree/bindings/thermal/rcar-thermal.txt
@@ -6,6 +6,7 @@ Required properties:
"renesas,rcar-thermal" (without thermal-zone) as fallback.
Examples with soctypes are:
- "renesas,thermal-r8a73a4" (R-Mobile APE6)
+ - "renesas,thermal-r8a7742" (RZ/G1H)
- "renesas,thermal-r8a7743" (RZ/G1M)
- "renesas,thermal-r8a7744" (RZ/G1N)
- "renesas,thermal-r8a7779" (R-Car H1)
--
2.17.1
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^ permalink raw reply related [flat|nested] 17+ messages in thread* [cip-dev] [PATCH 4.4.y-cip 5/9] ARM: dts: r8a7742: Add thermal device to DT
2020-09-02 16:05 [cip-dev] [PATCH 4.4.y-cip 0/9] Add RZ/G1H WDT/Thermal/CMT/MSIOF support Biju Das
` (5 preceding siblings ...)
2020-09-02 16:05 ` [cip-dev] [PATCH 4.4.y-cip 4/9] dt-bindings: thermal: rcar-thermal: Add device tree support for r8a7742 Biju Das
@ 2020-09-02 16:05 ` Biju Das
2020-09-02 16:05 ` [cip-dev] [PATCH 4.4.y-cip 5/5] ARM: dts: renesas: Fix SD Card/eMMC interface device node names Biju Das
` (6 subsequent siblings)
13 siblings, 0 replies; 17+ messages in thread
From: Biju Das @ 2020-09-02 16:05 UTC (permalink / raw)
To: cip-dev, Nobuhiro Iwamatsu, Pavel Machek
Cc: Chris Paterson, Biju Das, Prabhakar Mahadev Lad
[-- Attachment #1: Type: text/plain, Size: 1933 bytes --]
From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
commit 937c9ebddc09284dc947afaae52c76d05ee1dcfd upstream.
This patch instantiates the thermal sensor module with thermal-zone
support.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Link: https://lore.kernel.org/r/1590614320-30160-3-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
[biju: changed clocks and power-domain properties, removed resets property]
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
arch/arm/boot/dts/r8a7742.dtsi | 29 +++++++++++++++++++++++++++++
1 file changed, 29 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7742.dtsi b/arch/arm/boot/dts/r8a7742.dtsi
index 50f70b358bce..97bedc13f702 100644
--- a/arch/arm/boot/dts/r8a7742.dtsi
+++ b/arch/arm/boot/dts/r8a7742.dtsi
@@ -736,6 +736,16 @@
power-domains = <&cpg_clocks>;
};
+ thermal: thermal@e61f0000 {
+ compatible = "renesas,thermal-r8a7742",
+ "renesas,rcar-gen2-thermal";
+ reg = <0 0xe61f0000 0 0x10>, <0 0xe61f0100 0 0x38>;
+ interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&mstp5_clks R8A7742_CLK_THERMAL>;
+ power-domains = <&cpg_clocks>;
+ #thermal-sensor-cells = <0>;
+ };
+
icram0: sram@e63a0000 {
compatible = "mmio-sram";
reg = <0 0xe63a0000 0 0x12000>;
@@ -1065,6 +1075,25 @@
};
};
+ thermal-zones {
+ cpu_thermal: cpu-thermal {
+ polling-delay-passive = <0>;
+ polling-delay = <0>;
+
+ thermal-sensors = <&thermal>;
+
+ trips {
+ cpu-crit {
+ temperature = <95000>;
+ hysteresis = <0>;
+ type = "critical";
+ };
+ };
+ cooling-maps {
+ };
+ };
+ };
+
timer {
compatible = "arm,armv7-timer";
interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
--
2.17.1
[-- Attachment #2: Type: text/plain, Size: 419 bytes --]
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^ permalink raw reply related [flat|nested] 17+ messages in thread* [cip-dev] [PATCH 4.4.y-cip 5/5] ARM: dts: renesas: Fix SD Card/eMMC interface device node names
2020-09-02 16:05 [cip-dev] [PATCH 4.4.y-cip 0/9] Add RZ/G1H WDT/Thermal/CMT/MSIOF support Biju Das
` (6 preceding siblings ...)
2020-09-02 16:05 ` [cip-dev] [PATCH 4.4.y-cip 5/9] ARM: dts: r8a7742: Add thermal device to DT Biju Das
@ 2020-09-02 16:05 ` Biju Das
2020-09-02 16:05 ` [cip-dev] [PATCH 4.4.y-cip 6/9] ARM: dts: r8a7742: Add CMT SoC specific support Biju Das
` (5 subsequent siblings)
13 siblings, 0 replies; 17+ messages in thread
From: Biju Das @ 2020-09-02 16:05 UTC (permalink / raw)
To: cip-dev, Nobuhiro Iwamatsu, Pavel Machek
Cc: Chris Paterson, Biju Das, Prabhakar Mahadev Lad
[-- Attachment #1: Type: text/plain, Size: 6601 bytes --]
From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
commit d8293670ae46e84973c974ea5745527e90a8afbb upstream.
Fix the device node names as "mmc@".
Fixes: 66474697923c ("ARM: dts: r7s72100: add sdhi to device tree")
Fixes: a49f76cddaee ("ARM: dts: r7s9210: Add SDHI support")
Fixes: 43304a5f5106 ("ARM: shmobile: r8a73a4: tidyup DT node naming")
Fixes: 7d907894bfe3 ("ARM: shmobile: r8a7740: tidyup DT node naming")
Fixes: 3ab2ea5fd1ce ("ARM: dts: r8a7742: Add SDHI nodes")
Fixes: 63ce8a617b51 ("ARM: dts: r8a7743: Add SDHI controllers")
Fixes: b591e323b271 ("ARM: dts: r8a7744: Add SDHI nodes")
Fixes: d83010f87ab3 ("ARM: dts: r8a7744: Initial SoC device tree")
Fixes: 7079131ef9b9 ("ARM: dts: r8a7745: Add SDHI controllers")
Fixes: 0485da788028 ("ARM: dts: r8a77470: Add SDHI1 support")
Fixes: 15aa5a95e820 ("ARM: dts: r8a77470: Add SDHI0 support")
Fixes: f068cc816015 ("ARM: dts: r8a77470: Add SDHI2 support")
Fixes: 14e1d9147d96 ("ARM: shmobile: r8a7778: tidyup DT node naming")
Fixes: 2624705ceb7b ("ARM: shmobile: r8a7779: tidyup DT node naming")
Fixes: b718aa448378 ("ARM: shmobile: r8a7790: tidyup DT node naming")
Fixes: b7ed8a0dd4f1 ("ARM: shmobile: Add SDHI devices to r8a7791 DTSI")
Fixes: ce01b14ecf19 ("ARM: dts: r8a7792: add SDHI support")
Fixes: fc9ee228f500 ("ARM: dts: r8a7793: Add SDHI controllers")
Fixes: b8e8ea127d00 ("ARM: shmobile: r8a7794: add SDHI DT support")
Fixes: 33f6be3bf6b7 ("ARM: shmobile: sh73a0: tidyup DT node naming")
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/1594382936-14114-1-git-send-email-yoshihiro.shimoda.uh@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
[biju: Ported the changes only for RZG1[HMNEC] SoC's]
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
arch/arm/boot/dts/r8a7742.dtsi | 8 ++++----
arch/arm/boot/dts/r8a7743.dtsi | 6 +++---
arch/arm/boot/dts/r8a7744.dtsi | 6 +++---
arch/arm/boot/dts/r8a7745.dtsi | 6 +++---
arch/arm/boot/dts/r8a77470.dtsi | 6 +++---
5 files changed, 16 insertions(+), 16 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7742.dtsi b/arch/arm/boot/dts/r8a7742.dtsi
index f4d571b4a4db..fd4da0d6269e 100644
--- a/arch/arm/boot/dts/r8a7742.dtsi
+++ b/arch/arm/boot/dts/r8a7742.dtsi
@@ -955,7 +955,7 @@
status = "disabled";
};
- sdhi0: sd@ee100000 {
+ sdhi0: mmc@ee100000 {
compatible = "renesas,sdhi-r8a7742",
"renesas,rcar-gen2-sdhi";
reg = <0 0xee100000 0 0x328>;
@@ -969,7 +969,7 @@
status = "disabled";
};
- sdhi1: sd@ee120000 {
+ sdhi1: mmc@ee120000 {
compatible = "renesas,sdhi-r8a7742",
"renesas,rcar-gen2-sdhi";
reg = <0 0xee120000 0 0x328>;
@@ -983,7 +983,7 @@
status = "disabled";
};
- sdhi2: sd@ee140000 {
+ sdhi2: mmc@ee140000 {
compatible = "renesas,sdhi-r8a7742",
"renesas,rcar-gen2-sdhi";
reg = <0 0xee140000 0 0x100>;
@@ -997,7 +997,7 @@
status = "disabled";
};
- sdhi3: sd@ee160000 {
+ sdhi3: mmc@ee160000 {
compatible = "renesas,sdhi-r8a7742",
"renesas,rcar-gen2-sdhi";
reg = <0 0xee160000 0 0x100>;
diff --git a/arch/arm/boot/dts/r8a7743.dtsi b/arch/arm/boot/dts/r8a7743.dtsi
index 9ea92a367e86..aff5ebbdb4bd 100644
--- a/arch/arm/boot/dts/r8a7743.dtsi
+++ b/arch/arm/boot/dts/r8a7743.dtsi
@@ -902,7 +902,7 @@
status = "disabled";
};
- sdhi0: sd@ee100000 {
+ sdhi0: mmc@ee100000 {
compatible = "renesas,sdhi-r8a7743";
reg = <0 0xee100000 0 0x328>;
interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
@@ -915,7 +915,7 @@
status = "disabled";
};
- sdhi1: sd@ee140000 {
+ sdhi1: mmc@ee140000 {
compatible = "renesas,sdhi-r8a7743";
reg = <0 0xee140000 0 0x100>;
interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
@@ -928,7 +928,7 @@
status = "disabled";
};
- sdhi2: sd@ee160000 {
+ sdhi2: mmc@ee160000 {
compatible = "renesas,sdhi-r8a7743";
reg = <0 0xee160000 0 0x100>;
interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
diff --git a/arch/arm/boot/dts/r8a7744.dtsi b/arch/arm/boot/dts/r8a7744.dtsi
index 9e1885ce4948..079f46f17049 100644
--- a/arch/arm/boot/dts/r8a7744.dtsi
+++ b/arch/arm/boot/dts/r8a7744.dtsi
@@ -1360,7 +1360,7 @@
};
};
- sdhi0: sd@ee100000 {
+ sdhi0: mmc@ee100000 {
compatible = "renesas,sdhi-r8a7744";
reg = <0 0xee100000 0 0x328>;
interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
@@ -1373,7 +1373,7 @@
status = "disabled";
};
- sdhi1: sd@ee140000 {
+ sdhi1: mmc@ee140000 {
compatible = "renesas,sdhi-r8a7744";
reg = <0 0xee140000 0 0x100>;
interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
@@ -1386,7 +1386,7 @@
status = "disabled";
};
- sdhi2: sd@ee160000 {
+ sdhi2: mmc@ee160000 {
compatible = "renesas,sdhi-r8a7744";
reg = <0 0xee160000 0 0x100>;
interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
diff --git a/arch/arm/boot/dts/r8a7745.dtsi b/arch/arm/boot/dts/r8a7745.dtsi
index 54b556b34663..5f603d9eafea 100644
--- a/arch/arm/boot/dts/r8a7745.dtsi
+++ b/arch/arm/boot/dts/r8a7745.dtsi
@@ -1211,7 +1211,7 @@
};
};
- sdhi0: sd@ee100000 {
+ sdhi0: mmc@ee100000 {
compatible = "renesas,sdhi-r8a7745";
reg = <0 0xee100000 0 0x328>;
interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
@@ -1224,7 +1224,7 @@
status = "disabled";
};
- sdhi1: sd@ee140000 {
+ sdhi1: mmc@ee140000 {
compatible = "renesas,sdhi-r8a7745";
reg = <0 0xee140000 0 0x100>;
interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
@@ -1237,7 +1237,7 @@
status = "disabled";
};
- sdhi2: sd@ee160000 {
+ sdhi2: mmc@ee160000 {
compatible = "renesas,sdhi-r8a7745";
reg = <0 0xee160000 0 0x100>;
interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
diff --git a/arch/arm/boot/dts/r8a77470.dtsi b/arch/arm/boot/dts/r8a77470.dtsi
index dc345754ce61..1057bff76cc8 100644
--- a/arch/arm/boot/dts/r8a77470.dtsi
+++ b/arch/arm/boot/dts/r8a77470.dtsi
@@ -664,7 +664,7 @@
status = "disabled";
};
- sdhi0: sd@ee100000 {
+ sdhi0: mmc@ee100000 {
compatible = "renesas,sdhi-r8a77470",
"renesas,rcar-gen2-sdhi";
reg = <0 0xee100000 0 0x328>;
@@ -678,7 +678,7 @@
status = "disabled";
};
- sdhi1: sd@ee300000 {
+ sdhi1: mmc@ee300000 {
compatible = "renesas,sdhi-mmc-r8a77470";
reg = <0 0xee300000 0 0x2000>;
interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
@@ -688,7 +688,7 @@
status = "disabled";
};
- sdhi2: sd@ee160000 {
+ sdhi2: mmc@ee160000 {
compatible = "renesas,sdhi-r8a77470",
"renesas,rcar-gen2-sdhi";
reg = <0 0xee160000 0 0x328>;
--
2.17.1
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^ permalink raw reply related [flat|nested] 17+ messages in thread* [cip-dev] [PATCH 4.4.y-cip 6/9] ARM: dts: r8a7742: Add CMT SoC specific support
2020-09-02 16:05 [cip-dev] [PATCH 4.4.y-cip 0/9] Add RZ/G1H WDT/Thermal/CMT/MSIOF support Biju Das
` (7 preceding siblings ...)
2020-09-02 16:05 ` [cip-dev] [PATCH 4.4.y-cip 5/5] ARM: dts: renesas: Fix SD Card/eMMC interface device node names Biju Das
@ 2020-09-02 16:05 ` Biju Das
2020-09-02 16:05 ` [cip-dev] [PATCH 4.4.y-cip 7/9] spi: renesas,sh-msiof: Add r8a7742 support Biju Das
` (4 subsequent siblings)
13 siblings, 0 replies; 17+ messages in thread
From: Biju Das @ 2020-09-02 16:05 UTC (permalink / raw)
To: cip-dev, Nobuhiro Iwamatsu, Pavel Machek
Cc: Chris Paterson, Biju Das, Prabhakar Mahadev Lad
[-- Attachment #1: Type: text/plain, Size: 2168 bytes --]
From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
commit 5818cc37e7fc72d9f2da255d9648c5f2e1a33b22 upstream.
Add CMT[01] support to r8a7742 SoC DT.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Link: https://lore.kernel.org/r/1590614320-30160-5-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
[biju: changed clocks and power-domain properties, removed resets property, added renesas,channel-mask property]
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
arch/arm/boot/dts/r8a7742.dtsi | 36 ++++++++++++++++++++++++++++++++++
1 file changed, 36 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7742.dtsi b/arch/arm/boot/dts/r8a7742.dtsi
index 97bedc13f702..ada98d3fe290 100644
--- a/arch/arm/boot/dts/r8a7742.dtsi
+++ b/arch/arm/boot/dts/r8a7742.dtsi
@@ -1073,6 +1073,42 @@
clock-names = "clk";
power-domains = <&cpg_clocks>;
};
+
+ cmt0: timer@ffca0000 {
+ compatible = "renesas,cmt-48-r8a7742",
+ "renesas,cmt-48-gen2";
+ reg = <0 0xffca0000 0 0x1004>;
+ interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&mstp1_clks R8A7742_CLK_CMT0>;
+ clock-names = "fck";
+ power-domains = <&cpg_clocks>;
+
+ renesas,channels-mask = <0x60>;
+
+ status = "disabled";
+ };
+
+ cmt1: timer@e6130000 {
+ compatible = "renesas,cmt-48-r8a7742",
+ "renesas,cmt-48-gen2";
+ reg = <0 0xe6130000 0 0x1004>;
+ interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&mstp3_clks R8A7742_CLK_CMT1>;
+ clock-names = "fck";
+ power-domains = <&cpg_clocks>;
+
+ renesas,channels-mask = <0xff>;
+
+ status = "disabled";
+ };
};
thermal-zones {
--
2.17.1
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^ permalink raw reply related [flat|nested] 17+ messages in thread* [cip-dev] [PATCH 4.4.y-cip 7/9] spi: renesas,sh-msiof: Add r8a7742 support
2020-09-02 16:05 [cip-dev] [PATCH 4.4.y-cip 0/9] Add RZ/G1H WDT/Thermal/CMT/MSIOF support Biju Das
` (8 preceding siblings ...)
2020-09-02 16:05 ` [cip-dev] [PATCH 4.4.y-cip 6/9] ARM: dts: r8a7742: Add CMT SoC specific support Biju Das
@ 2020-09-02 16:05 ` Biju Das
2020-09-02 16:05 ` [cip-dev] [PATCH 4.4.y-cip 8/9] ARM: dts: r8a7742: Add MSIOF[0123] support Biju Das
` (3 subsequent siblings)
13 siblings, 0 replies; 17+ messages in thread
From: Biju Das @ 2020-09-02 16:05 UTC (permalink / raw)
To: cip-dev, Nobuhiro Iwamatsu, Pavel Machek
Cc: Chris Paterson, Biju Das, Prabhakar Mahadev Lad
[-- Attachment #1: Type: text/plain, Size: 1365 bytes --]
From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
commit 6383b118efafff8cce8fc8fa5b7e893a523b698f upstream.
Document RZ/G1H (R8A7742) SoC bindings.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/1591736054-568-2-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Mark Brown <broonie@kernel.org>
[biju: Patched text version of bindings file]
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
Documentation/devicetree/bindings/spi/sh-msiof.txt | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/spi/sh-msiof.txt b/Documentation/devicetree/bindings/spi/sh-msiof.txt
index 7a20ec6a595e..80aa70517dd2 100644
--- a/Documentation/devicetree/bindings/spi/sh-msiof.txt
+++ b/Documentation/devicetree/bindings/spi/sh-msiof.txt
@@ -1,7 +1,8 @@
Renesas MSIOF spi controller
Required properties:
-- compatible : "renesas,msiof-r8a7743" (RZ/G1M)
+- compatible : "renesas,msiof-r8a7742" (RZ/G1H)
+ "renesas,msiof-r8a7743" (RZ/G1M)
"renesas,msiof-r8a7745" (RZ/G1E)
"renesas,msiof-r8a7790" (R-Car H2)
"renesas,msiof-r8a7791" (R-Car M2-W)
--
2.17.1
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^ permalink raw reply related [flat|nested] 17+ messages in thread* [cip-dev] [PATCH 4.4.y-cip 8/9] ARM: dts: r8a7742: Add MSIOF[0123] support
2020-09-02 16:05 [cip-dev] [PATCH 4.4.y-cip 0/9] Add RZ/G1H WDT/Thermal/CMT/MSIOF support Biju Das
` (9 preceding siblings ...)
2020-09-02 16:05 ` [cip-dev] [PATCH 4.4.y-cip 7/9] spi: renesas,sh-msiof: Add r8a7742 support Biju Das
@ 2020-09-02 16:05 ` Biju Das
2020-09-02 16:05 ` [cip-dev] [PATCH 4.4.y-cip 9/9] ARM: dts: r8a7742-iwg21d-q7: Enable cmt0 Biju Das
` (2 subsequent siblings)
13 siblings, 0 replies; 17+ messages in thread
From: Biju Das @ 2020-09-02 16:05 UTC (permalink / raw)
To: cip-dev, Nobuhiro Iwamatsu, Pavel Machek
Cc: Chris Paterson, Biju Das, Prabhakar Mahadev Lad
[-- Attachment #1: Type: text/plain, Size: 3017 bytes --]
From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
commit 4b0ee283de6c525478c98d3b3d15a4aed7d96de6 upstream.
Add the DT nodes needed by MSIOF[0123] interfaces to the SoC dtsi.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Link: https://lore.kernel.org/r/1591736054-568-3-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
[biju: changed clocks and power-domain properties, removed resets property]
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
arch/arm/boot/dts/r8a7742.dtsi | 60 ++++++++++++++++++++++++++++++++++
1 file changed, 60 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7742.dtsi b/arch/arm/boot/dts/r8a7742.dtsi
index ada98d3fe290..694b20354575 100644
--- a/arch/arm/boot/dts/r8a7742.dtsi
+++ b/arch/arm/boot/dts/r8a7742.dtsi
@@ -975,6 +975,66 @@
status = "disabled";
};
+ msiof0: spi@e6e20000 {
+ compatible = "renesas,msiof-r8a7742",
+ "renesas,rcar-gen2-msiof";
+ reg = <0 0xe6e20000 0 0x0064>;
+ interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&mstp0_clks R8A7742_CLK_MSIOF0>;
+ dmas = <&dmac0 0x51>, <&dmac0 0x52>,
+ <&dmac1 0x51>, <&dmac1 0x52>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&cpg_clocks>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ msiof1: spi@e6e10000 {
+ compatible = "renesas,msiof-r8a7742",
+ "renesas,rcar-gen2-msiof";
+ reg = <0 0xe6e10000 0 0x0064>;
+ interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&mstp2_clks R8A7742_CLK_MSIOF1>;
+ dmas = <&dmac0 0x55>, <&dmac0 0x56>,
+ <&dmac1 0x55>, <&dmac1 0x56>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&cpg_clocks>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ msiof2: spi@e6e00000 {
+ compatible = "renesas,msiof-r8a7742",
+ "renesas,rcar-gen2-msiof";
+ reg = <0 0xe6e00000 0 0x0064>;
+ interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&mstp2_clks R8A7742_CLK_MSIOF2>;
+ dmas = <&dmac0 0x41>, <&dmac0 0x42>,
+ <&dmac1 0x41>, <&dmac1 0x42>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&cpg_clocks>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ msiof3: spi@e6c90000 {
+ compatible = "renesas,msiof-r8a7742",
+ "renesas,rcar-gen2-msiof";
+ reg = <0 0xe6c90000 0 0x0064>;
+ interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&mstp2_clks R8A7742_CLK_MSIOF3>;
+ dmas = <&dmac0 0x45>, <&dmac0 0x46>,
+ <&dmac1 0x45>, <&dmac1 0x46>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&cpg_clocks>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
sdhi0: mmc@ee100000 {
compatible = "renesas,sdhi-r8a7742",
"renesas,rcar-gen2-sdhi";
--
2.17.1
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^ permalink raw reply related [flat|nested] 17+ messages in thread* [cip-dev] [PATCH 4.4.y-cip 9/9] ARM: dts: r8a7742-iwg21d-q7: Enable cmt0
2020-09-02 16:05 [cip-dev] [PATCH 4.4.y-cip 0/9] Add RZ/G1H WDT/Thermal/CMT/MSIOF support Biju Das
` (10 preceding siblings ...)
2020-09-02 16:05 ` [cip-dev] [PATCH 4.4.y-cip 8/9] ARM: dts: r8a7742: Add MSIOF[0123] support Biju Das
@ 2020-09-02 16:05 ` Biju Das
2020-09-02 16:24 ` [cip-dev] [PATCH 4.4.y-cip 0/9] Add RZ/G1H WDT/Thermal/CMT/MSIOF support Biju Das
2020-09-02 19:20 ` Pavel Machek
13 siblings, 0 replies; 17+ messages in thread
From: Biju Das @ 2020-09-02 16:05 UTC (permalink / raw)
To: cip-dev, Nobuhiro Iwamatsu, Pavel Machek
Cc: Chris Paterson, Biju Das, Prabhakar Mahadev Lad
[-- Attachment #1: Type: text/plain, Size: 1025 bytes --]
From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
commit 4304d880a1c3676f21e60dc3bb919ff6e7d10ebf upstream.
Enable cmt0 support on r8a7742-iwg21d-q7 board.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Link: https://lore.kernel.org/r/20200806183152.11809-2-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
[biju: Ported the patch from linux next]
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
arch/arm/boot/dts/r8a7742-iwg21d-q7.dts | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7742-iwg21d-q7.dts b/arch/arm/boot/dts/r8a7742-iwg21d-q7.dts
index 3197aa5852f9..1c7e58d47d73 100644
--- a/arch/arm/boot/dts/r8a7742-iwg21d-q7.dts
+++ b/arch/arm/boot/dts/r8a7742-iwg21d-q7.dts
@@ -60,6 +60,10 @@
};
};
+&cmt0 {
+ status = "okay";
+};
+
&pfc {
avb_pins: avb {
groups = "avb_mdio", "avb_gmii";
--
2.17.1
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^ permalink raw reply related [flat|nested] 17+ messages in thread* Re: [cip-dev] [PATCH 4.4.y-cip 0/9] Add RZ/G1H WDT/Thermal/CMT/MSIOF support
2020-09-02 16:05 [cip-dev] [PATCH 4.4.y-cip 0/9] Add RZ/G1H WDT/Thermal/CMT/MSIOF support Biju Das
` (11 preceding siblings ...)
2020-09-02 16:05 ` [cip-dev] [PATCH 4.4.y-cip 9/9] ARM: dts: r8a7742-iwg21d-q7: Enable cmt0 Biju Das
@ 2020-09-02 16:24 ` Biju Das
2020-09-02 19:20 ` Pavel Machek
13 siblings, 0 replies; 17+ messages in thread
From: Biju Das @ 2020-09-02 16:24 UTC (permalink / raw)
To: Biju Das, cip-dev, Nobuhiro Iwamatsu, Pavel Machek
Cc: Chris Paterson, Prabhakar Mahadev Lad
[-- Attachment #1: Type: text/plain, Size: 2635 bytes --]
Hi All,
By mistake, I have sent the following duplicate patches with this series.
1) https://patchwork.kernel.org/patch/11751131/ (ARM: dts: r8a7742: Add MMC0 node)
2) https://patchwork.kernel.org/patch/11751133/ (ARM: dts: r8a7742-iwg21d-q7: Enable SDHI2 controller)
3) https://patchwork.kernel.org/patch/11751121/ (ARM: dts: renesas: Fix SD Card/eMMC interface device node)
The above patches were sent as part of previous series[1]
[1] https://patchwork.kernel.org/project/cip-dev/list/?series=342183
Cheers,
Biju
> -----Original Message-----
> From: Biju Das <biju.das.jz@bp.renesas.com>
> Sent: 02 September 2020 17:05
> To: cip-dev@lists.cip-project.org; Nobuhiro Iwamatsu
> <nobuhiro1.iwamatsu@toshiba.co.jp>; Pavel Machek <pavel@denx.de>
> Cc: Chris Paterson <Chris.Paterson2@renesas.com>; Biju Das
> <biju.das.jz@bp.renesas.com>; Prabhakar Mahadev Lad
> <prabhakar.mahadev-lad.rj@bp.renesas.com>
> Subject: [PATCH 4.4.y-cip 0/9] Add RZ/G1H WDT/Thermal/CMT/MSIOF
> support
>
> This patch series add WDT/Thermal/CMT/MSIOF support for iWave RZ/G1H
> board based on
> r8a7742 SoC to 4.4.y-cip kernel. All patches in this series except last one are
> cherry-picked from mainline. The patch "ARM: dts: r8a7742-iwg21d-q7:
> Enable cmt0"
> is ported from linux next.
>
> This patch is depend on [1]
> [1] https://patchwork.kernel.org/project/cip-dev/list/?series=342183
>
> Lad Prabhakar (9):
> dt-bindings: watchdog: renesas,wdt: Document r8a7742 support
> ARM: dts: r8a7742: Add RWDT node
> ARM: dts: r8a7742-iwg21d-q7: Add RWDT support
> dt-bindings: thermal: rcar-thermal: Add device tree support for
> r8a7742
> ARM: dts: r8a7742: Add thermal device to DT
> ARM: dts: r8a7742: Add CMT SoC specific support
> spi: renesas,sh-msiof: Add r8a7742 support
> ARM: dts: r8a7742: Add MSIOF[0123] support
> ARM: dts: r8a7742-iwg21d-q7: Enable cmt0
>
> .../devicetree/bindings/spi/sh-msiof.txt | 3 +-
> .../bindings/thermal/rcar-thermal.txt | 1 +
> .../bindings/watchdog/renesas-wdt.txt | 1 +
> arch/arm/boot/dts/r8a7742-iwg21d-q7.dts | 9 ++
> arch/arm/boot/dts/r8a7742.dtsi | 135 ++++++++++++++++++
> 5 files changed, 148 insertions(+), 1 deletion(-)
>
> --
> 2.17.1
Renesas Electronics Europe GmbH, Geschaeftsfuehrer/President: Carsten Jauch, Sitz der Gesellschaft/Registered office: Duesseldorf, Arcadiastrasse 10, 40472 Duesseldorf, Germany, Handelsregister/Commercial Register: Duesseldorf, HRB 3708 USt-IDNr./Tax identification no.: DE 119353406 WEEE-Reg.-Nr./WEEE reg. no.: DE 14978647
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^ permalink raw reply [flat|nested] 17+ messages in thread* Re: [cip-dev] [PATCH 4.4.y-cip 0/9] Add RZ/G1H WDT/Thermal/CMT/MSIOF support
2020-09-02 16:05 [cip-dev] [PATCH 4.4.y-cip 0/9] Add RZ/G1H WDT/Thermal/CMT/MSIOF support Biju Das
` (12 preceding siblings ...)
2020-09-02 16:24 ` [cip-dev] [PATCH 4.4.y-cip 0/9] Add RZ/G1H WDT/Thermal/CMT/MSIOF support Biju Das
@ 2020-09-02 19:20 ` Pavel Machek
2020-09-03 6:19 ` Nobuhiro Iwamatsu
13 siblings, 1 reply; 17+ messages in thread
From: Pavel Machek @ 2020-09-02 19:20 UTC (permalink / raw)
To: Biju Das
Cc: cip-dev, Nobuhiro Iwamatsu, Pavel Machek, Chris Paterson,
Prabhakar Mahadev Lad
[-- Attachment #1.1: Type: text/plain, Size: 503 bytes --]
Hi!
> This patch series add WDT/Thermal/CMT/MSIOF support for iWave RZ/G1H board based on
> r8a7742 SoC to 4.4.y-cip kernel. All patches in this series except last one
> are cherry-picked from mainline. The patch "ARM: dts: r8a7742-iwg21d-q7: Enable cmt0"
> is ported from linux next.
The patches look good to me.
Best regards,
Pavel
--
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
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^ permalink raw reply [flat|nested] 17+ messages in thread* Re: [cip-dev] [PATCH 4.4.y-cip 0/9] Add RZ/G1H WDT/Thermal/CMT/MSIOF support
2020-09-02 19:20 ` Pavel Machek
@ 2020-09-03 6:19 ` Nobuhiro Iwamatsu
0 siblings, 0 replies; 17+ messages in thread
From: Nobuhiro Iwamatsu @ 2020-09-03 6:19 UTC (permalink / raw)
To: pavel, biju.das.jz; +Cc: cip-dev, chris.paterson2, prabhakar.mahadev-lad.rj
[-- Attachment #1: Type: text/plain, Size: 1014 bytes --]
Hi,
> -----Original Message-----
> From: Pavel Machek [mailto:pavel@denx.de]
> Sent: Thursday, September 3, 2020 4:20 AM
> To: Biju Das <biju.das.jz@bp.renesas.com>
> Cc: cip-dev@lists.cip-project.org; iwamatsu nobuhiro(岩松 信洋 □ＳＷＣ◯ＡＣＴ)
> <nobuhiro1.iwamatsu@toshiba.co.jp>; Pavel Machek <pavel@denx.de>; Chris Paterson <chris.paterson2@renesas.com>;
> Prabhakar Mahadev Lad <prabhakar.mahadev-lad.rj@bp.renesas.com>
> Subject: Re: [PATCH 4.4.y-cip 0/9] Add RZ/G1H WDT/Thermal/CMT/MSIOF support
>
> Hi!
>
> > This patch series add WDT/Thermal/CMT/MSIOF support for iWave RZ/G1H board based on
> > r8a7742 SoC to 4.4.y-cip kernel. All patches in this series except last one
> > are cherry-picked from mainline. The patch "ARM: dts: r8a7742-iwg21d-q7: Enable cmt0"
> > is ported from linux next.
>
> The patches look good to me.
>
This patch series looks good to me, too.
I applied and pushed now
> Best regards,
> Pavel
Best regards,
Nobuhiro
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