From: Robin Murphy <robin.murphy@arm.com>
To: Krishna Reddy <vdumpa@nvidia.com>
Cc: Sachin Nikam <Snikam@nvidia.com>,
"Thomas Zeng (SW-TEGRA)" <thomasz@nvidia.com>,
Juha Tukkinen <jtukkinen@nvidia.com>,
Mikko Perttunen <mperttunen@nvidia.com>,
Pritesh Raithatha <praithatha@nvidia.com>,
"iommu@lists.linux-foundation.org"
<iommu@lists.linux-foundation.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
Timo Alho <talho@nvidia.com>, Yu-Huan Hsu <YHsu@nvidia.com>,
"linux-tegra@vger.kernel.org" <linux-tegra@vger.kernel.org>,
Thierry Reding <treding@nvidia.com>,
Alexander Van Brunt <avanbrunt@nvidia.com>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>,
"will.deacon@arm.com" <will.deacon@arm.com>,
"joro@8bytes.org" <joro@8bytes.org>
Subject: Re: [PATCH 6/7] arm64: tegra: Add DT node for T194 SMMU
Date: Fri, 30 Aug 2019 18:45:34 +0100 [thread overview]
Message-ID: <da30773d-5831-7cc6-4d82-b304d9b8a29b@arm.com> (raw)
In-Reply-To: <BYAPR12MB2710BDF98FA472A77D106814B3BD0@BYAPR12MB2710.namprd12.prod.outlook.com>
On 30/08/2019 18:25, Krishna Reddy wrote:
>>> + #global-interrupts = <1>;
>
>> Shouldn't that be 3?
>
> Interrupt line is shared between global and all context faults for each SMMU instance.
> Nvidia implementation checks for both Global and context faults on each interrupt to an SMMU instance.
> It can be either 1 or 3. If we make it 3, we need to add two more irq entries in node for context faults.
The number of global interrupts has never been related to the number of
context interrupts :/
> In the future, we can update arm-smmu.c to support shared interrupt line between global and all context faults.
Clearly you have one combined interrupt output per SMMU - describing
those as one global interrupt and the first two context bank interrupts
respectively makes far less sense than calling them 3 global interrupts,
not least because the latter is strictly true. Yes, the binding prevents
us from describing the context bank interrupts for more than one
instance, but at that point the fact that it *is* the combined output
saves us - because the driver is aware of this specific integration it
knows it can just register the "secondary" global interrupts as
"secondary" context interrupts too. If we had separate IRQ lines per
context bank per instance, then we'd have a really big problem and might
have to redefine the binding, but as it is it happens to work out pretty
neatly.
Robin.
WARNING: multiple messages have this Message-ID (diff)
From: Robin Murphy <robin.murphy@arm.com>
To: Krishna Reddy <vdumpa@nvidia.com>
Cc: Timo Alho <talho@nvidia.com>, Thierry Reding <treding@nvidia.com>,
Mikko Perttunen <mperttunen@nvidia.com>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"will.deacon@arm.com" <will.deacon@arm.com>,
"iommu@lists.linux-foundation.org"
<iommu@lists.linux-foundation.org>,
Pritesh Raithatha <praithatha@nvidia.com>,
"Thomas Zeng \(SW-TEGRA\)" <thomasz@nvidia.com>,
Sachin Nikam <Snikam@nvidia.com>,
"linux-tegra@vger.kernel.org" <linux-tegra@vger.kernel.org>,
Yu-Huan Hsu <YHsu@nvidia.com>,
Juha Tukkinen <jtukkinen@nvidia.com>,
Alexander Van Brunt <avanbrunt@nvidia.com>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>
Subject: Re: [PATCH 6/7] arm64: tegra: Add DT node for T194 SMMU
Date: Fri, 30 Aug 2019 18:45:34 +0100 [thread overview]
Message-ID: <da30773d-5831-7cc6-4d82-b304d9b8a29b@arm.com> (raw)
In-Reply-To: <BYAPR12MB2710BDF98FA472A77D106814B3BD0@BYAPR12MB2710.namprd12.prod.outlook.com>
On 30/08/2019 18:25, Krishna Reddy wrote:
>>> + #global-interrupts = <1>;
>
>> Shouldn't that be 3?
>
> Interrupt line is shared between global and all context faults for each SMMU instance.
> Nvidia implementation checks for both Global and context faults on each interrupt to an SMMU instance.
> It can be either 1 or 3. If we make it 3, we need to add two more irq entries in node for context faults.
The number of global interrupts has never been related to the number of
context interrupts :/
> In the future, we can update arm-smmu.c to support shared interrupt line between global and all context faults.
Clearly you have one combined interrupt output per SMMU - describing
those as one global interrupt and the first two context bank interrupts
respectively makes far less sense than calling them 3 global interrupts,
not least because the latter is strictly true. Yes, the binding prevents
us from describing the context bank interrupts for more than one
instance, but at that point the fact that it *is* the combined output
saves us - because the driver is aware of this specific integration it
knows it can just register the "secondary" global interrupts as
"secondary" context interrupts too. If we had separate IRQ lines per
context bank per instance, then we'd have a really big problem and might
have to redefine the binding, but as it is it happens to work out pretty
neatly.
Robin.
_______________________________________________
iommu mailing list
iommu@lists.linux-foundation.org
https://lists.linuxfoundation.org/mailman/listinfo/iommu
WARNING: multiple messages have this Message-ID (diff)
From: Robin Murphy <robin.murphy@arm.com>
To: Krishna Reddy <vdumpa@nvidia.com>
Cc: Timo Alho <talho@nvidia.com>, Thierry Reding <treding@nvidia.com>,
Mikko Perttunen <mperttunen@nvidia.com>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"joro@8bytes.org" <joro@8bytes.org>,
"will.deacon@arm.com" <will.deacon@arm.com>,
"iommu@lists.linux-foundation.org"
<iommu@lists.linux-foundation.org>,
Pritesh Raithatha <praithatha@nvidia.com>,
"Thomas Zeng \(SW-TEGRA\)" <thomasz@nvidia.com>,
Sachin Nikam <Snikam@nvidia.com>,
"linux-tegra@vger.kernel.org" <linux-tegra@vger.kernel.org>,
Yu-Huan Hsu <YHsu@nvidia.com>,
Juha Tukkinen <jtukkinen@nvidia.com>,
Alexander Van Brunt <avanbrunt@nvidia.com>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>
Subject: Re: [PATCH 6/7] arm64: tegra: Add DT node for T194 SMMU
Date: Fri, 30 Aug 2019 18:45:34 +0100 [thread overview]
Message-ID: <da30773d-5831-7cc6-4d82-b304d9b8a29b@arm.com> (raw)
In-Reply-To: <BYAPR12MB2710BDF98FA472A77D106814B3BD0@BYAPR12MB2710.namprd12.prod.outlook.com>
On 30/08/2019 18:25, Krishna Reddy wrote:
>>> + #global-interrupts = <1>;
>
>> Shouldn't that be 3?
>
> Interrupt line is shared between global and all context faults for each SMMU instance.
> Nvidia implementation checks for both Global and context faults on each interrupt to an SMMU instance.
> It can be either 1 or 3. If we make it 3, we need to add two more irq entries in node for context faults.
The number of global interrupts has never been related to the number of
context interrupts :/
> In the future, we can update arm-smmu.c to support shared interrupt line between global and all context faults.
Clearly you have one combined interrupt output per SMMU - describing
those as one global interrupt and the first two context bank interrupts
respectively makes far less sense than calling them 3 global interrupts,
not least because the latter is strictly true. Yes, the binding prevents
us from describing the context bank interrupts for more than one
instance, but at that point the fact that it *is* the combined output
saves us - because the driver is aware of this specific integration it
knows it can just register the "secondary" global interrupts as
"secondary" context interrupts too. If we had separate IRQ lines per
context bank per instance, then we'd have a really big problem and might
have to redefine the binding, but as it is it happens to work out pretty
neatly.
Robin.
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2019-08-30 17:45 UTC|newest]
Thread overview: 122+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-08-29 22:47 [PATCH 0/7] Nvidia Arm SMMUv2 Implementation Krishna Reddy
2019-08-29 22:47 ` Krishna Reddy
2019-08-29 22:47 ` Krishna Reddy
2019-08-29 22:47 ` Krishna Reddy
2019-08-29 22:47 ` [PATCH 1/7] iommu/arm-smmu: add Nvidia SMMUv2 implementation Krishna Reddy
2019-08-29 22:47 ` Krishna Reddy
2019-08-29 22:47 ` Krishna Reddy
2019-08-29 22:47 ` Krishna Reddy
2019-08-30 15:02 ` Robin Murphy
2019-08-30 15:02 ` Robin Murphy
2019-08-30 15:02 ` Robin Murphy
2019-08-30 18:16 ` Krishna Reddy
2019-08-30 18:16 ` Krishna Reddy
2019-08-30 18:16 ` Krishna Reddy
2019-08-30 18:16 ` Krishna Reddy
[not found] ` <BYAPR12MB2710D045303BE89A7D3FF2C1B3BD0-ZGDeBxoHBPnlX2Hc6Vgn3wdYzm3356FpvxpqHgZTriW3zl9H0oFU5g@public.gmane.org>
2019-09-02 13:39 ` Robin Murphy
2019-09-02 13:39 ` Robin Murphy
2019-09-02 13:39 ` Robin Murphy
2019-09-02 13:39 ` Robin Murphy
2019-09-03 1:07 ` Krishna Reddy
2019-09-03 1:07 ` Krishna Reddy
2019-09-03 1:07 ` Krishna Reddy
2019-09-03 1:07 ` Krishna Reddy
2019-08-29 22:47 ` [PATCH 2/7] dt-bindings: arm-smmu: Add binding for nvidia,smmu-v2 Krishna Reddy
2019-08-29 22:47 ` Krishna Reddy
2019-08-29 22:47 ` Krishna Reddy
2019-08-29 22:47 ` Krishna Reddy
2019-08-30 12:07 ` Mikko Perttunen
2019-08-30 12:07 ` [PATCH 2/7] dt-bindings: arm-smmu: Add binding for nvidia, smmu-v2 Mikko Perttunen
2019-08-30 12:07 ` Mikko Perttunen
2019-08-30 15:13 ` [PATCH 2/7] dt-bindings: arm-smmu: Add binding for nvidia,smmu-v2 Robin Murphy
2019-08-30 15:13 ` [PATCH 2/7] dt-bindings: arm-smmu: Add binding for nvidia, smmu-v2 Robin Murphy
2019-08-30 15:13 ` Robin Murphy
2019-08-30 18:12 ` [PATCH 2/7] dt-bindings: arm-smmu: Add binding for nvidia,smmu-v2 Krishna Reddy
2019-08-30 18:12 ` [PATCH 2/7] dt-bindings: arm-smmu: Add binding for nvidia, smmu-v2 Krishna Reddy
2019-08-30 18:12 ` Krishna Reddy
2019-08-30 18:12 ` [PATCH 2/7] dt-bindings: arm-smmu: Add binding for nvidia,smmu-v2 Krishna Reddy
2019-09-02 7:38 ` Thierry Reding
2019-09-02 7:38 ` [PATCH 2/7] dt-bindings: arm-smmu: Add binding for nvidia, smmu-v2 Thierry Reding
2019-09-02 7:38 ` Thierry Reding
2019-09-02 7:38 ` [PATCH 2/7] dt-bindings: arm-smmu: Add binding for nvidia,smmu-v2 Thierry Reding
2019-08-29 22:47 ` [PATCH 3/7] iommu/arm-smmu: Add tlb_sync implementation hook Krishna Reddy
2019-08-29 22:47 ` Krishna Reddy
2019-08-29 22:47 ` Krishna Reddy
2019-08-29 22:47 ` Krishna Reddy
2019-08-30 11:14 ` Thierry Reding
2019-08-30 11:14 ` Thierry Reding
2019-08-30 11:14 ` Thierry Reding
2019-08-30 19:00 ` Krishna Reddy
2019-08-30 19:00 ` Krishna Reddy
2019-08-30 19:00 ` Krishna Reddy
2019-08-30 19:00 ` Krishna Reddy
2019-08-30 15:23 ` Robin Murphy
2019-08-30 15:23 ` Robin Murphy
2019-08-30 15:23 ` Robin Murphy
2019-08-30 18:05 ` Krishna Reddy
2019-08-30 18:05 ` Krishna Reddy
2019-08-30 18:05 ` Krishna Reddy
2019-08-30 18:05 ` Krishna Reddy
2019-08-30 22:49 ` Krishna Reddy
2019-08-30 22:49 ` Krishna Reddy
2019-08-30 22:49 ` Krishna Reddy
2019-08-30 22:49 ` Krishna Reddy
2019-09-02 13:00 ` Robin Murphy
2019-09-02 13:00 ` Robin Murphy
2019-09-02 13:00 ` Robin Murphy
2019-09-02 13:00 ` Robin Murphy
2019-08-29 22:47 ` [PATCH 4/7] iommu/arm-smmu: Add global/context fault implementation hooks Krishna Reddy
2019-08-29 22:47 ` Krishna Reddy
2019-08-29 22:47 ` Krishna Reddy
2019-08-29 22:47 ` Krishna Reddy
2019-08-30 11:17 ` Thierry Reding
2019-08-30 11:17 ` Thierry Reding
2019-08-30 11:17 ` Thierry Reding
2019-08-30 19:16 ` Krishna Reddy
2019-08-30 19:16 ` Krishna Reddy
2019-08-30 19:16 ` Krishna Reddy
2019-08-30 19:16 ` Krishna Reddy
2019-08-30 15:43 ` Robin Murphy
2019-08-30 15:43 ` Robin Murphy
2019-08-30 15:43 ` Robin Murphy
2019-08-30 17:43 ` Krishna Reddy
2019-08-30 17:43 ` Krishna Reddy
2019-08-30 17:43 ` Krishna Reddy
2019-08-30 17:43 ` Krishna Reddy
2019-08-29 22:47 ` [PATCH 5/7] arm64: tegra: Add Memory controller DT node on T194 Krishna Reddy
2019-08-29 22:47 ` Krishna Reddy
2019-08-29 22:47 ` Krishna Reddy
2019-08-29 22:47 ` Krishna Reddy
2019-08-30 11:18 ` Thierry Reding
2019-08-30 11:18 ` Thierry Reding
2019-08-30 11:18 ` Thierry Reding
2019-08-29 22:47 ` [PATCH 6/7] arm64: tegra: Add DT node for T194 SMMU Krishna Reddy
2019-08-29 22:47 ` Krishna Reddy
2019-08-29 22:47 ` Krishna Reddy
2019-08-29 22:47 ` Krishna Reddy
2019-08-30 12:09 ` Mikko Perttunen
2019-08-30 12:09 ` Mikko Perttunen
2019-08-30 12:09 ` Mikko Perttunen
2019-08-30 18:39 ` Krishna Reddy
2019-08-30 18:39 ` Krishna Reddy
2019-08-30 18:39 ` Krishna Reddy
2019-08-30 18:39 ` Krishna Reddy
2019-08-30 15:44 ` Robin Murphy
2019-08-30 15:44 ` Robin Murphy
2019-08-30 15:44 ` Robin Murphy
2019-08-30 17:25 ` Krishna Reddy
2019-08-30 17:25 ` Krishna Reddy
2019-08-30 17:25 ` Krishna Reddy
2019-08-30 17:25 ` Krishna Reddy
2019-08-30 17:45 ` Robin Murphy [this message]
2019-08-30 17:45 ` Robin Murphy
2019-08-30 17:45 ` Robin Murphy
2019-08-30 17:45 ` Robin Murphy
2019-08-30 18:35 ` Krishna Reddy
2019-08-30 18:35 ` Krishna Reddy
2019-08-30 18:35 ` Krishna Reddy
2019-08-30 18:35 ` Krishna Reddy
2019-08-29 22:47 ` [PATCH 7/7] arm64: tegra: enable SMMU for SDHCI and EQOS Krishna Reddy
2019-08-29 22:47 ` Krishna Reddy
2019-08-29 22:47 ` Krishna Reddy
2019-08-29 22:47 ` Krishna Reddy
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