From: Tomi Valkeinen <tomi.valkeinen@ti.com>
To: Archit Taneja <architt@codeaurora.org>,
Andrzej Hajda <a.hajda@samsung.com>,
dri-devel@lists.freedesktop.org,
Andrey Gusakov <andrey.gusakov@cogentembedded.com>
Cc: Tomi Valkeinen <tomi.valkeinen@ti.com>,
Laurent Pinchart <Laurent.pinchart@ideasonboard.com>
Subject: [PATCH 6/7] drm/bridge: tc358767: fix output H/V syncs
Date: Mon, 29 Oct 2018 13:47:00 +0200 [thread overview]
Message-ID: <20181029114701.26409-7-tomi.valkeinen@ti.com> (raw)
In-Reply-To: <20181029114701.26409-1-tomi.valkeinen@ti.com>
The H and V syncs of the DP output are always set to active high. This
patch fixes the syncs by configuring them according to the videomode.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
---
drivers/gpu/drm/bridge/tc358767.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/bridge/tc358767.c b/drivers/gpu/drm/bridge/tc358767.c
index b026b5ef7378..be013bd7b30b 100644
--- a/drivers/gpu/drm/bridge/tc358767.c
+++ b/drivers/gpu/drm/bridge/tc358767.c
@@ -726,7 +726,9 @@ static int tc_set_video_mode(struct tc_data *tc, struct drm_display_mode *mode)
tc_write(DP0_ACTIVEVAL, (mode->vdisplay << 16) | (mode->hdisplay));
- tc_write(DP0_SYNCVAL, (vsync_len << 16) | (hsync_len << 0));
+ tc_write(DP0_SYNCVAL, (vsync_len << 16) | (hsync_len << 0) |
+ ((mode->flags & DRM_MODE_FLAG_NHSYNC) ? (1 << 15) : 0) |
+ ((mode->flags & DRM_MODE_FLAG_NVSYNC) ? (1 << 31) : 0));
tc_write(DPIPXLFMT, VS_POL_ACTIVE_LOW | HS_POL_ACTIVE_LOW |
DE_POL_ACTIVE_HIGH | SUB_CFG_TYPE_CONFIG1 | DPI_BPP_RGB888);
--
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next prev parent reply other threads:[~2018-10-29 11:47 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-10-29 11:46 [PATCH 0/7] drm/bridge: tc358767: small fixes Tomi Valkeinen
2018-10-29 11:46 ` [PATCH 1/7] drm/bridge: tc358767: add bus flags Tomi Valkeinen
2018-11-19 7:37 ` Andrzej Hajda
2018-10-29 11:46 ` [PATCH 2/7] drm/bridge: tc358767: add defines for DP1_SRCCTRL & PHY_2LANE Tomi Valkeinen
2018-11-19 7:37 ` Andrzej Hajda
2018-10-29 11:46 ` [PATCH 3/7] drm/bridge: tc358767: fix single lane configuration Tomi Valkeinen
2018-11-19 7:36 ` Andrzej Hajda
2018-10-29 11:46 ` [PATCH 4/7] drm/bridge: tc358767: fix initial DP0/1_SRCCTRL value Tomi Valkeinen
2018-11-19 7:29 ` Andrzej Hajda
2018-11-27 11:38 ` Tomi Valkeinen
2018-10-29 11:46 ` [PATCH 5/7] drm/bridge: tc358767: reject modes which require too much BW Tomi Valkeinen
2018-11-19 7:36 ` Andrzej Hajda
2018-11-27 11:45 ` Tomi Valkeinen
2018-10-29 11:47 ` Tomi Valkeinen [this message]
2018-11-19 7:33 ` [PATCH 6/7] drm/bridge: tc358767: fix output H/V syncs Andrzej Hajda
2018-11-27 11:56 ` Tomi Valkeinen
2018-10-29 11:47 ` [PATCH 7/7] drm/bridge: tc358767: use DP connector if no panel set Tomi Valkeinen
2018-11-19 7:34 ` Andrzej Hajda
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