* [PATCH] gpu/drm/radeon: Fix typo in comments
@ 2021-07-29 8:20 Cai Huoqing
2021-07-30 2:17 ` Alex Deucher
0 siblings, 1 reply; 6+ messages in thread
From: Cai Huoqing @ 2021-07-29 8:20 UTC (permalink / raw)
To: alexander.deucher, christian.koenig, Xinhui.Pan
Cc: Cai Huoqing, dri-devel, amd-gfx
Remove the repeated word 'the' from comments
Signed-off-by: Cai Huoqing <caihuoqing@baidu.com>
---
drivers/gpu/drm/radeon/atombios.h | 4 ++--
drivers/gpu/drm/radeon/r300_reg.h | 2 +-
drivers/gpu/drm/radeon/radeon_device.c | 2 +-
drivers/gpu/drm/radeon/radeon_fence.c | 2 +-
drivers/gpu/drm/radeon/radeon_vm.c | 2 +-
5 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/radeon/atombios.h b/drivers/gpu/drm/radeon/atombios.h
index 4b86e8b45009..83e8b8547f9b 100644
--- a/drivers/gpu/drm/radeon/atombios.h
+++ b/drivers/gpu/drm/radeon/atombios.h
@@ -2802,8 +2802,8 @@ ucMaxNBVoltageHigh: Voltage regulator dependent PWM value. High 8 bits of t
ucMinNBVoltageHigh: Voltage regulator dependent PWM value. High 8 bits of the value for the min voltage.Set this one to 0x00 if VC without PWM or no VC at all.
-usInterNBVoltageLow: Voltage regulator dependent PWM value. The value makes the the voltage >=Min NB voltage but <=InterNBVoltageHigh. Set this to 0x0000 if VC without PWM or no VC at all.
-usInterNBVoltageHigh: Voltage regulator dependent PWM value. The value makes the the voltage >=InterNBVoltageLow but <=Max NB voltage.Set this to 0x0000 if VC without PWM or no VC at all.
+usInterNBVoltageLow: Voltage regulator dependent PWM value. The value makes the voltage >=Min NB voltage but <=InterNBVoltageHigh. Set this to 0x0000 if VC without PWM or no VC at all.
+usInterNBVoltageHigh: Voltage regulator dependent PWM value. The value makes the voltage >=InterNBVoltageLow but <=Max NB voltage.Set this to 0x0000 if VC without PWM or no VC at all.
*/
diff --git a/drivers/gpu/drm/radeon/r300_reg.h b/drivers/gpu/drm/radeon/r300_reg.h
index 00c0d2ba22d3..60d5413bafa1 100644
--- a/drivers/gpu/drm/radeon/r300_reg.h
+++ b/drivers/gpu/drm/radeon/r300_reg.h
@@ -353,7 +353,7 @@
# define R300_PVS_CNTL_1_PROGRAM_START_SHIFT 0
# define R300_PVS_CNTL_1_POS_END_SHIFT 10
# define R300_PVS_CNTL_1_PROGRAM_END_SHIFT 20
-/* Addresses are relative the the vertex program parameters area. */
+/* Addresses are relative the vertex program parameters area. */
#define R300_VAP_PVS_CNTL_2 0x22D4
# define R300_PVS_CNTL_2_PARAM_OFFSET_SHIFT 0
# define R300_PVS_CNTL_2_PARAM_COUNT_SHIFT 16
diff --git a/drivers/gpu/drm/radeon/radeon_device.c b/drivers/gpu/drm/radeon/radeon_device.c
index cec03238e14d..ac8c3251b616 100644
--- a/drivers/gpu/drm/radeon/radeon_device.c
+++ b/drivers/gpu/drm/radeon/radeon_device.c
@@ -406,7 +406,7 @@ void radeon_doorbell_free(struct radeon_device *rdev, u32 doorbell)
/*
* radeon_wb_*()
- * Writeback is the the method by which the the GPU updates special pages
+ * Writeback is the method by which the GPU updates special pages
* in memory with the status of certain GPU events (fences, ring pointers,
* etc.).
*/
diff --git a/drivers/gpu/drm/radeon/radeon_fence.c b/drivers/gpu/drm/radeon/radeon_fence.c
index 18f2c2e0dfb3..e9c47ec28ade 100644
--- a/drivers/gpu/drm/radeon/radeon_fence.c
+++ b/drivers/gpu/drm/radeon/radeon_fence.c
@@ -50,7 +50,7 @@
* for GPU/CPU synchronization. When the fence is written,
* it is expected that all buffers associated with that fence
* are no longer in use by the associated ring on the GPU and
- * that the the relevant GPU caches have been flushed. Whether
+ * that the relevant GPU caches have been flushed. Whether
* we use a scratch register or memory location depends on the asic
* and whether writeback is enabled.
*/
diff --git a/drivers/gpu/drm/radeon/radeon_vm.c b/drivers/gpu/drm/radeon/radeon_vm.c
index 36a38adaaea9..bb53016f3138 100644
--- a/drivers/gpu/drm/radeon/radeon_vm.c
+++ b/drivers/gpu/drm/radeon/radeon_vm.c
@@ -41,7 +41,7 @@
* (uncached system pages).
* Each VM has an ID associated with it and there is a page table
* associated with each VMID. When execting a command buffer,
- * the kernel tells the the ring what VMID to use for that command
+ * the kernel tells the ring what VMID to use for that command
* buffer. VMIDs are allocated dynamically as commands are submitted.
* The userspace drivers maintain their own address space and the kernel
* sets up their pages tables accordingly when they submit their
--
2.25.1
^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [PATCH] gpu/drm/radeon: Fix typo in comments
2021-07-29 8:20 [PATCH] gpu/drm/radeon: Fix typo in comments Cai Huoqing
@ 2021-07-30 2:17 ` Alex Deucher
0 siblings, 0 replies; 6+ messages in thread
From: Alex Deucher @ 2021-07-30 2:17 UTC (permalink / raw)
To: Cai Huoqing
Cc: Deucher, Alexander, xinhui pan, amd-gfx list, Christian Koenig,
Maling list - DRI developers
Applied. Thanks!
Alex
On Thu, Jul 29, 2021 at 4:21 AM Cai Huoqing <caihuoqing@baidu.com> wrote:
>
> Remove the repeated word 'the' from comments
>
> Signed-off-by: Cai Huoqing <caihuoqing@baidu.com>
> ---
> drivers/gpu/drm/radeon/atombios.h | 4 ++--
> drivers/gpu/drm/radeon/r300_reg.h | 2 +-
> drivers/gpu/drm/radeon/radeon_device.c | 2 +-
> drivers/gpu/drm/radeon/radeon_fence.c | 2 +-
> drivers/gpu/drm/radeon/radeon_vm.c | 2 +-
> 5 files changed, 6 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/gpu/drm/radeon/atombios.h b/drivers/gpu/drm/radeon/atombios.h
> index 4b86e8b45009..83e8b8547f9b 100644
> --- a/drivers/gpu/drm/radeon/atombios.h
> +++ b/drivers/gpu/drm/radeon/atombios.h
> @@ -2802,8 +2802,8 @@ ucMaxNBVoltageHigh: Voltage regulator dependent PWM value. High 8 bits of t
> ucMinNBVoltageHigh: Voltage regulator dependent PWM value. High 8 bits of the value for the min voltage.Set this one to 0x00 if VC without PWM or no VC at all.
>
>
> -usInterNBVoltageLow: Voltage regulator dependent PWM value. The value makes the the voltage >=Min NB voltage but <=InterNBVoltageHigh. Set this to 0x0000 if VC without PWM or no VC at all.
> -usInterNBVoltageHigh: Voltage regulator dependent PWM value. The value makes the the voltage >=InterNBVoltageLow but <=Max NB voltage.Set this to 0x0000 if VC without PWM or no VC at all.
> +usInterNBVoltageLow: Voltage regulator dependent PWM value. The value makes the voltage >=Min NB voltage but <=InterNBVoltageHigh. Set this to 0x0000 if VC without PWM or no VC at all.
> +usInterNBVoltageHigh: Voltage regulator dependent PWM value. The value makes the voltage >=InterNBVoltageLow but <=Max NB voltage.Set this to 0x0000 if VC without PWM or no VC at all.
> */
>
>
> diff --git a/drivers/gpu/drm/radeon/r300_reg.h b/drivers/gpu/drm/radeon/r300_reg.h
> index 00c0d2ba22d3..60d5413bafa1 100644
> --- a/drivers/gpu/drm/radeon/r300_reg.h
> +++ b/drivers/gpu/drm/radeon/r300_reg.h
> @@ -353,7 +353,7 @@
> # define R300_PVS_CNTL_1_PROGRAM_START_SHIFT 0
> # define R300_PVS_CNTL_1_POS_END_SHIFT 10
> # define R300_PVS_CNTL_1_PROGRAM_END_SHIFT 20
> -/* Addresses are relative the the vertex program parameters area. */
> +/* Addresses are relative the vertex program parameters area. */
> #define R300_VAP_PVS_CNTL_2 0x22D4
> # define R300_PVS_CNTL_2_PARAM_OFFSET_SHIFT 0
> # define R300_PVS_CNTL_2_PARAM_COUNT_SHIFT 16
> diff --git a/drivers/gpu/drm/radeon/radeon_device.c b/drivers/gpu/drm/radeon/radeon_device.c
> index cec03238e14d..ac8c3251b616 100644
> --- a/drivers/gpu/drm/radeon/radeon_device.c
> +++ b/drivers/gpu/drm/radeon/radeon_device.c
> @@ -406,7 +406,7 @@ void radeon_doorbell_free(struct radeon_device *rdev, u32 doorbell)
>
> /*
> * radeon_wb_*()
> - * Writeback is the the method by which the the GPU updates special pages
> + * Writeback is the method by which the GPU updates special pages
> * in memory with the status of certain GPU events (fences, ring pointers,
> * etc.).
> */
> diff --git a/drivers/gpu/drm/radeon/radeon_fence.c b/drivers/gpu/drm/radeon/radeon_fence.c
> index 18f2c2e0dfb3..e9c47ec28ade 100644
> --- a/drivers/gpu/drm/radeon/radeon_fence.c
> +++ b/drivers/gpu/drm/radeon/radeon_fence.c
> @@ -50,7 +50,7 @@
> * for GPU/CPU synchronization. When the fence is written,
> * it is expected that all buffers associated with that fence
> * are no longer in use by the associated ring on the GPU and
> - * that the the relevant GPU caches have been flushed. Whether
> + * that the relevant GPU caches have been flushed. Whether
> * we use a scratch register or memory location depends on the asic
> * and whether writeback is enabled.
> */
> diff --git a/drivers/gpu/drm/radeon/radeon_vm.c b/drivers/gpu/drm/radeon/radeon_vm.c
> index 36a38adaaea9..bb53016f3138 100644
> --- a/drivers/gpu/drm/radeon/radeon_vm.c
> +++ b/drivers/gpu/drm/radeon/radeon_vm.c
> @@ -41,7 +41,7 @@
> * (uncached system pages).
> * Each VM has an ID associated with it and there is a page table
> * associated with each VMID. When execting a command buffer,
> - * the kernel tells the the ring what VMID to use for that command
> + * the kernel tells the ring what VMID to use for that command
> * buffer. VMIDs are allocated dynamically as commands are submitted.
> * The userspace drivers maintain their own address space and the kernel
> * sets up their pages tables accordingly when they submit their
> --
> 2.25.1
>
^ permalink raw reply [flat|nested] 6+ messages in thread
* [PATCH] gpu/drm/radeon: Fix typo in comments
@ 2022-04-26 8:49 Zhenneng Li
2022-04-26 14:45 ` Alex Deucher
0 siblings, 1 reply; 6+ messages in thread
From: Zhenneng Li @ 2022-04-26 8:49 UTC (permalink / raw)
To: Alex Deucher
Cc: David Airlie, Xinhui.Pan, linux-kernel, dri-devel, Zhenneng Li,
amd-gfx, Christian König
Signed-off-by: Zhenneng Li <lizhenneng@kylinos.cn>
---
drivers/gpu/drm/radeon/atombios.h | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/radeon/atombios.h b/drivers/gpu/drm/radeon/atombios.h
index bd5dc09e860f..6ccc9f31689f 100644
--- a/drivers/gpu/drm/radeon/atombios.h
+++ b/drivers/gpu/drm/radeon/atombios.h
@@ -3599,7 +3599,7 @@ typedef struct _ATOM_LCD_RTS_RECORD
UCHAR ucRTSValue;
}ATOM_LCD_RTS_RECORD;
-//!! If the record below exits, it shoud always be the first record for easy use in command table!!!
+//!! If the record below exits, it should always be the first record for easy use in command table!!!
// The record below is only used when LVDS_Info is present. From ATOM_LVDS_INFO_V12, use ucLCDPanel_SpecialHandlingCap instead.
typedef struct _ATOM_LCD_MODE_CONTROL_CAP
{
@@ -3823,7 +3823,7 @@ typedef struct _ATOM_DPCD_INFO
// Note1: This table is filled by SetBiosReservationStartInFB in CoreCommSubs.asm
// at running time.
// note2: From RV770, the memory is more than 32bit addressable, so we will change
-// ucTableFormatRevision=1,ucTableContentRevision=4, the strcuture remains
+// ucTableFormatRevision=1,ucTableContentRevision=4, the structure remains
// exactly same as 1.1 and 1.2 (1.3 is never in use), but ulStartAddrUsedByFirmware
// (in offset to start of memory address) is KB aligned instead of byte aligend.
/***********************************************************************************/
@@ -3858,7 +3858,7 @@ typedef struct _ATOM_VRAM_USAGE_BY_FIRMWARE
ATOM_FIRMWARE_VRAM_RESERVE_INFO asFirmwareVramReserveInfo[ATOM_MAX_FIRMWARE_VRAM_USAGE_INFO];
}ATOM_VRAM_USAGE_BY_FIRMWARE;
-// change verion to 1.5, when allow driver to allocate the vram area for command table access.
+// change version to 1.5, when allow driver to allocate the vram area for command table access.
typedef struct _ATOM_FIRMWARE_VRAM_RESERVE_INFO_V1_5
{
ULONG ulStartAddrUsedByFirmware;
--
2.25.1
^ permalink raw reply related [flat|nested] 6+ messages in thread* Re: [PATCH] gpu/drm/radeon: Fix typo in comments
2022-04-26 8:49 Zhenneng Li
@ 2022-04-26 14:45 ` Alex Deucher
0 siblings, 0 replies; 6+ messages in thread
From: Alex Deucher @ 2022-04-26 14:45 UTC (permalink / raw)
To: Zhenneng Li
Cc: David Airlie, xinhui pan, LKML, amd-gfx list,
Maling list - DRI developers, Alex Deucher, Christian König
Applied. Thanks!
Alex
On Tue, Apr 26, 2022 at 4:50 AM Zhenneng Li <lizhenneng@kylinos.cn> wrote:
>
> Signed-off-by: Zhenneng Li <lizhenneng@kylinos.cn>
> ---
> drivers/gpu/drm/radeon/atombios.h | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/radeon/atombios.h b/drivers/gpu/drm/radeon/atombios.h
> index bd5dc09e860f..6ccc9f31689f 100644
> --- a/drivers/gpu/drm/radeon/atombios.h
> +++ b/drivers/gpu/drm/radeon/atombios.h
> @@ -3599,7 +3599,7 @@ typedef struct _ATOM_LCD_RTS_RECORD
> UCHAR ucRTSValue;
> }ATOM_LCD_RTS_RECORD;
>
> -//!! If the record below exits, it shoud always be the first record for easy use in command table!!!
> +//!! If the record below exits, it should always be the first record for easy use in command table!!!
> // The record below is only used when LVDS_Info is present. From ATOM_LVDS_INFO_V12, use ucLCDPanel_SpecialHandlingCap instead.
> typedef struct _ATOM_LCD_MODE_CONTROL_CAP
> {
> @@ -3823,7 +3823,7 @@ typedef struct _ATOM_DPCD_INFO
> // Note1: This table is filled by SetBiosReservationStartInFB in CoreCommSubs.asm
> // at running time.
> // note2: From RV770, the memory is more than 32bit addressable, so we will change
> -// ucTableFormatRevision=1,ucTableContentRevision=4, the strcuture remains
> +// ucTableFormatRevision=1,ucTableContentRevision=4, the structure remains
> // exactly same as 1.1 and 1.2 (1.3 is never in use), but ulStartAddrUsedByFirmware
> // (in offset to start of memory address) is KB aligned instead of byte aligend.
> /***********************************************************************************/
> @@ -3858,7 +3858,7 @@ typedef struct _ATOM_VRAM_USAGE_BY_FIRMWARE
> ATOM_FIRMWARE_VRAM_RESERVE_INFO asFirmwareVramReserveInfo[ATOM_MAX_FIRMWARE_VRAM_USAGE_INFO];
> }ATOM_VRAM_USAGE_BY_FIRMWARE;
>
> -// change verion to 1.5, when allow driver to allocate the vram area for command table access.
> +// change version to 1.5, when allow driver to allocate the vram area for command table access.
> typedef struct _ATOM_FIRMWARE_VRAM_RESERVE_INFO_V1_5
> {
> ULONG ulStartAddrUsedByFirmware;
> --
> 2.25.1
>
^ permalink raw reply [flat|nested] 6+ messages in thread
* [PATCH] gpu/drm/radeon: Fix typo in comments
@ 2022-06-22 14:22 Jiang Jian
2022-06-22 19:29 ` Alex Deucher
0 siblings, 1 reply; 6+ messages in thread
From: Jiang Jian @ 2022-06-22 14:22 UTC (permalink / raw)
To: airlied, daniel
Cc: Xinhui.Pan, dri-devel, Jiang Jian, amd-gfx, alexander.deucher,
christian.koenig
Remove the repeated word 'and' from comments
Signed-off-by: Jiang Jian <jiangjian@cdjrlc.com>
---
drivers/gpu/drm/radeon/r300_reg.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/radeon/r300_reg.h b/drivers/gpu/drm/radeon/r300_reg.h
index 60d5413bafa1..9d341cff63ee 100644
--- a/drivers/gpu/drm/radeon/r300_reg.h
+++ b/drivers/gpu/drm/radeon/r300_reg.h
@@ -1103,7 +1103,7 @@
* The destination register index is in FPI1 (color) and FPI3 (alpha)
* together with enable bits.
* There are separate enable bits for writing into temporary registers
- * (DSTC_REG_* /DSTA_REG) and and program output registers (DSTC_OUTPUT_*
+ * (DSTC_REG_* /DSTA_REG) and program output registers (DSTC_OUTPUT_*
* /DSTA_OUTPUT). You can write to both at once, or not write at all (the
* same index must be used for both).
*
--
2.17.1
^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [PATCH] gpu/drm/radeon: Fix typo in comments
2022-06-22 14:22 Jiang Jian
@ 2022-06-22 19:29 ` Alex Deucher
0 siblings, 0 replies; 6+ messages in thread
From: Alex Deucher @ 2022-06-22 19:29 UTC (permalink / raw)
To: Jiang Jian
Cc: Dave Airlie, xinhui pan, amd-gfx list,
Maling list - DRI developers, Deucher, Alexander,
Christian Koenig
Applied. Thanks!
On Wed, Jun 22, 2022 at 10:24 AM Jiang Jian <jiangjian@cdjrlc.com> wrote:
>
> Remove the repeated word 'and' from comments
>
> Signed-off-by: Jiang Jian <jiangjian@cdjrlc.com>
> ---
> drivers/gpu/drm/radeon/r300_reg.h | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/radeon/r300_reg.h b/drivers/gpu/drm/radeon/r300_reg.h
> index 60d5413bafa1..9d341cff63ee 100644
> --- a/drivers/gpu/drm/radeon/r300_reg.h
> +++ b/drivers/gpu/drm/radeon/r300_reg.h
> @@ -1103,7 +1103,7 @@
> * The destination register index is in FPI1 (color) and FPI3 (alpha)
> * together with enable bits.
> * There are separate enable bits for writing into temporary registers
> - * (DSTC_REG_* /DSTA_REG) and and program output registers (DSTC_OUTPUT_*
> + * (DSTC_REG_* /DSTA_REG) and program output registers (DSTC_OUTPUT_*
> * /DSTA_OUTPUT). You can write to both at once, or not write at all (the
> * same index must be used for both).
> *
> --
> 2.17.1
>
^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2022-06-22 19:29 UTC | newest]
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