[Intel-gfx] [PATCH 00/29] drm/i915/tc: Align the ADLP TypeC sequences with bspec

[Intel-gfx] [PATCH 00/29] drm/i915/tc: Align the ADLP TypeC sequences with bspec

[Imre Deak]

This patchset updates the ADLP TypeC PHY connect/disconnect sequences
that changed in Bspec. The change in the power domains used and order of
enabling these wrt. taking the PHY ownership domains requires moving
these sequences to platform specific hooks; the first part of the
patchset adds these along with other hooks to setup/query the PHY HW
state, replacing the corresponding if ladders.

The second part of the patchset adds the ADLP specific hooks, updating
the connect/disconnect sequences and hotplug detection for it according
to bspec.

The last part makes sure that the port DPLL is disabled before
disconnecting the TC PHY, as required by bspec.

Tested on ICL, TGL, ADLP.

Imre Deak (29):
  drm/i915/tc: Group the TC PHY setup/query functions per platform
  drm/i915/tc: Use the adlp prefix for ADLP TC PHY functions
  drm/i915/tc: Rename tc_phy_status_complete() to tc_phy_is_ready()
  drm/i915/tc: Use the tc_phy prefix for all TC PHY functions
  drm/i915/tc: Move TC port fields to a new intel_tc_port struct
  drm/i915/tc: Check for TC PHY explicitly in
    intel_tc_port_fia_max_lane_count()
  drm/i915/tc: Move the intel_tc_port struct declaration to intel_tc.c
  drm/i915/tc: Add TC PHY hook to get the PHY HPD live status
  drm/i915/tc: Add TC PHY hooks to get the PHY ready/owned state
  drm/i915/tc: Add TC PHY hook to read out the PHY HW state
  drm/i915/tc: Add generic TC PHY connect/disconnect handlers
  drm/i915/tc: Factor out tc_phy_verify_legacy_or_dp_alt_mode()
  drm/i915/tc: Add TC PHY hooks to connect/disconnect the PHY
  drm/i915/tc: Fix up the legacy VBT flag only in disconnected mode
  drm/i915/tc: Check TC mode instead of the VBT legacy flag
  drm/i915/tc: Block/unblock TC-cold in the PHY connect/disconnect hooks
  drm/i915/tc: Remove redundant wakeref=0 check from unblock_tc_cold()
  drm/i915/tc: Drop tc_cold_block()/unblock()'s power domain parameter
  drm/i915/tc: Add TC PHY hook to get the TC-cold blocking power domain
  drm/i915/tc: Add asserts in TC PHY hooks that the required power is on
  drm/i915/tc: Add TC PHY hook to init the PHY
  drm/i915/adlp/tc: Use the DE HPD ISR register for hotplug detection
  drm/i915/tc: Get power ref for reading the HPD live status register
  drm/i915/tc: Don't connect the PHY in intel_tc_port_connected()
  drm/i915/adlp/tc: Align the connect/disconnect PHY sequence with bspec
  drm/i915: Move shared DPLL disabling into CRTC disable hook
  drm/i915: Disable DPLLs before disconnecting the TC PHY
  drm/i915: Remove TC PHY disconnect workaround
  drm/i915: Remove the encoder update_prepare()/complete() hooks

 drivers/gpu/drm/i915/display/intel_ddi.c      |   71 +-
 drivers/gpu/drm/i915/display/intel_display.c  |   85 +-
 drivers/gpu/drm/i915/display/intel_display.h  |    7 -
 .../drm/i915/display/intel_display_types.h    |   19 +-
 drivers/gpu/drm/i915/display/intel_dp_mst.c   |   15 +
 drivers/gpu/drm/i915/display/intel_tc.c       | 1248 +++++++++++------
 drivers/gpu/drm/i915/display/intel_tc.h       |    4 +-
 drivers/gpu/drm/i915/i915_pci.c               |    3 -
 drivers/gpu/drm/i915/intel_device_info.h      |    1 -
 9 files changed, 850 insertions(+), 603 deletions(-)

-- 
2.37.1

[Intel-gfx] [PATCH 01/29] drm/i915/tc: Group the TC PHY setup/query functions per platform

[Imre Deak]

Arrange the TC PHY HW state setup/query functions into platform
specific and generic groups. This prepares for upcoming patches adding
generic TC PHY handlers and platform specific hooks for these,
replacing the corresponding if ladders.

No functional changes.

Signed-off-by: Imre Deak <imre.deak@intel.com>
---
 drivers/gpu/drm/i915/display/intel_tc.c | 244 +++++++++++++-----------
 1 file changed, 130 insertions(+), 114 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_tc.c b/drivers/gpu/drm/i915/display/intel_tc.c
index bd8c9df5f98fe..b6e425c44fcb9 100644
--- a/drivers/gpu/drm/i915/display/intel_tc.c
+++ b/drivers/gpu/drm/i915/display/intel_tc.c
@@ -15,6 +15,10 @@
 #include "intel_mg_phy_regs.h"
 #include "intel_tc.h"
 
+static u32 tc_port_live_status_mask(struct intel_digital_port *dig_port);
+static bool tc_phy_status_complete(struct intel_digital_port *dig_port);
+static bool tc_phy_take_ownership(struct intel_digital_port *dig_port, bool take);
+
 static const char *tc_port_mode_name(enum tc_port_mode mode)
 {
 	static const char * const names[] = {
@@ -256,6 +260,10 @@ static void tc_port_fixup_legacy_flag(struct intel_digital_port *dig_port,
 	dig_port->tc_legacy_port = !dig_port->tc_legacy_port;
 }
 
+/**
+ * ICL TC PHY handlers
+ * -------------------
+ */
 static u32 icl_tc_port_live_status_mask(struct intel_digital_port *dig_port)
 {
 	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
@@ -287,44 +295,6 @@ static u32 icl_tc_port_live_status_mask(struct intel_digital_port *dig_port)
 	return mask;
 }
 
-static u32 adl_tc_port_live_status_mask(struct intel_digital_port *dig_port)
-{
-	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
-	enum tc_port tc_port = intel_port_to_tc(i915, dig_port->base.port);
-	u32 isr_bit = i915->display.hotplug.pch_hpd[dig_port->base.hpd_pin];
-	u32 val, mask = 0;
-
-	/*
-	 * On ADL-P HW/FW will wake from TCCOLD to complete the read access of
-	 * registers in IOM. Note that this doesn't apply to PHY and FIA
-	 * registers.
-	 */
-	val = intel_de_read(i915, TCSS_DDI_STATUS(tc_port));
-	if (val & TCSS_DDI_STATUS_HPD_LIVE_STATUS_ALT)
-		mask |= BIT(TC_PORT_DP_ALT);
-	if (val & TCSS_DDI_STATUS_HPD_LIVE_STATUS_TBT)
-		mask |= BIT(TC_PORT_TBT_ALT);
-
-	if (intel_de_read(i915, SDEISR) & isr_bit)
-		mask |= BIT(TC_PORT_LEGACY);
-
-	/* The sink can be connected only in a single mode. */
-	if (!drm_WARN_ON(&i915->drm, hweight32(mask) > 1))
-		tc_port_fixup_legacy_flag(dig_port, mask);
-
-	return mask;
-}
-
-static u32 tc_port_live_status_mask(struct intel_digital_port *dig_port)
-{
-	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
-
-	if (IS_ALDERLAKE_P(i915))
-		return adl_tc_port_live_status_mask(dig_port);
-
-	return icl_tc_port_live_status_mask(dig_port);
-}
-
 /*
  * Return the PHY status complete flag indicating that display can acquire the
  * PHY ownership. The IOM firmware sets this flag when a DP-alt or legacy sink
@@ -349,40 +319,6 @@ static bool icl_tc_phy_status_complete(struct intel_digital_port *dig_port)
 	return val & DP_PHY_MODE_STATUS_COMPLETED(dig_port->tc_phy_fia_idx);
 }
 
-/*
- * Return the PHY status complete flag indicating that display can acquire the
- * PHY ownership. The IOM firmware sets this flag when it's ready to switch
- * the ownership to display, regardless of what sink is connected (TBT-alt,
- * DP-alt, legacy or nothing). For TBT-alt sinks the PHY is owned by the TBT
- * subsystem and so switching the ownership to display is not required.
- */
-static bool adl_tc_phy_status_complete(struct intel_digital_port *dig_port)
-{
-	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
-	enum tc_port tc_port = intel_port_to_tc(i915, dig_port->base.port);
-	u32 val;
-
-	val = intel_de_read(i915, TCSS_DDI_STATUS(tc_port));
-	if (val == 0xffffffff) {
-		drm_dbg_kms(&i915->drm,
-			    "Port %s: PHY in TCCOLD, assuming not complete\n",
-			    dig_port->tc_port_name);
-		return false;
-	}
-
-	return val & TCSS_DDI_STATUS_READY;
-}
-
-static bool tc_phy_status_complete(struct intel_digital_port *dig_port)
-{
-	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
-
-	if (IS_ALDERLAKE_P(i915))
-		return adl_tc_phy_status_complete(dig_port);
-
-	return icl_tc_phy_status_complete(dig_port);
-}
-
 static bool icl_tc_phy_take_ownership(struct intel_digital_port *dig_port,
 				      bool take)
 {
@@ -407,28 +343,6 @@ static bool icl_tc_phy_take_ownership(struct intel_digital_port *dig_port,
 	return true;
 }
 
-static bool adl_tc_phy_take_ownership(struct intel_digital_port *dig_port,
-				      bool take)
-{
-	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
-	enum port port = dig_port->base.port;
-
-	intel_de_rmw(i915, DDI_BUF_CTL(port), DDI_BUF_CTL_TC_PHY_OWNERSHIP,
-		     take ? DDI_BUF_CTL_TC_PHY_OWNERSHIP : 0);
-
-	return true;
-}
-
-static bool tc_phy_take_ownership(struct intel_digital_port *dig_port, bool take)
-{
-	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
-
-	if (IS_ALDERLAKE_P(i915))
-		return adl_tc_phy_take_ownership(dig_port, take);
-
-	return icl_tc_phy_take_ownership(dig_port, take);
-}
-
 static bool icl_tc_phy_is_owned(struct intel_digital_port *dig_port)
 {
 	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
@@ -445,26 +359,6 @@ static bool icl_tc_phy_is_owned(struct intel_digital_port *dig_port)
 	return val & DP_PHY_MODE_STATUS_NOT_SAFE(dig_port->tc_phy_fia_idx);
 }
 
-static bool adl_tc_phy_is_owned(struct intel_digital_port *dig_port)
-{
-	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
-	enum port port = dig_port->base.port;
-	u32 val;
-
-	val = intel_de_read(i915, DDI_BUF_CTL(port));
-	return val & DDI_BUF_CTL_TC_PHY_OWNERSHIP;
-}
-
-static bool tc_phy_is_owned(struct intel_digital_port *dig_port)
-{
-	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
-
-	if (IS_ALDERLAKE_P(i915))
-		return adl_tc_phy_is_owned(dig_port);
-
-	return icl_tc_phy_is_owned(dig_port);
-}
-
 /*
  * This function implements the first part of the Connect Flow described by our
  * specification, Gen11 TypeC Programming chapter. The rest of the flow (reading
@@ -559,6 +453,128 @@ static void icl_tc_phy_disconnect(struct intel_digital_port *dig_port)
 	}
 }
 
+/**
+ * ADLP TC PHY handlers
+ * --------------------
+ */
+static u32 adl_tc_port_live_status_mask(struct intel_digital_port *dig_port)
+{
+	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
+	enum tc_port tc_port = intel_port_to_tc(i915, dig_port->base.port);
+	u32 isr_bit = i915->display.hotplug.pch_hpd[dig_port->base.hpd_pin];
+	u32 val, mask = 0;
+
+	/*
+	 * On ADL-P HW/FW will wake from TCCOLD to complete the read access of
+	 * registers in IOM. Note that this doesn't apply to PHY and FIA
+	 * registers.
+	 */
+	val = intel_de_read(i915, TCSS_DDI_STATUS(tc_port));
+	if (val & TCSS_DDI_STATUS_HPD_LIVE_STATUS_ALT)
+		mask |= BIT(TC_PORT_DP_ALT);
+	if (val & TCSS_DDI_STATUS_HPD_LIVE_STATUS_TBT)
+		mask |= BIT(TC_PORT_TBT_ALT);
+
+	if (intel_de_read(i915, SDEISR) & isr_bit)
+		mask |= BIT(TC_PORT_LEGACY);
+
+	/* The sink can be connected only in a single mode. */
+	if (!drm_WARN_ON(&i915->drm, hweight32(mask) > 1))
+		tc_port_fixup_legacy_flag(dig_port, mask);
+
+	return mask;
+}
+
+/*
+ * Return the PHY status complete flag indicating that display can acquire the
+ * PHY ownership. The IOM firmware sets this flag when it's ready to switch
+ * the ownership to display, regardless of what sink is connected (TBT-alt,
+ * DP-alt, legacy or nothing). For TBT-alt sinks the PHY is owned by the TBT
+ * subsystem and so switching the ownership to display is not required.
+ */
+static bool adl_tc_phy_status_complete(struct intel_digital_port *dig_port)
+{
+	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
+	enum tc_port tc_port = intel_port_to_tc(i915, dig_port->base.port);
+	u32 val;
+
+	val = intel_de_read(i915, TCSS_DDI_STATUS(tc_port));
+	if (val == 0xffffffff) {
+		drm_dbg_kms(&i915->drm,
+			    "Port %s: PHY in TCCOLD, assuming not complete\n",
+			    dig_port->tc_port_name);
+		return false;
+	}
+
+	return val & TCSS_DDI_STATUS_READY;
+}
+
+static bool adl_tc_phy_take_ownership(struct intel_digital_port *dig_port,
+				      bool take)
+{
+	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
+	enum port port = dig_port->base.port;
+
+	intel_de_rmw(i915, DDI_BUF_CTL(port), DDI_BUF_CTL_TC_PHY_OWNERSHIP,
+		     take ? DDI_BUF_CTL_TC_PHY_OWNERSHIP : 0);
+
+	return true;
+}
+
+static bool adl_tc_phy_is_owned(struct intel_digital_port *dig_port)
+{
+	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
+	enum port port = dig_port->base.port;
+	u32 val;
+
+	val = intel_de_read(i915, DDI_BUF_CTL(port));
+	return val & DDI_BUF_CTL_TC_PHY_OWNERSHIP;
+}
+
+/**
+ * Generic TC PHY handlers
+ * -----------------------
+ */
+static u32 tc_port_live_status_mask(struct intel_digital_port *dig_port)
+{
+	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
+
+	if (IS_ALDERLAKE_P(i915))
+		return adl_tc_port_live_status_mask(dig_port);
+
+	return icl_tc_port_live_status_mask(dig_port);
+}
+
+static bool tc_phy_status_complete(struct intel_digital_port *dig_port)
+{
+	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
+
+	if (IS_ALDERLAKE_P(i915))
+		return adl_tc_phy_status_complete(dig_port);
+
+	return icl_tc_phy_status_complete(dig_port);
+}
+
+static bool tc_phy_is_owned(struct intel_digital_port *dig_port)
+{
+	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
+
+	if (IS_ALDERLAKE_P(i915))
+		return adl_tc_phy_is_owned(dig_port);
+
+	return icl_tc_phy_is_owned(dig_port);
+}
+
+static bool tc_phy_take_ownership(struct intel_digital_port *dig_port, bool take)
+{
+	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
+
+	if (IS_ALDERLAKE_P(i915))
+		return adl_tc_phy_take_ownership(dig_port, take);
+
+	return icl_tc_phy_take_ownership(dig_port, take);
+}
+
 static bool tc_phy_is_ready_and_owned(struct intel_digital_port *dig_port,
 				      bool phy_is_ready, bool phy_is_owned)
 {
-- 
2.37.1

[Intel-gfx] [PATCH 02/29] drm/i915/tc: Use the adlp prefix for ADLP TC PHY functions

[Imre Deak]

Use the usual adlp prefix for all ADLP specific TC PHY functions. Other
ADL platforms don't support TC.

Signed-off-by: Imre Deak <imre.deak@intel.com>
---
 drivers/gpu/drm/i915/display/intel_tc.c | 18 +++++++++---------
 1 file changed, 9 insertions(+), 9 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_tc.c b/drivers/gpu/drm/i915/display/intel_tc.c
index b6e425c44fcb9..099b1ec842ba2 100644
--- a/drivers/gpu/drm/i915/display/intel_tc.c
+++ b/drivers/gpu/drm/i915/display/intel_tc.c
@@ -457,7 +457,7 @@ static void icl_tc_phy_disconnect(struct intel_digital_port *dig_port)
  * ADLP TC PHY handlers
  * --------------------
  */
-static u32 adl_tc_port_live_status_mask(struct intel_digital_port *dig_port)
+static u32 adlp_tc_port_live_status_mask(struct intel_digital_port *dig_port)
 {
 	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
 	enum tc_port tc_port = intel_port_to_tc(i915, dig_port->base.port);
@@ -492,7 +492,7 @@ static u32 adl_tc_port_live_status_mask(struct intel_digital_port *dig_port)
  * DP-alt, legacy or nothing). For TBT-alt sinks the PHY is owned by the TBT
  * subsystem and so switching the ownership to display is not required.
  */
-static bool adl_tc_phy_status_complete(struct intel_digital_port *dig_port)
+static bool adlp_tc_phy_status_complete(struct intel_digital_port *dig_port)
 {
 	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
 	enum tc_port tc_port = intel_port_to_tc(i915, dig_port->base.port);
@@ -509,8 +509,8 @@ static bool adl_tc_phy_status_complete(struct intel_digital_port *dig_port)
 	return val & TCSS_DDI_STATUS_READY;
 }
 
-static bool adl_tc_phy_take_ownership(struct intel_digital_port *dig_port,
-				      bool take)
+static bool adlp_tc_phy_take_ownership(struct intel_digital_port *dig_port,
+				       bool take)
 {
 	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
 	enum port port = dig_port->base.port;
@@ -521,7 +521,7 @@ static bool adl_tc_phy_take_ownership(struct intel_digital_port *dig_port,
 	return true;
 }
 
-static bool adl_tc_phy_is_owned(struct intel_digital_port *dig_port)
+static bool adlp_tc_phy_is_owned(struct intel_digital_port *dig_port)
 {
 	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
 	enum port port = dig_port->base.port;
@@ -540,7 +540,7 @@ static u32 tc_port_live_status_mask(struct intel_digital_port *dig_port)
 	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
 
 	if (IS_ALDERLAKE_P(i915))
-		return adl_tc_port_live_status_mask(dig_port);
+		return adlp_tc_port_live_status_mask(dig_port);
 
 	return icl_tc_port_live_status_mask(dig_port);
 }
@@ -550,7 +550,7 @@ static bool tc_phy_status_complete(struct intel_digital_port *dig_port)
 	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
 
 	if (IS_ALDERLAKE_P(i915))
-		return adl_tc_phy_status_complete(dig_port);
+		return adlp_tc_phy_status_complete(dig_port);
 
 	return icl_tc_phy_status_complete(dig_port);
 }
@@ -560,7 +560,7 @@ static bool tc_phy_is_owned(struct intel_digital_port *dig_port)
 	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
 
 	if (IS_ALDERLAKE_P(i915))
-		return adl_tc_phy_is_owned(dig_port);
+		return adlp_tc_phy_is_owned(dig_port);
 
 	return icl_tc_phy_is_owned(dig_port);
 }
@@ -570,7 +570,7 @@ static bool tc_phy_take_ownership(struct intel_digital_port *dig_port, bool take
 	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
 
 	if (IS_ALDERLAKE_P(i915))
-		return adl_tc_phy_take_ownership(dig_port, take);
+		return adlp_tc_phy_take_ownership(dig_port, take);
 
 	return icl_tc_phy_take_ownership(dig_port, take);
 }
-- 
2.37.1

[Intel-gfx] [PATCH 03/29] drm/i915/tc: Rename tc_phy_status_complete() to tc_phy_is_ready()

[Imre Deak]

For consistency rename tc_phy_status_complete() to tc_phy_is_ready()
following the terminology of new platforms.

Signed-off-by: Imre Deak <imre.deak@intel.com>
---
 drivers/gpu/drm/i915/display/intel_tc.c | 24 ++++++++++++------------
 1 file changed, 12 insertions(+), 12 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_tc.c b/drivers/gpu/drm/i915/display/intel_tc.c
index 099b1ec842ba2..9fecf24b69c16 100644
--- a/drivers/gpu/drm/i915/display/intel_tc.c
+++ b/drivers/gpu/drm/i915/display/intel_tc.c
@@ -16,7 +16,7 @@
 #include "intel_tc.h"
 
 static u32 tc_port_live_status_mask(struct intel_digital_port *dig_port);
-static bool tc_phy_status_complete(struct intel_digital_port *dig_port);
+static bool tc_phy_is_ready(struct intel_digital_port *dig_port);
 static bool tc_phy_take_ownership(struct intel_digital_port *dig_port, bool take);
 
 static const char *tc_port_mode_name(enum tc_port_mode mode)
@@ -303,7 +303,7 @@ static u32 icl_tc_port_live_status_mask(struct intel_digital_port *dig_port)
  * owned by the TBT subsystem and so switching the ownership to display is not
  * required.
  */
-static bool icl_tc_phy_status_complete(struct intel_digital_port *dig_port)
+static bool icl_tc_phy_is_ready(struct intel_digital_port *dig_port)
 {
 	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
 	u32 val;
@@ -311,7 +311,7 @@ static bool icl_tc_phy_status_complete(struct intel_digital_port *dig_port)
 	val = intel_de_read(i915, PORT_TX_DFLEXDPPMS(dig_port->tc_phy_fia));
 	if (val == 0xffffffff) {
 		drm_dbg_kms(&i915->drm,
-			    "Port %s: PHY in TCCOLD, assuming not complete\n",
+			    "Port %s: PHY in TCCOLD, assuming not ready\n",
 			    dig_port->tc_port_name);
 		return false;
 	}
@@ -377,7 +377,7 @@ static void icl_tc_phy_connect(struct intel_digital_port *dig_port,
 	u32 live_status_mask;
 	int max_lanes;
 
-	if (!tc_phy_status_complete(dig_port) &&
+	if (!tc_phy_is_ready(dig_port) &&
 	    !drm_WARN_ON(&i915->drm, dig_port->tc_legacy_port)) {
 		drm_dbg_kms(&i915->drm, "Port %s: PHY not ready\n",
 			    dig_port->tc_port_name);
@@ -492,7 +492,7 @@ static u32 adlp_tc_port_live_status_mask(struct intel_digital_port *dig_port)
  * DP-alt, legacy or nothing). For TBT-alt sinks the PHY is owned by the TBT
  * subsystem and so switching the ownership to display is not required.
  */
-static bool adlp_tc_phy_status_complete(struct intel_digital_port *dig_port)
+static bool adlp_tc_phy_is_ready(struct intel_digital_port *dig_port)
 {
 	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
 	enum tc_port tc_port = intel_port_to_tc(i915, dig_port->base.port);
@@ -501,7 +501,7 @@ static bool adlp_tc_phy_status_complete(struct intel_digital_port *dig_port)
 	val = intel_de_read(i915, TCSS_DDI_STATUS(tc_port));
 	if (val == 0xffffffff) {
 		drm_dbg_kms(&i915->drm,
-			    "Port %s: PHY in TCCOLD, assuming not complete\n",
+			    "Port %s: PHY in TCCOLD, assuming not ready\n",
 			    dig_port->tc_port_name);
 		return false;
 	}
@@ -545,14 +545,14 @@ static u32 tc_port_live_status_mask(struct intel_digital_port *dig_port)
 	return icl_tc_port_live_status_mask(dig_port);
 }
 
-static bool tc_phy_status_complete(struct intel_digital_port *dig_port)
+static bool tc_phy_is_ready(struct intel_digital_port *dig_port)
 {
 	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
 
 	if (IS_ALDERLAKE_P(i915))
-		return adlp_tc_phy_status_complete(dig_port);
+		return adlp_tc_phy_is_ready(dig_port);
 
-	return icl_tc_phy_status_complete(dig_port);
+	return icl_tc_phy_is_ready(dig_port);
 }
 
 static bool tc_phy_is_owned(struct intel_digital_port *dig_port)
@@ -590,7 +590,7 @@ static bool tc_phy_is_connected(struct intel_digital_port *dig_port,
 {
 	struct intel_encoder *encoder = &dig_port->base;
 	struct drm_i915_private *i915 = to_i915(encoder->base.dev);
-	bool phy_is_ready = tc_phy_status_complete(dig_port);
+	bool phy_is_ready = tc_phy_is_ready(dig_port);
 	bool phy_is_owned = tc_phy_is_owned(dig_port);
 	bool is_connected;
 
@@ -614,7 +614,7 @@ static void tc_phy_wait_for_ready(struct intel_digital_port *dig_port)
 {
 	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
 
-	if (wait_for(tc_phy_status_complete(dig_port), 100))
+	if (wait_for(tc_phy_is_ready(dig_port), 100))
 		drm_err(&i915->drm, "Port %s: timeout waiting for PHY ready\n",
 			dig_port->tc_port_name);
 }
@@ -694,7 +694,7 @@ intel_tc_port_get_current_mode(struct intel_digital_port *dig_port)
 	if (dig_port->tc_legacy_port)
 		tc_phy_wait_for_ready(dig_port);
 
-	phy_is_ready = tc_phy_status_complete(dig_port);
+	phy_is_ready = tc_phy_is_ready(dig_port);
 	phy_is_owned = tc_phy_is_owned(dig_port);
 
 	if (!tc_phy_is_ready_and_owned(dig_port, phy_is_ready, phy_is_owned)) {
-- 
2.37.1

[Intel-gfx] [PATCH 04/29] drm/i915/tc: Use the tc_phy prefix for all TC PHY functions

[Imre Deak]

For consistency use the tc_phy prefix for all TC PHY functions.

Signed-off-by: Imre Deak <imre.deak@intel.com>
---
 drivers/gpu/drm/i915/display/intel_tc.c | 30 ++++++++++++-------------
 1 file changed, 15 insertions(+), 15 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_tc.c b/drivers/gpu/drm/i915/display/intel_tc.c
index 9fecf24b69c16..d2afe8b65beee 100644
--- a/drivers/gpu/drm/i915/display/intel_tc.c
+++ b/drivers/gpu/drm/i915/display/intel_tc.c
@@ -15,7 +15,7 @@
 #include "intel_mg_phy_regs.h"
 #include "intel_tc.h"
 
-static u32 tc_port_live_status_mask(struct intel_digital_port *dig_port);
+static u32 tc_phy_hpd_live_status(struct intel_digital_port *dig_port);
 static bool tc_phy_is_ready(struct intel_digital_port *dig_port);
 static bool tc_phy_take_ownership(struct intel_digital_port *dig_port, bool take);
 
@@ -264,7 +264,7 @@ static void tc_port_fixup_legacy_flag(struct intel_digital_port *dig_port,
  * ICL TC PHY handlers
  * -------------------
  */
-static u32 icl_tc_port_live_status_mask(struct intel_digital_port *dig_port)
+static u32 icl_tc_phy_hpd_live_status(struct intel_digital_port *dig_port)
 {
 	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
 	u32 isr_bit = i915->display.hotplug.pch_hpd[dig_port->base.hpd_pin];
@@ -384,7 +384,7 @@ static void icl_tc_phy_connect(struct intel_digital_port *dig_port,
 		goto out_set_tbt_alt_mode;
 	}
 
-	live_status_mask = tc_port_live_status_mask(dig_port);
+	live_status_mask = tc_phy_hpd_live_status(dig_port);
 	if (!(live_status_mask & (BIT(TC_PORT_DP_ALT) | BIT(TC_PORT_LEGACY))) &&
 	    !dig_port->tc_legacy_port) {
 		drm_dbg_kms(&i915->drm, "Port %s: PHY ownership not required (live status %02x)\n",
@@ -408,7 +408,7 @@ static void icl_tc_phy_connect(struct intel_digital_port *dig_port,
 	 * Now we have to re-check the live state, in case the port recently
 	 * became disconnected. Not necessary for legacy mode.
 	 */
-	if (!(tc_port_live_status_mask(dig_port) & BIT(TC_PORT_DP_ALT))) {
+	if (!(tc_phy_hpd_live_status(dig_port) & BIT(TC_PORT_DP_ALT))) {
 		drm_dbg_kms(&i915->drm, "Port %s: PHY sudden disconnect\n",
 			    dig_port->tc_port_name);
 		goto out_release_phy;
@@ -457,7 +457,7 @@ static void icl_tc_phy_disconnect(struct intel_digital_port *dig_port)
  * ADLP TC PHY handlers
  * --------------------
  */
-static u32 adlp_tc_port_live_status_mask(struct intel_digital_port *dig_port)
+static u32 adlp_tc_phy_hpd_live_status(struct intel_digital_port *dig_port)
 {
 	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
 	enum tc_port tc_port = intel_port_to_tc(i915, dig_port->base.port);
@@ -535,14 +535,14 @@ static bool adlp_tc_phy_is_owned(struct intel_digital_port *dig_port)
  * Generic TC PHY handlers
  * -----------------------
  */
-static u32 tc_port_live_status_mask(struct intel_digital_port *dig_port)
+static u32 tc_phy_hpd_live_status(struct intel_digital_port *dig_port)
 {
 	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
 
 	if (IS_ALDERLAKE_P(i915))
-		return adlp_tc_port_live_status_mask(dig_port);
+		return adlp_tc_phy_hpd_live_status(dig_port);
 
-	return icl_tc_port_live_status_mask(dig_port);
+	return icl_tc_phy_hpd_live_status(dig_port);
 }
 
 static bool tc_phy_is_ready(struct intel_digital_port *dig_port)
@@ -631,7 +631,7 @@ hpd_mask_to_tc_mode(u32 live_status_mask)
 static enum tc_port_mode
 tc_phy_hpd_live_mode(struct intel_digital_port *dig_port)
 {
-	u32 live_status_mask = tc_port_live_status_mask(dig_port);
+	u32 live_status_mask = tc_phy_hpd_live_status(dig_port);
 
 	return hpd_mask_to_tc_mode(live_status_mask);
 }
@@ -678,7 +678,7 @@ get_tc_mode_in_phy_not_owned_state(struct intel_digital_port *dig_port,
 }
 
 static enum tc_port_mode
-intel_tc_port_get_current_mode(struct intel_digital_port *dig_port)
+tc_phy_get_current_mode(struct intel_digital_port *dig_port)
 {
 	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
 	enum tc_port_mode live_mode = tc_phy_hpd_live_mode(dig_port);
@@ -735,9 +735,9 @@ hpd_mask_to_target_mode(struct intel_digital_port *dig_port, u32 live_status_mas
 }
 
 static enum tc_port_mode
-intel_tc_port_get_target_mode(struct intel_digital_port *dig_port)
+tc_phy_get_target_mode(struct intel_digital_port *dig_port)
 {
-	u32 live_status_mask = tc_port_live_status_mask(dig_port);
+	u32 live_status_mask = tc_phy_hpd_live_status(dig_port);
 
 	return hpd_mask_to_target_mode(dig_port, live_status_mask);
 }
@@ -770,7 +770,7 @@ static void intel_tc_port_reset_mode(struct intel_digital_port *dig_port,
 
 static bool intel_tc_port_needs_reset(struct intel_digital_port *dig_port)
 {
-	return intel_tc_port_get_target_mode(dig_port) != dig_port->tc_mode;
+	return tc_phy_get_target_mode(dig_port) != dig_port->tc_mode;
 }
 
 static void intel_tc_port_update_mode(struct intel_digital_port *dig_port,
@@ -847,7 +847,7 @@ void intel_tc_port_init_mode(struct intel_digital_port *dig_port)
 
 	tc_cold_wref = tc_cold_block(dig_port, &domain);
 
-	dig_port->tc_mode = intel_tc_port_get_current_mode(dig_port);
+	dig_port->tc_mode = tc_phy_get_current_mode(dig_port);
 	/*
 	 * Save the initial mode for the state check in
 	 * intel_tc_port_sanitize_mode().
@@ -976,7 +976,7 @@ bool intel_tc_port_connected_locked(struct intel_encoder *encoder)
 
 	drm_WARN_ON(&i915->drm, !intel_tc_port_ref_held(dig_port));
 
-	return tc_port_live_status_mask(dig_port) & BIT(dig_port->tc_mode);
+	return tc_phy_hpd_live_status(dig_port) & BIT(dig_port->tc_mode);
 }
 
 bool intel_tc_port_connected(struct intel_encoder *encoder)
-- 
2.37.1

[Intel-gfx] [PATCH 05/29] drm/i915/tc: Move TC port fields to a new intel_tc_port struct

[Imre Deak]

Move the TC port specific fields from intel_digital_port to a new
intel_tc_port struct. Pass an intel_tc_port pointer to all static
functions in intel_tc.c keeping dig_port accessible for these via a
pointer stored in the new struct.

The next patch will allocate the intel_tc_port dynamically, allowing
moving the struct definition to intel_tc.c.

Signed-off-by: Imre Deak <imre.deak@intel.com>
---
 drivers/gpu/drm/i915/display/intel_display.h  |   7 -
 .../drm/i915/display/intel_display_types.h    |  13 +-
 drivers/gpu/drm/i915/display/intel_tc.c       | 578 ++++++++++--------
 drivers/gpu/drm/i915/display/intel_tc.h       |  26 +
 4 files changed, 335 insertions(+), 289 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display.h b/drivers/gpu/drm/i915/display/intel_display.h
index 596fd3ec19838..287159bdeb0d1 100644
--- a/drivers/gpu/drm/i915/display/intel_display.h
+++ b/drivers/gpu/drm/i915/display/intel_display.h
@@ -164,13 +164,6 @@ enum tc_port {
 	I915_MAX_TC_PORTS
 };
 
-enum tc_port_mode {
-	TC_PORT_DISCONNECTED,
-	TC_PORT_TBT_ALT,
-	TC_PORT_DP_ALT,
-	TC_PORT_LEGACY,
-};
-
 enum aux_ch {
 	AUX_CH_NONE = -1,
 
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
index ab146b5b68bd5..0130c7b7f0232 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -54,6 +54,7 @@
 #include "intel_display_power.h"
 #include "intel_dpll_mgr.h"
 #include "intel_wm_types.h"
+#include "intel_tc.h"
 
 struct drm_printer;
 struct __intel_global_objs_state;
@@ -1780,17 +1781,7 @@ struct intel_digital_port {
 	intel_wakeref_t ddi_io_wakeref;
 	intel_wakeref_t aux_wakeref;
 
-	struct mutex tc_lock;	/* protects the TypeC port mode */
-	intel_wakeref_t tc_lock_wakeref;
-	enum intel_display_power_domain tc_lock_power_domain;
-	struct delayed_work tc_disconnect_phy_work;
-	int tc_link_refcount;
-	bool tc_legacy_port:1;
-	char tc_port_name[8];
-	enum tc_port_mode tc_mode;
-	enum tc_port_mode tc_init_mode;
-	enum phy_fia tc_phy_fia;
-	u8 tc_phy_fia_idx;
+	struct intel_tc_port tc;
 
 	/* protects num_hdcp_streams reference count, hdcp_port_data and hdcp_auth_status */
 	struct mutex hdcp_mutex;
diff --git a/drivers/gpu/drm/i915/display/intel_tc.c b/drivers/gpu/drm/i915/display/intel_tc.c
index d2afe8b65beee..70771044a2fe8 100644
--- a/drivers/gpu/drm/i915/display/intel_tc.c
+++ b/drivers/gpu/drm/i915/display/intel_tc.c
@@ -15,9 +15,9 @@
 #include "intel_mg_phy_regs.h"
 #include "intel_tc.h"
 
-static u32 tc_phy_hpd_live_status(struct intel_digital_port *dig_port);
-static bool tc_phy_is_ready(struct intel_digital_port *dig_port);
-static bool tc_phy_take_ownership(struct intel_digital_port *dig_port, bool take);
+static u32 tc_phy_hpd_live_status(struct intel_tc_port *tc);
+static bool tc_phy_is_ready(struct intel_tc_port *tc);
+static bool tc_phy_take_ownership(struct intel_tc_port *tc, bool take);
 
 static const char *tc_port_mode_name(enum tc_port_mode mode)
 {
@@ -34,13 +34,24 @@ static const char *tc_port_mode_name(enum tc_port_mode mode)
 	return names[mode];
 }
 
+static struct intel_tc_port *to_tc_port(struct intel_digital_port *dig_port)
+{
+	return &dig_port->tc;
+}
+
+static struct drm_i915_private *tc_to_i915(struct intel_tc_port *tc)
+{
+	return to_i915(tc->dig_port->base.base.dev);
+}
+
 static bool intel_tc_port_in_mode(struct intel_digital_port *dig_port,
 				  enum tc_port_mode mode)
 {
 	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
 	enum phy phy = intel_port_to_phy(i915, dig_port->base.port);
+	struct intel_tc_port *tc = to_tc_port(dig_port);
 
-	return intel_phy_is_tc(i915, phy) && dig_port->tc_mode == mode;
+	return intel_phy_is_tc(i915, phy) && tc->mode == mode;
 }
 
 bool intel_tc_port_in_tbt_alt_mode(struct intel_digital_port *dig_port)
@@ -61,15 +72,17 @@ bool intel_tc_port_in_legacy_mode(struct intel_digital_port *dig_port)
 bool intel_tc_cold_requires_aux_pw(struct intel_digital_port *dig_port)
 {
 	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
+	struct intel_tc_port *tc = to_tc_port(dig_port);
 
-	return (DISPLAY_VER(i915) == 11 && dig_port->tc_legacy_port) ||
+	return (DISPLAY_VER(i915) == 11 && tc->legacy_port) ||
 		IS_ALDERLAKE_P(i915);
 }
 
 static enum intel_display_power_domain
-tc_cold_get_power_domain(struct intel_digital_port *dig_port, enum tc_port_mode mode)
+tc_cold_get_power_domain(struct intel_tc_port *tc, enum tc_port_mode mode)
 {
-	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
+	struct drm_i915_private *i915 = tc_to_i915(tc);
+	struct intel_digital_port *dig_port = tc->dig_port;
 
 	if (mode == TC_PORT_TBT_ALT || !intel_tc_cold_requires_aux_pw(dig_port))
 		return POWER_DOMAIN_TC_COLD_OFF;
@@ -78,27 +91,27 @@ tc_cold_get_power_domain(struct intel_digital_port *dig_port, enum tc_port_mode
 }
 
 static intel_wakeref_t
-tc_cold_block_in_mode(struct intel_digital_port *dig_port, enum tc_port_mode mode,
+tc_cold_block_in_mode(struct intel_tc_port *tc, enum tc_port_mode mode,
 		      enum intel_display_power_domain *domain)
 {
-	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
+	struct drm_i915_private *i915 = tc_to_i915(tc);
 
-	*domain = tc_cold_get_power_domain(dig_port, mode);
+	*domain = tc_cold_get_power_domain(tc, mode);
 
 	return intel_display_power_get(i915, *domain);
 }
 
 static intel_wakeref_t
-tc_cold_block(struct intel_digital_port *dig_port, enum intel_display_power_domain *domain)
+tc_cold_block(struct intel_tc_port *tc, enum intel_display_power_domain *domain)
 {
-	return tc_cold_block_in_mode(dig_port, dig_port->tc_mode, domain);
+	return tc_cold_block_in_mode(tc, tc->mode, domain);
 }
 
 static void
-tc_cold_unblock(struct intel_digital_port *dig_port, enum intel_display_power_domain domain,
+tc_cold_unblock(struct intel_tc_port *tc, enum intel_display_power_domain domain,
 		intel_wakeref_t wakeref)
 {
-	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
+	struct drm_i915_private *i915 = tc_to_i915(tc);
 
 	/*
 	 * wakeref == -1, means some error happened saving save_depot_stack but
@@ -112,73 +125,76 @@ tc_cold_unblock(struct intel_digital_port *dig_port, enum intel_display_power_do
 }
 
 static void
-assert_tc_cold_blocked(struct intel_digital_port *dig_port)
+assert_tc_cold_blocked(struct intel_tc_port *tc)
 {
-	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
+	struct drm_i915_private *i915 = tc_to_i915(tc);
 	bool enabled;
 
 	enabled = intel_display_power_is_enabled(i915,
-						 tc_cold_get_power_domain(dig_port,
-									  dig_port->tc_mode));
+						 tc_cold_get_power_domain(tc,
+									  tc->mode));
 	drm_WARN_ON(&i915->drm, !enabled);
 }
 
 static enum intel_display_power_domain
-tc_port_power_domain(struct intel_digital_port *dig_port)
+tc_port_power_domain(struct intel_tc_port *tc)
 {
-	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
-	enum tc_port tc_port = intel_port_to_tc(i915, dig_port->base.port);
+	struct drm_i915_private *i915 = tc_to_i915(tc);
+	enum tc_port tc_port = intel_port_to_tc(i915, tc->dig_port->base.port);
 
 	return POWER_DOMAIN_PORT_DDI_LANES_TC1 + tc_port - TC_PORT_1;
 }
 
 static void
-assert_tc_port_power_enabled(struct intel_digital_port *dig_port)
+assert_tc_port_power_enabled(struct intel_tc_port *tc)
 {
-	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
+	struct drm_i915_private *i915 = tc_to_i915(tc);
 
 	drm_WARN_ON(&i915->drm,
-		    !intel_display_power_is_enabled(i915, tc_port_power_domain(dig_port)));
+		    !intel_display_power_is_enabled(i915, tc_port_power_domain(tc)));
 }
 
 u32 intel_tc_port_get_lane_mask(struct intel_digital_port *dig_port)
 {
 	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
+	struct intel_tc_port *tc = to_tc_port(dig_port);
 	u32 lane_mask;
 
-	lane_mask = intel_de_read(i915, PORT_TX_DFLEXDPSP(dig_port->tc_phy_fia));
+	lane_mask = intel_de_read(i915, PORT_TX_DFLEXDPSP(tc->phy_fia));
 
 	drm_WARN_ON(&i915->drm, lane_mask == 0xffffffff);
-	assert_tc_cold_blocked(dig_port);
+	assert_tc_cold_blocked(tc);
 
-	lane_mask &= DP_LANE_ASSIGNMENT_MASK(dig_port->tc_phy_fia_idx);
-	return lane_mask >> DP_LANE_ASSIGNMENT_SHIFT(dig_port->tc_phy_fia_idx);
+	lane_mask &= DP_LANE_ASSIGNMENT_MASK(tc->phy_fia_idx);
+	return lane_mask >> DP_LANE_ASSIGNMENT_SHIFT(tc->phy_fia_idx);
 }
 
 u32 intel_tc_port_get_pin_assignment_mask(struct intel_digital_port *dig_port)
 {
 	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
+	struct intel_tc_port *tc = to_tc_port(dig_port);
 	u32 pin_mask;
 
-	pin_mask = intel_de_read(i915, PORT_TX_DFLEXPA1(dig_port->tc_phy_fia));
+	pin_mask = intel_de_read(i915, PORT_TX_DFLEXPA1(tc->phy_fia));
 
 	drm_WARN_ON(&i915->drm, pin_mask == 0xffffffff);
-	assert_tc_cold_blocked(dig_port);
+	assert_tc_cold_blocked(tc);
 
-	return (pin_mask & DP_PIN_ASSIGNMENT_MASK(dig_port->tc_phy_fia_idx)) >>
-	       DP_PIN_ASSIGNMENT_SHIFT(dig_port->tc_phy_fia_idx);
+	return (pin_mask & DP_PIN_ASSIGNMENT_MASK(tc->phy_fia_idx)) >>
+	       DP_PIN_ASSIGNMENT_SHIFT(tc->phy_fia_idx);
 }
 
 int intel_tc_port_fia_max_lane_count(struct intel_digital_port *dig_port)
 {
 	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
+	struct intel_tc_port *tc = to_tc_port(dig_port);
 	intel_wakeref_t wakeref;
 	u32 lane_mask;
 
-	if (dig_port->tc_mode != TC_PORT_DP_ALT)
+	if (tc->mode != TC_PORT_DP_ALT)
 		return 4;
 
-	assert_tc_cold_blocked(dig_port);
+	assert_tc_cold_blocked(tc);
 
 	lane_mask = 0;
 	with_intel_display_power(i915, POWER_DOMAIN_DISPLAY_CORE, wakeref)
@@ -205,45 +221,46 @@ void intel_tc_port_set_fia_lane_count(struct intel_digital_port *dig_port,
 				      int required_lanes)
 {
 	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
+	struct intel_tc_port *tc = to_tc_port(dig_port);
 	bool lane_reversal = dig_port->saved_port_bits & DDI_BUF_PORT_REVERSAL;
 	u32 val;
 
 	drm_WARN_ON(&i915->drm,
-		    lane_reversal && dig_port->tc_mode != TC_PORT_LEGACY);
+		    lane_reversal && tc->mode != TC_PORT_LEGACY);
 
-	assert_tc_cold_blocked(dig_port);
+	assert_tc_cold_blocked(tc);
 
-	val = intel_de_read(i915, PORT_TX_DFLEXDPMLE1(dig_port->tc_phy_fia));
-	val &= ~DFLEXDPMLE1_DPMLETC_MASK(dig_port->tc_phy_fia_idx);
+	val = intel_de_read(i915, PORT_TX_DFLEXDPMLE1(tc->phy_fia));
+	val &= ~DFLEXDPMLE1_DPMLETC_MASK(tc->phy_fia_idx);
 
 	switch (required_lanes) {
 	case 1:
 		val |= lane_reversal ?
-			DFLEXDPMLE1_DPMLETC_ML3(dig_port->tc_phy_fia_idx) :
-			DFLEXDPMLE1_DPMLETC_ML0(dig_port->tc_phy_fia_idx);
+			DFLEXDPMLE1_DPMLETC_ML3(tc->phy_fia_idx) :
+			DFLEXDPMLE1_DPMLETC_ML0(tc->phy_fia_idx);
 		break;
 	case 2:
 		val |= lane_reversal ?
-			DFLEXDPMLE1_DPMLETC_ML3_2(dig_port->tc_phy_fia_idx) :
-			DFLEXDPMLE1_DPMLETC_ML1_0(dig_port->tc_phy_fia_idx);
+			DFLEXDPMLE1_DPMLETC_ML3_2(tc->phy_fia_idx) :
+			DFLEXDPMLE1_DPMLETC_ML1_0(tc->phy_fia_idx);
 		break;
 	case 4:
-		val |= DFLEXDPMLE1_DPMLETC_ML3_0(dig_port->tc_phy_fia_idx);
+		val |= DFLEXDPMLE1_DPMLETC_ML3_0(tc->phy_fia_idx);
 		break;
 	default:
 		MISSING_CASE(required_lanes);
 	}
 
-	intel_de_write(i915, PORT_TX_DFLEXDPMLE1(dig_port->tc_phy_fia), val);
+	intel_de_write(i915, PORT_TX_DFLEXDPMLE1(tc->phy_fia), val);
 }
 
-static void tc_port_fixup_legacy_flag(struct intel_digital_port *dig_port,
+static void tc_port_fixup_legacy_flag(struct intel_tc_port *tc,
 				      u32 live_status_mask)
 {
-	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
+	struct drm_i915_private *i915 = tc_to_i915(tc);
 	u32 valid_hpd_mask;
 
-	if (dig_port->tc_legacy_port)
+	if (tc->legacy_port)
 		valid_hpd_mask = BIT(TC_PORT_LEGACY);
 	else
 		valid_hpd_mask = BIT(TC_PORT_DP_ALT) |
@@ -255,34 +272,35 @@ static void tc_port_fixup_legacy_flag(struct intel_digital_port *dig_port,
 	/* If live status mismatches the VBT flag, trust the live status. */
 	drm_dbg_kms(&i915->drm,
 		    "Port %s: live status %08x mismatches the legacy port flag %08x, fixing flag\n",
-		    dig_port->tc_port_name, live_status_mask, valid_hpd_mask);
+		    tc->port_name, live_status_mask, valid_hpd_mask);
 
-	dig_port->tc_legacy_port = !dig_port->tc_legacy_port;
+	tc->legacy_port = !tc->legacy_port;
 }
 
 /**
  * ICL TC PHY handlers
  * -------------------
  */
-static u32 icl_tc_phy_hpd_live_status(struct intel_digital_port *dig_port)
+static u32 icl_tc_phy_hpd_live_status(struct intel_tc_port *tc)
 {
-	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
+	struct drm_i915_private *i915 = tc_to_i915(tc);
+	struct intel_digital_port *dig_port = tc->dig_port;
 	u32 isr_bit = i915->display.hotplug.pch_hpd[dig_port->base.hpd_pin];
 	u32 mask = 0;
 	u32 val;
 
-	val = intel_de_read(i915, PORT_TX_DFLEXDPSP(dig_port->tc_phy_fia));
+	val = intel_de_read(i915, PORT_TX_DFLEXDPSP(tc->phy_fia));
 
 	if (val == 0xffffffff) {
 		drm_dbg_kms(&i915->drm,
 			    "Port %s: PHY in TCCOLD, nothing connected\n",
-			    dig_port->tc_port_name);
+			    tc->port_name);
 		return mask;
 	}
 
-	if (val & TC_LIVE_STATE_TBT(dig_port->tc_phy_fia_idx))
+	if (val & TC_LIVE_STATE_TBT(tc->phy_fia_idx))
 		mask |= BIT(TC_PORT_TBT_ALT);
-	if (val & TC_LIVE_STATE_TC(dig_port->tc_phy_fia_idx))
+	if (val & TC_LIVE_STATE_TC(tc->phy_fia_idx))
 		mask |= BIT(TC_PORT_DP_ALT);
 
 	if (intel_de_read(i915, SDEISR) & isr_bit)
@@ -290,7 +308,7 @@ static u32 icl_tc_phy_hpd_live_status(struct intel_digital_port *dig_port)
 
 	/* The sink can be connected only in a single mode. */
 	if (!drm_WARN_ON_ONCE(&i915->drm, hweight32(mask) > 1))
-		tc_port_fixup_legacy_flag(dig_port, mask);
+		tc_port_fixup_legacy_flag(tc, mask);
 
 	return mask;
 }
@@ -303,60 +321,60 @@ static u32 icl_tc_phy_hpd_live_status(struct intel_digital_port *dig_port)
  * owned by the TBT subsystem and so switching the ownership to display is not
  * required.
  */
-static bool icl_tc_phy_is_ready(struct intel_digital_port *dig_port)
+static bool icl_tc_phy_is_ready(struct intel_tc_port *tc)
 {
-	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
+	struct drm_i915_private *i915 = tc_to_i915(tc);
 	u32 val;
 
-	val = intel_de_read(i915, PORT_TX_DFLEXDPPMS(dig_port->tc_phy_fia));
+	val = intel_de_read(i915, PORT_TX_DFLEXDPPMS(tc->phy_fia));
 	if (val == 0xffffffff) {
 		drm_dbg_kms(&i915->drm,
 			    "Port %s: PHY in TCCOLD, assuming not ready\n",
-			    dig_port->tc_port_name);
+			    tc->port_name);
 		return false;
 	}
 
-	return val & DP_PHY_MODE_STATUS_COMPLETED(dig_port->tc_phy_fia_idx);
+	return val & DP_PHY_MODE_STATUS_COMPLETED(tc->phy_fia_idx);
 }
 
-static bool icl_tc_phy_take_ownership(struct intel_digital_port *dig_port,
+static bool icl_tc_phy_take_ownership(struct intel_tc_port *tc,
 				      bool take)
 {
-	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
+	struct drm_i915_private *i915 = tc_to_i915(tc);
 	u32 val;
 
-	val = intel_de_read(i915, PORT_TX_DFLEXDPCSSS(dig_port->tc_phy_fia));
+	val = intel_de_read(i915, PORT_TX_DFLEXDPCSSS(tc->phy_fia));
 	if (val == 0xffffffff) {
 		drm_dbg_kms(&i915->drm,
 			    "Port %s: PHY in TCCOLD, can't %s ownership\n",
-			    dig_port->tc_port_name, take ? "take" : "release");
+			    tc->port_name, take ? "take" : "release");
 
 		return false;
 	}
 
-	val &= ~DP_PHY_MODE_STATUS_NOT_SAFE(dig_port->tc_phy_fia_idx);
+	val &= ~DP_PHY_MODE_STATUS_NOT_SAFE(tc->phy_fia_idx);
 	if (take)
-		val |= DP_PHY_MODE_STATUS_NOT_SAFE(dig_port->tc_phy_fia_idx);
+		val |= DP_PHY_MODE_STATUS_NOT_SAFE(tc->phy_fia_idx);
 
-	intel_de_write(i915, PORT_TX_DFLEXDPCSSS(dig_port->tc_phy_fia), val);
+	intel_de_write(i915, PORT_TX_DFLEXDPCSSS(tc->phy_fia), val);
 
 	return true;
 }
 
-static bool icl_tc_phy_is_owned(struct intel_digital_port *dig_port)
+static bool icl_tc_phy_is_owned(struct intel_tc_port *tc)
 {
-	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
+	struct drm_i915_private *i915 = tc_to_i915(tc);
 	u32 val;
 
-	val = intel_de_read(i915, PORT_TX_DFLEXDPCSSS(dig_port->tc_phy_fia));
+	val = intel_de_read(i915, PORT_TX_DFLEXDPCSSS(tc->phy_fia));
 	if (val == 0xffffffff) {
 		drm_dbg_kms(&i915->drm,
 			    "Port %s: PHY in TCCOLD, assume not owned\n",
-			    dig_port->tc_port_name);
+			    tc->port_name);
 		return false;
 	}
 
-	return val & DP_PHY_MODE_STATUS_NOT_SAFE(dig_port->tc_phy_fia_idx);
+	return val & DP_PHY_MODE_STATUS_NOT_SAFE(tc->phy_fia_idx);
 }
 
 /*
@@ -370,36 +388,37 @@ static bool icl_tc_phy_is_owned(struct intel_digital_port *dig_port)
  * connect and disconnect to cleanly transfer ownership with the controller and
  * set the type-C power state.
  */
-static void icl_tc_phy_connect(struct intel_digital_port *dig_port,
+static void icl_tc_phy_connect(struct intel_tc_port *tc,
 			       int required_lanes)
 {
-	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
+	struct drm_i915_private *i915 = tc_to_i915(tc);
+	struct intel_digital_port *dig_port = tc->dig_port;
 	u32 live_status_mask;
 	int max_lanes;
 
-	if (!tc_phy_is_ready(dig_port) &&
-	    !drm_WARN_ON(&i915->drm, dig_port->tc_legacy_port)) {
+	if (!tc_phy_is_ready(tc) &&
+	    !drm_WARN_ON(&i915->drm, tc->legacy_port)) {
 		drm_dbg_kms(&i915->drm, "Port %s: PHY not ready\n",
-			    dig_port->tc_port_name);
+			    tc->port_name);
 		goto out_set_tbt_alt_mode;
 	}
 
-	live_status_mask = tc_phy_hpd_live_status(dig_port);
+	live_status_mask = tc_phy_hpd_live_status(tc);
 	if (!(live_status_mask & (BIT(TC_PORT_DP_ALT) | BIT(TC_PORT_LEGACY))) &&
-	    !dig_port->tc_legacy_port) {
+	    !tc->legacy_port) {
 		drm_dbg_kms(&i915->drm, "Port %s: PHY ownership not required (live status %02x)\n",
-			    dig_port->tc_port_name, live_status_mask);
+			    tc->port_name, live_status_mask);
 		goto out_set_tbt_alt_mode;
 	}
 
-	if (!tc_phy_take_ownership(dig_port, true) &&
-	    !drm_WARN_ON(&i915->drm, dig_port->tc_legacy_port))
+	if (!tc_phy_take_ownership(tc, true) &&
+	    !drm_WARN_ON(&i915->drm, tc->legacy_port))
 		goto out_set_tbt_alt_mode;
 
 	max_lanes = intel_tc_port_fia_max_lane_count(dig_port);
-	if (dig_port->tc_legacy_port) {
+	if (tc->legacy_port) {
 		drm_WARN_ON(&i915->drm, max_lanes != 4);
-		dig_port->tc_mode = TC_PORT_LEGACY;
+		tc->mode = TC_PORT_LEGACY;
 
 		return;
 	}
@@ -408,48 +427,48 @@ static void icl_tc_phy_connect(struct intel_digital_port *dig_port,
 	 * Now we have to re-check the live state, in case the port recently
 	 * became disconnected. Not necessary for legacy mode.
 	 */
-	if (!(tc_phy_hpd_live_status(dig_port) & BIT(TC_PORT_DP_ALT))) {
+	if (!(tc_phy_hpd_live_status(tc) & BIT(TC_PORT_DP_ALT))) {
 		drm_dbg_kms(&i915->drm, "Port %s: PHY sudden disconnect\n",
-			    dig_port->tc_port_name);
+			    tc->port_name);
 		goto out_release_phy;
 	}
 
 	if (max_lanes < required_lanes) {
 		drm_dbg_kms(&i915->drm,
 			    "Port %s: PHY max lanes %d < required lanes %d\n",
-			    dig_port->tc_port_name,
+			    tc->port_name,
 			    max_lanes, required_lanes);
 		goto out_release_phy;
 	}
 
-	dig_port->tc_mode = TC_PORT_DP_ALT;
+	tc->mode = TC_PORT_DP_ALT;
 
 	return;
 
 out_release_phy:
-	tc_phy_take_ownership(dig_port, false);
+	tc_phy_take_ownership(tc, false);
 out_set_tbt_alt_mode:
-	dig_port->tc_mode = TC_PORT_TBT_ALT;
+	tc->mode = TC_PORT_TBT_ALT;
 }
 
 /*
  * See the comment at the connect function. This implements the Disconnect
  * Flow.
  */
-static void icl_tc_phy_disconnect(struct intel_digital_port *dig_port)
+static void icl_tc_phy_disconnect(struct intel_tc_port *tc)
 {
-	switch (dig_port->tc_mode) {
+	switch (tc->mode) {
 	case TC_PORT_LEGACY:
 	case TC_PORT_DP_ALT:
-		tc_phy_take_ownership(dig_port, false);
+		tc_phy_take_ownership(tc, false);
 		fallthrough;
 	case TC_PORT_TBT_ALT:
-		dig_port->tc_mode = TC_PORT_DISCONNECTED;
+		tc->mode = TC_PORT_DISCONNECTED;
 		fallthrough;
 	case TC_PORT_DISCONNECTED:
 		break;
 	default:
-		MISSING_CASE(dig_port->tc_mode);
+		MISSING_CASE(tc->mode);
 	}
 }
 
@@ -457,9 +476,10 @@ static void icl_tc_phy_disconnect(struct intel_digital_port *dig_port)
  * ADLP TC PHY handlers
  * --------------------
  */
-static u32 adlp_tc_phy_hpd_live_status(struct intel_digital_port *dig_port)
+static u32 adlp_tc_phy_hpd_live_status(struct intel_tc_port *tc)
 {
-	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
+	struct drm_i915_private *i915 = tc_to_i915(tc);
+	struct intel_digital_port *dig_port = tc->dig_port;
 	enum tc_port tc_port = intel_port_to_tc(i915, dig_port->base.port);
 	u32 isr_bit = i915->display.hotplug.pch_hpd[dig_port->base.hpd_pin];
 	u32 val, mask = 0;
@@ -480,7 +500,7 @@ static u32 adlp_tc_phy_hpd_live_status(struct intel_digital_port *dig_port)
 
 	/* The sink can be connected only in a single mode. */
 	if (!drm_WARN_ON(&i915->drm, hweight32(mask) > 1))
-		tc_port_fixup_legacy_flag(dig_port, mask);
+		tc_port_fixup_legacy_flag(tc, mask);
 
 	return mask;
 }
@@ -492,28 +512,28 @@ static u32 adlp_tc_phy_hpd_live_status(struct intel_digital_port *dig_port)
  * DP-alt, legacy or nothing). For TBT-alt sinks the PHY is owned by the TBT
  * subsystem and so switching the ownership to display is not required.
  */
-static bool adlp_tc_phy_is_ready(struct intel_digital_port *dig_port)
+static bool adlp_tc_phy_is_ready(struct intel_tc_port *tc)
 {
-	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
-	enum tc_port tc_port = intel_port_to_tc(i915, dig_port->base.port);
+	struct drm_i915_private *i915 = tc_to_i915(tc);
+	enum tc_port tc_port = intel_port_to_tc(i915, tc->dig_port->base.port);
 	u32 val;
 
 	val = intel_de_read(i915, TCSS_DDI_STATUS(tc_port));
 	if (val == 0xffffffff) {
 		drm_dbg_kms(&i915->drm,
 			    "Port %s: PHY in TCCOLD, assuming not ready\n",
-			    dig_port->tc_port_name);
+			    tc->port_name);
 		return false;
 	}
 
 	return val & TCSS_DDI_STATUS_READY;
 }
 
-static bool adlp_tc_phy_take_ownership(struct intel_digital_port *dig_port,
+static bool adlp_tc_phy_take_ownership(struct intel_tc_port *tc,
 				       bool take)
 {
-	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
-	enum port port = dig_port->base.port;
+	struct drm_i915_private *i915 = tc_to_i915(tc);
+	enum port port = tc->dig_port->base.port;
 
 	intel_de_rmw(i915, DDI_BUF_CTL(port), DDI_BUF_CTL_TC_PHY_OWNERSHIP,
 		     take ? DDI_BUF_CTL_TC_PHY_OWNERSHIP : 0);
@@ -521,10 +541,10 @@ static bool adlp_tc_phy_take_ownership(struct intel_digital_port *dig_port,
 	return true;
 }
 
-static bool adlp_tc_phy_is_owned(struct intel_digital_port *dig_port)
+static bool adlp_tc_phy_is_owned(struct intel_tc_port *tc)
 {
-	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
-	enum port port = dig_port->base.port;
+	struct drm_i915_private *i915 = tc_to_i915(tc);
+	enum port port = tc->dig_port->base.port;
 	u32 val;
 
 	val = intel_de_read(i915, DDI_BUF_CTL(port));
@@ -535,73 +555,73 @@ static bool adlp_tc_phy_is_owned(struct intel_digital_port *dig_port)
  * Generic TC PHY handlers
  * -----------------------
  */
-static u32 tc_phy_hpd_live_status(struct intel_digital_port *dig_port)
+static u32 tc_phy_hpd_live_status(struct intel_tc_port *tc)
 {
-	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
+	struct drm_i915_private *i915 = tc_to_i915(tc);
 
 	if (IS_ALDERLAKE_P(i915))
-		return adlp_tc_phy_hpd_live_status(dig_port);
+		return adlp_tc_phy_hpd_live_status(tc);
 
-	return icl_tc_phy_hpd_live_status(dig_port);
+	return icl_tc_phy_hpd_live_status(tc);
 }
 
-static bool tc_phy_is_ready(struct intel_digital_port *dig_port)
+static bool tc_phy_is_ready(struct intel_tc_port *tc)
 {
-	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
+	struct drm_i915_private *i915 = tc_to_i915(tc);
 
 	if (IS_ALDERLAKE_P(i915))
-		return adlp_tc_phy_is_ready(dig_port);
+		return adlp_tc_phy_is_ready(tc);
 
-	return icl_tc_phy_is_ready(dig_port);
+	return icl_tc_phy_is_ready(tc);
 }
 
-static bool tc_phy_is_owned(struct intel_digital_port *dig_port)
+static bool tc_phy_is_owned(struct intel_tc_port *tc)
 {
-	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
+	struct drm_i915_private *i915 = tc_to_i915(tc);
 
 	if (IS_ALDERLAKE_P(i915))
-		return adlp_tc_phy_is_owned(dig_port);
+		return adlp_tc_phy_is_owned(tc);
 
-	return icl_tc_phy_is_owned(dig_port);
+	return icl_tc_phy_is_owned(tc);
 }
 
-static bool tc_phy_take_ownership(struct intel_digital_port *dig_port, bool take)
+static bool tc_phy_take_ownership(struct intel_tc_port *tc, bool take)
 {
-	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
+	struct drm_i915_private *i915 = tc_to_i915(tc);
 
 	if (IS_ALDERLAKE_P(i915))
-		return adlp_tc_phy_take_ownership(dig_port, take);
+		return adlp_tc_phy_take_ownership(tc, take);
 
-	return icl_tc_phy_take_ownership(dig_port, take);
+	return icl_tc_phy_take_ownership(tc, take);
 }
 
-static bool tc_phy_is_ready_and_owned(struct intel_digital_port *dig_port,
+static bool tc_phy_is_ready_and_owned(struct intel_tc_port *tc,
 				      bool phy_is_ready, bool phy_is_owned)
 {
-	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
+	struct drm_i915_private *i915 = tc_to_i915(tc);
 
 	drm_WARN_ON(&i915->drm, phy_is_owned && !phy_is_ready);
 
 	return phy_is_ready && phy_is_owned;
 }
 
-static bool tc_phy_is_connected(struct intel_digital_port *dig_port,
+static bool tc_phy_is_connected(struct intel_tc_port *tc,
 				enum icl_port_dpll_id port_pll_type)
 {
-	struct intel_encoder *encoder = &dig_port->base;
+	struct intel_encoder *encoder = &tc->dig_port->base;
 	struct drm_i915_private *i915 = to_i915(encoder->base.dev);
-	bool phy_is_ready = tc_phy_is_ready(dig_port);
-	bool phy_is_owned = tc_phy_is_owned(dig_port);
+	bool phy_is_ready = tc_phy_is_ready(tc);
+	bool phy_is_owned = tc_phy_is_owned(tc);
 	bool is_connected;
 
-	if (tc_phy_is_ready_and_owned(dig_port, phy_is_ready, phy_is_owned))
+	if (tc_phy_is_ready_and_owned(tc, phy_is_ready, phy_is_owned))
 		is_connected = port_pll_type == ICL_PORT_DPLL_MG_PHY;
 	else
 		is_connected = port_pll_type == ICL_PORT_DPLL_DEFAULT;
 
 	drm_dbg_kms(&i915->drm,
 		    "Port %s: PHY connected: %s (ready: %s, owned: %s, pll_type: %s)\n",
-		    dig_port->tc_port_name,
+		    tc->port_name,
 		    str_yes_no(is_connected),
 		    str_yes_no(phy_is_ready),
 		    str_yes_no(phy_is_owned),
@@ -610,13 +630,13 @@ static bool tc_phy_is_connected(struct intel_digital_port *dig_port,
 	return is_connected;
 }
 
-static void tc_phy_wait_for_ready(struct intel_digital_port *dig_port)
+static void tc_phy_wait_for_ready(struct intel_tc_port *tc)
 {
-	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
+	struct drm_i915_private *i915 = tc_to_i915(tc);
 
-	if (wait_for(tc_phy_is_ready(dig_port), 100))
+	if (wait_for(tc_phy_is_ready(tc), 100))
 		drm_err(&i915->drm, "Port %s: timeout waiting for PHY ready\n",
-			dig_port->tc_port_name);
+			tc->port_name);
 }
 
 static enum tc_port_mode
@@ -629,15 +649,15 @@ hpd_mask_to_tc_mode(u32 live_status_mask)
 }
 
 static enum tc_port_mode
-tc_phy_hpd_live_mode(struct intel_digital_port *dig_port)
+tc_phy_hpd_live_mode(struct intel_tc_port *tc)
 {
-	u32 live_status_mask = tc_phy_hpd_live_status(dig_port);
+	u32 live_status_mask = tc_phy_hpd_live_status(tc);
 
 	return hpd_mask_to_tc_mode(live_status_mask);
 }
 
 static enum tc_port_mode
-get_tc_mode_in_phy_owned_state(struct intel_digital_port *dig_port,
+get_tc_mode_in_phy_owned_state(struct intel_tc_port *tc,
 			       enum tc_port_mode live_mode)
 {
 	switch (live_mode) {
@@ -649,7 +669,7 @@ get_tc_mode_in_phy_owned_state(struct intel_digital_port *dig_port,
 		fallthrough;
 	case TC_PORT_TBT_ALT:
 	case TC_PORT_DISCONNECTED:
-		if (dig_port->tc_legacy_port)
+		if (tc->legacy_port)
 			return TC_PORT_LEGACY;
 		else
 			return TC_PORT_DP_ALT;
@@ -657,7 +677,7 @@ get_tc_mode_in_phy_owned_state(struct intel_digital_port *dig_port,
 }
 
 static enum tc_port_mode
-get_tc_mode_in_phy_not_owned_state(struct intel_digital_port *dig_port,
+get_tc_mode_in_phy_not_owned_state(struct intel_tc_port *tc,
 				   enum tc_port_mode live_mode)
 {
 	switch (live_mode) {
@@ -670,7 +690,7 @@ get_tc_mode_in_phy_not_owned_state(struct intel_digital_port *dig_port,
 		MISSING_CASE(live_mode);
 		fallthrough;
 	case TC_PORT_DISCONNECTED:
-		if (dig_port->tc_legacy_port)
+		if (tc->legacy_port)
 			return TC_PORT_DISCONNECTED;
 		else
 			return TC_PORT_TBT_ALT;
@@ -678,10 +698,10 @@ get_tc_mode_in_phy_not_owned_state(struct intel_digital_port *dig_port,
 }
 
 static enum tc_port_mode
-tc_phy_get_current_mode(struct intel_digital_port *dig_port)
+tc_phy_get_current_mode(struct intel_tc_port *tc)
 {
-	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
-	enum tc_port_mode live_mode = tc_phy_hpd_live_mode(dig_port);
+	struct drm_i915_private *i915 = tc_to_i915(tc);
+	enum tc_port_mode live_mode = tc_phy_hpd_live_mode(tc);
 	bool phy_is_ready;
 	bool phy_is_owned;
 	enum tc_port_mode mode;
@@ -691,22 +711,22 @@ tc_phy_get_current_mode(struct intel_digital_port *dig_port)
 	 * and system resume whether or not a sink is connected. Wait here for
 	 * the initialization to get ready.
 	 */
-	if (dig_port->tc_legacy_port)
-		tc_phy_wait_for_ready(dig_port);
+	if (tc->legacy_port)
+		tc_phy_wait_for_ready(tc);
 
-	phy_is_ready = tc_phy_is_ready(dig_port);
-	phy_is_owned = tc_phy_is_owned(dig_port);
+	phy_is_ready = tc_phy_is_ready(tc);
+	phy_is_owned = tc_phy_is_owned(tc);
 
-	if (!tc_phy_is_ready_and_owned(dig_port, phy_is_ready, phy_is_owned)) {
-		mode = get_tc_mode_in_phy_not_owned_state(dig_port, live_mode);
+	if (!tc_phy_is_ready_and_owned(tc, phy_is_ready, phy_is_owned)) {
+		mode = get_tc_mode_in_phy_not_owned_state(tc, live_mode);
 	} else {
 		drm_WARN_ON(&i915->drm, live_mode == TC_PORT_TBT_ALT);
-		mode = get_tc_mode_in_phy_owned_state(dig_port, live_mode);
+		mode = get_tc_mode_in_phy_owned_state(tc, live_mode);
 	}
 
 	drm_dbg_kms(&i915->drm,
 		    "Port %s: PHY mode: %s (ready: %s, owned: %s, HPD: %s)\n",
-		    dig_port->tc_port_name,
+		    tc->port_name,
 		    tc_port_mode_name(mode),
 		    str_yes_no(phy_is_ready),
 		    str_yes_no(phy_is_owned),
@@ -715,38 +735,39 @@ tc_phy_get_current_mode(struct intel_digital_port *dig_port)
 	return mode;
 }
 
-static enum tc_port_mode default_tc_mode(struct intel_digital_port *dig_port)
+static enum tc_port_mode default_tc_mode(struct intel_tc_port *tc)
 {
-	if (dig_port->tc_legacy_port)
+	if (tc->legacy_port)
 		return TC_PORT_LEGACY;
 
 	return TC_PORT_TBT_ALT;
 }
 
 static enum tc_port_mode
-hpd_mask_to_target_mode(struct intel_digital_port *dig_port, u32 live_status_mask)
+hpd_mask_to_target_mode(struct intel_tc_port *tc, u32 live_status_mask)
 {
 	enum tc_port_mode mode = hpd_mask_to_tc_mode(live_status_mask);
 
 	if (mode != TC_PORT_DISCONNECTED)
 		return mode;
 
-	return default_tc_mode(dig_port);
+	return default_tc_mode(tc);
 }
 
 static enum tc_port_mode
-tc_phy_get_target_mode(struct intel_digital_port *dig_port)
+tc_phy_get_target_mode(struct intel_tc_port *tc)
 {
-	u32 live_status_mask = tc_phy_hpd_live_status(dig_port);
+	u32 live_status_mask = tc_phy_hpd_live_status(tc);
 
-	return hpd_mask_to_target_mode(dig_port, live_status_mask);
+	return hpd_mask_to_target_mode(tc, live_status_mask);
 }
 
-static void intel_tc_port_reset_mode(struct intel_digital_port *dig_port,
+static void intel_tc_port_reset_mode(struct intel_tc_port *tc,
 				     int required_lanes, bool force_disconnect)
 {
-	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
-	enum tc_port_mode old_tc_mode = dig_port->tc_mode;
+	struct drm_i915_private *i915 = tc_to_i915(tc);
+	struct intel_digital_port *dig_port = tc->dig_port;
+	enum tc_port_mode old_tc_mode = tc->mode;
 
 	intel_display_power_flush_work(i915);
 	if (!intel_tc_cold_requires_aux_pw(dig_port)) {
@@ -758,22 +779,22 @@ static void intel_tc_port_reset_mode(struct intel_digital_port *dig_port,
 		drm_WARN_ON(&i915->drm, aux_powered);
 	}
 
-	icl_tc_phy_disconnect(dig_port);
+	icl_tc_phy_disconnect(tc);
 	if (!force_disconnect)
-		icl_tc_phy_connect(dig_port, required_lanes);
+		icl_tc_phy_connect(tc, required_lanes);
 
 	drm_dbg_kms(&i915->drm, "Port %s: TC port mode reset (%s -> %s)\n",
-		    dig_port->tc_port_name,
+		    tc->port_name,
 		    tc_port_mode_name(old_tc_mode),
-		    tc_port_mode_name(dig_port->tc_mode));
+		    tc_port_mode_name(tc->mode));
 }
 
-static bool intel_tc_port_needs_reset(struct intel_digital_port *dig_port)
+static bool intel_tc_port_needs_reset(struct intel_tc_port *tc)
 {
-	return tc_phy_get_target_mode(dig_port) != dig_port->tc_mode;
+	return tc_phy_get_target_mode(tc) != tc->mode;
 }
 
-static void intel_tc_port_update_mode(struct intel_digital_port *dig_port,
+static void intel_tc_port_update_mode(struct intel_tc_port *tc,
 				      int required_lanes, bool force_disconnect)
 {
 	enum intel_display_power_domain domain;
@@ -782,44 +803,44 @@ static void intel_tc_port_update_mode(struct intel_digital_port *dig_port,
 
 	if (!needs_reset) {
 		/* Get power domain required to check the hotplug live status. */
-		wref = tc_cold_block(dig_port, &domain);
-		needs_reset = intel_tc_port_needs_reset(dig_port);
-		tc_cold_unblock(dig_port, domain, wref);
+		wref = tc_cold_block(tc, &domain);
+		needs_reset = intel_tc_port_needs_reset(tc);
+		tc_cold_unblock(tc, domain, wref);
 	}
 
 	if (!needs_reset)
 		return;
 
 	/* Get power domain required for resetting the mode. */
-	wref = tc_cold_block_in_mode(dig_port, TC_PORT_DISCONNECTED, &domain);
+	wref = tc_cold_block_in_mode(tc, TC_PORT_DISCONNECTED, &domain);
 
-	intel_tc_port_reset_mode(dig_port, required_lanes, force_disconnect);
+	intel_tc_port_reset_mode(tc, required_lanes, force_disconnect);
 
 	/* Get power domain matching the new mode after reset. */
-	tc_cold_unblock(dig_port, dig_port->tc_lock_power_domain,
-			fetch_and_zero(&dig_port->tc_lock_wakeref));
-	if (dig_port->tc_mode != TC_PORT_DISCONNECTED)
-		dig_port->tc_lock_wakeref = tc_cold_block(dig_port,
-							  &dig_port->tc_lock_power_domain);
+	tc_cold_unblock(tc, tc->lock_power_domain,
+			fetch_and_zero(&tc->lock_wakeref));
+	if (tc->mode != TC_PORT_DISCONNECTED)
+		tc->lock_wakeref = tc_cold_block(tc, &tc->lock_power_domain);
 
-	tc_cold_unblock(dig_port, domain, wref);
+	tc_cold_unblock(tc, domain, wref);
 }
 
-static void __intel_tc_port_get_link(struct intel_digital_port *dig_port)
+static void __intel_tc_port_get_link(struct intel_tc_port *tc)
 {
-	dig_port->tc_link_refcount++;
+	tc->link_refcount++;
 }
 
-static void __intel_tc_port_put_link(struct intel_digital_port *dig_port)
+static void __intel_tc_port_put_link(struct intel_tc_port *tc)
 {
-	dig_port->tc_link_refcount--;
+	tc->link_refcount--;
 }
 
-static bool tc_port_is_enabled(struct intel_digital_port *dig_port)
+static bool tc_port_is_enabled(struct intel_tc_port *tc)
 {
-	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
+	struct drm_i915_private *i915 = tc_to_i915(tc);
+	struct intel_digital_port *dig_port = tc->dig_port;
 
-	assert_tc_port_power_enabled(dig_port);
+	assert_tc_port_power_enabled(tc);
 
 	return intel_de_read(i915, DDI_BUF_CTL(dig_port->base.port)) &
 	       DDI_BUF_CTL_ENABLE;
@@ -835,27 +856,28 @@ static bool tc_port_is_enabled(struct intel_digital_port *dig_port)
 void intel_tc_port_init_mode(struct intel_digital_port *dig_port)
 {
 	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
+	struct intel_tc_port *tc = to_tc_port(dig_port);
 	intel_wakeref_t tc_cold_wref;
 	enum intel_display_power_domain domain;
 	bool update_mode = false;
 
-	mutex_lock(&dig_port->tc_lock);
+	mutex_lock(&tc->lock);
 
-	drm_WARN_ON(&i915->drm, dig_port->tc_mode != TC_PORT_DISCONNECTED);
-	drm_WARN_ON(&i915->drm, dig_port->tc_lock_wakeref);
-	drm_WARN_ON(&i915->drm, dig_port->tc_link_refcount);
+	drm_WARN_ON(&i915->drm, tc->mode != TC_PORT_DISCONNECTED);
+	drm_WARN_ON(&i915->drm, tc->lock_wakeref);
+	drm_WARN_ON(&i915->drm, tc->link_refcount);
 
-	tc_cold_wref = tc_cold_block(dig_port, &domain);
+	tc_cold_wref = tc_cold_block(tc, &domain);
 
-	dig_port->tc_mode = tc_phy_get_current_mode(dig_port);
+	tc->mode = tc_phy_get_current_mode(tc);
 	/*
 	 * Save the initial mode for the state check in
 	 * intel_tc_port_sanitize_mode().
 	 */
-	dig_port->tc_init_mode = dig_port->tc_mode;
-	if (dig_port->tc_mode != TC_PORT_DISCONNECTED)
-		dig_port->tc_lock_wakeref =
-			tc_cold_block(dig_port, &dig_port->tc_lock_power_domain);
+	tc->init_mode = tc->mode;
+	if (tc->mode != TC_PORT_DISCONNECTED)
+		tc->lock_wakeref =
+			tc_cold_block(tc, &tc->lock_power_domain);
 
 	/*
 	 * The PHY needs to be connected for AUX to work during HW readout and
@@ -868,31 +890,32 @@ void intel_tc_port_init_mode(struct intel_digital_port *dig_port)
 	 * cause a problem as the PHY ownership state is ignored by the
 	 * IOM/TCSS firmware (only display can own the PHY in that case).
 	 */
-	if (!tc_port_is_enabled(dig_port)) {
+	if (!tc_port_is_enabled(tc)) {
 		update_mode = true;
-	} else if (dig_port->tc_mode == TC_PORT_DISCONNECTED) {
-		drm_WARN_ON(&i915->drm, !dig_port->tc_legacy_port);
+	} else if (tc->mode == TC_PORT_DISCONNECTED) {
+		drm_WARN_ON(&i915->drm, !tc->legacy_port);
 		drm_err(&i915->drm,
 			"Port %s: PHY disconnected on enabled port, connecting it\n",
-			dig_port->tc_port_name);
+			tc->port_name);
 		update_mode = true;
 	}
 
 	if (update_mode)
-		intel_tc_port_update_mode(dig_port, 1, false);
+		intel_tc_port_update_mode(tc, 1, false);
 
-	/* Prevent changing dig_port->tc_mode until intel_tc_port_sanitize_mode() is called. */
-	__intel_tc_port_get_link(dig_port);
+	/* Prevent changing tc->mode until intel_tc_port_sanitize_mode() is called. */
+	__intel_tc_port_get_link(tc);
 
-	tc_cold_unblock(dig_port, domain, tc_cold_wref);
+	tc_cold_unblock(tc, domain, tc_cold_wref);
 
-	mutex_unlock(&dig_port->tc_lock);
+	mutex_unlock(&tc->lock);
 }
 
-static bool tc_port_has_active_links(struct intel_digital_port *dig_port,
+static bool tc_port_has_active_links(struct intel_tc_port *tc,
 				     const struct intel_crtc_state *crtc_state)
 {
-	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
+	struct drm_i915_private *i915 = tc_to_i915(tc);
+	struct intel_digital_port *dig_port = tc->dig_port;
 	enum icl_port_dpll_id pll_type = ICL_PORT_DPLL_DEFAULT;
 	int active_links = 0;
 
@@ -904,10 +927,10 @@ static bool tc_port_has_active_links(struct intel_digital_port *dig_port,
 		active_links = 1;
 	}
 
-	if (active_links && !tc_phy_is_connected(dig_port, pll_type))
+	if (active_links && !tc_phy_is_connected(tc, pll_type))
 		drm_err(&i915->drm,
 			"Port %s: PHY disconnected with %d active link(s)\n",
-			dig_port->tc_port_name, active_links);
+			tc->port_name, active_links);
 
 	return active_links;
 }
@@ -928,35 +951,36 @@ void intel_tc_port_sanitize_mode(struct intel_digital_port *dig_port,
 				 const struct intel_crtc_state *crtc_state)
 {
 	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
+	struct intel_tc_port *tc = to_tc_port(dig_port);
 
-	mutex_lock(&dig_port->tc_lock);
+	mutex_lock(&tc->lock);
 
-	drm_WARN_ON(&i915->drm, dig_port->tc_link_refcount != 1);
-	if (!tc_port_has_active_links(dig_port, crtc_state)) {
+	drm_WARN_ON(&i915->drm, tc->link_refcount != 1);
+	if (!tc_port_has_active_links(tc, crtc_state)) {
 		/*
 		 * TBT-alt is the default mode in any case the PHY ownership is not
 		 * held (regardless of the sink's connected live state), so
 		 * we'll just switch to disconnected mode from it here without
 		 * a note.
 		 */
-		if (dig_port->tc_init_mode != TC_PORT_TBT_ALT &&
-		    dig_port->tc_init_mode != TC_PORT_DISCONNECTED)
+		if (tc->init_mode != TC_PORT_TBT_ALT &&
+		    tc->init_mode != TC_PORT_DISCONNECTED)
 			drm_dbg_kms(&i915->drm,
 				    "Port %s: PHY left in %s mode on disabled port, disconnecting it\n",
-				    dig_port->tc_port_name,
-				    tc_port_mode_name(dig_port->tc_init_mode));
-		icl_tc_phy_disconnect(dig_port);
-		__intel_tc_port_put_link(dig_port);
+				    tc->port_name,
+				    tc_port_mode_name(tc->init_mode));
+		icl_tc_phy_disconnect(tc);
+		__intel_tc_port_put_link(tc);
 
-		tc_cold_unblock(dig_port, dig_port->tc_lock_power_domain,
-				fetch_and_zero(&dig_port->tc_lock_wakeref));
+		tc_cold_unblock(tc, tc->lock_power_domain,
+				fetch_and_zero(&tc->lock_wakeref));
 	}
 
 	drm_dbg_kms(&i915->drm, "Port %s: sanitize mode (%s)\n",
-		    dig_port->tc_port_name,
-		    tc_port_mode_name(dig_port->tc_mode));
+		    tc->port_name,
+		    tc_port_mode_name(tc->mode));
 
-	mutex_unlock(&dig_port->tc_lock);
+	mutex_unlock(&tc->lock);
 }
 
 /*
@@ -973,10 +997,11 @@ bool intel_tc_port_connected_locked(struct intel_encoder *encoder)
 {
 	struct intel_digital_port *dig_port = enc_to_dig_port(encoder);
 	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
+	struct intel_tc_port *tc = to_tc_port(dig_port);
 
 	drm_WARN_ON(&i915->drm, !intel_tc_port_ref_held(dig_port));
 
-	return tc_phy_hpd_live_status(dig_port) & BIT(dig_port->tc_mode);
+	return tc_phy_hpd_live_status(tc) & BIT(tc->mode);
 }
 
 bool intel_tc_port_connected(struct intel_encoder *encoder)
@@ -991,27 +1016,27 @@ bool intel_tc_port_connected(struct intel_encoder *encoder)
 	return is_connected;
 }
 
-static void __intel_tc_port_lock(struct intel_digital_port *dig_port,
+static void __intel_tc_port_lock(struct intel_tc_port *tc,
 				 int required_lanes)
 {
-	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
+	struct drm_i915_private *i915 = tc_to_i915(tc);
 
-	mutex_lock(&dig_port->tc_lock);
+	mutex_lock(&tc->lock);
 
-	cancel_delayed_work(&dig_port->tc_disconnect_phy_work);
+	cancel_delayed_work(&tc->disconnect_phy_work);
 
-	if (!dig_port->tc_link_refcount)
-		intel_tc_port_update_mode(dig_port, required_lanes,
+	if (!tc->link_refcount)
+		intel_tc_port_update_mode(tc, required_lanes,
 					  false);
 
-	drm_WARN_ON(&i915->drm, dig_port->tc_mode == TC_PORT_DISCONNECTED);
-	drm_WARN_ON(&i915->drm, dig_port->tc_mode != TC_PORT_TBT_ALT &&
-				!tc_phy_is_owned(dig_port));
+	drm_WARN_ON(&i915->drm, tc->mode == TC_PORT_DISCONNECTED);
+	drm_WARN_ON(&i915->drm, tc->mode != TC_PORT_TBT_ALT &&
+				!tc_phy_is_owned(tc));
 }
 
 void intel_tc_port_lock(struct intel_digital_port *dig_port)
 {
-	__intel_tc_port_lock(dig_port, 1);
+	__intel_tc_port_lock(to_tc_port(dig_port), 1);
 }
 
 /**
@@ -1024,15 +1049,15 @@ void intel_tc_port_lock(struct intel_digital_port *dig_port)
  */
 static void intel_tc_port_disconnect_phy_work(struct work_struct *work)
 {
-	struct intel_digital_port *dig_port =
-		container_of(work, struct intel_digital_port, tc_disconnect_phy_work.work);
+	struct intel_tc_port *tc =
+		container_of(work, struct intel_tc_port, disconnect_phy_work.work);
 
-	mutex_lock(&dig_port->tc_lock);
+	mutex_lock(&tc->lock);
 
-	if (!dig_port->tc_link_refcount)
-		intel_tc_port_update_mode(dig_port, 1, true);
+	if (!tc->link_refcount)
+		intel_tc_port_update_mode(tc, 1, true);
 
-	mutex_unlock(&dig_port->tc_lock);
+	mutex_unlock(&tc->lock);
 }
 
 /**
@@ -1043,36 +1068,44 @@ static void intel_tc_port_disconnect_phy_work(struct work_struct *work)
  */
 void intel_tc_port_flush_work(struct intel_digital_port *dig_port)
 {
-	flush_delayed_work(&dig_port->tc_disconnect_phy_work);
+	flush_delayed_work(&to_tc_port(dig_port)->disconnect_phy_work);
 }
 
 void intel_tc_port_unlock(struct intel_digital_port *dig_port)
 {
-	if (!dig_port->tc_link_refcount && dig_port->tc_mode != TC_PORT_DISCONNECTED)
-		queue_delayed_work(system_unbound_wq, &dig_port->tc_disconnect_phy_work,
+	struct intel_tc_port *tc = to_tc_port(dig_port);
+
+	if (!tc->link_refcount && tc->mode != TC_PORT_DISCONNECTED)
+		queue_delayed_work(system_unbound_wq, &tc->disconnect_phy_work,
 				   msecs_to_jiffies(1000));
 
-	mutex_unlock(&dig_port->tc_lock);
+	mutex_unlock(&tc->lock);
 }
 
 bool intel_tc_port_ref_held(struct intel_digital_port *dig_port)
 {
-	return mutex_is_locked(&dig_port->tc_lock) ||
-	       dig_port->tc_link_refcount;
+	struct intel_tc_port *tc = to_tc_port(dig_port);
+
+	return mutex_is_locked(&tc->lock) ||
+	       tc->link_refcount;
 }
 
 void intel_tc_port_get_link(struct intel_digital_port *dig_port,
 			    int required_lanes)
 {
-	__intel_tc_port_lock(dig_port, required_lanes);
-	__intel_tc_port_get_link(dig_port);
+	struct intel_tc_port *tc = to_tc_port(dig_port);
+
+	__intel_tc_port_lock(tc, required_lanes);
+	__intel_tc_port_get_link(tc);
 	intel_tc_port_unlock(dig_port);
 }
 
 void intel_tc_port_put_link(struct intel_digital_port *dig_port)
 {
+	struct intel_tc_port *tc = to_tc_port(dig_port);
+
 	intel_tc_port_lock(dig_port);
-	__intel_tc_port_put_link(dig_port);
+	__intel_tc_port_put_link(tc);
 	intel_tc_port_unlock(dig_port);
 
 	/*
@@ -1085,7 +1118,7 @@ void intel_tc_port_put_link(struct intel_digital_port *dig_port)
 }
 
 static bool
-tc_has_modular_fia(struct drm_i915_private *i915, struct intel_digital_port *dig_port)
+tc_has_modular_fia(struct drm_i915_private *i915, struct intel_tc_port *tc)
 {
 	enum intel_display_power_domain domain;
 	intel_wakeref_t wakeref;
@@ -1094,11 +1127,11 @@ tc_has_modular_fia(struct drm_i915_private *i915, struct intel_digital_port *dig
 	if (!INTEL_INFO(i915)->display.has_modular_fia)
 		return false;
 
-	mutex_lock(&dig_port->tc_lock);
-	wakeref = tc_cold_block(dig_port, &domain);
+	mutex_lock(&tc->lock);
+	wakeref = tc_cold_block(tc, &domain);
 	val = intel_de_read(i915, PORT_TX_DFLEXDPSP(FIA1));
-	tc_cold_unblock(dig_port, domain, wakeref);
-	mutex_unlock(&dig_port->tc_lock);
+	tc_cold_unblock(tc, domain, wakeref);
+	mutex_unlock(&tc->lock);
 
 	drm_WARN_ON(&i915->drm, val == 0xffffffff);
 
@@ -1106,42 +1139,45 @@ tc_has_modular_fia(struct drm_i915_private *i915, struct intel_digital_port *dig
 }
 
 static void
-tc_port_load_fia_params(struct drm_i915_private *i915, struct intel_digital_port *dig_port)
+tc_port_load_fia_params(struct drm_i915_private *i915, struct intel_tc_port *tc)
 {
-	enum port port = dig_port->base.port;
+	enum port port = tc->dig_port->base.port;
 	enum tc_port tc_port = intel_port_to_tc(i915, port);
 
 	/*
 	 * Each Modular FIA instance houses 2 TC ports. In SOC that has more
 	 * than two TC ports, there are multiple instances of Modular FIA.
 	 */
-	if (tc_has_modular_fia(i915, dig_port)) {
-		dig_port->tc_phy_fia = tc_port / 2;
-		dig_port->tc_phy_fia_idx = tc_port % 2;
+	if (tc_has_modular_fia(i915, tc)) {
+		tc->phy_fia = tc_port / 2;
+		tc->phy_fia_idx = tc_port % 2;
 	} else {
-		dig_port->tc_phy_fia = FIA1;
-		dig_port->tc_phy_fia_idx = tc_port;
+		tc->phy_fia = FIA1;
+		tc->phy_fia_idx = tc_port;
 	}
 }
 
 void intel_tc_port_init(struct intel_digital_port *dig_port, bool is_legacy)
 {
 	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
+	struct intel_tc_port *tc = to_tc_port(dig_port);
 	enum port port = dig_port->base.port;
 	enum tc_port tc_port = intel_port_to_tc(i915, port);
 
 	if (drm_WARN_ON(&i915->drm, tc_port == TC_PORT_NONE))
 		return;
 
-	snprintf(dig_port->tc_port_name, sizeof(dig_port->tc_port_name),
+	tc->dig_port = dig_port;
+
+	snprintf(tc->port_name, sizeof(tc->port_name),
 		 "%c/TC#%d", port_name(port), tc_port + 1);
 
-	mutex_init(&dig_port->tc_lock);
-	INIT_DELAYED_WORK(&dig_port->tc_disconnect_phy_work, intel_tc_port_disconnect_phy_work);
-	dig_port->tc_legacy_port = is_legacy;
-	dig_port->tc_mode = TC_PORT_DISCONNECTED;
-	dig_port->tc_link_refcount = 0;
-	tc_port_load_fia_params(i915, dig_port);
+	mutex_init(&tc->lock);
+	INIT_DELAYED_WORK(&tc->disconnect_phy_work, intel_tc_port_disconnect_phy_work);
+	tc->legacy_port = is_legacy;
+	tc->mode = TC_PORT_DISCONNECTED;
+	tc->link_refcount = 0;
+	tc_port_load_fia_params(i915, tc);
 
 	intel_tc_port_init_mode(dig_port);
 }
diff --git a/drivers/gpu/drm/i915/display/intel_tc.h b/drivers/gpu/drm/i915/display/intel_tc.h
index 79667d977508c..cc3a7fd4ac102 100644
--- a/drivers/gpu/drm/i915/display/intel_tc.h
+++ b/drivers/gpu/drm/i915/display/intel_tc.h
@@ -9,10 +9,36 @@
 #include <linux/mutex.h>
 #include <linux/types.h>
 
+#include "intel_display.h"
+#include "intel_display_power.h"
+#include "intel_wakeref.h"
+
 struct intel_crtc_state;
 struct intel_digital_port;
 struct intel_encoder;
 
+enum tc_port_mode {
+	TC_PORT_DISCONNECTED,
+	TC_PORT_TBT_ALT,
+	TC_PORT_DP_ALT,
+	TC_PORT_LEGACY,
+};
+
+struct intel_tc_port {
+	struct intel_digital_port *dig_port;
+	struct mutex lock;	/* protects the TypeC port mode */
+	intel_wakeref_t lock_wakeref;
+	enum intel_display_power_domain lock_power_domain;
+	struct delayed_work disconnect_phy_work;
+	int link_refcount;
+	bool legacy_port:1;
+	char port_name[8];
+	enum tc_port_mode mode;
+	enum tc_port_mode init_mode;
+	enum phy_fia phy_fia;
+	u8 phy_fia_idx;
+};
+
 bool intel_tc_port_in_tbt_alt_mode(struct intel_digital_port *dig_port);
 bool intel_tc_port_in_dp_alt_mode(struct intel_digital_port *dig_port);
 bool intel_tc_port_in_legacy_mode(struct intel_digital_port *dig_port);
-- 
2.37.1

[Intel-gfx] [PATCH 06/29] drm/i915/tc: Check for TC PHY explicitly in intel_tc_port_fia_max_lane_count()

[Imre Deak]

Check explicitly if the port passed to
intel_tc_port_fia_max_lane_count() has a TC PHY, instead of relying on
the default TC mode value set for non-TC PHY ports.

Signed-off-by: Imre Deak <imre.deak@intel.com>
---
 drivers/gpu/drm/i915/display/intel_tc.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/display/intel_tc.c b/drivers/gpu/drm/i915/display/intel_tc.c
index 70771044a2fe8..48a59a675cd57 100644
--- a/drivers/gpu/drm/i915/display/intel_tc.c
+++ b/drivers/gpu/drm/i915/display/intel_tc.c
@@ -188,10 +188,11 @@ int intel_tc_port_fia_max_lane_count(struct intel_digital_port *dig_port)
 {
 	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
 	struct intel_tc_port *tc = to_tc_port(dig_port);
+	enum phy phy = intel_port_to_phy(i915, dig_port->base.port);
 	intel_wakeref_t wakeref;
 	u32 lane_mask;
 
-	if (tc->mode != TC_PORT_DP_ALT)
+	if (!intel_phy_is_tc(i915, phy) || tc->mode != TC_PORT_DP_ALT)
 		return 4;
 
 	assert_tc_cold_blocked(tc);
-- 
2.37.1

[Intel-gfx] [PATCH 07/29] drm/i915/tc: Move the intel_tc_port struct declaration to intel_tc.c

[Imre Deak]

Move the intel_tc_port struct to intel_tc.c for better isolation. This
requires allocating the struct dynamically.

Signed-off-by: Imre Deak <imre.deak@intel.com>
---
 drivers/gpu/drm/i915/display/intel_ddi.c      |  7 +--
 .../drm/i915/display/intel_display_types.h    |  4 +-
 drivers/gpu/drm/i915/display/intel_tc.c       | 45 +++++++++++++++++--
 drivers/gpu/drm/i915/display/intel_tc.h       | 30 +------------
 4 files changed, 49 insertions(+), 37 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
index 73240cf78c8bf..dac3ec8fbbc11 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -3843,7 +3843,7 @@ static void intel_ddi_encoder_destroy(struct drm_encoder *encoder)
 
 	intel_dp_encoder_flush_work(encoder);
 	if (intel_phy_is_tc(i915, phy))
-		intel_tc_port_flush_work(dig_port);
+		intel_tc_port_cleanup(dig_port);
 	intel_display_power_flush_work(i915);
 
 	drm_encoder_cleanup(encoder);
@@ -4284,7 +4284,7 @@ static void intel_ddi_encoder_shutdown(struct intel_encoder *encoder)
 	if (!intel_phy_is_tc(i915, phy))
 		return;
 
-	intel_tc_port_flush_work(dig_port);
+	intel_tc_port_cleanup(dig_port);
 }
 
 #define port_tc_name(port) ((port) - PORT_TC1 + '1')
@@ -4541,7 +4541,8 @@ void intel_ddi_init(struct drm_i915_private *dev_priv, enum port port)
 				    is_legacy ? "legacy" : "non-legacy");
 		}
 
-		intel_tc_port_init(dig_port, is_legacy);
+		if (intel_tc_port_init(dig_port, is_legacy) < 0)
+			goto err;
 
 		encoder->update_prepare = intel_ddi_update_prepare;
 		encoder->update_complete = intel_ddi_update_complete;
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
index 0130c7b7f0232..ce24e58b2a825 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -54,13 +54,13 @@
 #include "intel_display_power.h"
 #include "intel_dpll_mgr.h"
 #include "intel_wm_types.h"
-#include "intel_tc.h"
 
 struct drm_printer;
 struct __intel_global_objs_state;
 struct intel_ddi_buf_trans;
 struct intel_fbc;
 struct intel_connector;
+struct intel_tc_port;
 
 /*
  * Display related stuff
@@ -1781,7 +1781,7 @@ struct intel_digital_port {
 	intel_wakeref_t ddi_io_wakeref;
 	intel_wakeref_t aux_wakeref;
 
-	struct intel_tc_port tc;
+	struct intel_tc_port *tc;
 
 	/* protects num_hdcp_streams reference count, hdcp_port_data and hdcp_auth_status */
 	struct mutex hdcp_mutex;
diff --git a/drivers/gpu/drm/i915/display/intel_tc.c b/drivers/gpu/drm/i915/display/intel_tc.c
index 48a59a675cd57..2a04c5ea44ade 100644
--- a/drivers/gpu/drm/i915/display/intel_tc.c
+++ b/drivers/gpu/drm/i915/display/intel_tc.c
@@ -15,6 +15,28 @@
 #include "intel_mg_phy_regs.h"
 #include "intel_tc.h"
 
+enum tc_port_mode {
+	TC_PORT_DISCONNECTED,
+	TC_PORT_TBT_ALT,
+	TC_PORT_DP_ALT,
+	TC_PORT_LEGACY,
+};
+
+struct intel_tc_port {
+	struct intel_digital_port *dig_port;
+	struct mutex lock;	/* protects the TypeC port mode */
+	intel_wakeref_t lock_wakeref;
+	enum intel_display_power_domain lock_power_domain;
+	struct delayed_work disconnect_phy_work;
+	int link_refcount;
+	bool legacy_port:1;
+	char port_name[8];
+	enum tc_port_mode mode;
+	enum tc_port_mode init_mode;
+	enum phy_fia phy_fia;
+	u8 phy_fia_idx;
+};
+
 static u32 tc_phy_hpd_live_status(struct intel_tc_port *tc);
 static bool tc_phy_is_ready(struct intel_tc_port *tc);
 static bool tc_phy_take_ownership(struct intel_tc_port *tc, bool take);
@@ -36,7 +58,7 @@ static const char *tc_port_mode_name(enum tc_port_mode mode)
 
 static struct intel_tc_port *to_tc_port(struct intel_digital_port *dig_port)
 {
-	return &dig_port->tc;
+	return dig_port->tc;
 }
 
 static struct drm_i915_private *tc_to_i915(struct intel_tc_port *tc)
@@ -1158,16 +1180,21 @@ tc_port_load_fia_params(struct drm_i915_private *i915, struct intel_tc_port *tc)
 	}
 }
 
-void intel_tc_port_init(struct intel_digital_port *dig_port, bool is_legacy)
+int intel_tc_port_init(struct intel_digital_port *dig_port, bool is_legacy)
 {
 	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
-	struct intel_tc_port *tc = to_tc_port(dig_port);
+	struct intel_tc_port *tc;
 	enum port port = dig_port->base.port;
 	enum tc_port tc_port = intel_port_to_tc(i915, port);
 
 	if (drm_WARN_ON(&i915->drm, tc_port == TC_PORT_NONE))
-		return;
+		return -EINVAL;
+
+	tc = kzalloc(sizeof(*tc), GFP_KERNEL);
+	if (!tc)
+		return -ENOMEM;
 
+	dig_port->tc = tc;
 	tc->dig_port = dig_port;
 
 	snprintf(tc->port_name, sizeof(tc->port_name),
@@ -1181,4 +1208,14 @@ void intel_tc_port_init(struct intel_digital_port *dig_port, bool is_legacy)
 	tc_port_load_fia_params(i915, tc);
 
 	intel_tc_port_init_mode(dig_port);
+
+	return 0;
+}
+
+void intel_tc_port_cleanup(struct intel_digital_port *dig_port)
+{
+	intel_tc_port_flush_work(dig_port);
+
+	kfree(dig_port->tc);
+	dig_port->tc = NULL;
 }
diff --git a/drivers/gpu/drm/i915/display/intel_tc.h b/drivers/gpu/drm/i915/display/intel_tc.h
index cc3a7fd4ac102..dd0810f9ea95e 100644
--- a/drivers/gpu/drm/i915/display/intel_tc.h
+++ b/drivers/gpu/drm/i915/display/intel_tc.h
@@ -6,39 +6,12 @@
 #ifndef __INTEL_TC_H__
 #define __INTEL_TC_H__
 
-#include <linux/mutex.h>
 #include <linux/types.h>
 
-#include "intel_display.h"
-#include "intel_display_power.h"
-#include "intel_wakeref.h"
-
 struct intel_crtc_state;
 struct intel_digital_port;
 struct intel_encoder;
 
-enum tc_port_mode {
-	TC_PORT_DISCONNECTED,
-	TC_PORT_TBT_ALT,
-	TC_PORT_DP_ALT,
-	TC_PORT_LEGACY,
-};
-
-struct intel_tc_port {
-	struct intel_digital_port *dig_port;
-	struct mutex lock;	/* protects the TypeC port mode */
-	intel_wakeref_t lock_wakeref;
-	enum intel_display_power_domain lock_power_domain;
-	struct delayed_work disconnect_phy_work;
-	int link_refcount;
-	bool legacy_port:1;
-	char port_name[8];
-	enum tc_port_mode mode;
-	enum tc_port_mode init_mode;
-	enum phy_fia phy_fia;
-	u8 phy_fia_idx;
-};
-
 bool intel_tc_port_in_tbt_alt_mode(struct intel_digital_port *dig_port);
 bool intel_tc_port_in_dp_alt_mode(struct intel_digital_port *dig_port);
 bool intel_tc_port_in_legacy_mode(struct intel_digital_port *dig_port);
@@ -63,7 +36,8 @@ void intel_tc_port_get_link(struct intel_digital_port *dig_port,
 void intel_tc_port_put_link(struct intel_digital_port *dig_port);
 bool intel_tc_port_ref_held(struct intel_digital_port *dig_port);
 
-void intel_tc_port_init(struct intel_digital_port *dig_port, bool is_legacy);
+int intel_tc_port_init(struct intel_digital_port *dig_port, bool is_legacy);
+void intel_tc_port_cleanup(struct intel_digital_port *dig_port);
 
 bool intel_tc_cold_requires_aux_pw(struct intel_digital_port *dig_port);
 
-- 
2.37.1

[Intel-gfx] [PATCH 08/29] drm/i915/tc: Add TC PHY hook to get the PHY HPD live status

[Imre Deak]

Add a table of TC PHY hooks which can be used to call platform specific
TC PHY handlers, replacing the corresponding if ladders.

Add the hook to retrieve the PHY's HPD live status. Move the common part
fixing up the VBT legacy port flag to the generic helper.

Signed-off-by: Imre Deak <imre.deak@intel.com>
---
 drivers/gpu/drm/i915/display/intel_tc.c | 40 ++++++++++++++++++-------
 1 file changed, 29 insertions(+), 11 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_tc.c b/drivers/gpu/drm/i915/display/intel_tc.c
index 2a04c5ea44ade..a0508e2173007 100644
--- a/drivers/gpu/drm/i915/display/intel_tc.c
+++ b/drivers/gpu/drm/i915/display/intel_tc.c
@@ -22,8 +22,17 @@ enum tc_port_mode {
 	TC_PORT_LEGACY,
 };
 
+struct intel_tc_port;
+
+struct intel_tc_phy_ops {
+	u32 (*hpd_live_status)(struct intel_tc_port *tc);
+};
+
 struct intel_tc_port {
 	struct intel_digital_port *dig_port;
+
+	const struct intel_tc_phy_ops *phy_ops;
+
 	struct mutex lock;	/* protects the TypeC port mode */
 	intel_wakeref_t lock_wakeref;
 	enum intel_display_power_domain lock_power_domain;
@@ -329,10 +338,6 @@ static u32 icl_tc_phy_hpd_live_status(struct intel_tc_port *tc)
 	if (intel_de_read(i915, SDEISR) & isr_bit)
 		mask |= BIT(TC_PORT_LEGACY);
 
-	/* The sink can be connected only in a single mode. */
-	if (!drm_WARN_ON_ONCE(&i915->drm, hweight32(mask) > 1))
-		tc_port_fixup_legacy_flag(tc, mask);
-
 	return mask;
 }
 
@@ -495,6 +500,10 @@ static void icl_tc_phy_disconnect(struct intel_tc_port *tc)
 	}
 }
 
+static const struct intel_tc_phy_ops icl_tc_phy_ops = {
+	.hpd_live_status = icl_tc_phy_hpd_live_status,
+};
+
 /**
  * ADLP TC PHY handlers
  * --------------------
@@ -521,10 +530,6 @@ static u32 adlp_tc_phy_hpd_live_status(struct intel_tc_port *tc)
 	if (intel_de_read(i915, SDEISR) & isr_bit)
 		mask |= BIT(TC_PORT_LEGACY);
 
-	/* The sink can be connected only in a single mode. */
-	if (!drm_WARN_ON(&i915->drm, hweight32(mask) > 1))
-		tc_port_fixup_legacy_flag(tc, mask);
-
 	return mask;
 }
 
@@ -574,6 +579,10 @@ static bool adlp_tc_phy_is_owned(struct intel_tc_port *tc)
 	return val & DDI_BUF_CTL_TC_PHY_OWNERSHIP;
 }
 
+static const struct intel_tc_phy_ops adlp_tc_phy_ops = {
+	.hpd_live_status = adlp_tc_phy_hpd_live_status,
+};
+
 /**
  * Generic TC PHY handlers
  * -----------------------
@@ -581,11 +590,15 @@ static bool adlp_tc_phy_is_owned(struct intel_tc_port *tc)
 static u32 tc_phy_hpd_live_status(struct intel_tc_port *tc)
 {
 	struct drm_i915_private *i915 = tc_to_i915(tc);
+	u32 mask;
 
-	if (IS_ALDERLAKE_P(i915))
-		return adlp_tc_phy_hpd_live_status(tc);
+	mask = tc->phy_ops->hpd_live_status(tc);
+
+	/* The sink can be connected only in a single mode. */
+	if (!drm_WARN_ON_ONCE(&i915->drm, hweight32(mask) > 1))
+		tc_port_fixup_legacy_flag(tc, mask);
 
-	return icl_tc_phy_hpd_live_status(tc);
+	return mask;
 }
 
 static bool tc_phy_is_ready(struct intel_tc_port *tc)
@@ -1197,6 +1210,11 @@ int intel_tc_port_init(struct intel_digital_port *dig_port, bool is_legacy)
 	dig_port->tc = tc;
 	tc->dig_port = dig_port;
 
+	if (DISPLAY_VER(i915) >= 13)
+		tc->phy_ops = &adlp_tc_phy_ops;
+	else
+		tc->phy_ops = &icl_tc_phy_ops;
+
 	snprintf(tc->port_name, sizeof(tc->port_name),
 		 "%c/TC#%d", port_name(port), tc_port + 1);
 
-- 
2.37.1

[Intel-gfx] [PATCH 09/29] drm/i915/tc: Add TC PHY hooks to get the PHY ready/owned state

[Imre Deak]

Add TC PHY hooks to get the PHY ready/owned state on each platform,
replacing the corresponding if ladder.

Signed-off-by: Imre Deak <imre.deak@intel.com>
---
 drivers/gpu/drm/i915/display/intel_tc.c | 20 ++++++++------------
 1 file changed, 8 insertions(+), 12 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_tc.c b/drivers/gpu/drm/i915/display/intel_tc.c
index a0508e2173007..7d64cb310ca3e 100644
--- a/drivers/gpu/drm/i915/display/intel_tc.c
+++ b/drivers/gpu/drm/i915/display/intel_tc.c
@@ -26,6 +26,8 @@ struct intel_tc_port;
 
 struct intel_tc_phy_ops {
 	u32 (*hpd_live_status)(struct intel_tc_port *tc);
+	bool (*is_ready)(struct intel_tc_port *tc);
+	bool (*is_owned)(struct intel_tc_port *tc);
 };
 
 struct intel_tc_port {
@@ -502,6 +504,8 @@ static void icl_tc_phy_disconnect(struct intel_tc_port *tc)
 
 static const struct intel_tc_phy_ops icl_tc_phy_ops = {
 	.hpd_live_status = icl_tc_phy_hpd_live_status,
+	.is_ready = icl_tc_phy_is_ready,
+	.is_owned = icl_tc_phy_is_owned,
 };
 
 /**
@@ -581,6 +585,8 @@ static bool adlp_tc_phy_is_owned(struct intel_tc_port *tc)
 
 static const struct intel_tc_phy_ops adlp_tc_phy_ops = {
 	.hpd_live_status = adlp_tc_phy_hpd_live_status,
+	.is_ready = adlp_tc_phy_is_ready,
+	.is_owned = adlp_tc_phy_is_owned,
 };
 
 /**
@@ -603,22 +609,12 @@ static u32 tc_phy_hpd_live_status(struct intel_tc_port *tc)
 
 static bool tc_phy_is_ready(struct intel_tc_port *tc)
 {
-	struct drm_i915_private *i915 = tc_to_i915(tc);
-
-	if (IS_ALDERLAKE_P(i915))
-		return adlp_tc_phy_is_ready(tc);
-
-	return icl_tc_phy_is_ready(tc);
+	return tc->phy_ops->is_ready(tc);
 }
 
 static bool tc_phy_is_owned(struct intel_tc_port *tc)
 {
-	struct drm_i915_private *i915 = tc_to_i915(tc);
-
-	if (IS_ALDERLAKE_P(i915))
-		return adlp_tc_phy_is_owned(tc);
-
-	return icl_tc_phy_is_owned(tc);
+	return tc->phy_ops->is_owned(tc);
 }
 
 static bool tc_phy_take_ownership(struct intel_tc_port *tc, bool take)
-- 
2.37.1

[Intel-gfx] [PATCH 10/29] drm/i915/tc: Add TC PHY hook to read out the PHY HW state

[Imre Deak]

Add a TC PHY hook to read out the PHY HW state on each platform, move
the common parts to the generic helper.

Signed-off-by: Imre Deak <imre.deak@intel.com>
---
 drivers/gpu/drm/i915/display/intel_tc.c | 34 +++++++++++++++++--------
 1 file changed, 24 insertions(+), 10 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_tc.c b/drivers/gpu/drm/i915/display/intel_tc.c
index 7d64cb310ca3e..aa39810962592 100644
--- a/drivers/gpu/drm/i915/display/intel_tc.c
+++ b/drivers/gpu/drm/i915/display/intel_tc.c
@@ -28,6 +28,7 @@ struct intel_tc_phy_ops {
 	u32 (*hpd_live_status)(struct intel_tc_port *tc);
 	bool (*is_ready)(struct intel_tc_port *tc);
 	bool (*is_owned)(struct intel_tc_port *tc);
+	void (*get_hw_state)(struct intel_tc_port *tc);
 };
 
 struct intel_tc_port {
@@ -51,6 +52,7 @@ struct intel_tc_port {
 static u32 tc_phy_hpd_live_status(struct intel_tc_port *tc);
 static bool tc_phy_is_ready(struct intel_tc_port *tc);
 static bool tc_phy_take_ownership(struct intel_tc_port *tc, bool take);
+static enum tc_port_mode tc_phy_get_current_mode(struct intel_tc_port *tc);
 
 static const char *tc_port_mode_name(enum tc_port_mode mode)
 {
@@ -407,6 +409,20 @@ static bool icl_tc_phy_is_owned(struct intel_tc_port *tc)
 	return val & DP_PHY_MODE_STATUS_NOT_SAFE(tc->phy_fia_idx);
 }
 
+static void icl_tc_phy_get_hw_state(struct intel_tc_port *tc)
+{
+	enum intel_display_power_domain domain;
+	intel_wakeref_t tc_cold_wref;
+
+	tc_cold_wref = tc_cold_block(tc, &domain);
+
+	tc->mode = tc_phy_get_current_mode(tc);
+	if (tc->mode != TC_PORT_DISCONNECTED)
+		tc->lock_wakeref = tc_cold_block(tc, &tc->lock_power_domain);
+
+	tc_cold_unblock(tc, domain, tc_cold_wref);
+}
+
 /*
  * This function implements the first part of the Connect Flow described by our
  * specification, Gen11 TypeC Programming chapter. The rest of the flow (reading
@@ -506,6 +522,7 @@ static const struct intel_tc_phy_ops icl_tc_phy_ops = {
 	.hpd_live_status = icl_tc_phy_hpd_live_status,
 	.is_ready = icl_tc_phy_is_ready,
 	.is_owned = icl_tc_phy_is_owned,
+	.get_hw_state = icl_tc_phy_get_hw_state,
 };
 
 /**
@@ -587,6 +604,7 @@ static const struct intel_tc_phy_ops adlp_tc_phy_ops = {
 	.hpd_live_status = adlp_tc_phy_hpd_live_status,
 	.is_ready = adlp_tc_phy_is_ready,
 	.is_owned = adlp_tc_phy_is_owned,
+	.get_hw_state = icl_tc_phy_get_hw_state,
 };
 
 /**
@@ -617,6 +635,11 @@ static bool tc_phy_is_owned(struct intel_tc_port *tc)
 	return tc->phy_ops->is_owned(tc);
 }
 
+static void tc_phy_get_hw_state(struct intel_tc_port *tc)
+{
+	tc->phy_ops->get_hw_state(tc);
+}
+
 static bool tc_phy_take_ownership(struct intel_tc_port *tc, bool take)
 {
 	struct drm_i915_private *i915 = tc_to_i915(tc);
@@ -889,8 +912,6 @@ void intel_tc_port_init_mode(struct intel_digital_port *dig_port)
 {
 	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
 	struct intel_tc_port *tc = to_tc_port(dig_port);
-	intel_wakeref_t tc_cold_wref;
-	enum intel_display_power_domain domain;
 	bool update_mode = false;
 
 	mutex_lock(&tc->lock);
@@ -899,17 +920,12 @@ void intel_tc_port_init_mode(struct intel_digital_port *dig_port)
 	drm_WARN_ON(&i915->drm, tc->lock_wakeref);
 	drm_WARN_ON(&i915->drm, tc->link_refcount);
 
-	tc_cold_wref = tc_cold_block(tc, &domain);
-
-	tc->mode = tc_phy_get_current_mode(tc);
+	tc_phy_get_hw_state(tc);
 	/*
 	 * Save the initial mode for the state check in
 	 * intel_tc_port_sanitize_mode().
 	 */
 	tc->init_mode = tc->mode;
-	if (tc->mode != TC_PORT_DISCONNECTED)
-		tc->lock_wakeref =
-			tc_cold_block(tc, &tc->lock_power_domain);
 
 	/*
 	 * The PHY needs to be connected for AUX to work during HW readout and
@@ -938,8 +954,6 @@ void intel_tc_port_init_mode(struct intel_digital_port *dig_port)
 	/* Prevent changing tc->mode until intel_tc_port_sanitize_mode() is called. */
 	__intel_tc_port_get_link(tc);
 
-	tc_cold_unblock(tc, domain, tc_cold_wref);
-
 	mutex_unlock(&tc->lock);
 }
 
-- 
2.37.1

[Intel-gfx] [PATCH 11/29] drm/i915/tc: Add generic TC PHY connect/disconnect handlers

[Imre Deak]

Add generic handlers to connect/disconnect a PHY.

Setting the TC mode to the target mode deducted from the HPD state and -
if connecting to this mode fails - falling back to connecting to the
default (TBT) mode are common to all platforms; move the logic for this
from the ICL specific connect / disconnect handlers to the generic ones.

Signed-off-by: Imre Deak <imre.deak@intel.com>
---
 drivers/gpu/drm/i915/display/intel_tc.c | 65 +++++++++++++++----------
 1 file changed, 39 insertions(+), 26 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_tc.c b/drivers/gpu/drm/i915/display/intel_tc.c
index aa39810962592..9179f86287ab0 100644
--- a/drivers/gpu/drm/i915/display/intel_tc.c
+++ b/drivers/gpu/drm/i915/display/intel_tc.c
@@ -434,41 +434,35 @@ static void icl_tc_phy_get_hw_state(struct intel_tc_port *tc)
  * connect and disconnect to cleanly transfer ownership with the controller and
  * set the type-C power state.
  */
-static void icl_tc_phy_connect(struct intel_tc_port *tc,
+static bool icl_tc_phy_connect(struct intel_tc_port *tc,
 			       int required_lanes)
 {
 	struct drm_i915_private *i915 = tc_to_i915(tc);
 	struct intel_digital_port *dig_port = tc->dig_port;
-	u32 live_status_mask;
 	int max_lanes;
 
+	if (tc->mode == TC_PORT_TBT_ALT)
+		return true;
+
 	if (!tc_phy_is_ready(tc) &&
 	    !drm_WARN_ON(&i915->drm, tc->legacy_port)) {
 		drm_dbg_kms(&i915->drm, "Port %s: PHY not ready\n",
 			    tc->port_name);
-		goto out_set_tbt_alt_mode;
-	}
-
-	live_status_mask = tc_phy_hpd_live_status(tc);
-	if (!(live_status_mask & (BIT(TC_PORT_DP_ALT) | BIT(TC_PORT_LEGACY))) &&
-	    !tc->legacy_port) {
-		drm_dbg_kms(&i915->drm, "Port %s: PHY ownership not required (live status %02x)\n",
-			    tc->port_name, live_status_mask);
-		goto out_set_tbt_alt_mode;
+		return false;
 	}
 
 	if (!tc_phy_take_ownership(tc, true) &&
 	    !drm_WARN_ON(&i915->drm, tc->legacy_port))
-		goto out_set_tbt_alt_mode;
+		return false;
 
 	max_lanes = intel_tc_port_fia_max_lane_count(dig_port);
 	if (tc->legacy_port) {
 		drm_WARN_ON(&i915->drm, max_lanes != 4);
-		tc->mode = TC_PORT_LEGACY;
-
-		return;
+		return true;
 	}
 
+	drm_WARN_ON(&i915->drm, tc->mode != TC_PORT_DP_ALT);
+
 	/*
 	 * Now we have to re-check the live state, in case the port recently
 	 * became disconnected. Not necessary for legacy mode.
@@ -487,14 +481,12 @@ static void icl_tc_phy_connect(struct intel_tc_port *tc,
 		goto out_release_phy;
 	}
 
-	tc->mode = TC_PORT_DP_ALT;
-
-	return;
+	return true;
 
 out_release_phy:
 	tc_phy_take_ownership(tc, false);
-out_set_tbt_alt_mode:
-	tc->mode = TC_PORT_TBT_ALT;
+
+	return false;
 }
 
 /*
@@ -509,9 +501,6 @@ static void icl_tc_phy_disconnect(struct intel_tc_port *tc)
 		tc_phy_take_ownership(tc, false);
 		fallthrough;
 	case TC_PORT_TBT_ALT:
-		tc->mode = TC_PORT_DISCONNECTED;
-		fallthrough;
-	case TC_PORT_DISCONNECTED:
 		break;
 	default:
 		MISSING_CASE(tc->mode);
@@ -817,6 +806,30 @@ tc_phy_get_target_mode(struct intel_tc_port *tc)
 	return hpd_mask_to_target_mode(tc, live_status_mask);
 }
 
+static void tc_phy_connect(struct intel_tc_port *tc, int required_lanes)
+{
+	struct drm_i915_private *i915 = tc_to_i915(tc);
+	bool connected;
+
+	tc->mode = tc_phy_get_target_mode(tc);
+
+	connected = icl_tc_phy_connect(tc, required_lanes);
+	if (!connected && tc->mode != default_tc_mode(tc)) {
+		tc->mode = default_tc_mode(tc);
+		connected = icl_tc_phy_connect(tc, required_lanes);
+	}
+
+	drm_WARN_ON(&i915->drm, !connected);
+}
+
+static void tc_phy_disconnect(struct intel_tc_port *tc)
+{
+	if (tc->mode != TC_PORT_DISCONNECTED) {
+		icl_tc_phy_disconnect(tc);
+		tc->mode = TC_PORT_DISCONNECTED;
+	}
+}
+
 static void intel_tc_port_reset_mode(struct intel_tc_port *tc,
 				     int required_lanes, bool force_disconnect)
 {
@@ -834,9 +847,9 @@ static void intel_tc_port_reset_mode(struct intel_tc_port *tc,
 		drm_WARN_ON(&i915->drm, aux_powered);
 	}
 
-	icl_tc_phy_disconnect(tc);
+	tc_phy_disconnect(tc);
 	if (!force_disconnect)
-		icl_tc_phy_connect(tc, required_lanes);
+		tc_phy_connect(tc, required_lanes);
 
 	drm_dbg_kms(&i915->drm, "Port %s: TC port mode reset (%s -> %s)\n",
 		    tc->port_name,
@@ -1015,7 +1028,7 @@ void intel_tc_port_sanitize_mode(struct intel_digital_port *dig_port,
 				    "Port %s: PHY left in %s mode on disabled port, disconnecting it\n",
 				    tc->port_name,
 				    tc_port_mode_name(tc->init_mode));
-		icl_tc_phy_disconnect(tc);
+		tc_phy_disconnect(tc);
 		__intel_tc_port_put_link(tc);
 
 		tc_cold_unblock(tc, tc->lock_power_domain,
-- 
2.37.1

[Intel-gfx] [PATCH 12/29] drm/i915/tc: Factor out tc_phy_verify_legacy_or_dp_alt_mode()

[Imre Deak]

Factor out a function verifying the PHY connected state in legacy or
DP-alt mode. This is common to all platforms, which can be reused in
platform specific connect hooks added in follow-up patches.

No functional changes.

Signed-off-by: Imre Deak <imre.deak@intel.com>
---
 drivers/gpu/drm/i915/display/intel_tc.c | 47 +++++++++++++++----------
 1 file changed, 29 insertions(+), 18 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_tc.c b/drivers/gpu/drm/i915/display/intel_tc.c
index 9179f86287ab0..ee4db9d0eb978 100644
--- a/drivers/gpu/drm/i915/display/intel_tc.c
+++ b/drivers/gpu/drm/i915/display/intel_tc.c
@@ -434,27 +434,13 @@ static void icl_tc_phy_get_hw_state(struct intel_tc_port *tc)
  * connect and disconnect to cleanly transfer ownership with the controller and
  * set the type-C power state.
  */
-static bool icl_tc_phy_connect(struct intel_tc_port *tc,
-			       int required_lanes)
+static bool tc_phy_verify_legacy_or_dp_alt_mode(struct intel_tc_port *tc,
+						int required_lanes)
 {
 	struct drm_i915_private *i915 = tc_to_i915(tc);
 	struct intel_digital_port *dig_port = tc->dig_port;
 	int max_lanes;
 
-	if (tc->mode == TC_PORT_TBT_ALT)
-		return true;
-
-	if (!tc_phy_is_ready(tc) &&
-	    !drm_WARN_ON(&i915->drm, tc->legacy_port)) {
-		drm_dbg_kms(&i915->drm, "Port %s: PHY not ready\n",
-			    tc->port_name);
-		return false;
-	}
-
-	if (!tc_phy_take_ownership(tc, true) &&
-	    !drm_WARN_ON(&i915->drm, tc->legacy_port))
-		return false;
-
 	max_lanes = intel_tc_port_fia_max_lane_count(dig_port);
 	if (tc->legacy_port) {
 		drm_WARN_ON(&i915->drm, max_lanes != 4);
@@ -470,7 +456,7 @@ static bool icl_tc_phy_connect(struct intel_tc_port *tc,
 	if (!(tc_phy_hpd_live_status(tc) & BIT(TC_PORT_DP_ALT))) {
 		drm_dbg_kms(&i915->drm, "Port %s: PHY sudden disconnect\n",
 			    tc->port_name);
-		goto out_release_phy;
+		return false;
 	}
 
 	if (max_lanes < required_lanes) {
@@ -478,9 +464,34 @@ static bool icl_tc_phy_connect(struct intel_tc_port *tc,
 			    "Port %s: PHY max lanes %d < required lanes %d\n",
 			    tc->port_name,
 			    max_lanes, required_lanes);
-		goto out_release_phy;
+		return false;
+	}
+
+	return true;
+}
+
+static bool icl_tc_phy_connect(struct intel_tc_port *tc,
+			       int required_lanes)
+{
+	struct drm_i915_private *i915 = tc_to_i915(tc);
+
+	if (tc->mode == TC_PORT_TBT_ALT)
+		return true;
+
+	if (!tc_phy_is_ready(tc) &&
+	    !drm_WARN_ON(&i915->drm, tc->legacy_port)) {
+		drm_dbg_kms(&i915->drm, "Port %s: PHY not ready\n",
+			    tc->port_name);
+		return false;
 	}
 
+	if (!tc_phy_take_ownership(tc, true) &&
+	    !drm_WARN_ON(&i915->drm, tc->legacy_port))
+		return false;
+
+	if (!tc_phy_verify_legacy_or_dp_alt_mode(tc, required_lanes))
+		goto out_release_phy;
+
 	return true;
 
 out_release_phy:
-- 
2.37.1

[Intel-gfx] [PATCH 13/29] drm/i915/tc: Add TC PHY hooks to connect/disconnect the PHY

[Imre Deak]

Add TC PHY hooks to connect/disconnect the PHY. A follow-up patch will
add the ADLP specific hooks for these.

Signed-off-by: Imre Deak <imre.deak@intel.com>
---
 drivers/gpu/drm/i915/display/intel_tc.c | 12 +++++++++---
 1 file changed, 9 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_tc.c b/drivers/gpu/drm/i915/display/intel_tc.c
index ee4db9d0eb978..e63e9c57e5627 100644
--- a/drivers/gpu/drm/i915/display/intel_tc.c
+++ b/drivers/gpu/drm/i915/display/intel_tc.c
@@ -29,6 +29,8 @@ struct intel_tc_phy_ops {
 	bool (*is_ready)(struct intel_tc_port *tc);
 	bool (*is_owned)(struct intel_tc_port *tc);
 	void (*get_hw_state)(struct intel_tc_port *tc);
+	bool (*connect)(struct intel_tc_port *tc, int required_lanes);
+	void (*disconnect)(struct intel_tc_port *tc);
 };
 
 struct intel_tc_port {
@@ -523,6 +525,8 @@ static const struct intel_tc_phy_ops icl_tc_phy_ops = {
 	.is_ready = icl_tc_phy_is_ready,
 	.is_owned = icl_tc_phy_is_owned,
 	.get_hw_state = icl_tc_phy_get_hw_state,
+	.connect = icl_tc_phy_connect,
+	.disconnect = icl_tc_phy_disconnect,
 };
 
 /**
@@ -605,6 +609,8 @@ static const struct intel_tc_phy_ops adlp_tc_phy_ops = {
 	.is_ready = adlp_tc_phy_is_ready,
 	.is_owned = adlp_tc_phy_is_owned,
 	.get_hw_state = icl_tc_phy_get_hw_state,
+	.connect = icl_tc_phy_connect,
+	.disconnect = icl_tc_phy_disconnect,
 };
 
 /**
@@ -824,10 +830,10 @@ static void tc_phy_connect(struct intel_tc_port *tc, int required_lanes)
 
 	tc->mode = tc_phy_get_target_mode(tc);
 
-	connected = icl_tc_phy_connect(tc, required_lanes);
+	connected = tc->phy_ops->connect(tc, required_lanes);
 	if (!connected && tc->mode != default_tc_mode(tc)) {
 		tc->mode = default_tc_mode(tc);
-		connected = icl_tc_phy_connect(tc, required_lanes);
+		connected = tc->phy_ops->connect(tc, required_lanes);
 	}
 
 	drm_WARN_ON(&i915->drm, !connected);
@@ -836,7 +842,7 @@ static void tc_phy_connect(struct intel_tc_port *tc, int required_lanes)
 static void tc_phy_disconnect(struct intel_tc_port *tc)
 {
 	if (tc->mode != TC_PORT_DISCONNECTED) {
-		icl_tc_phy_disconnect(tc);
+		tc->phy_ops->disconnect(tc);
 		tc->mode = TC_PORT_DISCONNECTED;
 	}
 }
-- 
2.37.1

[Intel-gfx] [PATCH 14/29] drm/i915/tc: Fix up the legacy VBT flag only in disconnected mode

[Imre Deak]

A follow-up patch simplifies the tc_cold_block()/unblock() functions,
dropping the power domain parameter. For this it must be ensured that
the power domain - which depends on the actual TC mode and so the VBT
legacy port flag - can't change while the PHY is in a connected state
and accordingly TC-cold is blocked. Make this so, by fixing up the VBT
legacy flag only in the disconnected TC mode, instead of whenever the
HPD state is retrieved.

Signed-off-by: Imre Deak <imre.deak@intel.com>
---
 drivers/gpu/drm/i915/display/intel_tc.c | 13 ++++++++++---
 1 file changed, 10 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_tc.c b/drivers/gpu/drm/i915/display/intel_tc.c
index e63e9c57e5627..e61daa40356b5 100644
--- a/drivers/gpu/drm/i915/display/intel_tc.c
+++ b/drivers/gpu/drm/i915/display/intel_tc.c
@@ -298,6 +298,11 @@ static void tc_port_fixup_legacy_flag(struct intel_tc_port *tc,
 	struct drm_i915_private *i915 = tc_to_i915(tc);
 	u32 valid_hpd_mask;
 
+	drm_WARN_ON(&i915->drm, tc->mode != TC_PORT_DISCONNECTED);
+
+	if (hweight32(live_status_mask) != 1)
+		return;
+
 	if (tc->legacy_port)
 		valid_hpd_mask = BIT(TC_PORT_LEGACY);
 	else
@@ -625,8 +630,7 @@ static u32 tc_phy_hpd_live_status(struct intel_tc_port *tc)
 	mask = tc->phy_ops->hpd_live_status(tc);
 
 	/* The sink can be connected only in a single mode. */
-	if (!drm_WARN_ON_ONCE(&i915->drm, hweight32(mask) > 1))
-		tc_port_fixup_legacy_flag(tc, mask);
+	drm_WARN_ON_ONCE(&i915->drm, hweight32(mask) > 1);
 
 	return mask;
 }
@@ -826,9 +830,12 @@ tc_phy_get_target_mode(struct intel_tc_port *tc)
 static void tc_phy_connect(struct intel_tc_port *tc, int required_lanes)
 {
 	struct drm_i915_private *i915 = tc_to_i915(tc);
+	u32 live_status_mask = tc_phy_hpd_live_status(tc);
 	bool connected;
 
-	tc->mode = tc_phy_get_target_mode(tc);
+	tc_port_fixup_legacy_flag(tc, live_status_mask);
+
+	tc->mode = hpd_mask_to_target_mode(tc, live_status_mask);
 
 	connected = tc->phy_ops->connect(tc, required_lanes);
 	if (!connected && tc->mode != default_tc_mode(tc)) {
-- 
2.37.1

[Intel-gfx] [PATCH 15/29] drm/i915/tc: Check TC mode instead of the VBT legacy flag

[Imre Deak]

After the previous patch the TC mode in the connect/disconnect functions
is always in sync with the VBT legacy port flag, so for consistency with
the rest of the function check the TC mode instead of the VBT flag.

Signed-off-by: Imre Deak <imre.deak@intel.com>
---
 drivers/gpu/drm/i915/display/intel_tc.c | 15 +++++++--------
 1 file changed, 7 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_tc.c b/drivers/gpu/drm/i915/display/intel_tc.c
index e61daa40356b5..e8bd54d1582bc 100644
--- a/drivers/gpu/drm/i915/display/intel_tc.c
+++ b/drivers/gpu/drm/i915/display/intel_tc.c
@@ -449,7 +449,7 @@ static bool tc_phy_verify_legacy_or_dp_alt_mode(struct intel_tc_port *tc,
 	int max_lanes;
 
 	max_lanes = intel_tc_port_fia_max_lane_count(dig_port);
-	if (tc->legacy_port) {
+	if (tc->mode == TC_PORT_LEGACY) {
 		drm_WARN_ON(&i915->drm, max_lanes != 4);
 		return true;
 	}
@@ -485,16 +485,15 @@ static bool icl_tc_phy_connect(struct intel_tc_port *tc,
 	if (tc->mode == TC_PORT_TBT_ALT)
 		return true;
 
-	if (!tc_phy_is_ready(tc) &&
-	    !drm_WARN_ON(&i915->drm, tc->legacy_port)) {
-		drm_dbg_kms(&i915->drm, "Port %s: PHY not ready\n",
-			    tc->port_name);
+	if ((!tc_phy_is_ready(tc) ||
+	     !tc_phy_take_ownership(tc, true)) &&
+	    !drm_WARN_ON(&i915->drm, tc->mode == TC_PORT_LEGACY)) {
+		drm_dbg_kms(&i915->drm, "Port %s: can't take PHY ownership (ready %s)\n",
+			    tc->port_name,
+			    str_yes_no(tc_phy_is_ready(tc)));
 		return false;
 	}
 
-	if (!tc_phy_take_ownership(tc, true) &&
-	    !drm_WARN_ON(&i915->drm, tc->legacy_port))
-		return false;
 
 	if (!tc_phy_verify_legacy_or_dp_alt_mode(tc, required_lanes))
 		goto out_release_phy;
-- 
2.37.1

[Intel-gfx] [PATCH 16/29] drm/i915/tc: Block/unblock TC-cold in the PHY connect/disconnect hooks

[Imre Deak]

Move blocking/unblocking the TC-cold power state to the platform
specific PHY connect / disconnect hooks. This allows for adjusting the
connect/disconnect sequence as required for each platform.

Signed-off-by: Imre Deak <imre.deak@intel.com>
---
 drivers/gpu/drm/i915/display/intel_tc.c | 43 ++++++++-----------------
 1 file changed, 13 insertions(+), 30 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_tc.c b/drivers/gpu/drm/i915/display/intel_tc.c
index e8bd54d1582bc..253ab30c34f7a 100644
--- a/drivers/gpu/drm/i915/display/intel_tc.c
+++ b/drivers/gpu/drm/i915/display/intel_tc.c
@@ -482,6 +482,8 @@ static bool icl_tc_phy_connect(struct intel_tc_port *tc,
 {
 	struct drm_i915_private *i915 = tc_to_i915(tc);
 
+	tc->lock_wakeref = tc_cold_block(tc, &tc->lock_power_domain);
+
 	if (tc->mode == TC_PORT_TBT_ALT)
 		return true;
 
@@ -491,7 +493,7 @@ static bool icl_tc_phy_connect(struct intel_tc_port *tc,
 		drm_dbg_kms(&i915->drm, "Port %s: can't take PHY ownership (ready %s)\n",
 			    tc->port_name,
 			    str_yes_no(tc_phy_is_ready(tc)));
-		return false;
+		goto out_unblock_tc_cold;
 	}
 
 
@@ -502,6 +504,10 @@ static bool icl_tc_phy_connect(struct intel_tc_port *tc,
 
 out_release_phy:
 	tc_phy_take_ownership(tc, false);
+out_unblock_tc_cold:
+	tc_cold_unblock(tc,
+			tc->lock_power_domain,
+			fetch_and_zero(&tc->lock_wakeref));
 
 	return false;
 }
@@ -518,6 +524,9 @@ static void icl_tc_phy_disconnect(struct intel_tc_port *tc)
 		tc_phy_take_ownership(tc, false);
 		fallthrough;
 	case TC_PORT_TBT_ALT:
+		tc_cold_unblock(tc,
+				tc->lock_power_domain,
+				fetch_and_zero(&tc->lock_wakeref));
 		break;
 	default:
 		MISSING_CASE(tc->mode);
@@ -888,32 +897,9 @@ static bool intel_tc_port_needs_reset(struct intel_tc_port *tc)
 static void intel_tc_port_update_mode(struct intel_tc_port *tc,
 				      int required_lanes, bool force_disconnect)
 {
-	enum intel_display_power_domain domain;
-	intel_wakeref_t wref;
-	bool needs_reset = force_disconnect;
-
-	if (!needs_reset) {
-		/* Get power domain required to check the hotplug live status. */
-		wref = tc_cold_block(tc, &domain);
-		needs_reset = intel_tc_port_needs_reset(tc);
-		tc_cold_unblock(tc, domain, wref);
-	}
-
-	if (!needs_reset)
-		return;
-
-	/* Get power domain required for resetting the mode. */
-	wref = tc_cold_block_in_mode(tc, TC_PORT_DISCONNECTED, &domain);
-
-	intel_tc_port_reset_mode(tc, required_lanes, force_disconnect);
-
-	/* Get power domain matching the new mode after reset. */
-	tc_cold_unblock(tc, tc->lock_power_domain,
-			fetch_and_zero(&tc->lock_wakeref));
-	if (tc->mode != TC_PORT_DISCONNECTED)
-		tc->lock_wakeref = tc_cold_block(tc, &tc->lock_power_domain);
-
-	tc_cold_unblock(tc, domain, wref);
+	if (force_disconnect ||
+	    intel_tc_port_needs_reset(tc))
+		intel_tc_port_reset_mode(tc, required_lanes, force_disconnect);
 }
 
 static void __intel_tc_port_get_link(struct intel_tc_port *tc)
@@ -1053,9 +1039,6 @@ void intel_tc_port_sanitize_mode(struct intel_digital_port *dig_port,
 				    tc_port_mode_name(tc->init_mode));
 		tc_phy_disconnect(tc);
 		__intel_tc_port_put_link(tc);
-
-		tc_cold_unblock(tc, tc->lock_power_domain,
-				fetch_and_zero(&tc->lock_wakeref));
 	}
 
 	drm_dbg_kms(&i915->drm, "Port %s: sanitize mode (%s)\n",
-- 
2.37.1

[Intel-gfx] [PATCH 17/29] drm/i915/tc: Remove redundant wakeref=0 check from unblock_tc_cold()

[Imre Deak]

After the previous patch unblock_tc_cold() will not be called in a
disconnected mode, so the wakeref passed to it will be always non-zero.
Remove the redundant check.

Signed-off-by: Imre Deak <imre.deak@intel.com>
---
 drivers/gpu/drm/i915/display/intel_tc.c | 8 --------
 1 file changed, 8 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_tc.c b/drivers/gpu/drm/i915/display/intel_tc.c
index 253ab30c34f7a..21c6ef8064883 100644
--- a/drivers/gpu/drm/i915/display/intel_tc.c
+++ b/drivers/gpu/drm/i915/display/intel_tc.c
@@ -150,14 +150,6 @@ tc_cold_unblock(struct intel_tc_port *tc, enum intel_display_power_domain domain
 {
 	struct drm_i915_private *i915 = tc_to_i915(tc);
 
-	/*
-	 * wakeref == -1, means some error happened saving save_depot_stack but
-	 * power should still be put down and 0 is a invalid save_depot_stack
-	 * id so can be used to skip it for non TC legacy ports.
-	 */
-	if (wakeref == 0)
-		return;
-
 	intel_display_power_put(i915, domain, wakeref);
 }
 
-- 
2.37.1

[Intel-gfx] [PATCH 18/29] drm/i915/tc: Drop tc_cold_block()/unblock()'s power domain parameter

[Imre Deak]

Simplify tc_cold_block()/unblock() by dropping their power domain
parameter. The power domain depends on the current TC mode, which -
after the previous patch - can't change while the PHY is connected,
holding a TC-cold-off power domain reference. Based on this the domain
can be deducted from the current TC mode instead of having to pass this
as a parameter.

Blocking TC-cold for the PHY HW readout happens before the current TC
mode is determined, so here the initial power domain must be still
manually passed.

For debugging still keep track of the domain used for tc_cold_block()
and verify that it remained the same until tc_cold_unblock().

While at it rename tc_cold_get_power_domain() to
tc_phy_cold_off_domain(), reflecting the name of platform specific hook
added in the next patch.

Signed-off-by: Imre Deak <imre.deak@intel.com>
---
 drivers/gpu/drm/i915/display/intel_tc.c | 61 +++++++++++++++----------
 1 file changed, 37 insertions(+), 24 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_tc.c b/drivers/gpu/drm/i915/display/intel_tc.c
index 21c6ef8064883..943660044e37a 100644
--- a/drivers/gpu/drm/i915/display/intel_tc.c
+++ b/drivers/gpu/drm/i915/display/intel_tc.c
@@ -40,7 +40,9 @@ struct intel_tc_port {
 
 	struct mutex lock;	/* protects the TypeC port mode */
 	intel_wakeref_t lock_wakeref;
+#if IS_ENABLED(CONFIG_DRM_I915_DEBUG_RUNTIME_PM)
 	enum intel_display_power_domain lock_power_domain;
+#endif
 	struct delayed_work disconnect_phy_work;
 	int link_refcount;
 	bool legacy_port:1;
@@ -116,43 +118,60 @@ bool intel_tc_cold_requires_aux_pw(struct intel_digital_port *dig_port)
 }
 
 static enum intel_display_power_domain
-tc_cold_get_power_domain(struct intel_tc_port *tc, enum tc_port_mode mode)
+tc_phy_cold_off_domain(struct intel_tc_port *tc)
 {
 	struct drm_i915_private *i915 = tc_to_i915(tc);
 	struct intel_digital_port *dig_port = tc->dig_port;
 
-	if (mode == TC_PORT_TBT_ALT || !intel_tc_cold_requires_aux_pw(dig_port))
+	if (tc->mode == TC_PORT_TBT_ALT || !intel_tc_cold_requires_aux_pw(dig_port))
 		return POWER_DOMAIN_TC_COLD_OFF;
 
 	return intel_display_power_legacy_aux_domain(i915, dig_port->aux_ch);
 }
 
 static intel_wakeref_t
-tc_cold_block_in_mode(struct intel_tc_port *tc, enum tc_port_mode mode,
-		      enum intel_display_power_domain *domain)
+__tc_cold_block(struct intel_tc_port *tc, enum intel_display_power_domain *domain)
 {
 	struct drm_i915_private *i915 = tc_to_i915(tc);
 
-	*domain = tc_cold_get_power_domain(tc, mode);
+	*domain = tc_phy_cold_off_domain(tc);
 
 	return intel_display_power_get(i915, *domain);
 }
 
 static intel_wakeref_t
-tc_cold_block(struct intel_tc_port *tc, enum intel_display_power_domain *domain)
+tc_cold_block(struct intel_tc_port *tc)
 {
-	return tc_cold_block_in_mode(tc, tc->mode, domain);
+	enum intel_display_power_domain domain;
+	intel_wakeref_t wakeref;
+
+	wakeref = __tc_cold_block(tc, &domain);
+#if IS_ENABLED(CONFIG_DRM_I915_DEBUG_RUNTIME_PM)
+	tc->lock_power_domain = domain;
+#endif
+	return wakeref;
 }
 
 static void
-tc_cold_unblock(struct intel_tc_port *tc, enum intel_display_power_domain domain,
-		intel_wakeref_t wakeref)
+__tc_cold_unblock(struct intel_tc_port *tc, enum intel_display_power_domain domain,
+		  intel_wakeref_t wakeref)
 {
 	struct drm_i915_private *i915 = tc_to_i915(tc);
 
 	intel_display_power_put(i915, domain, wakeref);
 }
 
+static void
+tc_cold_unblock(struct intel_tc_port *tc, intel_wakeref_t wakeref)
+{
+	enum intel_display_power_domain domain = tc_phy_cold_off_domain(tc);
+
+#if IS_ENABLED(CONFIG_DRM_I915_DEBUG_RUNTIME_PM)
+	drm_WARN_ON(&tc_to_i915(tc)->drm, tc->lock_power_domain != domain);
+#endif
+	__tc_cold_unblock(tc, domain, wakeref);
+}
+
 static void
 assert_tc_cold_blocked(struct intel_tc_port *tc)
 {
@@ -160,8 +179,7 @@ assert_tc_cold_blocked(struct intel_tc_port *tc)
 	bool enabled;
 
 	enabled = intel_display_power_is_enabled(i915,
-						 tc_cold_get_power_domain(tc,
-									  tc->mode));
+						 tc_phy_cold_off_domain(tc));
 	drm_WARN_ON(&i915->drm, !enabled);
 }
 
@@ -413,13 +431,13 @@ static void icl_tc_phy_get_hw_state(struct intel_tc_port *tc)
 	enum intel_display_power_domain domain;
 	intel_wakeref_t tc_cold_wref;
 
-	tc_cold_wref = tc_cold_block(tc, &domain);
+	tc_cold_wref = __tc_cold_block(tc, &domain);
 
 	tc->mode = tc_phy_get_current_mode(tc);
 	if (tc->mode != TC_PORT_DISCONNECTED)
-		tc->lock_wakeref = tc_cold_block(tc, &tc->lock_power_domain);
+		tc->lock_wakeref = tc_cold_block(tc);
 
-	tc_cold_unblock(tc, domain, tc_cold_wref);
+	__tc_cold_unblock(tc, domain, tc_cold_wref);
 }
 
 /*
@@ -474,7 +492,7 @@ static bool icl_tc_phy_connect(struct intel_tc_port *tc,
 {
 	struct drm_i915_private *i915 = tc_to_i915(tc);
 
-	tc->lock_wakeref = tc_cold_block(tc, &tc->lock_power_domain);
+	tc->lock_wakeref = tc_cold_block(tc);
 
 	if (tc->mode == TC_PORT_TBT_ALT)
 		return true;
@@ -497,9 +515,7 @@ static bool icl_tc_phy_connect(struct intel_tc_port *tc,
 out_release_phy:
 	tc_phy_take_ownership(tc, false);
 out_unblock_tc_cold:
-	tc_cold_unblock(tc,
-			tc->lock_power_domain,
-			fetch_and_zero(&tc->lock_wakeref));
+	tc_cold_unblock(tc, fetch_and_zero(&tc->lock_wakeref));
 
 	return false;
 }
@@ -516,9 +532,7 @@ static void icl_tc_phy_disconnect(struct intel_tc_port *tc)
 		tc_phy_take_ownership(tc, false);
 		fallthrough;
 	case TC_PORT_TBT_ALT:
-		tc_cold_unblock(tc,
-				tc->lock_power_domain,
-				fetch_and_zero(&tc->lock_wakeref));
+		tc_cold_unblock(tc, fetch_and_zero(&tc->lock_wakeref));
 		break;
 	default:
 		MISSING_CASE(tc->mode);
@@ -1177,7 +1191,6 @@ void intel_tc_port_put_link(struct intel_digital_port *dig_port)
 static bool
 tc_has_modular_fia(struct drm_i915_private *i915, struct intel_tc_port *tc)
 {
-	enum intel_display_power_domain domain;
 	intel_wakeref_t wakeref;
 	u32 val;
 
@@ -1185,9 +1198,9 @@ tc_has_modular_fia(struct drm_i915_private *i915, struct intel_tc_port *tc)
 		return false;
 
 	mutex_lock(&tc->lock);
-	wakeref = tc_cold_block(tc, &domain);
+	wakeref = tc_cold_block(tc);
 	val = intel_de_read(i915, PORT_TX_DFLEXDPSP(FIA1));
-	tc_cold_unblock(tc, domain, wakeref);
+	tc_cold_unblock(tc, wakeref);
 	mutex_unlock(&tc->lock);
 
 	drm_WARN_ON(&i915->drm, val == 0xffffffff);
-- 
2.37.1

[Intel-gfx] [PATCH 19/29] drm/i915/tc: Add TC PHY hook to get the TC-cold blocking power domain

[Imre Deak]

Instead of the corresponding if ladder, add a TC PHY hook to get the
platform and TC mode specific power domain used for blocking the TC-cold
power state.

Signed-off-by: Imre Deak <imre.deak@intel.com>
---
 drivers/gpu/drm/i915/display/intel_tc.c | 73 ++++++++++++++++++++-----
 1 file changed, 59 insertions(+), 14 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_tc.c b/drivers/gpu/drm/i915/display/intel_tc.c
index 943660044e37a..e68346c5e6036 100644
--- a/drivers/gpu/drm/i915/display/intel_tc.c
+++ b/drivers/gpu/drm/i915/display/intel_tc.c
@@ -25,6 +25,7 @@ enum tc_port_mode {
 struct intel_tc_port;
 
 struct intel_tc_phy_ops {
+	enum intel_display_power_domain (*cold_off_domain)(struct intel_tc_port *tc);
 	u32 (*hpd_live_status)(struct intel_tc_port *tc);
 	bool (*is_ready)(struct intel_tc_port *tc);
 	bool (*is_owned)(struct intel_tc_port *tc);
@@ -53,6 +54,8 @@ struct intel_tc_port {
 	u8 phy_fia_idx;
 };
 
+static enum intel_display_power_domain
+tc_phy_cold_off_domain(struct intel_tc_port *);
 static u32 tc_phy_hpd_live_status(struct intel_tc_port *tc);
 static bool tc_phy_is_ready(struct intel_tc_port *tc);
 static bool tc_phy_take_ownership(struct intel_tc_port *tc, bool take);
@@ -113,20 +116,8 @@ bool intel_tc_cold_requires_aux_pw(struct intel_digital_port *dig_port)
 	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
 	struct intel_tc_port *tc = to_tc_port(dig_port);
 
-	return (DISPLAY_VER(i915) == 11 && tc->legacy_port) ||
-		IS_ALDERLAKE_P(i915);
-}
-
-static enum intel_display_power_domain
-tc_phy_cold_off_domain(struct intel_tc_port *tc)
-{
-	struct drm_i915_private *i915 = tc_to_i915(tc);
-	struct intel_digital_port *dig_port = tc->dig_port;
-
-	if (tc->mode == TC_PORT_TBT_ALT || !intel_tc_cold_requires_aux_pw(dig_port))
-		return POWER_DOMAIN_TC_COLD_OFF;
-
-	return intel_display_power_legacy_aux_domain(i915, dig_port->aux_ch);
+	return tc_phy_cold_off_domain(tc) ==
+	       intel_display_power_legacy_aux_domain(i915, dig_port->aux_ch);
 }
 
 static intel_wakeref_t
@@ -334,6 +325,18 @@ static void tc_port_fixup_legacy_flag(struct intel_tc_port *tc,
  * ICL TC PHY handlers
  * -------------------
  */
+static enum intel_display_power_domain
+icl_tc_phy_cold_off_domain(struct intel_tc_port *tc)
+{
+	struct drm_i915_private *i915 = tc_to_i915(tc);
+	struct intel_digital_port *dig_port = tc->dig_port;
+
+	if (tc->legacy_port)
+		return intel_display_power_legacy_aux_domain(i915, dig_port->aux_ch);
+
+	return POWER_DOMAIN_TC_COLD_OFF;
+}
+
 static u32 icl_tc_phy_hpd_live_status(struct intel_tc_port *tc)
 {
 	struct drm_i915_private *i915 = tc_to_i915(tc);
@@ -540,6 +543,27 @@ static void icl_tc_phy_disconnect(struct intel_tc_port *tc)
 }
 
 static const struct intel_tc_phy_ops icl_tc_phy_ops = {
+	.cold_off_domain = icl_tc_phy_cold_off_domain,
+	.hpd_live_status = icl_tc_phy_hpd_live_status,
+	.is_ready = icl_tc_phy_is_ready,
+	.is_owned = icl_tc_phy_is_owned,
+	.get_hw_state = icl_tc_phy_get_hw_state,
+	.connect = icl_tc_phy_connect,
+	.disconnect = icl_tc_phy_disconnect,
+};
+
+/**
+ * TGL TC PHY handlers
+ * -------------------
+ */
+static enum intel_display_power_domain
+tgl_tc_phy_cold_off_domain(struct intel_tc_port *tc)
+{
+	return POWER_DOMAIN_TC_COLD_OFF;
+}
+
+static const struct intel_tc_phy_ops tgl_tc_phy_ops = {
+	.cold_off_domain = tgl_tc_phy_cold_off_domain,
 	.hpd_live_status = icl_tc_phy_hpd_live_status,
 	.is_ready = icl_tc_phy_is_ready,
 	.is_owned = icl_tc_phy_is_owned,
@@ -552,6 +576,18 @@ static const struct intel_tc_phy_ops icl_tc_phy_ops = {
  * ADLP TC PHY handlers
  * --------------------
  */
+static enum intel_display_power_domain
+adlp_tc_phy_cold_off_domain(struct intel_tc_port *tc)
+{
+	struct drm_i915_private *i915 = tc_to_i915(tc);
+	struct intel_digital_port *dig_port = tc->dig_port;
+
+	if (tc->mode != TC_PORT_TBT_ALT)
+		return intel_display_power_legacy_aux_domain(i915, dig_port->aux_ch);
+
+	return POWER_DOMAIN_TC_COLD_OFF;
+}
+
 static u32 adlp_tc_phy_hpd_live_status(struct intel_tc_port *tc)
 {
 	struct drm_i915_private *i915 = tc_to_i915(tc);
@@ -624,6 +660,7 @@ static bool adlp_tc_phy_is_owned(struct intel_tc_port *tc)
 }
 
 static const struct intel_tc_phy_ops adlp_tc_phy_ops = {
+	.cold_off_domain = adlp_tc_phy_cold_off_domain,
 	.hpd_live_status = adlp_tc_phy_hpd_live_status,
 	.is_ready = adlp_tc_phy_is_ready,
 	.is_owned = adlp_tc_phy_is_owned,
@@ -636,6 +673,12 @@ static const struct intel_tc_phy_ops adlp_tc_phy_ops = {
  * Generic TC PHY handlers
  * -----------------------
  */
+static enum intel_display_power_domain
+tc_phy_cold_off_domain(struct intel_tc_port *tc)
+{
+	return tc->phy_ops->cold_off_domain(tc);
+}
+
 static u32 tc_phy_hpd_live_status(struct intel_tc_port *tc)
 {
 	struct drm_i915_private *i915 = tc_to_i915(tc);
@@ -1246,6 +1289,8 @@ int intel_tc_port_init(struct intel_digital_port *dig_port, bool is_legacy)
 
 	if (DISPLAY_VER(i915) >= 13)
 		tc->phy_ops = &adlp_tc_phy_ops;
+	else if (DISPLAY_VER(i915) >= 12)
+		tc->phy_ops = &tgl_tc_phy_ops;
 	else
 		tc->phy_ops = &icl_tc_phy_ops;
 
-- 
2.37.1

[Intel-gfx] [PATCH 20/29] drm/i915/tc: Add asserts in TC PHY hooks that the required power is on

[Imre Deak]

Add an assert to each TC PHY hook that their required power domain is
enabled.

While at it add a comment describing the domains used on each platform
and TC mode.

Signed-off-by: Imre Deak <imre.deak@intel.com>
---
 drivers/gpu/drm/i915/display/intel_tc.c | 61 +++++++++++++++++++++++++
 1 file changed, 61 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_tc.c b/drivers/gpu/drm/i915/display/intel_tc.c
index e68346c5e6036..7bcd93f1f0597 100644
--- a/drivers/gpu/drm/i915/display/intel_tc.c
+++ b/drivers/gpu/drm/i915/display/intel_tc.c
@@ -111,6 +111,46 @@ bool intel_tc_port_in_legacy_mode(struct intel_digital_port *dig_port)
 	return intel_tc_port_in_mode(dig_port, TC_PORT_LEGACY);
 }
 
+/**
+ * The display power domains used for TC ports depending on the
+ * platform and TC mode (legacy, DP-alt, TBT):
+ *
+ * POWER_DOMAIN_DISPLAY_CORE:
+ * --------------------------
+ * ADLP/all modes:
+ *   - TCSS/IOM access for PHY ready state.
+ * ADLP+/all modes:
+ *   - DE/north-,south-HPD ISR access for HPD live state.
+ *
+ * POWER_DOMAIN_PORT_DDI_LANES_<port>:
+ * -----------------------------------
+ * ICL+/all modes:
+ *   - DE/DDI_BUF access for port enabled state.
+ * ADLP/all modes:
+ *   - DE/DDI_BUF access for PHY owned state.
+ *
+ * POWER_DOMAIN_AUX_USBC<TC port index>:
+ * -------------------------------------
+ * ICL/legacy mode:
+ *   - TCSS/IOM,FIA access for PHY ready, owned and HPD live state
+ *   - TCSS/PHY: block TC-cold power state for using the PHY AUX and
+ *     main lanes.
+ * ADLP/legacy, DP-alt modes:
+ *   - TCSS/PHY: block TC-cold power state for using the PHY AUX and
+ *     main lanes.
+ *
+ * POWER_DOMAIN_TC_COLD_OFF:
+ * -------------------------
+ * TGL/legacy, DP-alt modes:
+ *   - TCSS/IOM,FIA access for PHY ready, owned and HPD live state
+ *   - TCSS/PHY: block TC-cold power state for using the PHY AUX and
+ *     main lanes.
+ *
+ * ICL, TGL, ADLP/TBT mode:
+ *   - TCSS/IOM,FIA access for HPD live state
+ *   - TCSS/TBT: block TC-cold power state for using the (TBT DP-IN)
+ *     AUX and main lanes.
+ */
 bool intel_tc_cold_requires_aux_pw(struct intel_digital_port *dig_port)
 {
 	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
@@ -163,6 +203,15 @@ tc_cold_unblock(struct intel_tc_port *tc, intel_wakeref_t wakeref)
 	__tc_cold_unblock(tc, domain, wakeref);
 }
 
+static void
+assert_display_core_power_enabled(struct intel_tc_port *tc)
+{
+	struct drm_i915_private *i915 = tc_to_i915(tc);
+
+	drm_WARN_ON(&i915->drm,
+		    !intel_display_power_is_enabled(i915, POWER_DOMAIN_DISPLAY_CORE));
+}
+
 static void
 assert_tc_cold_blocked(struct intel_tc_port *tc)
 {
@@ -378,6 +427,8 @@ static bool icl_tc_phy_is_ready(struct intel_tc_port *tc)
 	struct drm_i915_private *i915 = tc_to_i915(tc);
 	u32 val;
 
+	assert_tc_cold_blocked(tc);
+
 	val = intel_de_read(i915, PORT_TX_DFLEXDPPMS(tc->phy_fia));
 	if (val == 0xffffffff) {
 		drm_dbg_kms(&i915->drm,
@@ -395,6 +446,8 @@ static bool icl_tc_phy_take_ownership(struct intel_tc_port *tc,
 	struct drm_i915_private *i915 = tc_to_i915(tc);
 	u32 val;
 
+	assert_tc_cold_blocked(tc);
+
 	val = intel_de_read(i915, PORT_TX_DFLEXDPCSSS(tc->phy_fia));
 	if (val == 0xffffffff) {
 		drm_dbg_kms(&i915->drm,
@@ -418,6 +471,8 @@ static bool icl_tc_phy_is_owned(struct intel_tc_port *tc)
 	struct drm_i915_private *i915 = tc_to_i915(tc);
 	u32 val;
 
+	assert_tc_cold_blocked(tc);
+
 	val = intel_de_read(i915, PORT_TX_DFLEXDPCSSS(tc->phy_fia));
 	if (val == 0xffffffff) {
 		drm_dbg_kms(&i915->drm,
@@ -626,6 +681,8 @@ static bool adlp_tc_phy_is_ready(struct intel_tc_port *tc)
 	enum tc_port tc_port = intel_port_to_tc(i915, tc->dig_port->base.port);
 	u32 val;
 
+	assert_display_core_power_enabled(tc);
+
 	val = intel_de_read(i915, TCSS_DDI_STATUS(tc_port));
 	if (val == 0xffffffff) {
 		drm_dbg_kms(&i915->drm,
@@ -643,6 +700,8 @@ static bool adlp_tc_phy_take_ownership(struct intel_tc_port *tc,
 	struct drm_i915_private *i915 = tc_to_i915(tc);
 	enum port port = tc->dig_port->base.port;
 
+	assert_tc_port_power_enabled(tc);
+
 	intel_de_rmw(i915, DDI_BUF_CTL(port), DDI_BUF_CTL_TC_PHY_OWNERSHIP,
 		     take ? DDI_BUF_CTL_TC_PHY_OWNERSHIP : 0);
 
@@ -655,6 +714,8 @@ static bool adlp_tc_phy_is_owned(struct intel_tc_port *tc)
 	enum port port = tc->dig_port->base.port;
 	u32 val;
 
+	assert_tc_port_power_enabled(tc);
+
 	val = intel_de_read(i915, DDI_BUF_CTL(port));
 	return val & DDI_BUF_CTL_TC_PHY_OWNERSHIP;
 }
-- 
2.37.1

[Intel-gfx] [PATCH 21/29] drm/i915/tc: Add TC PHY hook to init the PHY

[Imre Deak]

Add a hook for platform specific PHY initialization. Move the detection
of modular FIAs to the TGL handler, skipping this on ADLP+ where the
FIAs are always modular, not requiring a detection.

Signed-off-by: Imre Deak <imre.deak@intel.com>
---
 drivers/gpu/drm/i915/display/intel_tc.c  | 96 ++++++++++++++----------
 drivers/gpu/drm/i915/i915_pci.c          |  3 -
 drivers/gpu/drm/i915/intel_device_info.h |  1 -
 3 files changed, 56 insertions(+), 44 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_tc.c b/drivers/gpu/drm/i915/display/intel_tc.c
index 7bcd93f1f0597..8f159ded501f8 100644
--- a/drivers/gpu/drm/i915/display/intel_tc.c
+++ b/drivers/gpu/drm/i915/display/intel_tc.c
@@ -32,6 +32,7 @@ struct intel_tc_phy_ops {
 	void (*get_hw_state)(struct intel_tc_port *tc);
 	bool (*connect)(struct intel_tc_port *tc, int required_lanes);
 	void (*disconnect)(struct intel_tc_port *tc);
+	void (*init)(struct intel_tc_port *tc);
 };
 
 struct intel_tc_port {
@@ -370,6 +371,25 @@ static void tc_port_fixup_legacy_flag(struct intel_tc_port *tc,
 	tc->legacy_port = !tc->legacy_port;
 }
 
+static void tc_phy_load_fia_params(struct intel_tc_port *tc, bool modular_fia)
+{
+	struct drm_i915_private *i915 = tc_to_i915(tc);
+	enum port port = tc->dig_port->base.port;
+	enum tc_port tc_port = intel_port_to_tc(i915, port);
+
+	/*
+	 * Each Modular FIA instance houses 2 TC ports. In SOC that has more
+	 * than two TC ports, there are multiple instances of Modular FIA.
+	 */
+	if (modular_fia) {
+		tc->phy_fia = tc_port / 2;
+		tc->phy_fia_idx = tc_port % 2;
+	} else {
+		tc->phy_fia = FIA1;
+		tc->phy_fia_idx = tc_port;
+	}
+}
+
 /**
  * ICL TC PHY handlers
  * -------------------
@@ -597,6 +617,11 @@ static void icl_tc_phy_disconnect(struct intel_tc_port *tc)
 	}
 }
 
+static void icl_tc_phy_init(struct intel_tc_port *tc)
+{
+	tc_phy_load_fia_params(tc, false);
+}
+
 static const struct intel_tc_phy_ops icl_tc_phy_ops = {
 	.cold_off_domain = icl_tc_phy_cold_off_domain,
 	.hpd_live_status = icl_tc_phy_hpd_live_status,
@@ -605,6 +630,7 @@ static const struct intel_tc_phy_ops icl_tc_phy_ops = {
 	.get_hw_state = icl_tc_phy_get_hw_state,
 	.connect = icl_tc_phy_connect,
 	.disconnect = icl_tc_phy_disconnect,
+	.init = icl_tc_phy_init,
 };
 
 /**
@@ -617,6 +643,20 @@ tgl_tc_phy_cold_off_domain(struct intel_tc_port *tc)
 	return POWER_DOMAIN_TC_COLD_OFF;
 }
 
+static void tgl_tc_phy_init(struct intel_tc_port *tc)
+{
+	struct drm_i915_private *i915 = tc_to_i915(tc);
+	intel_wakeref_t wakeref;
+	u32 val;
+
+	with_intel_display_power(i915, tc_phy_cold_off_domain(tc), wakeref)
+		val = intel_de_read(i915, PORT_TX_DFLEXDPSP(FIA1));
+
+	drm_WARN_ON(&i915->drm, val == 0xffffffff);
+
+	tc_phy_load_fia_params(tc, val & MODULAR_FIA_MASK);
+}
+
 static const struct intel_tc_phy_ops tgl_tc_phy_ops = {
 	.cold_off_domain = tgl_tc_phy_cold_off_domain,
 	.hpd_live_status = icl_tc_phy_hpd_live_status,
@@ -625,6 +665,7 @@ static const struct intel_tc_phy_ops tgl_tc_phy_ops = {
 	.get_hw_state = icl_tc_phy_get_hw_state,
 	.connect = icl_tc_phy_connect,
 	.disconnect = icl_tc_phy_disconnect,
+	.init = tgl_tc_phy_init,
 };
 
 /**
@@ -720,6 +761,11 @@ static bool adlp_tc_phy_is_owned(struct intel_tc_port *tc)
 	return val & DDI_BUF_CTL_TC_PHY_OWNERSHIP;
 }
 
+static void adlp_tc_phy_init(struct intel_tc_port *tc)
+{
+	tc_phy_load_fia_params(tc, true);
+}
+
 static const struct intel_tc_phy_ops adlp_tc_phy_ops = {
 	.cold_off_domain = adlp_tc_phy_cold_off_domain,
 	.hpd_live_status = adlp_tc_phy_hpd_live_status,
@@ -728,6 +774,7 @@ static const struct intel_tc_phy_ops adlp_tc_phy_ops = {
 	.get_hw_state = icl_tc_phy_get_hw_state,
 	.connect = icl_tc_phy_connect,
 	.disconnect = icl_tc_phy_disconnect,
+	.init = adlp_tc_phy_init,
 };
 
 /**
@@ -972,6 +1019,13 @@ static void tc_phy_disconnect(struct intel_tc_port *tc)
 	}
 }
 
+static void tc_phy_init(struct intel_tc_port *tc)
+{
+	mutex_lock(&tc->lock);
+	tc->phy_ops->init(tc);
+	mutex_unlock(&tc->lock);
+}
+
 static void intel_tc_port_reset_mode(struct intel_tc_port *tc,
 				     int required_lanes, bool force_disconnect)
 {
@@ -1292,45 +1346,6 @@ void intel_tc_port_put_link(struct intel_digital_port *dig_port)
 	intel_tc_port_flush_work(dig_port);
 }
 
-static bool
-tc_has_modular_fia(struct drm_i915_private *i915, struct intel_tc_port *tc)
-{
-	intel_wakeref_t wakeref;
-	u32 val;
-
-	if (!INTEL_INFO(i915)->display.has_modular_fia)
-		return false;
-
-	mutex_lock(&tc->lock);
-	wakeref = tc_cold_block(tc);
-	val = intel_de_read(i915, PORT_TX_DFLEXDPSP(FIA1));
-	tc_cold_unblock(tc, wakeref);
-	mutex_unlock(&tc->lock);
-
-	drm_WARN_ON(&i915->drm, val == 0xffffffff);
-
-	return val & MODULAR_FIA_MASK;
-}
-
-static void
-tc_port_load_fia_params(struct drm_i915_private *i915, struct intel_tc_port *tc)
-{
-	enum port port = tc->dig_port->base.port;
-	enum tc_port tc_port = intel_port_to_tc(i915, port);
-
-	/*
-	 * Each Modular FIA instance houses 2 TC ports. In SOC that has more
-	 * than two TC ports, there are multiple instances of Modular FIA.
-	 */
-	if (tc_has_modular_fia(i915, tc)) {
-		tc->phy_fia = tc_port / 2;
-		tc->phy_fia_idx = tc_port % 2;
-	} else {
-		tc->phy_fia = FIA1;
-		tc->phy_fia_idx = tc_port;
-	}
-}
-
 int intel_tc_port_init(struct intel_digital_port *dig_port, bool is_legacy)
 {
 	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
@@ -1363,7 +1378,8 @@ int intel_tc_port_init(struct intel_digital_port *dig_port, bool is_legacy)
 	tc->legacy_port = is_legacy;
 	tc->mode = TC_PORT_DISCONNECTED;
 	tc->link_refcount = 0;
-	tc_port_load_fia_params(i915, tc);
+
+	tc_phy_init(tc);
 
 	intel_tc_port_init_mode(dig_port);
 
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index a8d942b16223f..bbc4d62e490e5 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -896,7 +896,6 @@ static const struct intel_device_info jsl_info = {
 static const struct intel_device_info tgl_info = {
 	GEN12_FEATURES,
 	PLATFORM(INTEL_TIGERLAKE),
-	.display.has_modular_fia = 1,
 	.__runtime.platform_engine_mask =
 		BIT(RCS0) | BIT(BCS0) | BIT(VECS0) | BIT(VCS0) | BIT(VCS2),
 };
@@ -996,7 +995,6 @@ static const struct intel_device_info adl_p_info = {
 			       BIT(TRANSCODER_C) | BIT(TRANSCODER_D) |
 			       BIT(TRANSCODER_DSI_0) | BIT(TRANSCODER_DSI_1),
 	.display.has_cdclk_crawl = 1,
-	.display.has_modular_fia = 1,
 	.display.has_psr_hw_tracking = 0,
 	.__runtime.platform_engine_mask =
 		BIT(RCS0) | BIT(BCS0) | BIT(VECS0) | BIT(VCS0) | BIT(VCS2),
@@ -1143,7 +1141,6 @@ static const struct intel_device_info mtl_info = {
 	.__runtime.graphics.ip.rel = 70,
 	.__runtime.media.ip.ver = 13,
 	PLATFORM(INTEL_METEORLAKE),
-	.display.has_modular_fia = 1,
 	.extra_gt_list = xelpmp_extra_gt,
 	.has_flat_ccs = 0,
 	.has_gmd_id = 1,
diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h
index b30cc8b97c3a5..dd8b17c155669 100644
--- a/drivers/gpu/drm/i915/intel_device_info.h
+++ b/drivers/gpu/drm/i915/intel_device_info.h
@@ -192,7 +192,6 @@ enum intel_ppgtt_type {
 	func(has_hotplug); \
 	func(has_hti); \
 	func(has_ipc); \
-	func(has_modular_fia); \
 	func(has_overlay); \
 	func(has_psr); \
 	func(has_psr_hw_tracking); \
-- 
2.37.1

[Intel-gfx] [PATCH 22/29] drm/i915/adlp/tc: Use the DE HPD ISR register for hotplug detection

[Imre Deak]

The spec says to use the CPU ISR registers for DP-alt/TBT HPD detection
on ADLP, so do that instead of using the related IOM/TCSS registers.

Bspec: 55480, 55482, 49212, 49305

Signed-off-by: Imre Deak <imre.deak@intel.com>
---
 drivers/gpu/drm/i915/display/intel_tc.c | 21 +++++++++------------
 1 file changed, 9 insertions(+), 12 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_tc.c b/drivers/gpu/drm/i915/display/intel_tc.c
index 8f159ded501f8..3122f7ce8c9a0 100644
--- a/drivers/gpu/drm/i915/display/intel_tc.c
+++ b/drivers/gpu/drm/i915/display/intel_tc.c
@@ -688,22 +688,19 @@ static u32 adlp_tc_phy_hpd_live_status(struct intel_tc_port *tc)
 {
 	struct drm_i915_private *i915 = tc_to_i915(tc);
 	struct intel_digital_port *dig_port = tc->dig_port;
-	enum tc_port tc_port = intel_port_to_tc(i915, dig_port->base.port);
-	u32 isr_bit = i915->display.hotplug.pch_hpd[dig_port->base.hpd_pin];
-	u32 val, mask = 0;
+	enum hpd_pin hpd_pin = dig_port->base.hpd_pin;
+	u32 cpu_isr_bits = i915->display.hotplug.hpd[hpd_pin];
+	u32 pch_isr_bit = i915->display.hotplug.pch_hpd[hpd_pin];
+	u32 cpu_isr;
+	u32 mask = 0;
 
-	/*
-	 * On ADL-P HW/FW will wake from TCCOLD to complete the read access of
-	 * registers in IOM. Note that this doesn't apply to PHY and FIA
-	 * registers.
-	 */
-	val = intel_de_read(i915, TCSS_DDI_STATUS(tc_port));
-	if (val & TCSS_DDI_STATUS_HPD_LIVE_STATUS_ALT)
+	cpu_isr = intel_de_read(i915, GEN11_DE_HPD_ISR);
+	if (cpu_isr & (cpu_isr_bits & GEN11_DE_TC_HOTPLUG_MASK))
 		mask |= BIT(TC_PORT_DP_ALT);
-	if (val & TCSS_DDI_STATUS_HPD_LIVE_STATUS_TBT)
+	if (cpu_isr & (cpu_isr_bits & GEN11_DE_TBT_HOTPLUG_MASK))
 		mask |= BIT(TC_PORT_TBT_ALT);
 
-	if (intel_de_read(i915, SDEISR) & isr_bit)
+	if (intel_de_read(i915, SDEISR) & pch_isr_bit)
 		mask |= BIT(TC_PORT_LEGACY);
 
 	return mask;
-- 
2.37.1

[Intel-gfx] [PATCH 23/29] drm/i915/tc: Get power ref for reading the HPD live status register

[Imre Deak]

Enable the power required for the HPD live status register access
instead of depending on the caller blocking the TC-cold power state
(during HW readout and connector probing).

A follow up patch will remove connecting/disconnecting the PHY around
connector probing, so querying the HPD status can happen in this case
without TC-cold being blocked.

Signed-off-by: Imre Deak <imre.deak@intel.com>
---
 drivers/gpu/drm/i915/display/intel_tc.c | 27 +++++++++++++++++--------
 1 file changed, 19 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_tc.c b/drivers/gpu/drm/i915/display/intel_tc.c
index 3122f7ce8c9a0..08a23ab081d74 100644
--- a/drivers/gpu/drm/i915/display/intel_tc.c
+++ b/drivers/gpu/drm/i915/display/intel_tc.c
@@ -411,24 +411,29 @@ static u32 icl_tc_phy_hpd_live_status(struct intel_tc_port *tc)
 	struct drm_i915_private *i915 = tc_to_i915(tc);
 	struct intel_digital_port *dig_port = tc->dig_port;
 	u32 isr_bit = i915->display.hotplug.pch_hpd[dig_port->base.hpd_pin];
+	intel_wakeref_t wakeref;
+	u32 fia_isr;
+	u32 pch_isr;
 	u32 mask = 0;
-	u32 val;
 
-	val = intel_de_read(i915, PORT_TX_DFLEXDPSP(tc->phy_fia));
+	with_intel_display_power(i915, tc_phy_cold_off_domain(tc), wakeref) {
+		fia_isr = intel_de_read(i915, PORT_TX_DFLEXDPSP(tc->phy_fia));
+		pch_isr = intel_de_read(i915, SDEISR);
+	}
 
-	if (val == 0xffffffff) {
+	if (fia_isr == 0xffffffff) {
 		drm_dbg_kms(&i915->drm,
 			    "Port %s: PHY in TCCOLD, nothing connected\n",
 			    tc->port_name);
 		return mask;
 	}
 
-	if (val & TC_LIVE_STATE_TBT(tc->phy_fia_idx))
+	if (fia_isr & TC_LIVE_STATE_TBT(tc->phy_fia_idx))
 		mask |= BIT(TC_PORT_TBT_ALT);
-	if (val & TC_LIVE_STATE_TC(tc->phy_fia_idx))
+	if (fia_isr & TC_LIVE_STATE_TC(tc->phy_fia_idx))
 		mask |= BIT(TC_PORT_DP_ALT);
 
-	if (intel_de_read(i915, SDEISR) & isr_bit)
+	if (pch_isr & isr_bit)
 		mask |= BIT(TC_PORT_LEGACY);
 
 	return mask;
@@ -691,16 +696,22 @@ static u32 adlp_tc_phy_hpd_live_status(struct intel_tc_port *tc)
 	enum hpd_pin hpd_pin = dig_port->base.hpd_pin;
 	u32 cpu_isr_bits = i915->display.hotplug.hpd[hpd_pin];
 	u32 pch_isr_bit = i915->display.hotplug.pch_hpd[hpd_pin];
+	intel_wakeref_t wakeref;
 	u32 cpu_isr;
+	u32 pch_isr;
 	u32 mask = 0;
 
-	cpu_isr = intel_de_read(i915, GEN11_DE_HPD_ISR);
+	with_intel_display_power(i915, POWER_DOMAIN_DISPLAY_CORE, wakeref) {
+		cpu_isr = intel_de_read(i915, GEN11_DE_HPD_ISR);
+		pch_isr = intel_de_read(i915, SDEISR);
+	}
+
 	if (cpu_isr & (cpu_isr_bits & GEN11_DE_TC_HOTPLUG_MASK))
 		mask |= BIT(TC_PORT_DP_ALT);
 	if (cpu_isr & (cpu_isr_bits & GEN11_DE_TBT_HOTPLUG_MASK))
 		mask |= BIT(TC_PORT_TBT_ALT);
 
-	if (intel_de_read(i915, SDEISR) & pch_isr_bit)
+	if (pch_isr & pch_isr_bit)
 		mask |= BIT(TC_PORT_LEGACY);
 
 	return mask;
-- 
2.37.1

[Intel-gfx] [PATCH 24/29] drm/i915/tc: Don't connect the PHY in intel_tc_port_connected()

[Imre Deak]

Connecting the PHY for connector probing - also blocking TC-cold - isn't
required and has some overhead. Taking only the mutex is sufficient, so
do that.

Signed-off-by: Imre Deak <imre.deak@intel.com>
---
 drivers/gpu/drm/i915/display/intel_tc.c | 11 ++++++++---
 1 file changed, 8 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_tc.c b/drivers/gpu/drm/i915/display/intel_tc.c
index 08a23ab081d74..f202ba324fd0a 100644
--- a/drivers/gpu/drm/i915/display/intel_tc.c
+++ b/drivers/gpu/drm/i915/display/intel_tc.c
@@ -1235,20 +1235,25 @@ bool intel_tc_port_connected_locked(struct intel_encoder *encoder)
 	struct intel_digital_port *dig_port = enc_to_dig_port(encoder);
 	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
 	struct intel_tc_port *tc = to_tc_port(dig_port);
+	u32 mask = ~0;
 
 	drm_WARN_ON(&i915->drm, !intel_tc_port_ref_held(dig_port));
 
-	return tc_phy_hpd_live_status(tc) & BIT(tc->mode);
+	if (tc->mode != TC_PORT_DISCONNECTED)
+		mask = BIT(tc->mode);
+
+	return tc_phy_hpd_live_status(tc) & mask;
 }
 
 bool intel_tc_port_connected(struct intel_encoder *encoder)
 {
 	struct intel_digital_port *dig_port = enc_to_dig_port(encoder);
+	struct intel_tc_port *tc = to_tc_port(dig_port);
 	bool is_connected;
 
-	intel_tc_port_lock(dig_port);
+	mutex_lock(&tc->lock);
 	is_connected = intel_tc_port_connected_locked(encoder);
-	intel_tc_port_unlock(dig_port);
+	mutex_unlock(&tc->lock);
 
 	return is_connected;
 }
-- 
2.37.1

[Intel-gfx] [PATCH 25/29] drm/i915/adlp/tc: Align the connect/disconnect PHY sequence with bspec

[Imre Deak]

Bspec has updated the TC connect/disconnect sequences, add the required
platform hooks for these.

The difference wrt. the old sequence is the order of taking the PHY
ownership - while holding a port power reference this requires - and
blocking the TC-cold power state.

Bspec: 49294

Signed-off-by: Imre Deak <imre.deak@intel.com>
---
 drivers/gpu/drm/i915/display/intel_tc.c | 111 ++++++++++++++++++++----
 1 file changed, 94 insertions(+), 17 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_tc.c b/drivers/gpu/drm/i915/display/intel_tc.c
index f202ba324fd0a..36454ec5e8e09 100644
--- a/drivers/gpu/drm/i915/display/intel_tc.c
+++ b/drivers/gpu/drm/i915/display/intel_tc.c
@@ -59,7 +59,6 @@ static enum intel_display_power_domain
 tc_phy_cold_off_domain(struct intel_tc_port *);
 static u32 tc_phy_hpd_live_status(struct intel_tc_port *tc);
 static bool tc_phy_is_ready(struct intel_tc_port *tc);
-static bool tc_phy_take_ownership(struct intel_tc_port *tc, bool take);
 static enum tc_port_mode tc_phy_get_current_mode(struct intel_tc_port *tc);
 
 static const char *tc_port_mode_name(enum tc_port_mode mode)
@@ -581,7 +580,7 @@ static bool icl_tc_phy_connect(struct intel_tc_port *tc,
 		return true;
 
 	if ((!tc_phy_is_ready(tc) ||
-	     !tc_phy_take_ownership(tc, true)) &&
+	     !icl_tc_phy_take_ownership(tc, true)) &&
 	    !drm_WARN_ON(&i915->drm, tc->mode == TC_PORT_LEGACY)) {
 		drm_dbg_kms(&i915->drm, "Port %s: can't take PHY ownership (ready %s)\n",
 			    tc->port_name,
@@ -596,7 +595,7 @@ static bool icl_tc_phy_connect(struct intel_tc_port *tc,
 	return true;
 
 out_release_phy:
-	tc_phy_take_ownership(tc, false);
+	icl_tc_phy_take_ownership(tc, false);
 out_unblock_tc_cold:
 	tc_cold_unblock(tc, fetch_and_zero(&tc->lock_wakeref));
 
@@ -612,7 +611,7 @@ static void icl_tc_phy_disconnect(struct intel_tc_port *tc)
 	switch (tc->mode) {
 	case TC_PORT_LEGACY:
 	case TC_PORT_DP_ALT:
-		tc_phy_take_ownership(tc, false);
+		icl_tc_phy_take_ownership(tc, false);
 		fallthrough;
 	case TC_PORT_TBT_ALT:
 		tc_cold_unblock(tc, fetch_and_zero(&tc->lock_wakeref));
@@ -769,6 +768,94 @@ static bool adlp_tc_phy_is_owned(struct intel_tc_port *tc)
 	return val & DDI_BUF_CTL_TC_PHY_OWNERSHIP;
 }
 
+static void adlp_tc_phy_get_hw_state(struct intel_tc_port *tc)
+{
+	struct drm_i915_private *i915 = tc_to_i915(tc);
+	enum intel_display_power_domain port_power_domain =
+		tc_port_power_domain(tc);
+	intel_wakeref_t port_wakeref;
+
+	port_wakeref = intel_display_power_get(i915, port_power_domain);
+
+	tc->mode = tc_phy_get_current_mode(tc);
+	if (tc->mode != TC_PORT_DISCONNECTED)
+		tc->lock_wakeref = tc_cold_block(tc);
+
+	intel_display_power_put(i915, port_power_domain, port_wakeref);
+}
+
+static bool adlp_tc_phy_connect(struct intel_tc_port *tc, int required_lanes)
+{
+	struct drm_i915_private *i915 = tc_to_i915(tc);
+	enum intel_display_power_domain port_power_domain =
+		tc_port_power_domain(tc);
+	intel_wakeref_t port_wakeref;
+
+	if (tc->mode == TC_PORT_TBT_ALT) {
+		tc->lock_wakeref = tc_cold_block(tc);
+		return true;
+	}
+
+	port_wakeref = intel_display_power_get(i915, port_power_domain);
+
+	if (!adlp_tc_phy_take_ownership(tc, true) &&
+	    !drm_WARN_ON(&i915->drm, tc->mode == TC_PORT_LEGACY)) {
+		drm_dbg_kms(&i915->drm, "Port %s: can't take PHY ownership\n",
+			    tc->port_name);
+		goto out_put_port_power;
+	}
+
+	if (!tc_phy_is_ready(tc) &&
+	    !drm_WARN_ON(&i915->drm, tc->mode == TC_PORT_LEGACY)) {
+		drm_dbg_kms(&i915->drm, "Port %s: PHY not ready\n",
+			    tc->port_name);
+		goto out_release_phy;
+	}
+
+	tc->lock_wakeref = tc_cold_block(tc);
+
+	if (!tc_phy_verify_legacy_or_dp_alt_mode(tc, required_lanes))
+		goto out_unblock_tc_cold;
+
+	intel_display_power_put(i915, port_power_domain, port_wakeref);
+
+	return true;
+
+out_unblock_tc_cold:
+	tc_cold_unblock(tc, fetch_and_zero(&tc->lock_wakeref));
+out_release_phy:
+	adlp_tc_phy_take_ownership(tc, false);
+out_put_port_power:
+	intel_display_power_put(i915, port_power_domain, port_wakeref);
+
+	return false;
+}
+
+static void adlp_tc_phy_disconnect(struct intel_tc_port *tc)
+{
+	struct drm_i915_private *i915 = tc_to_i915(tc);
+	enum intel_display_power_domain port_power_domain =
+		tc_port_power_domain(tc);
+	intel_wakeref_t port_wakeref;
+
+	port_wakeref = intel_display_power_get(i915, port_power_domain);
+
+	tc_cold_unblock(tc, fetch_and_zero(&tc->lock_wakeref));
+
+	switch (tc->mode) {
+	case TC_PORT_LEGACY:
+	case TC_PORT_DP_ALT:
+		adlp_tc_phy_take_ownership(tc, false);
+		fallthrough;
+	case TC_PORT_TBT_ALT:
+		break;
+	default:
+		MISSING_CASE(tc->mode);
+	}
+
+	intel_display_power_put(i915, port_power_domain, port_wakeref);
+}
+
 static void adlp_tc_phy_init(struct intel_tc_port *tc)
 {
 	tc_phy_load_fia_params(tc, true);
@@ -779,9 +866,9 @@ static const struct intel_tc_phy_ops adlp_tc_phy_ops = {
 	.hpd_live_status = adlp_tc_phy_hpd_live_status,
 	.is_ready = adlp_tc_phy_is_ready,
 	.is_owned = adlp_tc_phy_is_owned,
-	.get_hw_state = icl_tc_phy_get_hw_state,
-	.connect = icl_tc_phy_connect,
-	.disconnect = icl_tc_phy_disconnect,
+	.get_hw_state = adlp_tc_phy_get_hw_state,
+	.connect = adlp_tc_phy_connect,
+	.disconnect = adlp_tc_phy_disconnect,
 	.init = adlp_tc_phy_init,
 };
 
@@ -823,16 +910,6 @@ static void tc_phy_get_hw_state(struct intel_tc_port *tc)
 	tc->phy_ops->get_hw_state(tc);
 }
 
-static bool tc_phy_take_ownership(struct intel_tc_port *tc, bool take)
-{
-	struct drm_i915_private *i915 = tc_to_i915(tc);
-
-	if (IS_ALDERLAKE_P(i915))
-		return adlp_tc_phy_take_ownership(tc, take);
-
-	return icl_tc_phy_take_ownership(tc, take);
-}
-
 static bool tc_phy_is_ready_and_owned(struct intel_tc_port *tc,
 				      bool phy_is_ready, bool phy_is_owned)
 {
-- 
2.37.1

[Intel-gfx] [PATCH 26/29] drm/i915: Move shared DPLL disabling into CRTC disable hook

[Imre Deak]

The spec requires disabling the PLL on TC ports before disconnecting the
port's PHY. Prepare for that by moving the PLL disabling to the CRTC
disable hook, while disconnecting the PHY will be moved to the
post_pll_disable() encoder hook in the next patch.

Signed-off-by: Imre Deak <imre.deak@intel.com>
---
 drivers/gpu/drm/i915/display/intel_display.c | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 5a386c7c0bc92..ca024f288ab65 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -1905,6 +1905,8 @@ static void ilk_crtc_disable(struct intel_atomic_state *state,
 
 	intel_set_cpu_fifo_underrun_reporting(dev_priv, pipe, true);
 	intel_set_pch_fifo_underrun_reporting(dev_priv, pipe, true);
+
+	intel_disable_shared_dpll(old_crtc_state);
 }
 
 static void hsw_crtc_disable(struct intel_atomic_state *state,
@@ -1923,6 +1925,8 @@ static void hsw_crtc_disable(struct intel_atomic_state *state,
 		intel_encoders_post_disable(state, crtc);
 	}
 
+	intel_disable_shared_dpll(old_crtc_state);
+
 	intel_dmc_disable_pipe(i915, crtc->pipe);
 }
 
@@ -7035,7 +7039,6 @@ static void intel_old_crtc_state_disables(struct intel_atomic_state *state,
 	dev_priv->display.funcs.display->crtc_disable(state, crtc);
 	crtc->active = false;
 	intel_fbc_disable(crtc);
-	intel_disable_shared_dpll(old_crtc_state);
 
 	if (!new_crtc_state->hw.active)
 		intel_initial_watermarks(state, crtc);
-- 
2.37.1

[Intel-gfx] [PATCH 27/29] drm/i915: Disable DPLLs before disconnecting the TC PHY

[Imre Deak]

Bspec requires disabling the DPLLs on TC ports before disconnecting the
port's PHY. Add a post_pll_disable encoder hook and move the call to
disconnect the port's PHY from the post_disable hook to the new hook.

Signed-off-by: Imre Deak <imre.deak@intel.com>
---
 drivers/gpu/drm/i915/display/intel_ddi.c     | 15 ++++++++++++---
 drivers/gpu/drm/i915/display/intel_display.c |  2 ++
 drivers/gpu/drm/i915/display/intel_dp_mst.c  | 15 +++++++++++++++
 3 files changed, 29 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
index dac3ec8fbbc11..62bd4196dc464 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -2720,9 +2720,6 @@ static void intel_ddi_post_disable(struct intel_atomic_state *state,
 				   const struct drm_connector_state *old_conn_state)
 {
 	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
-	struct intel_digital_port *dig_port = enc_to_dig_port(encoder);
-	enum phy phy = intel_port_to_phy(dev_priv, encoder->port);
-	bool is_tc_port = intel_phy_is_tc(dev_priv, phy);
 	struct intel_crtc *slave_crtc;
 
 	if (!intel_crtc_has_type(old_crtc_state, INTEL_OUTPUT_DP_MST)) {
@@ -2772,6 +2769,17 @@ static void intel_ddi_post_disable(struct intel_atomic_state *state,
 	else
 		intel_ddi_post_disable_dp(state, encoder, old_crtc_state,
 					  old_conn_state);
+}
+
+static void intel_ddi_post_pll_disable(struct intel_atomic_state *state,
+				       struct intel_encoder *encoder,
+				       const struct intel_crtc_state *old_crtc_state,
+				       const struct drm_connector_state *old_conn_state)
+{
+	struct drm_i915_private *i915 = to_i915(encoder->base.dev);
+	struct intel_digital_port *dig_port = enc_to_dig_port(encoder);
+	enum phy phy = intel_port_to_phy(i915, encoder->port);
+	bool is_tc_port = intel_phy_is_tc(i915, phy);
 
 	main_link_aux_power_domain_put(dig_port, old_crtc_state);
 
@@ -4398,6 +4406,7 @@ void intel_ddi_init(struct drm_i915_private *dev_priv, enum port port)
 	encoder->pre_pll_enable = intel_ddi_pre_pll_enable;
 	encoder->pre_enable = intel_ddi_pre_enable;
 	encoder->disable = intel_disable_ddi;
+	encoder->post_pll_disable = intel_ddi_post_pll_disable;
 	encoder->post_disable = intel_ddi_post_disable;
 	encoder->update_pipe = intel_ddi_update_pipe;
 	encoder->get_hw_state = intel_ddi_get_hw_state;
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index ca024f288ab65..0e171f66d6983 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -1927,6 +1927,8 @@ static void hsw_crtc_disable(struct intel_atomic_state *state,
 
 	intel_disable_shared_dpll(old_crtc_state);
 
+	intel_encoders_post_pll_disable(state, crtc);
+
 	intel_dmc_disable_pipe(i915, crtc->pipe);
 }
 
diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c
index a860cbc5dbea8..23302dc738450 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
@@ -623,6 +623,20 @@ static void intel_mst_post_disable_dp(struct intel_atomic_state *state,
 		    intel_dp->active_mst_links);
 }
 
+static void intel_mst_post_pll_disable_dp(struct intel_atomic_state *state,
+					  struct intel_encoder *encoder,
+					  const struct intel_crtc_state *old_crtc_state,
+					  const struct drm_connector_state *old_conn_state)
+{
+	struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
+	struct intel_digital_port *dig_port = intel_mst->primary;
+	struct intel_dp *intel_dp = &dig_port->dp;
+
+	if (intel_dp->active_mst_links == 0 &&
+	    dig_port->base.post_pll_disable)
+		dig_port->base.post_pll_disable(state, encoder, old_crtc_state, old_conn_state);
+}
+
 static void intel_mst_pre_pll_enable_dp(struct intel_atomic_state *state,
 					struct intel_encoder *encoder,
 					const struct intel_crtc_state *pipe_config,
@@ -1146,6 +1160,7 @@ intel_dp_create_fake_mst_encoder(struct intel_digital_port *dig_port, enum pipe
 	intel_encoder->compute_config_late = intel_dp_mst_compute_config_late;
 	intel_encoder->disable = intel_mst_disable_dp;
 	intel_encoder->post_disable = intel_mst_post_disable_dp;
+	intel_encoder->post_pll_disable = intel_mst_post_pll_disable_dp;
 	intel_encoder->update_pipe = intel_ddi_update_pipe;
 	intel_encoder->pre_pll_enable = intel_mst_pre_pll_enable_dp;
 	intel_encoder->pre_enable = intel_mst_pre_enable_dp;
-- 
2.37.1

[Intel-gfx] [PATCH 28/29] drm/i915: Remove TC PHY disconnect workaround

[Imre Deak]

After the previous patch the workaround for a TC PHY hang issue is not
required any more, remove it.

Signed-off-by: Imre Deak <imre.deak@intel.com>
---
 drivers/gpu/drm/i915/display/intel_tc.c | 8 --------
 1 file changed, 8 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_tc.c b/drivers/gpu/drm/i915/display/intel_tc.c
index 36454ec5e8e09..6dd8208417836 100644
--- a/drivers/gpu/drm/i915/display/intel_tc.c
+++ b/drivers/gpu/drm/i915/display/intel_tc.c
@@ -1426,14 +1426,6 @@ void intel_tc_port_put_link(struct intel_digital_port *dig_port)
 	intel_tc_port_lock(dig_port);
 	__intel_tc_port_put_link(tc);
 	intel_tc_port_unlock(dig_port);
-
-	/*
-	 * Disconnecting the PHY after the PHY's PLL gets disabled may
-	 * hang the system on ADL-P, so disconnect the PHY here synchronously.
-	 * TODO: remove this once the root cause of the ordering requirement
-	 * is found/fixed.
-	 */
-	intel_tc_port_flush_work(dig_port);
 }
 
 int intel_tc_port_init(struct intel_digital_port *dig_port, bool is_legacy)
-- 
2.37.1

[Intel-gfx] [PATCH 29/29] drm/i915: Remove the encoder update_prepare()/complete() hooks

[Imre Deak]

The encoder update_prepare()/complete() hooks were added to hold a
TC port link reference for all outputs in the atomic state around the
whole modeset enable sequence - thus locking the ports' TC mode - and
set the TBT/DP-alt PLL type corresponding to the current TC mode.

Since nothing depends on the PLL selection before/after then encoder's
pre_pll_enable/post_pll_disable hooks are called, the above steps can be
moved to these hooks, so do that and remove the
update_prepare()/complete() hooks.

Signed-off-by: Imre Deak <imre.deak@intel.com>
---
 drivers/gpu/drm/i915/display/intel_ddi.c      | 49 +++---------
 drivers/gpu/drm/i915/display/intel_display.c  | 78 -------------------
 .../drm/i915/display/intel_display_types.h    |  6 --
 3 files changed, 12 insertions(+), 121 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
index 62bd4196dc464..dc294717bcdf4 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -3060,39 +3060,6 @@ void intel_ddi_update_pipe(struct intel_atomic_state *state,
 	intel_hdcp_update_pipe(state, encoder, crtc_state, conn_state);
 }
 
-static void
-intel_ddi_update_prepare(struct intel_atomic_state *state,
-			 struct intel_encoder *encoder,
-			 struct intel_crtc *crtc)
-{
-	struct drm_i915_private *i915 = to_i915(state->base.dev);
-	struct intel_crtc_state *crtc_state =
-		crtc ? intel_atomic_get_new_crtc_state(state, crtc) : NULL;
-	int required_lanes = crtc_state ? crtc_state->lane_count : 1;
-
-	drm_WARN_ON(state->base.dev, crtc && crtc->active);
-
-	intel_tc_port_get_link(enc_to_dig_port(encoder),
-		               required_lanes);
-	if (crtc_state && crtc_state->hw.active) {
-		struct intel_crtc *slave_crtc;
-
-		intel_update_active_dpll(state, crtc, encoder);
-
-		for_each_intel_crtc_in_pipe_mask(&i915->drm, slave_crtc,
-						 intel_crtc_bigjoiner_slave_pipes(crtc_state))
-			intel_update_active_dpll(state, slave_crtc, encoder);
-	}
-}
-
-static void
-intel_ddi_update_complete(struct intel_atomic_state *state,
-			  struct intel_encoder *encoder,
-			  struct intel_crtc *crtc)
-{
-	intel_tc_port_put_link(enc_to_dig_port(encoder));
-}
-
 static void
 intel_ddi_pre_pll_enable(struct intel_atomic_state *state,
 			 struct intel_encoder *encoder,
@@ -3104,9 +3071,20 @@ intel_ddi_pre_pll_enable(struct intel_atomic_state *state,
 	enum phy phy = intel_port_to_phy(dev_priv, encoder->port);
 	bool is_tc_port = intel_phy_is_tc(dev_priv, phy);
 
-	if (is_tc_port)
+	if (is_tc_port) {
+		struct intel_crtc *master_crtc =
+			to_intel_crtc(crtc_state->uapi.crtc);
+		struct intel_crtc *slave_crtc;
+
 		intel_tc_port_get_link(dig_port, crtc_state->lane_count);
 
+		intel_update_active_dpll(state, master_crtc, encoder);
+
+		for_each_intel_crtc_in_pipe_mask(&dev_priv->drm, slave_crtc,
+						 intel_crtc_bigjoiner_slave_pipes(crtc_state))
+			intel_update_active_dpll(state, slave_crtc, encoder);
+	}
+
 	main_link_aux_power_domain_get(dig_port, crtc_state);
 
 	if (is_tc_port && !intel_tc_port_in_tbt_alt_mode(dig_port))
@@ -4552,9 +4530,6 @@ void intel_ddi_init(struct drm_i915_private *dev_priv, enum port port)
 
 		if (intel_tc_port_init(dig_port, is_legacy) < 0)
 			goto err;
-
-		encoder->update_prepare = intel_ddi_update_prepare;
-		encoder->update_complete = intel_ddi_update_complete;
 	}
 
 	drm_WARN_ON(&dev_priv->drm, port > PORT_I);
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 0e171f66d6983..cdf2c33cd544d 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -1320,36 +1320,11 @@ static void intel_crtc_disable_planes(struct intel_atomic_state *state,
 	intel_frontbuffer_flip(dev_priv, fb_bits);
 }
 
-/*
- * intel_connector_primary_encoder - get the primary encoder for a connector
- * @connector: connector for which to return the encoder
- *
- * Returns the primary encoder for a connector. There is a 1:1 mapping from
- * all connectors to their encoder, except for DP-MST connectors which have
- * both a virtual and a primary encoder. These DP-MST primary encoders can be
- * pointed to by as many DP-MST connectors as there are pipes.
- */
-static struct intel_encoder *
-intel_connector_primary_encoder(struct intel_connector *connector)
-{
-	struct intel_encoder *encoder;
-
-	if (connector->mst_port)
-		return &dp_to_dig_port(connector->mst_port)->base;
-
-	encoder = intel_attached_encoder(connector);
-	drm_WARN_ON(connector->base.dev, !encoder);
-
-	return encoder;
-}
-
 static void intel_encoders_update_prepare(struct intel_atomic_state *state)
 {
 	struct drm_i915_private *i915 = to_i915(state->base.dev);
 	struct intel_crtc_state *new_crtc_state, *old_crtc_state;
 	struct intel_crtc *crtc;
-	struct drm_connector_state *new_conn_state;
-	struct drm_connector *connector;
 	int i;
 
 	/*
@@ -1365,57 +1340,6 @@ static void intel_encoders_update_prepare(struct intel_atomic_state *state)
 			new_crtc_state->dpll_hw_state = old_crtc_state->dpll_hw_state;
 		}
 	}
-
-	if (!state->modeset)
-		return;
-
-	for_each_new_connector_in_state(&state->base, connector, new_conn_state,
-					i) {
-		struct intel_connector *intel_connector;
-		struct intel_encoder *encoder;
-		struct intel_crtc *crtc;
-
-		if (!intel_connector_needs_modeset(state, connector))
-			continue;
-
-		intel_connector = to_intel_connector(connector);
-		encoder = intel_connector_primary_encoder(intel_connector);
-		if (!encoder->update_prepare)
-			continue;
-
-		crtc = new_conn_state->crtc ?
-			to_intel_crtc(new_conn_state->crtc) : NULL;
-		encoder->update_prepare(state, encoder, crtc);
-	}
-}
-
-static void intel_encoders_update_complete(struct intel_atomic_state *state)
-{
-	struct drm_connector_state *new_conn_state;
-	struct drm_connector *connector;
-	int i;
-
-	if (!state->modeset)
-		return;
-
-	for_each_new_connector_in_state(&state->base, connector, new_conn_state,
-					i) {
-		struct intel_connector *intel_connector;
-		struct intel_encoder *encoder;
-		struct intel_crtc *crtc;
-
-		if (!intel_connector_needs_modeset(state, connector))
-			continue;
-
-		intel_connector = to_intel_connector(connector);
-		encoder = intel_connector_primary_encoder(intel_connector);
-		if (!encoder->update_complete)
-			continue;
-
-		crtc = new_conn_state->crtc ?
-			to_intel_crtc(new_conn_state->crtc) : NULL;
-		encoder->update_complete(state, encoder, crtc);
-	}
 }
 
 static void intel_encoders_pre_pll_enable(struct intel_atomic_state *state,
@@ -7439,8 +7363,6 @@ static void intel_atomic_commit_tail(struct intel_atomic_state *state)
 	/* Now enable the clocks, plane, pipe, and connectors that we set up. */
 	dev_priv->display.funcs.display->commit_modeset_enables(state);
 
-	intel_encoders_update_complete(state);
-
 	if (state->modeset)
 		intel_set_cdclk_post_plane_update(state);
 
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
index ce24e58b2a825..fbdc94ad1d081 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -170,9 +170,6 @@ struct intel_encoder {
 	int (*compute_config_late)(struct intel_encoder *,
 				   struct intel_crtc_state *,
 				   struct drm_connector_state *);
-	void (*update_prepare)(struct intel_atomic_state *,
-			       struct intel_encoder *,
-			       struct intel_crtc *);
 	void (*pre_pll_enable)(struct intel_atomic_state *,
 			       struct intel_encoder *,
 			       const struct intel_crtc_state *,
@@ -185,9 +182,6 @@ struct intel_encoder {
 		       struct intel_encoder *,
 		       const struct intel_crtc_state *,
 		       const struct drm_connector_state *);
-	void (*update_complete)(struct intel_atomic_state *,
-				struct intel_encoder *,
-				struct intel_crtc *);
 	void (*disable)(struct intel_atomic_state *,
 			struct intel_encoder *,
 			const struct intel_crtc_state *,
-- 
2.37.1

Re: [Intel-gfx] [PATCH 01/29] drm/i915/tc: Group the TC PHY setup/query functions per platform

[Jani Nikula]

On Thu, 23 Mar 2023, Imre Deak <imre.deak@intel.com> wrote:
> Arrange the TC PHY HW state setup/query functions into platform
> specific and generic groups. This prepares for upcoming patches adding
> generic TC PHY handlers and platform specific hooks for these,
> replacing the corresponding if ladders.
>
> No functional changes.
>
> Signed-off-by: Imre Deak <imre.deak@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_tc.c | 244 +++++++++++++-----------
>  1 file changed, 130 insertions(+), 114 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_tc.c b/drivers/gpu/drm/i915/display/intel_tc.c
> index bd8c9df5f98fe..b6e425c44fcb9 100644
> --- a/drivers/gpu/drm/i915/display/intel_tc.c
> +++ b/drivers/gpu/drm/i915/display/intel_tc.c
> @@ -15,6 +15,10 @@
>  #include "intel_mg_phy_regs.h"
>  #include "intel_tc.h"
>  
> +static u32 tc_port_live_status_mask(struct intel_digital_port *dig_port);
> +static bool tc_phy_status_complete(struct intel_digital_port *dig_port);
> +static bool tc_phy_take_ownership(struct intel_digital_port *dig_port, bool take);
> +
>  static const char *tc_port_mode_name(enum tc_port_mode mode)
>  {
>  	static const char * const names[] = {
> @@ -256,6 +260,10 @@ static void tc_port_fixup_legacy_flag(struct intel_digital_port *dig_port,
>  	dig_port->tc_legacy_port = !dig_port->tc_legacy_port;
>  }
>  
> +/**
> + * ICL TC PHY handlers
> + * -------------------
> + */

These should not be kernel-doc comments, please replace /** with /*.

BR,
Jani.



>  static u32 icl_tc_port_live_status_mask(struct intel_digital_port *dig_port)
>  {
>  	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> @@ -287,44 +295,6 @@ static u32 icl_tc_port_live_status_mask(struct intel_digital_port *dig_port)
>  	return mask;
>  }
>  
> -static u32 adl_tc_port_live_status_mask(struct intel_digital_port *dig_port)
> -{
> -	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> -	enum tc_port tc_port = intel_port_to_tc(i915, dig_port->base.port);
> -	u32 isr_bit = i915->display.hotplug.pch_hpd[dig_port->base.hpd_pin];
> -	u32 val, mask = 0;
> -
> -	/*
> -	 * On ADL-P HW/FW will wake from TCCOLD to complete the read access of
> -	 * registers in IOM. Note that this doesn't apply to PHY and FIA
> -	 * registers.
> -	 */
> -	val = intel_de_read(i915, TCSS_DDI_STATUS(tc_port));
> -	if (val & TCSS_DDI_STATUS_HPD_LIVE_STATUS_ALT)
> -		mask |= BIT(TC_PORT_DP_ALT);
> -	if (val & TCSS_DDI_STATUS_HPD_LIVE_STATUS_TBT)
> -		mask |= BIT(TC_PORT_TBT_ALT);
> -
> -	if (intel_de_read(i915, SDEISR) & isr_bit)
> -		mask |= BIT(TC_PORT_LEGACY);
> -
> -	/* The sink can be connected only in a single mode. */
> -	if (!drm_WARN_ON(&i915->drm, hweight32(mask) > 1))
> -		tc_port_fixup_legacy_flag(dig_port, mask);
> -
> -	return mask;
> -}
> -
> -static u32 tc_port_live_status_mask(struct intel_digital_port *dig_port)
> -{
> -	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> -
> -	if (IS_ALDERLAKE_P(i915))
> -		return adl_tc_port_live_status_mask(dig_port);
> -
> -	return icl_tc_port_live_status_mask(dig_port);
> -}
> -
>  /*
>   * Return the PHY status complete flag indicating that display can acquire the
>   * PHY ownership. The IOM firmware sets this flag when a DP-alt or legacy sink
> @@ -349,40 +319,6 @@ static bool icl_tc_phy_status_complete(struct intel_digital_port *dig_port)
>  	return val & DP_PHY_MODE_STATUS_COMPLETED(dig_port->tc_phy_fia_idx);
>  }
>  
> -/*
> - * Return the PHY status complete flag indicating that display can acquire the
> - * PHY ownership. The IOM firmware sets this flag when it's ready to switch
> - * the ownership to display, regardless of what sink is connected (TBT-alt,
> - * DP-alt, legacy or nothing). For TBT-alt sinks the PHY is owned by the TBT
> - * subsystem and so switching the ownership to display is not required.
> - */
> -static bool adl_tc_phy_status_complete(struct intel_digital_port *dig_port)
> -{
> -	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> -	enum tc_port tc_port = intel_port_to_tc(i915, dig_port->base.port);
> -	u32 val;
> -
> -	val = intel_de_read(i915, TCSS_DDI_STATUS(tc_port));
> -	if (val == 0xffffffff) {
> -		drm_dbg_kms(&i915->drm,
> -			    "Port %s: PHY in TCCOLD, assuming not complete\n",
> -			    dig_port->tc_port_name);
> -		return false;
> -	}
> -
> -	return val & TCSS_DDI_STATUS_READY;
> -}
> -
> -static bool tc_phy_status_complete(struct intel_digital_port *dig_port)
> -{
> -	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> -
> -	if (IS_ALDERLAKE_P(i915))
> -		return adl_tc_phy_status_complete(dig_port);
> -
> -	return icl_tc_phy_status_complete(dig_port);
> -}
> -
>  static bool icl_tc_phy_take_ownership(struct intel_digital_port *dig_port,
>  				      bool take)
>  {
> @@ -407,28 +343,6 @@ static bool icl_tc_phy_take_ownership(struct intel_digital_port *dig_port,
>  	return true;
>  }
>  
> -static bool adl_tc_phy_take_ownership(struct intel_digital_port *dig_port,
> -				      bool take)
> -{
> -	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> -	enum port port = dig_port->base.port;
> -
> -	intel_de_rmw(i915, DDI_BUF_CTL(port), DDI_BUF_CTL_TC_PHY_OWNERSHIP,
> -		     take ? DDI_BUF_CTL_TC_PHY_OWNERSHIP : 0);
> -
> -	return true;
> -}
> -
> -static bool tc_phy_take_ownership(struct intel_digital_port *dig_port, bool take)
> -{
> -	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> -
> -	if (IS_ALDERLAKE_P(i915))
> -		return adl_tc_phy_take_ownership(dig_port, take);
> -
> -	return icl_tc_phy_take_ownership(dig_port, take);
> -}
> -
>  static bool icl_tc_phy_is_owned(struct intel_digital_port *dig_port)
>  {
>  	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> @@ -445,26 +359,6 @@ static bool icl_tc_phy_is_owned(struct intel_digital_port *dig_port)
>  	return val & DP_PHY_MODE_STATUS_NOT_SAFE(dig_port->tc_phy_fia_idx);
>  }
>  
> -static bool adl_tc_phy_is_owned(struct intel_digital_port *dig_port)
> -{
> -	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> -	enum port port = dig_port->base.port;
> -	u32 val;
> -
> -	val = intel_de_read(i915, DDI_BUF_CTL(port));
> -	return val & DDI_BUF_CTL_TC_PHY_OWNERSHIP;
> -}
> -
> -static bool tc_phy_is_owned(struct intel_digital_port *dig_port)
> -{
> -	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> -
> -	if (IS_ALDERLAKE_P(i915))
> -		return adl_tc_phy_is_owned(dig_port);
> -
> -	return icl_tc_phy_is_owned(dig_port);
> -}
> -
>  /*
>   * This function implements the first part of the Connect Flow described by our
>   * specification, Gen11 TypeC Programming chapter. The rest of the flow (reading
> @@ -559,6 +453,128 @@ static void icl_tc_phy_disconnect(struct intel_digital_port *dig_port)
>  	}
>  }
>  
> +/**
> + * ADLP TC PHY handlers
> + * --------------------
> + */
> +static u32 adl_tc_port_live_status_mask(struct intel_digital_port *dig_port)
> +{
> +	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> +	enum tc_port tc_port = intel_port_to_tc(i915, dig_port->base.port);
> +	u32 isr_bit = i915->display.hotplug.pch_hpd[dig_port->base.hpd_pin];
> +	u32 val, mask = 0;
> +
> +	/*
> +	 * On ADL-P HW/FW will wake from TCCOLD to complete the read access of
> +	 * registers in IOM. Note that this doesn't apply to PHY and FIA
> +	 * registers.
> +	 */
> +	val = intel_de_read(i915, TCSS_DDI_STATUS(tc_port));
> +	if (val & TCSS_DDI_STATUS_HPD_LIVE_STATUS_ALT)
> +		mask |= BIT(TC_PORT_DP_ALT);
> +	if (val & TCSS_DDI_STATUS_HPD_LIVE_STATUS_TBT)
> +		mask |= BIT(TC_PORT_TBT_ALT);
> +
> +	if (intel_de_read(i915, SDEISR) & isr_bit)
> +		mask |= BIT(TC_PORT_LEGACY);
> +
> +	/* The sink can be connected only in a single mode. */
> +	if (!drm_WARN_ON(&i915->drm, hweight32(mask) > 1))
> +		tc_port_fixup_legacy_flag(dig_port, mask);
> +
> +	return mask;
> +}
> +
> +/*
> + * Return the PHY status complete flag indicating that display can acquire the
> + * PHY ownership. The IOM firmware sets this flag when it's ready to switch
> + * the ownership to display, regardless of what sink is connected (TBT-alt,
> + * DP-alt, legacy or nothing). For TBT-alt sinks the PHY is owned by the TBT
> + * subsystem and so switching the ownership to display is not required.
> + */
> +static bool adl_tc_phy_status_complete(struct intel_digital_port *dig_port)
> +{
> +	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> +	enum tc_port tc_port = intel_port_to_tc(i915, dig_port->base.port);
> +	u32 val;
> +
> +	val = intel_de_read(i915, TCSS_DDI_STATUS(tc_port));
> +	if (val == 0xffffffff) {
> +		drm_dbg_kms(&i915->drm,
> +			    "Port %s: PHY in TCCOLD, assuming not complete\n",
> +			    dig_port->tc_port_name);
> +		return false;
> +	}
> +
> +	return val & TCSS_DDI_STATUS_READY;
> +}
> +
> +static bool adl_tc_phy_take_ownership(struct intel_digital_port *dig_port,
> +				      bool take)
> +{
> +	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> +	enum port port = dig_port->base.port;
> +
> +	intel_de_rmw(i915, DDI_BUF_CTL(port), DDI_BUF_CTL_TC_PHY_OWNERSHIP,
> +		     take ? DDI_BUF_CTL_TC_PHY_OWNERSHIP : 0);
> +
> +	return true;
> +}
> +
> +static bool adl_tc_phy_is_owned(struct intel_digital_port *dig_port)
> +{
> +	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> +	enum port port = dig_port->base.port;
> +	u32 val;
> +
> +	val = intel_de_read(i915, DDI_BUF_CTL(port));
> +	return val & DDI_BUF_CTL_TC_PHY_OWNERSHIP;
> +}
> +
> +/**
> + * Generic TC PHY handlers
> + * -----------------------
> + */
> +static u32 tc_port_live_status_mask(struct intel_digital_port *dig_port)
> +{
> +	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> +
> +	if (IS_ALDERLAKE_P(i915))
> +		return adl_tc_port_live_status_mask(dig_port);
> +
> +	return icl_tc_port_live_status_mask(dig_port);
> +}
> +
> +static bool tc_phy_status_complete(struct intel_digital_port *dig_port)
> +{
> +	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> +
> +	if (IS_ALDERLAKE_P(i915))
> +		return adl_tc_phy_status_complete(dig_port);
> +
> +	return icl_tc_phy_status_complete(dig_port);
> +}
> +
> +static bool tc_phy_is_owned(struct intel_digital_port *dig_port)
> +{
> +	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> +
> +	if (IS_ALDERLAKE_P(i915))
> +		return adl_tc_phy_is_owned(dig_port);
> +
> +	return icl_tc_phy_is_owned(dig_port);
> +}
> +
> +static bool tc_phy_take_ownership(struct intel_digital_port *dig_port, bool take)
> +{
> +	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> +
> +	if (IS_ALDERLAKE_P(i915))
> +		return adl_tc_phy_take_ownership(dig_port, take);
> +
> +	return icl_tc_phy_take_ownership(dig_port, take);
> +}
> +
>  static bool tc_phy_is_ready_and_owned(struct intel_digital_port *dig_port,
>  				      bool phy_is_ready, bool phy_is_owned)
>  {

-- 
Jani Nikula, Intel Open Source Graphics Center

Re: [Intel-gfx] [PATCH 20/29] drm/i915/tc: Add asserts in TC PHY hooks that the required power is on

[Jani Nikula]

On Thu, 23 Mar 2023, Imre Deak <imre.deak@intel.com> wrote:
> Add an assert to each TC PHY hook that their required power domain is
> enabled.
>
> While at it add a comment describing the domains used on each platform
> and TC mode.
>
> Signed-off-by: Imre Deak <imre.deak@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_tc.c | 61 +++++++++++++++++++++++++
>  1 file changed, 61 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_tc.c b/drivers/gpu/drm/i915/display/intel_tc.c
> index e68346c5e6036..7bcd93f1f0597 100644
> --- a/drivers/gpu/drm/i915/display/intel_tc.c
> +++ b/drivers/gpu/drm/i915/display/intel_tc.c
> @@ -111,6 +111,46 @@ bool intel_tc_port_in_legacy_mode(struct intel_digital_port *dig_port)
>  	return intel_tc_port_in_mode(dig_port, TC_PORT_LEGACY);
>  }
>  
> +/**

This also shouldn't be a kernel-doc comment.

BR,
Jani.

> + * The display power domains used for TC ports depending on the
> + * platform and TC mode (legacy, DP-alt, TBT):
> + *
> + * POWER_DOMAIN_DISPLAY_CORE:
> + * --------------------------
> + * ADLP/all modes:
> + *   - TCSS/IOM access for PHY ready state.
> + * ADLP+/all modes:
> + *   - DE/north-,south-HPD ISR access for HPD live state.
> + *
> + * POWER_DOMAIN_PORT_DDI_LANES_<port>:
> + * -----------------------------------
> + * ICL+/all modes:
> + *   - DE/DDI_BUF access for port enabled state.
> + * ADLP/all modes:
> + *   - DE/DDI_BUF access for PHY owned state.
> + *
> + * POWER_DOMAIN_AUX_USBC<TC port index>:
> + * -------------------------------------
> + * ICL/legacy mode:
> + *   - TCSS/IOM,FIA access for PHY ready, owned and HPD live state
> + *   - TCSS/PHY: block TC-cold power state for using the PHY AUX and
> + *     main lanes.
> + * ADLP/legacy, DP-alt modes:
> + *   - TCSS/PHY: block TC-cold power state for using the PHY AUX and
> + *     main lanes.
> + *
> + * POWER_DOMAIN_TC_COLD_OFF:
> + * -------------------------
> + * TGL/legacy, DP-alt modes:
> + *   - TCSS/IOM,FIA access for PHY ready, owned and HPD live state
> + *   - TCSS/PHY: block TC-cold power state for using the PHY AUX and
> + *     main lanes.
> + *
> + * ICL, TGL, ADLP/TBT mode:
> + *   - TCSS/IOM,FIA access for HPD live state
> + *   - TCSS/TBT: block TC-cold power state for using the (TBT DP-IN)
> + *     AUX and main lanes.
> + */
>  bool intel_tc_cold_requires_aux_pw(struct intel_digital_port *dig_port)
>  {
>  	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> @@ -163,6 +203,15 @@ tc_cold_unblock(struct intel_tc_port *tc, intel_wakeref_t wakeref)
>  	__tc_cold_unblock(tc, domain, wakeref);
>  }
>  
> +static void
> +assert_display_core_power_enabled(struct intel_tc_port *tc)
> +{
> +	struct drm_i915_private *i915 = tc_to_i915(tc);
> +
> +	drm_WARN_ON(&i915->drm,
> +		    !intel_display_power_is_enabled(i915, POWER_DOMAIN_DISPLAY_CORE));
> +}
> +
>  static void
>  assert_tc_cold_blocked(struct intel_tc_port *tc)
>  {
> @@ -378,6 +427,8 @@ static bool icl_tc_phy_is_ready(struct intel_tc_port *tc)
>  	struct drm_i915_private *i915 = tc_to_i915(tc);
>  	u32 val;
>  
> +	assert_tc_cold_blocked(tc);
> +
>  	val = intel_de_read(i915, PORT_TX_DFLEXDPPMS(tc->phy_fia));
>  	if (val == 0xffffffff) {
>  		drm_dbg_kms(&i915->drm,
> @@ -395,6 +446,8 @@ static bool icl_tc_phy_take_ownership(struct intel_tc_port *tc,
>  	struct drm_i915_private *i915 = tc_to_i915(tc);
>  	u32 val;
>  
> +	assert_tc_cold_blocked(tc);
> +
>  	val = intel_de_read(i915, PORT_TX_DFLEXDPCSSS(tc->phy_fia));
>  	if (val == 0xffffffff) {
>  		drm_dbg_kms(&i915->drm,
> @@ -418,6 +471,8 @@ static bool icl_tc_phy_is_owned(struct intel_tc_port *tc)
>  	struct drm_i915_private *i915 = tc_to_i915(tc);
>  	u32 val;
>  
> +	assert_tc_cold_blocked(tc);
> +
>  	val = intel_de_read(i915, PORT_TX_DFLEXDPCSSS(tc->phy_fia));
>  	if (val == 0xffffffff) {
>  		drm_dbg_kms(&i915->drm,
> @@ -626,6 +681,8 @@ static bool adlp_tc_phy_is_ready(struct intel_tc_port *tc)
>  	enum tc_port tc_port = intel_port_to_tc(i915, tc->dig_port->base.port);
>  	u32 val;
>  
> +	assert_display_core_power_enabled(tc);
> +
>  	val = intel_de_read(i915, TCSS_DDI_STATUS(tc_port));
>  	if (val == 0xffffffff) {
>  		drm_dbg_kms(&i915->drm,
> @@ -643,6 +700,8 @@ static bool adlp_tc_phy_take_ownership(struct intel_tc_port *tc,
>  	struct drm_i915_private *i915 = tc_to_i915(tc);
>  	enum port port = tc->dig_port->base.port;
>  
> +	assert_tc_port_power_enabled(tc);
> +
>  	intel_de_rmw(i915, DDI_BUF_CTL(port), DDI_BUF_CTL_TC_PHY_OWNERSHIP,
>  		     take ? DDI_BUF_CTL_TC_PHY_OWNERSHIP : 0);
>  
> @@ -655,6 +714,8 @@ static bool adlp_tc_phy_is_owned(struct intel_tc_port *tc)
>  	enum port port = tc->dig_port->base.port;
>  	u32 val;
>  
> +	assert_tc_port_power_enabled(tc);
> +
>  	val = intel_de_read(i915, DDI_BUF_CTL(port));
>  	return val & DDI_BUF_CTL_TC_PHY_OWNERSHIP;
>  }

-- 
Jani Nikula, Intel Open Source Graphics Center

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/tc: Align the ADLP TypeC sequences with bspec

[Patchwork]

== Series Details ==

Series: drm/i915/tc: Align the ADLP TypeC sequences with bspec
URL   : https://patchwork.freedesktop.org/series/115556/
State : warning

== Summary ==

Error: dim checkpatch failed
89d7c50eaa7c drm/i915/tc: Group the TC PHY setup/query functions per platform
dd719e0596ed drm/i915/tc: Use the adlp prefix for ADLP TC PHY functions
446a69352a1c drm/i915/tc: Rename tc_phy_status_complete() to tc_phy_is_ready()
abdcbd225098 drm/i915/tc: Use the tc_phy prefix for all TC PHY functions
31846d59abd8 drm/i915/tc: Move TC port fields to a new intel_tc_port struct
-:1173: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#1173: FILE: drivers/gpu/drm/i915/display/intel_tc.c:1034:
+	drm_WARN_ON(&i915->drm, tc->mode != TC_PORT_TBT_ALT &&
+				!tc_phy_is_owned(tc));

total: 0 errors, 0 warnings, 1 checks, 1311 lines checked
da232fbc25d0 drm/i915/tc: Check for TC PHY explicitly in intel_tc_port_fia_max_lane_count()
1f9ca46d5950 drm/i915/tc: Move the intel_tc_port struct declaration to intel_tc.c
8b39a61baf81 drm/i915/tc: Add TC PHY hook to get the PHY HPD live status
ed0e0d82e64f drm/i915/tc: Add TC PHY hooks to get the PHY ready/owned state
11511b954a15 drm/i915/tc: Add TC PHY hook to read out the PHY HW state
c0ba04389ce4 drm/i915/tc: Add generic TC PHY connect/disconnect handlers
2377a3927472 drm/i915/tc: Factor out tc_phy_verify_legacy_or_dp_alt_mode()
4c4c30d22f74 drm/i915/tc: Add TC PHY hooks to connect/disconnect the PHY
ba145bcff765 drm/i915/tc: Fix up the legacy VBT flag only in disconnected mode
407019870d40 drm/i915/tc: Check TC mode instead of the VBT legacy flag
88c9f7ff2edf drm/i915/tc: Block/unblock TC-cold in the PHY connect/disconnect hooks
8b04b6152ddc drm/i915/tc: Remove redundant wakeref=0 check from unblock_tc_cold()
5f2bf14f4e52 drm/i915/tc: Drop tc_cold_block()/unblock()'s power domain parameter
529129f9af40 drm/i915/tc: Add TC PHY hook to get the TC-cold blocking power domain
1cc45c80aa33 drm/i915/tc: Add asserts in TC PHY hooks that the required power is on
ef16d2ef4413 drm/i915/tc: Add TC PHY hook to init the PHY
dd0e3b185b33 drm/i915/adlp/tc: Use the DE HPD ISR register for hotplug detection
5d7d10186a08 drm/i915/tc: Get power ref for reading the HPD live status register
a3428918214e drm/i915/tc: Don't connect the PHY in intel_tc_port_connected()
9a8006ef792e drm/i915/adlp/tc: Align the connect/disconnect PHY sequence with bspec
5de545fbbf68 drm/i915: Move shared DPLL disabling into CRTC disable hook
68b7b09ec405 drm/i915: Disable DPLLs before disconnecting the TC PHY
d23494acc948 drm/i915: Remove TC PHY disconnect workaround
8ee7d807a411 drm/i915: Remove the encoder update_prepare()/complete() hooks

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915/tc: Align the ADLP TypeC sequences with bspec

[Patchwork]

== Series Details ==

Series: drm/i915/tc: Align the ADLP TypeC sequences with bspec
URL   : https://patchwork.freedesktop.org/series/115556/
State : warning

== Summary ==

Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/tc: Align the ADLP TypeC sequences with bspec

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 5376 bytes --]

== Series Details ==

Series: drm/i915/tc: Align the ADLP TypeC sequences with bspec
URL   : https://patchwork.freedesktop.org/series/115556/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_12905 -> Patchwork_115556v1
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115556v1/index.html

Participating hosts (37 -> 36)
------------------------------

  Missing    (1): fi-snb-2520m 

Known issues
------------

  Here are the changes found in Patchwork_115556v1 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@i915_selftest@live@gt_heartbeat:
    - fi-apl-guc:         [PASS][1] -> [DMESG-FAIL][2] ([i915#5334])
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12905/fi-apl-guc/igt@i915_selftest@live@gt_heartbeat.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115556v1/fi-apl-guc/igt@i915_selftest@live@gt_heartbeat.html

  * igt@i915_selftest@live@requests:
    - bat-rpls-1:         [PASS][3] -> [ABORT][4] ([i915#7911])
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12905/bat-rpls-1/igt@i915_selftest@live@requests.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115556v1/bat-rpls-1/igt@i915_selftest@live@requests.html

  
#### Possible fixes ####

  * igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence@pipe-d-dp-1:
    - bat-dg2-8:          [FAIL][5] -> [PASS][6]
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12905/bat-dg2-8/igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence@pipe-d-dp-1.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115556v1/bat-dg2-8/igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence@pipe-d-dp-1.html

  
#### Warnings ####

  * igt@i915_selftest@live@slpc:
    - bat-rpls-2:         [DMESG-FAIL][7] ([i915#6997] / [i915#7913]) -> [DMESG-FAIL][8] ([i915#6367] / [i915#7913] / [i915#7996])
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12905/bat-rpls-2/igt@i915_selftest@live@slpc.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115556v1/bat-rpls-2/igt@i915_selftest@live@slpc.html

  
  [i915#5334]: https://gitlab.freedesktop.org/drm/intel/issues/5334
  [i915#6367]: https://gitlab.freedesktop.org/drm/intel/issues/6367
  [i915#6997]: https://gitlab.freedesktop.org/drm/intel/issues/6997
  [i915#7911]: https://gitlab.freedesktop.org/drm/intel/issues/7911
  [i915#7913]: https://gitlab.freedesktop.org/drm/intel/issues/7913
  [i915#7996]: https://gitlab.freedesktop.org/drm/intel/issues/7996


Build changes
-------------

  * Linux: CI_DRM_12905 -> Patchwork_115556v1

  CI-20190529: 20190529
  CI_DRM_12905: 3a266f994a6b752953eb974ab7bf1dc382a2d1b8 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_7211: c0cc1de7b2f4041ca68960362aa55f881d416bac @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  Patchwork_115556v1: 3a266f994a6b752953eb974ab7bf1dc382a2d1b8 @ git://anongit.freedesktop.org/gfx-ci/linux


### Linux commits

eacb3f20579c drm/i915: Remove the encoder update_prepare()/complete() hooks
c8a755423ba4 drm/i915: Remove TC PHY disconnect workaround
8953b94f744d drm/i915: Disable DPLLs before disconnecting the TC PHY
a31485fd5235 drm/i915: Move shared DPLL disabling into CRTC disable hook
a6f821a3e5c2 drm/i915/adlp/tc: Align the connect/disconnect PHY sequence with bspec
fc9377aaa0ab drm/i915/tc: Don't connect the PHY in intel_tc_port_connected()
ef101363e765 drm/i915/tc: Get power ref for reading the HPD live status register
ba700337d218 drm/i915/adlp/tc: Use the DE HPD ISR register for hotplug detection
c2e2b015e2e4 drm/i915/tc: Add TC PHY hook to init the PHY
782e1f88fc75 drm/i915/tc: Add asserts in TC PHY hooks that the required power is on
07a6ccb9873c drm/i915/tc: Add TC PHY hook to get the TC-cold blocking power domain
2093be8d1e71 drm/i915/tc: Drop tc_cold_block()/unblock()'s power domain parameter
7d333d02799d drm/i915/tc: Remove redundant wakeref=0 check from unblock_tc_cold()
20215aab0c94 drm/i915/tc: Block/unblock TC-cold in the PHY connect/disconnect hooks
c52180943cea drm/i915/tc: Check TC mode instead of the VBT legacy flag
902536fbcc24 drm/i915/tc: Fix up the legacy VBT flag only in disconnected mode
e92c6edf73a2 drm/i915/tc: Add TC PHY hooks to connect/disconnect the PHY
90848d33f675 drm/i915/tc: Factor out tc_phy_verify_legacy_or_dp_alt_mode()
fd64967db134 drm/i915/tc: Add generic TC PHY connect/disconnect handlers
caf5d74cefb4 drm/i915/tc: Add TC PHY hook to read out the PHY HW state
07b2f0b9762c drm/i915/tc: Add TC PHY hooks to get the PHY ready/owned state
3ad47bfe8a83 drm/i915/tc: Add TC PHY hook to get the PHY HPD live status
0114b48c0cc1 drm/i915/tc: Move the intel_tc_port struct declaration to intel_tc.c
25f5ce3954fb drm/i915/tc: Check for TC PHY explicitly in intel_tc_port_fia_max_lane_count()
4b423900f9e6 drm/i915/tc: Move TC port fields to a new intel_tc_port struct
89eccb3efa96 drm/i915/tc: Use the tc_phy prefix for all TC PHY functions
790a351f1457 drm/i915/tc: Rename tc_phy_status_complete() to tc_phy_is_ready()
773eeb4fba3e drm/i915/tc: Use the adlp prefix for ADLP TC PHY functions
35d186692393 drm/i915/tc: Group the TC PHY setup/query functions per platform

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115556v1/index.html

[-- Attachment #2: Type: text/html, Size: 6288 bytes --]

Re: [Intel-gfx] [PATCH 01/29] drm/i915/tc: Group the TC PHY setup/query functions per platform

[kernel test robot]

Hi Imre,

Thank you for the patch! Perhaps something to improve:

[auto build test WARNING on drm-tip/drm-tip]

url:    https://github.com/intel-lab-lkp/linux/commits/Imre-Deak/drm-i915-tc-Group-the-TC-PHY-setup-query-functions-per-platform/20230323-222328
base:   git://anongit.freedesktop.org/drm/drm-tip drm-tip
patch link:    https://lore.kernel.org/r/20230323142035.1432621-2-imre.deak%40intel.com
patch subject: [Intel-gfx] [PATCH 01/29] drm/i915/tc: Group the TC PHY setup/query functions per platform
config: x86_64-randconfig-a005 (https://download.01.org/0day-ci/archive/20230324/202303240014.FNfWYmf7-lkp@intel.com/config)
compiler: clang version 14.0.6 (https://github.com/llvm/llvm-project f28c006a5895fc0e329fe15fead81e37457cb1d1)
reproduce (this is a W=1 build):
        wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
        chmod +x ~/bin/make.cross
        # https://github.com/intel-lab-lkp/linux/commit/7b85ed1627f7c16b7ff080b604d35d729c70313f
        git remote add linux-review https://github.com/intel-lab-lkp/linux
        git fetch --no-tags linux-review Imre-Deak/drm-i915-tc-Group-the-TC-PHY-setup-query-functions-per-platform/20230323-222328
        git checkout 7b85ed1627f7c16b7ff080b604d35d729c70313f
        # save the config file
        mkdir build_dir && cp config build_dir/.config
        COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross W=1 O=build_dir ARCH=x86_64 olddefconfig
        COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross W=1 O=build_dir ARCH=x86_64 SHELL=/bin/bash drivers/gpu/drm/i915/

If you fix the issue, kindly add following tag where applicable
| Reported-by: kernel test robot <lkp@intel.com>
| Link: https://lore.kernel.org/oe-kbuild-all/202303240014.FNfWYmf7-lkp@intel.com/

All warnings (new ones prefixed by >>):

>> drivers/gpu/drm/i915/display/intel_tc.c:264: warning: This comment starts with '/**', but isn't a kernel-doc comment. Refer Documentation/doc-guide/kernel-doc.rst
    * ICL TC PHY handlers
   drivers/gpu/drm/i915/display/intel_tc.c:457: warning: This comment starts with '/**', but isn't a kernel-doc comment. Refer Documentation/doc-guide/kernel-doc.rst
    * ADLP TC PHY handlers
   drivers/gpu/drm/i915/display/intel_tc.c:535: warning: This comment starts with '/**', but isn't a kernel-doc comment. Refer Documentation/doc-guide/kernel-doc.rst
    * Generic TC PHY handlers
   drivers/gpu/drm/i915/display/intel_tc.c:1026: warning: Function parameter or member 'work' not described in 'intel_tc_port_disconnect_phy_work'
   drivers/gpu/drm/i915/display/intel_tc.c:1026: warning: Excess function parameter 'dig_port' description in 'intel_tc_port_disconnect_phy_work'


vim +264 drivers/gpu/drm/i915/display/intel_tc.c

   262	
   263	/**
 > 264	 * ICL TC PHY handlers
   265	 * -------------------
   266	 */
   267	static u32 icl_tc_port_live_status_mask(struct intel_digital_port *dig_port)
   268	{
   269		struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
   270		u32 isr_bit = i915->display.hotplug.pch_hpd[dig_port->base.hpd_pin];
   271		u32 mask = 0;
   272		u32 val;
   273	
   274		val = intel_de_read(i915, PORT_TX_DFLEXDPSP(dig_port->tc_phy_fia));
   275	
   276		if (val == 0xffffffff) {
   277			drm_dbg_kms(&i915->drm,
   278				    "Port %s: PHY in TCCOLD, nothing connected\n",
   279				    dig_port->tc_port_name);
   280			return mask;
   281		}
   282	
   283		if (val & TC_LIVE_STATE_TBT(dig_port->tc_phy_fia_idx))
   284			mask |= BIT(TC_PORT_TBT_ALT);
   285		if (val & TC_LIVE_STATE_TC(dig_port->tc_phy_fia_idx))
   286			mask |= BIT(TC_PORT_DP_ALT);
   287	
   288		if (intel_de_read(i915, SDEISR) & isr_bit)
   289			mask |= BIT(TC_PORT_LEGACY);
   290	
   291		/* The sink can be connected only in a single mode. */
   292		if (!drm_WARN_ON_ONCE(&i915->drm, hweight32(mask) > 1))
   293			tc_port_fixup_legacy_flag(dig_port, mask);
   294	
   295		return mask;
   296	}
   297	

-- 
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests

Re: [Intel-gfx] [PATCH 01/29] drm/i915/tc: Group the TC PHY setup/query functions per platform

[kernel test robot]

Hi Imre,

Thank you for the patch! Perhaps something to improve:

[auto build test WARNING on drm-tip/drm-tip]

url:    https://github.com/intel-lab-lkp/linux/commits/Imre-Deak/drm-i915-tc-Group-the-TC-PHY-setup-query-functions-per-platform/20230323-222328
base:   git://anongit.freedesktop.org/drm/drm-tip drm-tip
patch link:    https://lore.kernel.org/r/20230323142035.1432621-2-imre.deak%40intel.com
patch subject: [Intel-gfx] [PATCH 01/29] drm/i915/tc: Group the TC PHY setup/query functions per platform
config: i386-randconfig-a004 (https://download.01.org/0day-ci/archive/20230324/202303240020.UQr6flaJ-lkp@intel.com/config)
compiler: clang version 14.0.6 (https://github.com/llvm/llvm-project f28c006a5895fc0e329fe15fead81e37457cb1d1)
reproduce (this is a W=1 build):
        wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
        chmod +x ~/bin/make.cross
        # https://github.com/intel-lab-lkp/linux/commit/7b85ed1627f7c16b7ff080b604d35d729c70313f
        git remote add linux-review https://github.com/intel-lab-lkp/linux
        git fetch --no-tags linux-review Imre-Deak/drm-i915-tc-Group-the-TC-PHY-setup-query-functions-per-platform/20230323-222328
        git checkout 7b85ed1627f7c16b7ff080b604d35d729c70313f
        # save the config file
        mkdir build_dir && cp config build_dir/.config
        COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross W=1 O=build_dir ARCH=i386 olddefconfig
        COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross W=1 O=build_dir ARCH=i386 SHELL=/bin/bash drivers/gpu/drm/i915/

If you fix the issue, kindly add following tag where applicable
| Reported-by: kernel test robot <lkp@intel.com>
| Link: https://lore.kernel.org/oe-kbuild-all/202303240020.UQr6flaJ-lkp@intel.com/

All warnings (new ones prefixed by >>):

>> drivers/gpu/drm/i915/display/intel_tc.c:264: warning: This comment starts with '/**', but isn't a kernel-doc comment. Refer Documentation/doc-guide/kernel-doc.rst
    * ICL TC PHY handlers
   drivers/gpu/drm/i915/display/intel_tc.c:457: warning: This comment starts with '/**', but isn't a kernel-doc comment. Refer Documentation/doc-guide/kernel-doc.rst
    * ADLP TC PHY handlers
   drivers/gpu/drm/i915/display/intel_tc.c:535: warning: This comment starts with '/**', but isn't a kernel-doc comment. Refer Documentation/doc-guide/kernel-doc.rst
    * Generic TC PHY handlers
   drivers/gpu/drm/i915/display/intel_tc.c:1026: warning: Function parameter or member 'work' not described in 'intel_tc_port_disconnect_phy_work'
   drivers/gpu/drm/i915/display/intel_tc.c:1026: warning: Excess function parameter 'dig_port' description in 'intel_tc_port_disconnect_phy_work'


vim +264 drivers/gpu/drm/i915/display/intel_tc.c

   262	
   263	/**
 > 264	 * ICL TC PHY handlers
   265	 * -------------------
   266	 */
   267	static u32 icl_tc_port_live_status_mask(struct intel_digital_port *dig_port)
   268	{
   269		struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
   270		u32 isr_bit = i915->display.hotplug.pch_hpd[dig_port->base.hpd_pin];
   271		u32 mask = 0;
   272		u32 val;
   273	
   274		val = intel_de_read(i915, PORT_TX_DFLEXDPSP(dig_port->tc_phy_fia));
   275	
   276		if (val == 0xffffffff) {
   277			drm_dbg_kms(&i915->drm,
   278				    "Port %s: PHY in TCCOLD, nothing connected\n",
   279				    dig_port->tc_port_name);
   280			return mask;
   281		}
   282	
   283		if (val & TC_LIVE_STATE_TBT(dig_port->tc_phy_fia_idx))
   284			mask |= BIT(TC_PORT_TBT_ALT);
   285		if (val & TC_LIVE_STATE_TC(dig_port->tc_phy_fia_idx))
   286			mask |= BIT(TC_PORT_DP_ALT);
   287	
   288		if (intel_de_read(i915, SDEISR) & isr_bit)
   289			mask |= BIT(TC_PORT_LEGACY);
   290	
   291		/* The sink can be connected only in a single mode. */
   292		if (!drm_WARN_ON_ONCE(&i915->drm, hweight32(mask) > 1))
   293			tc_port_fixup_legacy_flag(dig_port, mask);
   294	
   295		return mask;
   296	}
   297	

-- 
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests

Re: [Intel-gfx] [PATCH 20/29] drm/i915/tc: Add asserts in TC PHY hooks that the required power is on

[Imre Deak]

On Thu, Mar 23, 2023 at 04:33:54PM +0200, Jani Nikula wrote:
> On Thu, 23 Mar 2023, Imre Deak <imre.deak@intel.com> wrote:
> > Add an assert to each TC PHY hook that their required power domain is
> > enabled.
> >
> > While at it add a comment describing the domains used on each platform
> > and TC mode.
> >
> > Signed-off-by: Imre Deak <imre.deak@intel.com>
> > ---
> >  drivers/gpu/drm/i915/display/intel_tc.c | 61 +++++++++++++++++++++++++
> >  1 file changed, 61 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_tc.c b/drivers/gpu/drm/i915/display/intel_tc.c
> > index e68346c5e6036..7bcd93f1f0597 100644
> > --- a/drivers/gpu/drm/i915/display/intel_tc.c
> > +++ b/drivers/gpu/drm/i915/display/intel_tc.c
> > @@ -111,6 +111,46 @@ bool intel_tc_port_in_legacy_mode(struct intel_digital_port *dig_port)
> >  	return intel_tc_port_in_mode(dig_port, TC_PORT_LEGACY);
> >  }
> >  
> > +/**
> 
> This also shouldn't be a kernel-doc comment.

Ok, will change these.

> 
> BR,
> Jani.
> 
> > + * The display power domains used for TC ports depending on the
> > + * platform and TC mode (legacy, DP-alt, TBT):
> > + *
> > + * POWER_DOMAIN_DISPLAY_CORE:
> > + * --------------------------
> > + * ADLP/all modes:
> > + *   - TCSS/IOM access for PHY ready state.
> > + * ADLP+/all modes:
> > + *   - DE/north-,south-HPD ISR access for HPD live state.
> > + *
> > + * POWER_DOMAIN_PORT_DDI_LANES_<port>:
> > + * -----------------------------------
> > + * ICL+/all modes:
> > + *   - DE/DDI_BUF access for port enabled state.
> > + * ADLP/all modes:
> > + *   - DE/DDI_BUF access for PHY owned state.
> > + *
> > + * POWER_DOMAIN_AUX_USBC<TC port index>:
> > + * -------------------------------------
> > + * ICL/legacy mode:
> > + *   - TCSS/IOM,FIA access for PHY ready, owned and HPD live state
> > + *   - TCSS/PHY: block TC-cold power state for using the PHY AUX and
> > + *     main lanes.
> > + * ADLP/legacy, DP-alt modes:
> > + *   - TCSS/PHY: block TC-cold power state for using the PHY AUX and
> > + *     main lanes.
> > + *
> > + * POWER_DOMAIN_TC_COLD_OFF:
> > + * -------------------------
> > + * TGL/legacy, DP-alt modes:
> > + *   - TCSS/IOM,FIA access for PHY ready, owned and HPD live state
> > + *   - TCSS/PHY: block TC-cold power state for using the PHY AUX and
> > + *     main lanes.
> > + *
> > + * ICL, TGL, ADLP/TBT mode:
> > + *   - TCSS/IOM,FIA access for HPD live state
> > + *   - TCSS/TBT: block TC-cold power state for using the (TBT DP-IN)
> > + *     AUX and main lanes.
> > + */
> >  bool intel_tc_cold_requires_aux_pw(struct intel_digital_port *dig_port)
> >  {
> >  	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> > @@ -163,6 +203,15 @@ tc_cold_unblock(struct intel_tc_port *tc, intel_wakeref_t wakeref)
> >  	__tc_cold_unblock(tc, domain, wakeref);
> >  }
> >  
> > +static void
> > +assert_display_core_power_enabled(struct intel_tc_port *tc)
> > +{
> > +	struct drm_i915_private *i915 = tc_to_i915(tc);
> > +
> > +	drm_WARN_ON(&i915->drm,
> > +		    !intel_display_power_is_enabled(i915, POWER_DOMAIN_DISPLAY_CORE));
> > +}
> > +
> >  static void
> >  assert_tc_cold_blocked(struct intel_tc_port *tc)
> >  {
> > @@ -378,6 +427,8 @@ static bool icl_tc_phy_is_ready(struct intel_tc_port *tc)
> >  	struct drm_i915_private *i915 = tc_to_i915(tc);
> >  	u32 val;
> >  
> > +	assert_tc_cold_blocked(tc);
> > +
> >  	val = intel_de_read(i915, PORT_TX_DFLEXDPPMS(tc->phy_fia));
> >  	if (val == 0xffffffff) {
> >  		drm_dbg_kms(&i915->drm,
> > @@ -395,6 +446,8 @@ static bool icl_tc_phy_take_ownership(struct intel_tc_port *tc,
> >  	struct drm_i915_private *i915 = tc_to_i915(tc);
> >  	u32 val;
> >  
> > +	assert_tc_cold_blocked(tc);
> > +
> >  	val = intel_de_read(i915, PORT_TX_DFLEXDPCSSS(tc->phy_fia));
> >  	if (val == 0xffffffff) {
> >  		drm_dbg_kms(&i915->drm,
> > @@ -418,6 +471,8 @@ static bool icl_tc_phy_is_owned(struct intel_tc_port *tc)
> >  	struct drm_i915_private *i915 = tc_to_i915(tc);
> >  	u32 val;
> >  
> > +	assert_tc_cold_blocked(tc);
> > +
> >  	val = intel_de_read(i915, PORT_TX_DFLEXDPCSSS(tc->phy_fia));
> >  	if (val == 0xffffffff) {
> >  		drm_dbg_kms(&i915->drm,
> > @@ -626,6 +681,8 @@ static bool adlp_tc_phy_is_ready(struct intel_tc_port *tc)
> >  	enum tc_port tc_port = intel_port_to_tc(i915, tc->dig_port->base.port);
> >  	u32 val;
> >  
> > +	assert_display_core_power_enabled(tc);
> > +
> >  	val = intel_de_read(i915, TCSS_DDI_STATUS(tc_port));
> >  	if (val == 0xffffffff) {
> >  		drm_dbg_kms(&i915->drm,
> > @@ -643,6 +700,8 @@ static bool adlp_tc_phy_take_ownership(struct intel_tc_port *tc,
> >  	struct drm_i915_private *i915 = tc_to_i915(tc);
> >  	enum port port = tc->dig_port->base.port;
> >  
> > +	assert_tc_port_power_enabled(tc);
> > +
> >  	intel_de_rmw(i915, DDI_BUF_CTL(port), DDI_BUF_CTL_TC_PHY_OWNERSHIP,
> >  		     take ? DDI_BUF_CTL_TC_PHY_OWNERSHIP : 0);
> >  
> > @@ -655,6 +714,8 @@ static bool adlp_tc_phy_is_owned(struct intel_tc_port *tc)
> >  	enum port port = tc->dig_port->base.port;
> >  	u32 val;
> >  
> > +	assert_tc_port_power_enabled(tc);
> > +
> >  	val = intel_de_read(i915, DDI_BUF_CTL(port));
> >  	return val & DDI_BUF_CTL_TC_PHY_OWNERSHIP;
> >  }
> 
> -- 
> Jani Nikula, Intel Open Source Graphics Center

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/tc: Align the ADLP TypeC sequences with bspec

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 20057 bytes --]

== Series Details ==

Series: drm/i915/tc: Align the ADLP TypeC sequences with bspec
URL   : https://patchwork.freedesktop.org/series/115556/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_12905_full -> Patchwork_115556v1_full
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Participating hosts (7 -> 8)
------------------------------

  Additional (1): shard-rkl0 

Known issues
------------

  Here are the changes found in Patchwork_115556v1_full that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_exec_fair@basic-deadline:
    - shard-glk:          [PASS][1] -> [FAIL][2] ([i915#2846])
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12905/shard-glk5/igt@gem_exec_fair@basic-deadline.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115556v1/shard-glk7/igt@gem_exec_fair@basic-deadline.html

  * igt@kms_ccs@pipe-c-crc-primary-basic-y_tiled_gen12_rc_ccs_cc:
    - shard-apl:          NOTRUN -> [SKIP][3] ([fdo#109271] / [i915#3886]) +1 similar issue
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115556v1/shard-apl1/igt@kms_ccs@pipe-c-crc-primary-basic-y_tiled_gen12_rc_ccs_cc.html

  * igt@kms_chamelium_color@ctm-0-75:
    - shard-apl:          NOTRUN -> [SKIP][4] ([fdo#109271]) +12 similar issues
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115556v1/shard-apl1/igt@kms_chamelium_color@ctm-0-75.html

  
#### Possible fixes ####

  * igt@drm_fdinfo@virtual-idle:
    - {shard-rkl}:        [FAIL][5] ([i915#7742]) -> [PASS][6]
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12905/shard-rkl-1/igt@drm_fdinfo@virtual-idle.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115556v1/shard-rkl-3/igt@drm_fdinfo@virtual-idle.html

  * igt@fbdev@nullptr:
    - {shard-tglu}:       [SKIP][7] ([i915#2582]) -> [PASS][8]
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12905/shard-tglu-10/igt@fbdev@nullptr.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115556v1/shard-tglu-7/igt@fbdev@nullptr.html

  * igt@fbdev@write:
    - {shard-rkl}:        [SKIP][9] ([i915#2582]) -> [PASS][10]
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12905/shard-rkl-2/igt@fbdev@write.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115556v1/shard-rkl-6/igt@fbdev@write.html

  * igt@gem_eio@suspend:
    - {shard-rkl}:        [FAIL][11] ([i915#5115] / [i915#7052]) -> [PASS][12]
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12905/shard-rkl-4/igt@gem_eio@suspend.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115556v1/shard-rkl-5/igt@gem_eio@suspend.html

  * igt@gem_exec_fair@basic-pace-share@rcs0:
    - {shard-tglu}:       [FAIL][13] ([i915#2842]) -> [PASS][14]
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12905/shard-tglu-6/igt@gem_exec_fair@basic-pace-share@rcs0.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115556v1/shard-tglu-6/igt@gem_exec_fair@basic-pace-share@rcs0.html

  * igt@gem_exec_reloc@basic-wc:
    - {shard-rkl}:        [SKIP][15] ([i915#3281]) -> [PASS][16] +5 similar issues
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12905/shard-rkl-4/igt@gem_exec_reloc@basic-wc.html
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115556v1/shard-rkl-5/igt@gem_exec_reloc@basic-wc.html

  * igt@gem_mmap_gtt@coherency:
    - {shard-rkl}:        [SKIP][17] ([fdo#111656]) -> [PASS][18]
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12905/shard-rkl-4/igt@gem_mmap_gtt@coherency.html
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115556v1/shard-rkl-5/igt@gem_mmap_gtt@coherency.html

  * igt@gem_pwrite@basic-self:
    - {shard-rkl}:        [SKIP][19] ([i915#3282]) -> [PASS][20] +3 similar issues
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12905/shard-rkl-6/igt@gem_pwrite@basic-self.html
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115556v1/shard-rkl-5/igt@gem_pwrite@basic-self.html

  * igt@gen9_exec_parse@allowed-single:
    - shard-apl:          [ABORT][21] ([i915#5566]) -> [PASS][22]
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12905/shard-apl2/igt@gen9_exec_parse@allowed-single.html
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115556v1/shard-apl1/igt@gen9_exec_parse@allowed-single.html

  * igt@gen9_exec_parse@bb-start-cmd:
    - {shard-rkl}:        [SKIP][23] ([i915#2527]) -> [PASS][24]
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12905/shard-rkl-6/igt@gen9_exec_parse@bb-start-cmd.html
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115556v1/shard-rkl-5/igt@gen9_exec_parse@bb-start-cmd.html

  * {igt@i915_pm_dc@dc5-dpms-negative}:
    - {shard-tglu}:       [SKIP][25] ([i915#8018]) -> [PASS][26]
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12905/shard-tglu-10/igt@i915_pm_dc@dc5-dpms-negative.html
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115556v1/shard-tglu-8/igt@i915_pm_dc@dc5-dpms-negative.html

  * igt@i915_pm_rpm@i2c:
    - {shard-tglu}:       [SKIP][27] ([i915#3547]) -> [PASS][28]
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12905/shard-tglu-10/igt@i915_pm_rpm@i2c.html
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115556v1/shard-tglu-8/igt@i915_pm_rpm@i2c.html

  * igt@i915_pm_rpm@system-suspend-modeset:
    - {shard-rkl}:        [SKIP][29] ([fdo#109308]) -> [PASS][30]
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12905/shard-rkl-5/igt@i915_pm_rpm@system-suspend-modeset.html
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115556v1/shard-rkl-6/igt@i915_pm_rpm@system-suspend-modeset.html

  * igt@i915_pm_rps@engine-order:
    - shard-apl:          [FAIL][31] ([i915#6537]) -> [PASS][32]
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12905/shard-apl2/igt@i915_pm_rps@engine-order.html
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115556v1/shard-apl4/igt@i915_pm_rps@engine-order.html

  * igt@i915_suspend@sysfs-reader:
    - {shard-rkl}:        [FAIL][33] ([fdo#103375]) -> [PASS][34]
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12905/shard-rkl-4/igt@i915_suspend@sysfs-reader.html
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115556v1/shard-rkl-1/igt@i915_suspend@sysfs-reader.html

  * igt@kms_atomic@plane-overlay-legacy:
    - {shard-rkl}:        [SKIP][35] ([i915#1845] / [i915#4098]) -> [PASS][36] +18 similar issues
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12905/shard-rkl-5/igt@kms_atomic@plane-overlay-legacy.html
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115556v1/shard-rkl-6/igt@kms_atomic@plane-overlay-legacy.html

  * igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size:
    - shard-glk:          [FAIL][37] ([i915#2346]) -> [PASS][38]
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12905/shard-glk4/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115556v1/shard-glk1/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html

  * igt@kms_fence_pin_leak:
    - {shard-tglu}:       [SKIP][39] ([fdo#109274] / [i915#1845]) -> [PASS][40]
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12905/shard-tglu-10/igt@kms_fence_pin_leak.html
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115556v1/shard-tglu-4/igt@kms_fence_pin_leak.html

  * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-indfb-msflip-blt:
    - {shard-tglu}:       [SKIP][41] ([i915#1849]) -> [PASS][42] +16 similar issues
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12905/shard-tglu-10/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-indfb-msflip-blt.html
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115556v1/shard-tglu-8/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-indfb-msflip-blt.html

  * igt@kms_frontbuffer_tracking@psr-1p-primscrn-shrfb-pgflip-blt:
    - {shard-rkl}:        [SKIP][43] ([i915#1849] / [i915#4098]) -> [PASS][44] +8 similar issues
   [43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12905/shard-rkl-2/igt@kms_frontbuffer_tracking@psr-1p-primscrn-shrfb-pgflip-blt.html
   [44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115556v1/shard-rkl-6/igt@kms_frontbuffer_tracking@psr-1p-primscrn-shrfb-pgflip-blt.html

  * igt@kms_psr@sprite_plane_onoff:
    - {shard-rkl}:        [SKIP][45] ([i915#1072]) -> [PASS][46] +1 similar issue
   [45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12905/shard-rkl-2/igt@kms_psr@sprite_plane_onoff.html
   [46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115556v1/shard-rkl-6/igt@kms_psr@sprite_plane_onoff.html

  * igt@kms_vblank@pipe-c-query-busy-hang:
    - {shard-tglu}:       [SKIP][47] ([i915#1845] / [i915#7651]) -> [PASS][48] +15 similar issues
   [47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12905/shard-tglu-9/igt@kms_vblank@pipe-c-query-busy-hang.html
   [48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115556v1/shard-tglu-5/igt@kms_vblank@pipe-c-query-busy-hang.html

  * igt@kms_vblank@pipe-c-wait-forked:
    - {shard-tglu}:       [SKIP][49] ([i915#1845]) -> [PASS][50] +61 similar issues
   [49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12905/shard-tglu-10/igt@kms_vblank@pipe-c-wait-forked.html
   [50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115556v1/shard-tglu-4/igt@kms_vblank@pipe-c-wait-forked.html

  * igt@prime_vgem@basic-fence-read:
    - {shard-rkl}:        [SKIP][51] ([fdo#109295] / [i915#3291] / [i915#3708]) -> [PASS][52]
   [51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12905/shard-rkl-4/igt@prime_vgem@basic-fence-read.html
   [52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115556v1/shard-rkl-5/igt@prime_vgem@basic-fence-read.html

  * igt@testdisplay:
    - {shard-rkl}:        [SKIP][53] ([i915#4098]) -> [PASS][54] +1 similar issue
   [53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12905/shard-rkl-5/igt@testdisplay.html
   [54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115556v1/shard-rkl-6/igt@testdisplay.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#103375]: https://bugs.freedesktop.org/show_bug.cgi?id=103375
  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#109274]: https://bugs.freedesktop.org/show_bug.cgi?id=109274
  [fdo#109280]: https://bugs.freedesktop.org/show_bug.cgi?id=109280
  [fdo#109283]: https://bugs.freedesktop.org/show_bug.cgi?id=109283
  [fdo#109289]: https://bugs.freedesktop.org/show_bug.cgi?id=109289
  [fdo#109295]: https://bugs.freedesktop.org/show_bug.cgi?id=109295
  [fdo#109308]: https://bugs.freedesktop.org/show_bug.cgi?id=109308
  [fdo#109315]: https://bugs.freedesktop.org/show_bug.cgi?id=109315
  [fdo#109506]: https://bugs.freedesktop.org/show_bug.cgi?id=109506
  [fdo#110189]: https://bugs.freedesktop.org/show_bug.cgi?id=110189
  [fdo#110723]: https://bugs.freedesktop.org/show_bug.cgi?id=110723
  [fdo#111068]: https://bugs.freedesktop.org/show_bug.cgi?id=111068
  [fdo#111614]: https://bugs.freedesktop.org/show_bug.cgi?id=111614
  [fdo#111615]: https://bugs.freedesktop.org/show_bug.cgi?id=111615
  [fdo#111656]: https://bugs.freedesktop.org/show_bug.cgi?id=111656
  [fdo#111825]: https://bugs.freedesktop.org/show_bug.cgi?id=111825
  [fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
  [i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072
  [i915#1257]: https://gitlab.freedesktop.org/drm/intel/issues/1257
  [i915#132]: https://gitlab.freedesktop.org/drm/intel/issues/132
  [i915#1397]: https://gitlab.freedesktop.org/drm/intel/issues/1397
  [i915#1825]: https://gitlab.freedesktop.org/drm/intel/issues/1825
  [i915#1839]: https://gitlab.freedesktop.org/drm/intel/issues/1839
  [i915#1845]: https://gitlab.freedesktop.org/drm/intel/issues/1845
  [i915#1849]: https://gitlab.freedesktop.org/drm/intel/issues/1849
  [i915#2232]: https://gitlab.freedesktop.org/drm/intel/issues/2232
  [i915#2346]: https://gitlab.freedesktop.org/drm/intel/issues/2346
  [i915#2527]: https://gitlab.freedesktop.org/drm/intel/issues/2527
  [i915#2575]: https://gitlab.freedesktop.org/drm/intel/issues/2575
  [i915#2582]: https://gitlab.freedesktop.org/drm/intel/issues/2582
  [i915#2587]: https://gitlab.freedesktop.org/drm/intel/issues/2587
  [i915#2672]: https://gitlab.freedesktop.org/drm/intel/issues/2672
  [i915#2681]: https://gitlab.freedesktop.org/drm/intel/issues/2681
  [i915#2705]: https://gitlab.freedesktop.org/drm/intel/issues/2705
  [i915#280]: https://gitlab.freedesktop.org/drm/intel/issues/280
  [i915#2842]: https://gitlab.freedesktop.org/drm/intel/issues/2842
  [i915#2846]: https://gitlab.freedesktop.org/drm/intel/issues/2846
  [i915#2920]: https://gitlab.freedesktop.org/drm/intel/issues/2920
  [i915#3116]: https://gitlab.freedesktop.org/drm/intel/issues/3116
  [i915#3281]: https://gitlab.freedesktop.org/drm/intel/issues/3281
  [i915#3282]: https://gitlab.freedesktop.org/drm/intel/issues/3282
  [i915#3291]: https://gitlab.freedesktop.org/drm/intel/issues/3291
  [i915#3297]: https://gitlab.freedesktop.org/drm/intel/issues/3297
  [i915#3299]: https://gitlab.freedesktop.org/drm/intel/issues/3299
  [i915#3359]: https://gitlab.freedesktop.org/drm/intel/issues/3359
  [i915#3458]: https://gitlab.freedesktop.org/drm/intel/issues/3458
  [i915#3469]: https://gitlab.freedesktop.org/drm/intel/issues/3469
  [i915#3539]: https://gitlab.freedesktop.org/drm/intel/issues/3539
  [i915#3546]: https://gitlab.freedesktop.org/drm/intel/issues/3546
  [i915#3547]: https://gitlab.freedesktop.org/drm/intel/issues/3547
  [i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555
  [i915#3591]: https://gitlab.freedesktop.org/drm/intel/issues/3591
  [i915#3637]: https://gitlab.freedesktop.org/drm/intel/issues/3637
  [i915#3638]: https://gitlab.freedesktop.org/drm/intel/issues/3638
  [i915#3689]: https://gitlab.freedesktop.org/drm/intel/issues/3689
  [i915#3708]: https://gitlab.freedesktop.org/drm/intel/issues/3708
  [i915#3734]: https://gitlab.freedesktop.org/drm/intel/issues/3734
  [i915#3886]: https://gitlab.freedesktop.org/drm/intel/issues/3886
  [i915#3936]: https://gitlab.freedesktop.org/drm/intel/issues/3936
  [i915#3955]: https://gitlab.freedesktop.org/drm/intel/issues/3955
  [i915#404]: https://gitlab.freedesktop.org/drm/intel/issues/404
  [i915#4070]: https://gitlab.freedesktop.org/drm/intel/issues/4070
  [i915#4077]: https://gitlab.freedesktop.org/drm/intel/issues/4077
  [i915#4078]: https://gitlab.freedesktop.org/drm/intel/issues/4078
  [i915#4079]: https://gitlab.freedesktop.org/drm/intel/issues/4079
  [i915#4083]: https://gitlab.freedesktop.org/drm/intel/issues/4083
  [i915#4098]: https://gitlab.freedesktop.org/drm/intel/issues/4098
  [i915#4103]: https://gitlab.freedesktop.org/drm/intel/issues/4103
  [i915#4212]: https://gitlab.freedesktop.org/drm/intel/issues/4212
  [i915#4270]: https://gitlab.freedesktop.org/drm/intel/issues/4270
  [i915#433]: https://gitlab.freedesktop.org/drm/intel/issues/433
  [i915#4349]: https://gitlab.freedesktop.org/drm/intel/issues/4349
  [i915#4387]: https://gitlab.freedesktop.org/drm/intel/issues/4387
  [i915#4538]: https://gitlab.freedesktop.org/drm/intel/issues/4538
  [i915#4565]: https://gitlab.freedesktop.org/drm/intel/issues/4565
  [i915#4579]: https://gitlab.freedesktop.org/drm/intel/issues/4579
  [i915#4778]: https://gitlab.freedesktop.org/drm/intel/issues/4778
  [i915#4812]: https://gitlab.freedesktop.org/drm/intel/issues/4812
  [i915#4833]: https://gitlab.freedesktop.org/drm/intel/issues/4833
  [i915#4852]: https://gitlab.freedesktop.org/drm/intel/issues/4852
  [i915#4859]: https://gitlab.freedesktop.org/drm/intel/issues/4859
  [i915#4860]: https://gitlab.freedesktop.org/drm/intel/issues/4860
  [i915#4880]: https://gitlab.freedesktop.org/drm/intel/issues/4880
  [i915#4881]: https://gitlab.freedesktop.org/drm/intel/issues/4881
  [i915#5115]: https://gitlab.freedesktop.org/drm/intel/issues/5115
  [i915#5174]: https://gitlab.freedesktop.org/drm/intel/issues/5174
  [i915#5176]: https://gitlab.freedesktop.org/drm/intel/issues/5176
  [i915#5235]: https://gitlab.freedesktop.org/drm/intel/issues/5235
  [i915#5286]: https://gitlab.freedesktop.org/drm/intel/issues/5286
  [i915#5289]: https://gitlab.freedesktop.org/drm/intel/issues/5289
  [i915#5325]: https://gitlab.freedesktop.org/drm/intel/issues/5325
  [i915#533]: https://gitlab.freedesktop.org/drm/intel/issues/533
  [i915#5354]: https://gitlab.freedesktop.org/drm/intel/issues/5354
  [i915#5439]: https://gitlab.freedesktop.org/drm/intel/issues/5439
  [i915#5563]: https://gitlab.freedesktop.org/drm/intel/issues/5563
  [i915#5566]: https://gitlab.freedesktop.org/drm/intel/issues/5566
  [i915#5608]: https://gitlab.freedesktop.org/drm/intel/issues/5608
  [i915#5784]: https://gitlab.freedesktop.org/drm/intel/issues/5784
  [i915#6095]: https://gitlab.freedesktop.org/drm/intel/issues/6095
  [i915#6247]: https://gitlab.freedesktop.org/drm/intel/issues/6247
  [i915#6248]: https://gitlab.freedesktop.org/drm/intel/issues/6248
  [i915#6252]: https://gitlab.freedesktop.org/drm/intel/issues/6252
  [i915#6301]: https://gitlab.freedesktop.org/drm/intel/issues/6301
  [i915#6433]: https://gitlab.freedesktop.org/drm/intel/issues/6433
  [i915#6497]: https://gitlab.freedesktop.org/drm/intel/issues/6497
  [i915#6524]: https://gitlab.freedesktop.org/drm/intel/issues/6524
  [i915#6537]: https://gitlab.freedesktop.org/drm/intel/issues/6537
  [i915#658]: https://gitlab.freedesktop.org/drm/intel/issues/658
  [i915#6768]: https://gitlab.freedesktop.org/drm/intel/issues/6768
  [i915#6944]: https://gitlab.freedesktop.org/drm/intel/issues/6944
  [i915#6946]: https://gitlab.freedesktop.org/drm/intel/issues/6946
  [i915#6953]: https://gitlab.freedesktop.org/drm/intel/issues/6953
  [i915#7037]: https://gitlab.freedesktop.org/drm/intel/issues/7037
  [i915#7052]: https://gitlab.freedesktop.org/drm/intel/issues/7052
  [i915#7116]: https://gitlab.freedesktop.org/drm/intel/issues/7116
  [i915#7118]: https://gitlab.freedesktop.org/drm/intel/issues/7118
  [i915#7128]: https://gitlab.freedesktop.org/drm/intel/issues/7128
  [i915#7294]: https://gitlab.freedesktop.org/drm/intel/issues/7294
  [i915#7561]: https://gitlab.freedesktop.org/drm/intel/issues/7561
  [i915#7651]: https://gitlab.freedesktop.org/drm/intel/issues/7651
  [i915#7711]: https://gitlab.freedesktop.org/drm/intel/issues/7711
  [i915#7742]: https://gitlab.freedesktop.org/drm/intel/issues/7742
  [i915#7828]: https://gitlab.freedesktop.org/drm/intel/issues/7828
  [i915#7949]: https://gitlab.freedesktop.org/drm/intel/issues/7949
  [i915#7957]: https://gitlab.freedesktop.org/drm/intel/issues/7957
  [i915#8011]: https://gitlab.freedesktop.org/drm/intel/issues/8011
  [i915#8018]: https://gitlab.freedesktop.org/drm/intel/issues/8018
  [i915#8152]: https://gitlab.freedesktop.org/drm/intel/issues/8152
  [i915#8154]: https://gitlab.freedesktop.org/drm/intel/issues/8154
  [i915#8228]: https://gitlab.freedesktop.org/drm/intel/issues/8228
  [i915#8282]: https://gitlab.freedesktop.org/drm/intel/issues/8282
  [i915#8292]: https://gitlab.freedesktop.org/drm/intel/issues/8292
  [i915#8308]: https://gitlab.freedesktop.org/drm/intel/issues/8308


Build changes
-------------

  * Linux: CI_DRM_12905 -> Patchwork_115556v1

  CI-20190529: 20190529
  CI_DRM_12905: 3a266f994a6b752953eb974ab7bf1dc382a2d1b8 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_7211: c0cc1de7b2f4041ca68960362aa55f881d416bac @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  Patchwork_115556v1: 3a266f994a6b752953eb974ab7bf1dc382a2d1b8 @ git://anongit.freedesktop.org/gfx-ci/linux
  piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115556v1/index.html

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Re: [Intel-gfx] [PATCH 01/29] drm/i915/tc: Group the TC PHY setup/query functions per platform

[Kahola, Mika]

> -----Original Message-----
> From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Jani
> Nikula
> Sent: Thursday, March 23, 2023 4:33 PM
> To: Deak, Imre <imre.deak@intel.com>; intel-gfx@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [PATCH 01/29] drm/i915/tc: Group the TC PHY
> setup/query functions per platform
> 
> On Thu, 23 Mar 2023, Imre Deak <imre.deak@intel.com> wrote:
> > Arrange the TC PHY HW state setup/query functions into platform
> > specific and generic groups. This prepares for upcoming patches adding
> > generic TC PHY handlers and platform specific hooks for these,
> > replacing the corresponding if ladders.
> >
> > No functional changes.
> >

With the kernel doc comments fixed, this is 

Reviewed-by: Mika Kahola <mika.kahola@intel.com>

> > Signed-off-by: Imre Deak <imre.deak@intel.com>
> > ---
> >  drivers/gpu/drm/i915/display/intel_tc.c | 244
> > +++++++++++++-----------
> >  1 file changed, 130 insertions(+), 114 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_tc.c
> > b/drivers/gpu/drm/i915/display/intel_tc.c
> > index bd8c9df5f98fe..b6e425c44fcb9 100644
> > --- a/drivers/gpu/drm/i915/display/intel_tc.c
> > +++ b/drivers/gpu/drm/i915/display/intel_tc.c
> > @@ -15,6 +15,10 @@
> >  #include "intel_mg_phy_regs.h"
> >  #include "intel_tc.h"
> >
> > +static u32 tc_port_live_status_mask(struct intel_digital_port
> > +*dig_port); static bool tc_phy_status_complete(struct
> > +intel_digital_port *dig_port); static bool
> > +tc_phy_take_ownership(struct intel_digital_port *dig_port, bool
> > +take);
> > +
> >  static const char *tc_port_mode_name(enum tc_port_mode mode)  {
> >  	static const char * const names[] = { @@ -256,6 +260,10 @@ static
> > void tc_port_fixup_legacy_flag(struct intel_digital_port *dig_port,
> >  	dig_port->tc_legacy_port = !dig_port->tc_legacy_port;  }
> >
> > +/**
> > + * ICL TC PHY handlers
> > + * -------------------
> > + */
> 
> These should not be kernel-doc comments, please replace /** with /*.
> 
> BR,
> Jani.
> 
> 
> 
> >  static u32 icl_tc_port_live_status_mask(struct intel_digital_port
> > *dig_port)  {
> >  	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev); @@
> > -287,44 +295,6 @@ static u32 icl_tc_port_live_status_mask(struct
> intel_digital_port *dig_port)
> >  	return mask;
> >  }
> >
> > -static u32 adl_tc_port_live_status_mask(struct intel_digital_port
> > *dig_port) -{
> > -	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> > -	enum tc_port tc_port = intel_port_to_tc(i915, dig_port->base.port);
> > -	u32 isr_bit = i915->display.hotplug.pch_hpd[dig_port->base.hpd_pin];
> > -	u32 val, mask = 0;
> > -
> > -	/*
> > -	 * On ADL-P HW/FW will wake from TCCOLD to complete the read
> access of
> > -	 * registers in IOM. Note that this doesn't apply to PHY and FIA
> > -	 * registers.
> > -	 */
> > -	val = intel_de_read(i915, TCSS_DDI_STATUS(tc_port));
> > -	if (val & TCSS_DDI_STATUS_HPD_LIVE_STATUS_ALT)
> > -		mask |= BIT(TC_PORT_DP_ALT);
> > -	if (val & TCSS_DDI_STATUS_HPD_LIVE_STATUS_TBT)
> > -		mask |= BIT(TC_PORT_TBT_ALT);
> > -
> > -	if (intel_de_read(i915, SDEISR) & isr_bit)
> > -		mask |= BIT(TC_PORT_LEGACY);
> > -
> > -	/* The sink can be connected only in a single mode. */
> > -	if (!drm_WARN_ON(&i915->drm, hweight32(mask) > 1))
> > -		tc_port_fixup_legacy_flag(dig_port, mask);
> > -
> > -	return mask;
> > -}
> > -
> > -static u32 tc_port_live_status_mask(struct intel_digital_port
> > *dig_port) -{
> > -	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> > -
> > -	if (IS_ALDERLAKE_P(i915))
> > -		return adl_tc_port_live_status_mask(dig_port);
> > -
> > -	return icl_tc_port_live_status_mask(dig_port);
> > -}
> > -
> >  /*
> >   * Return the PHY status complete flag indicating that display can acquire the
> >   * PHY ownership. The IOM firmware sets this flag when a DP-alt or
> > legacy sink @@ -349,40 +319,6 @@ static bool
> icl_tc_phy_status_complete(struct intel_digital_port *dig_port)
> >  	return val & DP_PHY_MODE_STATUS_COMPLETED(dig_port-
> >tc_phy_fia_idx);
> >  }
> >
> > -/*
> > - * Return the PHY status complete flag indicating that display can
> > acquire the
> > - * PHY ownership. The IOM firmware sets this flag when it's ready to
> > switch
> > - * the ownership to display, regardless of what sink is connected
> > (TBT-alt,
> > - * DP-alt, legacy or nothing). For TBT-alt sinks the PHY is owned by
> > the TBT
> > - * subsystem and so switching the ownership to display is not required.
> > - */
> > -static bool adl_tc_phy_status_complete(struct intel_digital_port
> > *dig_port) -{
> > -	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> > -	enum tc_port tc_port = intel_port_to_tc(i915, dig_port->base.port);
> > -	u32 val;
> > -
> > -	val = intel_de_read(i915, TCSS_DDI_STATUS(tc_port));
> > -	if (val == 0xffffffff) {
> > -		drm_dbg_kms(&i915->drm,
> > -			    "Port %s: PHY in TCCOLD, assuming not complete\n",
> > -			    dig_port->tc_port_name);
> > -		return false;
> > -	}
> > -
> > -	return val & TCSS_DDI_STATUS_READY;
> > -}
> > -
> > -static bool tc_phy_status_complete(struct intel_digital_port
> > *dig_port) -{
> > -	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> > -
> > -	if (IS_ALDERLAKE_P(i915))
> > -		return adl_tc_phy_status_complete(dig_port);
> > -
> > -	return icl_tc_phy_status_complete(dig_port);
> > -}
> > -
> >  static bool icl_tc_phy_take_ownership(struct intel_digital_port *dig_port,
> >  				      bool take)
> >  {
> > @@ -407,28 +343,6 @@ static bool icl_tc_phy_take_ownership(struct
> intel_digital_port *dig_port,
> >  	return true;
> >  }
> >
> > -static bool adl_tc_phy_take_ownership(struct intel_digital_port *dig_port,
> > -				      bool take)
> > -{
> > -	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> > -	enum port port = dig_port->base.port;
> > -
> > -	intel_de_rmw(i915, DDI_BUF_CTL(port),
> DDI_BUF_CTL_TC_PHY_OWNERSHIP,
> > -		     take ? DDI_BUF_CTL_TC_PHY_OWNERSHIP : 0);
> > -
> > -	return true;
> > -}
> > -
> > -static bool tc_phy_take_ownership(struct intel_digital_port
> > *dig_port, bool take) -{
> > -	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> > -
> > -	if (IS_ALDERLAKE_P(i915))
> > -		return adl_tc_phy_take_ownership(dig_port, take);
> > -
> > -	return icl_tc_phy_take_ownership(dig_port, take);
> > -}
> > -
> >  static bool icl_tc_phy_is_owned(struct intel_digital_port *dig_port)
> > {
> >  	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev); @@
> > -445,26 +359,6 @@ static bool icl_tc_phy_is_owned(struct intel_digital_port
> *dig_port)
> >  	return val & DP_PHY_MODE_STATUS_NOT_SAFE(dig_port-
> >tc_phy_fia_idx);
> >  }
> >
> > -static bool adl_tc_phy_is_owned(struct intel_digital_port *dig_port)
> > -{
> > -	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> > -	enum port port = dig_port->base.port;
> > -	u32 val;
> > -
> > -	val = intel_de_read(i915, DDI_BUF_CTL(port));
> > -	return val & DDI_BUF_CTL_TC_PHY_OWNERSHIP;
> > -}
> > -
> > -static bool tc_phy_is_owned(struct intel_digital_port *dig_port) -{
> > -	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> > -
> > -	if (IS_ALDERLAKE_P(i915))
> > -		return adl_tc_phy_is_owned(dig_port);
> > -
> > -	return icl_tc_phy_is_owned(dig_port);
> > -}
> > -
> >  /*
> >   * This function implements the first part of the Connect Flow described by our
> >   * specification, Gen11 TypeC Programming chapter. The rest of the
> > flow (reading @@ -559,6 +453,128 @@ static void
> icl_tc_phy_disconnect(struct intel_digital_port *dig_port)
> >  	}
> >  }
> >
> > +/**
> > + * ADLP TC PHY handlers
> > + * --------------------
> > + */
> > +static u32 adl_tc_port_live_status_mask(struct intel_digital_port
> > +*dig_port) {
> > +	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> > +	enum tc_port tc_port = intel_port_to_tc(i915, dig_port->base.port);
> > +	u32 isr_bit = i915->display.hotplug.pch_hpd[dig_port->base.hpd_pin];
> > +	u32 val, mask = 0;
> > +
> > +	/*
> > +	 * On ADL-P HW/FW will wake from TCCOLD to complete the read
> access of
> > +	 * registers in IOM. Note that this doesn't apply to PHY and FIA
> > +	 * registers.
> > +	 */
> > +	val = intel_de_read(i915, TCSS_DDI_STATUS(tc_port));
> > +	if (val & TCSS_DDI_STATUS_HPD_LIVE_STATUS_ALT)
> > +		mask |= BIT(TC_PORT_DP_ALT);
> > +	if (val & TCSS_DDI_STATUS_HPD_LIVE_STATUS_TBT)
> > +		mask |= BIT(TC_PORT_TBT_ALT);
> > +
> > +	if (intel_de_read(i915, SDEISR) & isr_bit)
> > +		mask |= BIT(TC_PORT_LEGACY);
> > +
> > +	/* The sink can be connected only in a single mode. */
> > +	if (!drm_WARN_ON(&i915->drm, hweight32(mask) > 1))
> > +		tc_port_fixup_legacy_flag(dig_port, mask);
> > +
> > +	return mask;
> > +}
> > +
> > +/*
> > + * Return the PHY status complete flag indicating that display can
> > +acquire the
> > + * PHY ownership. The IOM firmware sets this flag when it's ready to
> > +switch
> > + * the ownership to display, regardless of what sink is connected
> > +(TBT-alt,
> > + * DP-alt, legacy or nothing). For TBT-alt sinks the PHY is owned by
> > +the TBT
> > + * subsystem and so switching the ownership to display is not required.
> > + */
> > +static bool adl_tc_phy_status_complete(struct intel_digital_port
> > +*dig_port) {
> > +	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> > +	enum tc_port tc_port = intel_port_to_tc(i915, dig_port->base.port);
> > +	u32 val;
> > +
> > +	val = intel_de_read(i915, TCSS_DDI_STATUS(tc_port));
> > +	if (val == 0xffffffff) {
> > +		drm_dbg_kms(&i915->drm,
> > +			    "Port %s: PHY in TCCOLD, assuming not complete\n",
> > +			    dig_port->tc_port_name);
> > +		return false;
> > +	}
> > +
> > +	return val & TCSS_DDI_STATUS_READY;
> > +}
> > +
> > +static bool adl_tc_phy_take_ownership(struct intel_digital_port *dig_port,
> > +				      bool take)
> > +{
> > +	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> > +	enum port port = dig_port->base.port;
> > +
> > +	intel_de_rmw(i915, DDI_BUF_CTL(port),
> DDI_BUF_CTL_TC_PHY_OWNERSHIP,
> > +		     take ? DDI_BUF_CTL_TC_PHY_OWNERSHIP : 0);
> > +
> > +	return true;
> > +}
> > +
> > +static bool adl_tc_phy_is_owned(struct intel_digital_port *dig_port)
> > +{
> > +	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> > +	enum port port = dig_port->base.port;
> > +	u32 val;
> > +
> > +	val = intel_de_read(i915, DDI_BUF_CTL(port));
> > +	return val & DDI_BUF_CTL_TC_PHY_OWNERSHIP; }
> > +
> > +/**
> > + * Generic TC PHY handlers
> > + * -----------------------
> > + */
> > +static u32 tc_port_live_status_mask(struct intel_digital_port
> > +*dig_port) {
> > +	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> > +
> > +	if (IS_ALDERLAKE_P(i915))
> > +		return adl_tc_port_live_status_mask(dig_port);
> > +
> > +	return icl_tc_port_live_status_mask(dig_port);
> > +}
> > +
> > +static bool tc_phy_status_complete(struct intel_digital_port
> > +*dig_port) {
> > +	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> > +
> > +	if (IS_ALDERLAKE_P(i915))
> > +		return adl_tc_phy_status_complete(dig_port);
> > +
> > +	return icl_tc_phy_status_complete(dig_port);
> > +}
> > +
> > +static bool tc_phy_is_owned(struct intel_digital_port *dig_port) {
> > +	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> > +
> > +	if (IS_ALDERLAKE_P(i915))
> > +		return adl_tc_phy_is_owned(dig_port);
> > +
> > +	return icl_tc_phy_is_owned(dig_port); }
> > +
> > +static bool tc_phy_take_ownership(struct intel_digital_port
> > +*dig_port, bool take) {
> > +	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> > +
> > +	if (IS_ALDERLAKE_P(i915))
> > +		return adl_tc_phy_take_ownership(dig_port, take);
> > +
> > +	return icl_tc_phy_take_ownership(dig_port, take); }
> > +
> >  static bool tc_phy_is_ready_and_owned(struct intel_digital_port *dig_port,
> >  				      bool phy_is_ready, bool phy_is_owned)  {
> 
> --
> Jani Nikula, Intel Open Source Graphics Center

Re: [Intel-gfx] [PATCH 02/29] drm/i915/tc: Use the adlp prefix for ADLP TC PHY functions

[Kahola, Mika]

> -----Original Message-----
> From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Imre
> Deak
> Sent: Thursday, March 23, 2023 4:20 PM
> To: intel-gfx@lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH 02/29] drm/i915/tc: Use the adlp prefix for ADLP TC
> PHY functions
> 
> Use the usual adlp prefix for all ADLP specific TC PHY functions. Other ADL
> platforms don't support TC.
> 

Reviewed-by: Mika Kahola <mika.kahola@intel.com>

> Signed-off-by: Imre Deak <imre.deak@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_tc.c | 18 +++++++++---------
>  1 file changed, 9 insertions(+), 9 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_tc.c
> b/drivers/gpu/drm/i915/display/intel_tc.c
> index b6e425c44fcb9..099b1ec842ba2 100644
> --- a/drivers/gpu/drm/i915/display/intel_tc.c
> +++ b/drivers/gpu/drm/i915/display/intel_tc.c
> @@ -457,7 +457,7 @@ static void icl_tc_phy_disconnect(struct
> intel_digital_port *dig_port)
>   * ADLP TC PHY handlers
>   * --------------------
>   */
> -static u32 adl_tc_port_live_status_mask(struct intel_digital_port *dig_port)
> +static u32 adlp_tc_port_live_status_mask(struct intel_digital_port
> +*dig_port)
>  {
>  	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
>  	enum tc_port tc_port = intel_port_to_tc(i915, dig_port->base.port);
> @@ -492,7 +492,7 @@ static u32 adl_tc_port_live_status_mask(struct
> intel_digital_port *dig_port)
>   * DP-alt, legacy or nothing). For TBT-alt sinks the PHY is owned by the TBT
>   * subsystem and so switching the ownership to display is not required.
>   */
> -static bool adl_tc_phy_status_complete(struct intel_digital_port *dig_port)
> +static bool adlp_tc_phy_status_complete(struct intel_digital_port
> +*dig_port)
>  {
>  	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
>  	enum tc_port tc_port = intel_port_to_tc(i915, dig_port->base.port);
> @@ -509,8 +509,8 @@ static bool adl_tc_phy_status_complete(struct
> intel_digital_port *dig_port)
>  	return val & TCSS_DDI_STATUS_READY;
>  }
> 
> -static bool adl_tc_phy_take_ownership(struct intel_digital_port *dig_port,
> -				      bool take)
> +static bool adlp_tc_phy_take_ownership(struct intel_digital_port *dig_port,
> +				       bool take)
>  {
>  	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
>  	enum port port = dig_port->base.port;
> @@ -521,7 +521,7 @@ static bool adl_tc_phy_take_ownership(struct
> intel_digital_port *dig_port,
>  	return true;
>  }
> 
> -static bool adl_tc_phy_is_owned(struct intel_digital_port *dig_port)
> +static bool adlp_tc_phy_is_owned(struct intel_digital_port *dig_port)
>  {
>  	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
>  	enum port port = dig_port->base.port;
> @@ -540,7 +540,7 @@ static u32 tc_port_live_status_mask(struct
> intel_digital_port *dig_port)
>  	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> 
>  	if (IS_ALDERLAKE_P(i915))
> -		return adl_tc_port_live_status_mask(dig_port);
> +		return adlp_tc_port_live_status_mask(dig_port);
> 
>  	return icl_tc_port_live_status_mask(dig_port);
>  }
> @@ -550,7 +550,7 @@ static bool tc_phy_status_complete(struct
> intel_digital_port *dig_port)
>  	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> 
>  	if (IS_ALDERLAKE_P(i915))
> -		return adl_tc_phy_status_complete(dig_port);
> +		return adlp_tc_phy_status_complete(dig_port);
> 
>  	return icl_tc_phy_status_complete(dig_port);
>  }
> @@ -560,7 +560,7 @@ static bool tc_phy_is_owned(struct intel_digital_port
> *dig_port)
>  	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> 
>  	if (IS_ALDERLAKE_P(i915))
> -		return adl_tc_phy_is_owned(dig_port);
> +		return adlp_tc_phy_is_owned(dig_port);
> 
>  	return icl_tc_phy_is_owned(dig_port);
>  }
> @@ -570,7 +570,7 @@ static bool tc_phy_take_ownership(struct
> intel_digital_port *dig_port, bool take
>  	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> 
>  	if (IS_ALDERLAKE_P(i915))
> -		return adl_tc_phy_take_ownership(dig_port, take);
> +		return adlp_tc_phy_take_ownership(dig_port, take);
> 
>  	return icl_tc_phy_take_ownership(dig_port, take);  }
> --
> 2.37.1

Re: [Intel-gfx] [PATCH 03/29] drm/i915/tc: Rename tc_phy_status_complete() to tc_phy_is_ready()

[Kahola, Mika]

> -----Original Message-----
> From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Imre
> Deak
> Sent: Thursday, March 23, 2023 4:20 PM
> To: intel-gfx@lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH 03/29] drm/i915/tc: Rename
> tc_phy_status_complete() to tc_phy_is_ready()
> 
> For consistency rename tc_phy_status_complete() to tc_phy_is_ready()
> following the terminology of new platforms.
> 

Reviewed-by: Mika Kahola <mika.kahola@intel.com>

> Signed-off-by: Imre Deak <imre.deak@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_tc.c | 24 ++++++++++++------------
>  1 file changed, 12 insertions(+), 12 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_tc.c
> b/drivers/gpu/drm/i915/display/intel_tc.c
> index 099b1ec842ba2..9fecf24b69c16 100644
> --- a/drivers/gpu/drm/i915/display/intel_tc.c
> +++ b/drivers/gpu/drm/i915/display/intel_tc.c
> @@ -16,7 +16,7 @@
>  #include "intel_tc.h"
> 
>  static u32 tc_port_live_status_mask(struct intel_digital_port *dig_port); -static
> bool tc_phy_status_complete(struct intel_digital_port *dig_port);
> +static bool tc_phy_is_ready(struct intel_digital_port *dig_port);
>  static bool tc_phy_take_ownership(struct intel_digital_port *dig_port, bool
> take);
> 
>  static const char *tc_port_mode_name(enum tc_port_mode mode) @@ -303,7
> +303,7 @@ static u32 icl_tc_port_live_status_mask(struct intel_digital_port
> *dig_port)
>   * owned by the TBT subsystem and so switching the ownership to display is not
>   * required.
>   */
> -static bool icl_tc_phy_status_complete(struct intel_digital_port *dig_port)
> +static bool icl_tc_phy_is_ready(struct intel_digital_port *dig_port)
>  {
>  	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
>  	u32 val;
> @@ -311,7 +311,7 @@ static bool icl_tc_phy_status_complete(struct
> intel_digital_port *dig_port)
>  	val = intel_de_read(i915, PORT_TX_DFLEXDPPMS(dig_port-
> >tc_phy_fia));
>  	if (val == 0xffffffff) {
>  		drm_dbg_kms(&i915->drm,
> -			    "Port %s: PHY in TCCOLD, assuming not complete\n",
> +			    "Port %s: PHY in TCCOLD, assuming not ready\n",
>  			    dig_port->tc_port_name);
>  		return false;
>  	}
> @@ -377,7 +377,7 @@ static void icl_tc_phy_connect(struct intel_digital_port
> *dig_port,
>  	u32 live_status_mask;
>  	int max_lanes;
> 
> -	if (!tc_phy_status_complete(dig_port) &&
> +	if (!tc_phy_is_ready(dig_port) &&
>  	    !drm_WARN_ON(&i915->drm, dig_port->tc_legacy_port)) {
>  		drm_dbg_kms(&i915->drm, "Port %s: PHY not ready\n",
>  			    dig_port->tc_port_name);
> @@ -492,7 +492,7 @@ static u32 adlp_tc_port_live_status_mask(struct
> intel_digital_port *dig_port)
>   * DP-alt, legacy or nothing). For TBT-alt sinks the PHY is owned by the TBT
>   * subsystem and so switching the ownership to display is not required.
>   */
> -static bool adlp_tc_phy_status_complete(struct intel_digital_port *dig_port)
> +static bool adlp_tc_phy_is_ready(struct intel_digital_port *dig_port)
>  {
>  	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
>  	enum tc_port tc_port = intel_port_to_tc(i915, dig_port->base.port);
> @@ -501,7 +501,7 @@ static bool adlp_tc_phy_status_complete(struct
> intel_digital_port *dig_port)
>  	val = intel_de_read(i915, TCSS_DDI_STATUS(tc_port));
>  	if (val == 0xffffffff) {
>  		drm_dbg_kms(&i915->drm,
> -			    "Port %s: PHY in TCCOLD, assuming not complete\n",
> +			    "Port %s: PHY in TCCOLD, assuming not ready\n",
>  			    dig_port->tc_port_name);
>  		return false;
>  	}
> @@ -545,14 +545,14 @@ static u32 tc_port_live_status_mask(struct
> intel_digital_port *dig_port)
>  	return icl_tc_port_live_status_mask(dig_port);
>  }
> 
> -static bool tc_phy_status_complete(struct intel_digital_port *dig_port)
> +static bool tc_phy_is_ready(struct intel_digital_port *dig_port)
>  {
>  	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> 
>  	if (IS_ALDERLAKE_P(i915))
> -		return adlp_tc_phy_status_complete(dig_port);
> +		return adlp_tc_phy_is_ready(dig_port);
> 
> -	return icl_tc_phy_status_complete(dig_port);
> +	return icl_tc_phy_is_ready(dig_port);
>  }
> 
>  static bool tc_phy_is_owned(struct intel_digital_port *dig_port) @@ -590,7
> +590,7 @@ static bool tc_phy_is_connected(struct intel_digital_port *dig_port,
> {
>  	struct intel_encoder *encoder = &dig_port->base;
>  	struct drm_i915_private *i915 = to_i915(encoder->base.dev);
> -	bool phy_is_ready = tc_phy_status_complete(dig_port);
> +	bool phy_is_ready = tc_phy_is_ready(dig_port);
>  	bool phy_is_owned = tc_phy_is_owned(dig_port);
>  	bool is_connected;
> 
> @@ -614,7 +614,7 @@ static void tc_phy_wait_for_ready(struct
> intel_digital_port *dig_port)  {
>  	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> 
> -	if (wait_for(tc_phy_status_complete(dig_port), 100))
> +	if (wait_for(tc_phy_is_ready(dig_port), 100))
>  		drm_err(&i915->drm, "Port %s: timeout waiting for PHY
> ready\n",
>  			dig_port->tc_port_name);
>  }
> @@ -694,7 +694,7 @@ intel_tc_port_get_current_mode(struct
> intel_digital_port *dig_port)
>  	if (dig_port->tc_legacy_port)
>  		tc_phy_wait_for_ready(dig_port);
> 
> -	phy_is_ready = tc_phy_status_complete(dig_port);
> +	phy_is_ready = tc_phy_is_ready(dig_port);
>  	phy_is_owned = tc_phy_is_owned(dig_port);
> 
>  	if (!tc_phy_is_ready_and_owned(dig_port, phy_is_ready,
> phy_is_owned)) {
> --
> 2.37.1

Re: [Intel-gfx] [PATCH 04/29] drm/i915/tc: Use the tc_phy prefix for all TC PHY functions

[Kahola, Mika]

> -----Original Message-----
> From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Imre
> Deak
> Sent: Thursday, March 23, 2023 4:20 PM
> To: intel-gfx@lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH 04/29] drm/i915/tc: Use the tc_phy prefix for all TC
> PHY functions
> 
> For consistency use the tc_phy prefix for all TC PHY functions.
> 

Reviewed-by: Mika Kahola <mika.kahola@intel.com>

> Signed-off-by: Imre Deak <imre.deak@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_tc.c | 30 ++++++++++++-------------
>  1 file changed, 15 insertions(+), 15 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_tc.c
> b/drivers/gpu/drm/i915/display/intel_tc.c
> index 9fecf24b69c16..d2afe8b65beee 100644
> --- a/drivers/gpu/drm/i915/display/intel_tc.c
> +++ b/drivers/gpu/drm/i915/display/intel_tc.c
> @@ -15,7 +15,7 @@
>  #include "intel_mg_phy_regs.h"
>  #include "intel_tc.h"
> 
> -static u32 tc_port_live_status_mask(struct intel_digital_port *dig_port);
> +static u32 tc_phy_hpd_live_status(struct intel_digital_port *dig_port);
>  static bool tc_phy_is_ready(struct intel_digital_port *dig_port);  static bool
> tc_phy_take_ownership(struct intel_digital_port *dig_port, bool take);
> 
> @@ -264,7 +264,7 @@ static void tc_port_fixup_legacy_flag(struct
> intel_digital_port *dig_port,
>   * ICL TC PHY handlers
>   * -------------------
>   */
> -static u32 icl_tc_port_live_status_mask(struct intel_digital_port *dig_port)
> +static u32 icl_tc_phy_hpd_live_status(struct intel_digital_port
> +*dig_port)
>  {
>  	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
>  	u32 isr_bit = i915->display.hotplug.pch_hpd[dig_port->base.hpd_pin];
> @@ -384,7 +384,7 @@ static void icl_tc_phy_connect(struct intel_digital_port
> *dig_port,
>  		goto out_set_tbt_alt_mode;
>  	}
> 
> -	live_status_mask = tc_port_live_status_mask(dig_port);
> +	live_status_mask = tc_phy_hpd_live_status(dig_port);
>  	if (!(live_status_mask & (BIT(TC_PORT_DP_ALT) |
> BIT(TC_PORT_LEGACY))) &&
>  	    !dig_port->tc_legacy_port) {
>  		drm_dbg_kms(&i915->drm, "Port %s: PHY ownership not
> required (live status %02x)\n", @@ -408,7 +408,7 @@ static void
> icl_tc_phy_connect(struct intel_digital_port *dig_port,
>  	 * Now we have to re-check the live state, in case the port recently
>  	 * became disconnected. Not necessary for legacy mode.
>  	 */
> -	if (!(tc_port_live_status_mask(dig_port) & BIT(TC_PORT_DP_ALT))) {
> +	if (!(tc_phy_hpd_live_status(dig_port) & BIT(TC_PORT_DP_ALT))) {
>  		drm_dbg_kms(&i915->drm, "Port %s: PHY sudden
> disconnect\n",
>  			    dig_port->tc_port_name);
>  		goto out_release_phy;
> @@ -457,7 +457,7 @@ static void icl_tc_phy_disconnect(struct
> intel_digital_port *dig_port)
>   * ADLP TC PHY handlers
>   * --------------------
>   */
> -static u32 adlp_tc_port_live_status_mask(struct intel_digital_port *dig_port)
> +static u32 adlp_tc_phy_hpd_live_status(struct intel_digital_port
> +*dig_port)
>  {
>  	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
>  	enum tc_port tc_port = intel_port_to_tc(i915, dig_port->base.port);
> @@ -535,14 +535,14 @@ static bool adlp_tc_phy_is_owned(struct
> intel_digital_port *dig_port)
>   * Generic TC PHY handlers
>   * -----------------------
>   */
> -static u32 tc_port_live_status_mask(struct intel_digital_port *dig_port)
> +static u32 tc_phy_hpd_live_status(struct intel_digital_port *dig_port)
>  {
>  	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> 
>  	if (IS_ALDERLAKE_P(i915))
> -		return adlp_tc_port_live_status_mask(dig_port);
> +		return adlp_tc_phy_hpd_live_status(dig_port);
> 
> -	return icl_tc_port_live_status_mask(dig_port);
> +	return icl_tc_phy_hpd_live_status(dig_port);
>  }
> 
>  static bool tc_phy_is_ready(struct intel_digital_port *dig_port) @@ -631,7
> +631,7 @@ hpd_mask_to_tc_mode(u32 live_status_mask)  static enum
> tc_port_mode  tc_phy_hpd_live_mode(struct intel_digital_port *dig_port)  {
> -	u32 live_status_mask = tc_port_live_status_mask(dig_port);
> +	u32 live_status_mask = tc_phy_hpd_live_status(dig_port);
> 
>  	return hpd_mask_to_tc_mode(live_status_mask);
>  }
> @@ -678,7 +678,7 @@ get_tc_mode_in_phy_not_owned_state(struct
> intel_digital_port *dig_port,  }
> 
>  static enum tc_port_mode
> -intel_tc_port_get_current_mode(struct intel_digital_port *dig_port)
> +tc_phy_get_current_mode(struct intel_digital_port *dig_port)
>  {
>  	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
>  	enum tc_port_mode live_mode = tc_phy_hpd_live_mode(dig_port);
> @@ -735,9 +735,9 @@ hpd_mask_to_target_mode(struct intel_digital_port
> *dig_port, u32 live_status_mas  }
> 
>  static enum tc_port_mode
> -intel_tc_port_get_target_mode(struct intel_digital_port *dig_port)
> +tc_phy_get_target_mode(struct intel_digital_port *dig_port)
>  {
> -	u32 live_status_mask = tc_port_live_status_mask(dig_port);
> +	u32 live_status_mask = tc_phy_hpd_live_status(dig_port);
> 
>  	return hpd_mask_to_target_mode(dig_port, live_status_mask);  } @@ -
> 770,7 +770,7 @@ static void intel_tc_port_reset_mode(struct intel_digital_port
> *dig_port,
> 
>  static bool intel_tc_port_needs_reset(struct intel_digital_port *dig_port)  {
> -	return intel_tc_port_get_target_mode(dig_port) != dig_port->tc_mode;
> +	return tc_phy_get_target_mode(dig_port) != dig_port->tc_mode;
>  }
> 
>  static void intel_tc_port_update_mode(struct intel_digital_port *dig_port, @@
> -847,7 +847,7 @@ void intel_tc_port_init_mode(struct intel_digital_port
> *dig_port)
> 
>  	tc_cold_wref = tc_cold_block(dig_port, &domain);
> 
> -	dig_port->tc_mode = intel_tc_port_get_current_mode(dig_port);
> +	dig_port->tc_mode = tc_phy_get_current_mode(dig_port);
>  	/*
>  	 * Save the initial mode for the state check in
>  	 * intel_tc_port_sanitize_mode().
> @@ -976,7 +976,7 @@ bool intel_tc_port_connected_locked(struct
> intel_encoder *encoder)
> 
>  	drm_WARN_ON(&i915->drm, !intel_tc_port_ref_held(dig_port));
> 
> -	return tc_port_live_status_mask(dig_port) & BIT(dig_port->tc_mode);
> +	return tc_phy_hpd_live_status(dig_port) & BIT(dig_port->tc_mode);
>  }
> 
>  bool intel_tc_port_connected(struct intel_encoder *encoder)
> --
> 2.37.1

Re: [Intel-gfx] [PATCH 05/29] drm/i915/tc: Move TC port fields to a new intel_tc_port struct

[Kahola, Mika]

> -----Original Message-----
> From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Imre
> Deak
> Sent: Thursday, March 23, 2023 4:20 PM
> To: intel-gfx@lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH 05/29] drm/i915/tc: Move TC port fields to a new
> intel_tc_port struct
> 
> Move the TC port specific fields from intel_digital_port to a new intel_tc_port
> struct. Pass an intel_tc_port pointer to all static functions in intel_tc.c keeping
> dig_port accessible for these via a pointer stored in the new struct.
> 
> The next patch will allocate the intel_tc_port dynamically, allowing moving the
> struct definition to intel_tc.c.
> 

Reviewed-by: Mika Kahola <mika.kahola@intel.com>

> Signed-off-by: Imre Deak <imre.deak@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_display.h  |   7 -
>  .../drm/i915/display/intel_display_types.h    |  13 +-
>  drivers/gpu/drm/i915/display/intel_tc.c       | 578 ++++++++++--------
>  drivers/gpu/drm/i915/display/intel_tc.h       |  26 +
>  4 files changed, 335 insertions(+), 289 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display.h
> b/drivers/gpu/drm/i915/display/intel_display.h
> index 596fd3ec19838..287159bdeb0d1 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.h
> +++ b/drivers/gpu/drm/i915/display/intel_display.h
> @@ -164,13 +164,6 @@ enum tc_port {
>  	I915_MAX_TC_PORTS
>  };
> 
> -enum tc_port_mode {
> -	TC_PORT_DISCONNECTED,
> -	TC_PORT_TBT_ALT,
> -	TC_PORT_DP_ALT,
> -	TC_PORT_LEGACY,
> -};
> -
>  enum aux_ch {
>  	AUX_CH_NONE = -1,
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h
> b/drivers/gpu/drm/i915/display/intel_display_types.h
> index ab146b5b68bd5..0130c7b7f0232 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> @@ -54,6 +54,7 @@
>  #include "intel_display_power.h"
>  #include "intel_dpll_mgr.h"
>  #include "intel_wm_types.h"
> +#include "intel_tc.h"
> 
>  struct drm_printer;
>  struct __intel_global_objs_state;
> @@ -1780,17 +1781,7 @@ struct intel_digital_port {
>  	intel_wakeref_t ddi_io_wakeref;
>  	intel_wakeref_t aux_wakeref;
> 
> -	struct mutex tc_lock;	/* protects the TypeC port mode */
> -	intel_wakeref_t tc_lock_wakeref;
> -	enum intel_display_power_domain tc_lock_power_domain;
> -	struct delayed_work tc_disconnect_phy_work;
> -	int tc_link_refcount;
> -	bool tc_legacy_port:1;
> -	char tc_port_name[8];
> -	enum tc_port_mode tc_mode;
> -	enum tc_port_mode tc_init_mode;
> -	enum phy_fia tc_phy_fia;
> -	u8 tc_phy_fia_idx;
> +	struct intel_tc_port tc;
> 
>  	/* protects num_hdcp_streams reference count, hdcp_port_data and
> hdcp_auth_status */
>  	struct mutex hdcp_mutex;
> diff --git a/drivers/gpu/drm/i915/display/intel_tc.c
> b/drivers/gpu/drm/i915/display/intel_tc.c
> index d2afe8b65beee..70771044a2fe8 100644
> --- a/drivers/gpu/drm/i915/display/intel_tc.c
> +++ b/drivers/gpu/drm/i915/display/intel_tc.c
> @@ -15,9 +15,9 @@
>  #include "intel_mg_phy_regs.h"
>  #include "intel_tc.h"
> 
> -static u32 tc_phy_hpd_live_status(struct intel_digital_port *dig_port); -static
> bool tc_phy_is_ready(struct intel_digital_port *dig_port); -static bool
> tc_phy_take_ownership(struct intel_digital_port *dig_port, bool take);
> +static u32 tc_phy_hpd_live_status(struct intel_tc_port *tc); static
> +bool tc_phy_is_ready(struct intel_tc_port *tc); static bool
> +tc_phy_take_ownership(struct intel_tc_port *tc, bool take);
> 
>  static const char *tc_port_mode_name(enum tc_port_mode mode)  { @@ -
> 34,13 +34,24 @@ static const char *tc_port_mode_name(enum tc_port_mode
> mode)
>  	return names[mode];
>  }
> 
> +static struct intel_tc_port *to_tc_port(struct intel_digital_port
> +*dig_port) {
> +	return &dig_port->tc;
> +}
> +
> +static struct drm_i915_private *tc_to_i915(struct intel_tc_port *tc) {
> +	return to_i915(tc->dig_port->base.base.dev);
> +}
> +
>  static bool intel_tc_port_in_mode(struct intel_digital_port *dig_port,
>  				  enum tc_port_mode mode)
>  {
>  	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
>  	enum phy phy = intel_port_to_phy(i915, dig_port->base.port);
> +	struct intel_tc_port *tc = to_tc_port(dig_port);
> 
> -	return intel_phy_is_tc(i915, phy) && dig_port->tc_mode == mode;
> +	return intel_phy_is_tc(i915, phy) && tc->mode == mode;
>  }
> 
>  bool intel_tc_port_in_tbt_alt_mode(struct intel_digital_port *dig_port) @@ -
> 61,15 +72,17 @@ bool intel_tc_port_in_legacy_mode(struct intel_digital_port
> *dig_port)  bool intel_tc_cold_requires_aux_pw(struct intel_digital_port
> *dig_port)  {
>  	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> +	struct intel_tc_port *tc = to_tc_port(dig_port);
> 
> -	return (DISPLAY_VER(i915) == 11 && dig_port->tc_legacy_port) ||
> +	return (DISPLAY_VER(i915) == 11 && tc->legacy_port) ||
>  		IS_ALDERLAKE_P(i915);
>  }
> 
>  static enum intel_display_power_domain
> -tc_cold_get_power_domain(struct intel_digital_port *dig_port, enum
> tc_port_mode mode)
> +tc_cold_get_power_domain(struct intel_tc_port *tc, enum tc_port_mode
> +mode)
>  {
> -	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> +	struct drm_i915_private *i915 = tc_to_i915(tc);
> +	struct intel_digital_port *dig_port = tc->dig_port;
> 
>  	if (mode == TC_PORT_TBT_ALT ||
> !intel_tc_cold_requires_aux_pw(dig_port))
>  		return POWER_DOMAIN_TC_COLD_OFF;
> @@ -78,27 +91,27 @@ tc_cold_get_power_domain(struct intel_digital_port
> *dig_port, enum tc_port_mode  }
> 
>  static intel_wakeref_t
> -tc_cold_block_in_mode(struct intel_digital_port *dig_port, enum
> tc_port_mode mode,
> +tc_cold_block_in_mode(struct intel_tc_port *tc, enum tc_port_mode mode,
>  		      enum intel_display_power_domain *domain)  {
> -	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> +	struct drm_i915_private *i915 = tc_to_i915(tc);
> 
> -	*domain = tc_cold_get_power_domain(dig_port, mode);
> +	*domain = tc_cold_get_power_domain(tc, mode);
> 
>  	return intel_display_power_get(i915, *domain);  }
> 
>  static intel_wakeref_t
> -tc_cold_block(struct intel_digital_port *dig_port, enum
> intel_display_power_domain *domain)
> +tc_cold_block(struct intel_tc_port *tc, enum intel_display_power_domain
> +*domain)
>  {
> -	return tc_cold_block_in_mode(dig_port, dig_port->tc_mode, domain);
> +	return tc_cold_block_in_mode(tc, tc->mode, domain);
>  }
> 
>  static void
> -tc_cold_unblock(struct intel_digital_port *dig_port, enum
> intel_display_power_domain domain,
> +tc_cold_unblock(struct intel_tc_port *tc, enum
> +intel_display_power_domain domain,
>  		intel_wakeref_t wakeref)
>  {
> -	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> +	struct drm_i915_private *i915 = tc_to_i915(tc);
> 
>  	/*
>  	 * wakeref == -1, means some error happened saving save_depot_stack
> but @@ -112,73 +125,76 @@ tc_cold_unblock(struct intel_digital_port
> *dig_port, enum intel_display_power_do  }
> 
>  static void
> -assert_tc_cold_blocked(struct intel_digital_port *dig_port)
> +assert_tc_cold_blocked(struct intel_tc_port *tc)
>  {
> -	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> +	struct drm_i915_private *i915 = tc_to_i915(tc);
>  	bool enabled;
> 
>  	enabled = intel_display_power_is_enabled(i915,
> -
> tc_cold_get_power_domain(dig_port,
> -
> dig_port->tc_mode));
> +
> tc_cold_get_power_domain(tc,
> +									  tc-
> >mode));
>  	drm_WARN_ON(&i915->drm, !enabled);
>  }
> 
>  static enum intel_display_power_domain
> -tc_port_power_domain(struct intel_digital_port *dig_port)
> +tc_port_power_domain(struct intel_tc_port *tc)
>  {
> -	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> -	enum tc_port tc_port = intel_port_to_tc(i915, dig_port->base.port);
> +	struct drm_i915_private *i915 = tc_to_i915(tc);
> +	enum tc_port tc_port = intel_port_to_tc(i915,
> +tc->dig_port->base.port);
> 
>  	return POWER_DOMAIN_PORT_DDI_LANES_TC1 + tc_port -
> TC_PORT_1;  }
> 
>  static void
> -assert_tc_port_power_enabled(struct intel_digital_port *dig_port)
> +assert_tc_port_power_enabled(struct intel_tc_port *tc)
>  {
> -	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> +	struct drm_i915_private *i915 = tc_to_i915(tc);
> 
>  	drm_WARN_ON(&i915->drm,
> -		    !intel_display_power_is_enabled(i915,
> tc_port_power_domain(dig_port)));
> +		    !intel_display_power_is_enabled(i915,
> tc_port_power_domain(tc)));
>  }
> 
>  u32 intel_tc_port_get_lane_mask(struct intel_digital_port *dig_port)  {
>  	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> +	struct intel_tc_port *tc = to_tc_port(dig_port);
>  	u32 lane_mask;
> 
> -	lane_mask = intel_de_read(i915, PORT_TX_DFLEXDPSP(dig_port-
> >tc_phy_fia));
> +	lane_mask = intel_de_read(i915, PORT_TX_DFLEXDPSP(tc->phy_fia));
> 
>  	drm_WARN_ON(&i915->drm, lane_mask == 0xffffffff);
> -	assert_tc_cold_blocked(dig_port);
> +	assert_tc_cold_blocked(tc);
> 
> -	lane_mask &= DP_LANE_ASSIGNMENT_MASK(dig_port-
> >tc_phy_fia_idx);
> -	return lane_mask >> DP_LANE_ASSIGNMENT_SHIFT(dig_port-
> >tc_phy_fia_idx);
> +	lane_mask &= DP_LANE_ASSIGNMENT_MASK(tc->phy_fia_idx);
> +	return lane_mask >> DP_LANE_ASSIGNMENT_SHIFT(tc->phy_fia_idx);
>  }
> 
>  u32 intel_tc_port_get_pin_assignment_mask(struct intel_digital_port
> *dig_port)  {
>  	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> +	struct intel_tc_port *tc = to_tc_port(dig_port);
>  	u32 pin_mask;
> 
> -	pin_mask = intel_de_read(i915, PORT_TX_DFLEXPA1(dig_port-
> >tc_phy_fia));
> +	pin_mask = intel_de_read(i915, PORT_TX_DFLEXPA1(tc->phy_fia));
> 
>  	drm_WARN_ON(&i915->drm, pin_mask == 0xffffffff);
> -	assert_tc_cold_blocked(dig_port);
> +	assert_tc_cold_blocked(tc);
> 
> -	return (pin_mask & DP_PIN_ASSIGNMENT_MASK(dig_port-
> >tc_phy_fia_idx)) >>
> -	       DP_PIN_ASSIGNMENT_SHIFT(dig_port->tc_phy_fia_idx);
> +	return (pin_mask & DP_PIN_ASSIGNMENT_MASK(tc->phy_fia_idx)) >>
> +	       DP_PIN_ASSIGNMENT_SHIFT(tc->phy_fia_idx);
>  }
> 
>  int intel_tc_port_fia_max_lane_count(struct intel_digital_port *dig_port)  {
>  	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> +	struct intel_tc_port *tc = to_tc_port(dig_port);
>  	intel_wakeref_t wakeref;
>  	u32 lane_mask;
> 
> -	if (dig_port->tc_mode != TC_PORT_DP_ALT)
> +	if (tc->mode != TC_PORT_DP_ALT)
>  		return 4;
> 
> -	assert_tc_cold_blocked(dig_port);
> +	assert_tc_cold_blocked(tc);
> 
>  	lane_mask = 0;
>  	with_intel_display_power(i915, POWER_DOMAIN_DISPLAY_CORE,
> wakeref) @@ -205,45 +221,46 @@ void
> intel_tc_port_set_fia_lane_count(struct intel_digital_port *dig_port,
>  				      int required_lanes)
>  {
>  	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> +	struct intel_tc_port *tc = to_tc_port(dig_port);
>  	bool lane_reversal = dig_port->saved_port_bits &
> DDI_BUF_PORT_REVERSAL;
>  	u32 val;
> 
>  	drm_WARN_ON(&i915->drm,
> -		    lane_reversal && dig_port->tc_mode != TC_PORT_LEGACY);
> +		    lane_reversal && tc->mode != TC_PORT_LEGACY);
> 
> -	assert_tc_cold_blocked(dig_port);
> +	assert_tc_cold_blocked(tc);
> 
> -	val = intel_de_read(i915, PORT_TX_DFLEXDPMLE1(dig_port-
> >tc_phy_fia));
> -	val &= ~DFLEXDPMLE1_DPMLETC_MASK(dig_port->tc_phy_fia_idx);
> +	val = intel_de_read(i915, PORT_TX_DFLEXDPMLE1(tc->phy_fia));
> +	val &= ~DFLEXDPMLE1_DPMLETC_MASK(tc->phy_fia_idx);
> 
>  	switch (required_lanes) {
>  	case 1:
>  		val |= lane_reversal ?
> -			DFLEXDPMLE1_DPMLETC_ML3(dig_port-
> >tc_phy_fia_idx) :
> -			DFLEXDPMLE1_DPMLETC_ML0(dig_port-
> >tc_phy_fia_idx);
> +			DFLEXDPMLE1_DPMLETC_ML3(tc->phy_fia_idx) :
> +			DFLEXDPMLE1_DPMLETC_ML0(tc->phy_fia_idx);
>  		break;
>  	case 2:
>  		val |= lane_reversal ?
> -			DFLEXDPMLE1_DPMLETC_ML3_2(dig_port-
> >tc_phy_fia_idx) :
> -			DFLEXDPMLE1_DPMLETC_ML1_0(dig_port-
> >tc_phy_fia_idx);
> +			DFLEXDPMLE1_DPMLETC_ML3_2(tc->phy_fia_idx) :
> +			DFLEXDPMLE1_DPMLETC_ML1_0(tc->phy_fia_idx);
>  		break;
>  	case 4:
> -		val |= DFLEXDPMLE1_DPMLETC_ML3_0(dig_port-
> >tc_phy_fia_idx);
> +		val |= DFLEXDPMLE1_DPMLETC_ML3_0(tc->phy_fia_idx);
>  		break;
>  	default:
>  		MISSING_CASE(required_lanes);
>  	}
> 
> -	intel_de_write(i915, PORT_TX_DFLEXDPMLE1(dig_port->tc_phy_fia),
> val);
> +	intel_de_write(i915, PORT_TX_DFLEXDPMLE1(tc->phy_fia), val);
>  }
> 
> -static void tc_port_fixup_legacy_flag(struct intel_digital_port *dig_port,
> +static void tc_port_fixup_legacy_flag(struct intel_tc_port *tc,
>  				      u32 live_status_mask)
>  {
> -	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> +	struct drm_i915_private *i915 = tc_to_i915(tc);
>  	u32 valid_hpd_mask;
> 
> -	if (dig_port->tc_legacy_port)
> +	if (tc->legacy_port)
>  		valid_hpd_mask = BIT(TC_PORT_LEGACY);
>  	else
>  		valid_hpd_mask = BIT(TC_PORT_DP_ALT) | @@ -255,34
> +272,35 @@ static void tc_port_fixup_legacy_flag(struct intel_digital_port
> *dig_port,
>  	/* If live status mismatches the VBT flag, trust the live status. */
>  	drm_dbg_kms(&i915->drm,
>  		    "Port %s: live status %08x mismatches the legacy port flag
> %08x, fixing flag\n",
> -		    dig_port->tc_port_name, live_status_mask, valid_hpd_mask);
> +		    tc->port_name, live_status_mask, valid_hpd_mask);
> 
> -	dig_port->tc_legacy_port = !dig_port->tc_legacy_port;
> +	tc->legacy_port = !tc->legacy_port;
>  }
> 
>  /**
>   * ICL TC PHY handlers
>   * -------------------
>   */
> -static u32 icl_tc_phy_hpd_live_status(struct intel_digital_port *dig_port)
> +static u32 icl_tc_phy_hpd_live_status(struct intel_tc_port *tc)
>  {
> -	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> +	struct drm_i915_private *i915 = tc_to_i915(tc);
> +	struct intel_digital_port *dig_port = tc->dig_port;
>  	u32 isr_bit = i915->display.hotplug.pch_hpd[dig_port->base.hpd_pin];
>  	u32 mask = 0;
>  	u32 val;
> 
> -	val = intel_de_read(i915, PORT_TX_DFLEXDPSP(dig_port->tc_phy_fia));
> +	val = intel_de_read(i915, PORT_TX_DFLEXDPSP(tc->phy_fia));
> 
>  	if (val == 0xffffffff) {
>  		drm_dbg_kms(&i915->drm,
>  			    "Port %s: PHY in TCCOLD, nothing connected\n",
> -			    dig_port->tc_port_name);
> +			    tc->port_name);
>  		return mask;
>  	}
> 
> -	if (val & TC_LIVE_STATE_TBT(dig_port->tc_phy_fia_idx))
> +	if (val & TC_LIVE_STATE_TBT(tc->phy_fia_idx))
>  		mask |= BIT(TC_PORT_TBT_ALT);
> -	if (val & TC_LIVE_STATE_TC(dig_port->tc_phy_fia_idx))
> +	if (val & TC_LIVE_STATE_TC(tc->phy_fia_idx))
>  		mask |= BIT(TC_PORT_DP_ALT);
> 
>  	if (intel_de_read(i915, SDEISR) & isr_bit) @@ -290,7 +308,7 @@ static
> u32 icl_tc_phy_hpd_live_status(struct intel_digital_port *dig_port)
> 
>  	/* The sink can be connected only in a single mode. */
>  	if (!drm_WARN_ON_ONCE(&i915->drm, hweight32(mask) > 1))
> -		tc_port_fixup_legacy_flag(dig_port, mask);
> +		tc_port_fixup_legacy_flag(tc, mask);
> 
>  	return mask;
>  }
> @@ -303,60 +321,60 @@ static u32 icl_tc_phy_hpd_live_status(struct
> intel_digital_port *dig_port)
>   * owned by the TBT subsystem and so switching the ownership to display is not
>   * required.
>   */
> -static bool icl_tc_phy_is_ready(struct intel_digital_port *dig_port)
> +static bool icl_tc_phy_is_ready(struct intel_tc_port *tc)
>  {
> -	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> +	struct drm_i915_private *i915 = tc_to_i915(tc);
>  	u32 val;
> 
> -	val = intel_de_read(i915, PORT_TX_DFLEXDPPMS(dig_port-
> >tc_phy_fia));
> +	val = intel_de_read(i915, PORT_TX_DFLEXDPPMS(tc->phy_fia));
>  	if (val == 0xffffffff) {
>  		drm_dbg_kms(&i915->drm,
>  			    "Port %s: PHY in TCCOLD, assuming not ready\n",
> -			    dig_port->tc_port_name);
> +			    tc->port_name);
>  		return false;
>  	}
> 
> -	return val & DP_PHY_MODE_STATUS_COMPLETED(dig_port-
> >tc_phy_fia_idx);
> +	return val & DP_PHY_MODE_STATUS_COMPLETED(tc->phy_fia_idx);
>  }
> 
> -static bool icl_tc_phy_take_ownership(struct intel_digital_port *dig_port,
> +static bool icl_tc_phy_take_ownership(struct intel_tc_port *tc,
>  				      bool take)
>  {
> -	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> +	struct drm_i915_private *i915 = tc_to_i915(tc);
>  	u32 val;
> 
> -	val = intel_de_read(i915, PORT_TX_DFLEXDPCSSS(dig_port-
> >tc_phy_fia));
> +	val = intel_de_read(i915, PORT_TX_DFLEXDPCSSS(tc->phy_fia));
>  	if (val == 0xffffffff) {
>  		drm_dbg_kms(&i915->drm,
>  			    "Port %s: PHY in TCCOLD, can't %s ownership\n",
> -			    dig_port->tc_port_name, take ? "take" : "release");
> +			    tc->port_name, take ? "take" : "release");
> 
>  		return false;
>  	}
> 
> -	val &= ~DP_PHY_MODE_STATUS_NOT_SAFE(dig_port->tc_phy_fia_idx);
> +	val &= ~DP_PHY_MODE_STATUS_NOT_SAFE(tc->phy_fia_idx);
>  	if (take)
> -		val |= DP_PHY_MODE_STATUS_NOT_SAFE(dig_port-
> >tc_phy_fia_idx);
> +		val |= DP_PHY_MODE_STATUS_NOT_SAFE(tc->phy_fia_idx);
> 
> -	intel_de_write(i915, PORT_TX_DFLEXDPCSSS(dig_port->tc_phy_fia),
> val);
> +	intel_de_write(i915, PORT_TX_DFLEXDPCSSS(tc->phy_fia), val);
> 
>  	return true;
>  }
> 
> -static bool icl_tc_phy_is_owned(struct intel_digital_port *dig_port)
> +static bool icl_tc_phy_is_owned(struct intel_tc_port *tc)
>  {
> -	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> +	struct drm_i915_private *i915 = tc_to_i915(tc);
>  	u32 val;
> 
> -	val = intel_de_read(i915, PORT_TX_DFLEXDPCSSS(dig_port-
> >tc_phy_fia));
> +	val = intel_de_read(i915, PORT_TX_DFLEXDPCSSS(tc->phy_fia));
>  	if (val == 0xffffffff) {
>  		drm_dbg_kms(&i915->drm,
>  			    "Port %s: PHY in TCCOLD, assume not owned\n",
> -			    dig_port->tc_port_name);
> +			    tc->port_name);
>  		return false;
>  	}
> 
> -	return val & DP_PHY_MODE_STATUS_NOT_SAFE(dig_port-
> >tc_phy_fia_idx);
> +	return val & DP_PHY_MODE_STATUS_NOT_SAFE(tc->phy_fia_idx);
>  }
> 
>  /*
> @@ -370,36 +388,37 @@ static bool icl_tc_phy_is_owned(struct
> intel_digital_port *dig_port)
>   * connect and disconnect to cleanly transfer ownership with the controller and
>   * set the type-C power state.
>   */
> -static void icl_tc_phy_connect(struct intel_digital_port *dig_port,
> +static void icl_tc_phy_connect(struct intel_tc_port *tc,
>  			       int required_lanes)
>  {
> -	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> +	struct drm_i915_private *i915 = tc_to_i915(tc);
> +	struct intel_digital_port *dig_port = tc->dig_port;
>  	u32 live_status_mask;
>  	int max_lanes;
> 
> -	if (!tc_phy_is_ready(dig_port) &&
> -	    !drm_WARN_ON(&i915->drm, dig_port->tc_legacy_port)) {
> +	if (!tc_phy_is_ready(tc) &&
> +	    !drm_WARN_ON(&i915->drm, tc->legacy_port)) {
>  		drm_dbg_kms(&i915->drm, "Port %s: PHY not ready\n",
> -			    dig_port->tc_port_name);
> +			    tc->port_name);
>  		goto out_set_tbt_alt_mode;
>  	}
> 
> -	live_status_mask = tc_phy_hpd_live_status(dig_port);
> +	live_status_mask = tc_phy_hpd_live_status(tc);
>  	if (!(live_status_mask & (BIT(TC_PORT_DP_ALT) |
> BIT(TC_PORT_LEGACY))) &&
> -	    !dig_port->tc_legacy_port) {
> +	    !tc->legacy_port) {
>  		drm_dbg_kms(&i915->drm, "Port %s: PHY ownership not
> required (live status %02x)\n",
> -			    dig_port->tc_port_name, live_status_mask);
> +			    tc->port_name, live_status_mask);
>  		goto out_set_tbt_alt_mode;
>  	}
> 
> -	if (!tc_phy_take_ownership(dig_port, true) &&
> -	    !drm_WARN_ON(&i915->drm, dig_port->tc_legacy_port))
> +	if (!tc_phy_take_ownership(tc, true) &&
> +	    !drm_WARN_ON(&i915->drm, tc->legacy_port))
>  		goto out_set_tbt_alt_mode;
> 
>  	max_lanes = intel_tc_port_fia_max_lane_count(dig_port);
> -	if (dig_port->tc_legacy_port) {
> +	if (tc->legacy_port) {
>  		drm_WARN_ON(&i915->drm, max_lanes != 4);
> -		dig_port->tc_mode = TC_PORT_LEGACY;
> +		tc->mode = TC_PORT_LEGACY;
> 
>  		return;
>  	}
> @@ -408,48 +427,48 @@ static void icl_tc_phy_connect(struct
> intel_digital_port *dig_port,
>  	 * Now we have to re-check the live state, in case the port recently
>  	 * became disconnected. Not necessary for legacy mode.
>  	 */
> -	if (!(tc_phy_hpd_live_status(dig_port) & BIT(TC_PORT_DP_ALT))) {
> +	if (!(tc_phy_hpd_live_status(tc) & BIT(TC_PORT_DP_ALT))) {
>  		drm_dbg_kms(&i915->drm, "Port %s: PHY sudden
> disconnect\n",
> -			    dig_port->tc_port_name);
> +			    tc->port_name);
>  		goto out_release_phy;
>  	}
> 
>  	if (max_lanes < required_lanes) {
>  		drm_dbg_kms(&i915->drm,
>  			    "Port %s: PHY max lanes %d < required lanes %d\n",
> -			    dig_port->tc_port_name,
> +			    tc->port_name,
>  			    max_lanes, required_lanes);
>  		goto out_release_phy;
>  	}
> 
> -	dig_port->tc_mode = TC_PORT_DP_ALT;
> +	tc->mode = TC_PORT_DP_ALT;
> 
>  	return;
> 
>  out_release_phy:
> -	tc_phy_take_ownership(dig_port, false);
> +	tc_phy_take_ownership(tc, false);
>  out_set_tbt_alt_mode:
> -	dig_port->tc_mode = TC_PORT_TBT_ALT;
> +	tc->mode = TC_PORT_TBT_ALT;
>  }
> 
>  /*
>   * See the comment at the connect function. This implements the Disconnect
>   * Flow.
>   */
> -static void icl_tc_phy_disconnect(struct intel_digital_port *dig_port)
> +static void icl_tc_phy_disconnect(struct intel_tc_port *tc)
>  {
> -	switch (dig_port->tc_mode) {
> +	switch (tc->mode) {
>  	case TC_PORT_LEGACY:
>  	case TC_PORT_DP_ALT:
> -		tc_phy_take_ownership(dig_port, false);
> +		tc_phy_take_ownership(tc, false);
>  		fallthrough;
>  	case TC_PORT_TBT_ALT:
> -		dig_port->tc_mode = TC_PORT_DISCONNECTED;
> +		tc->mode = TC_PORT_DISCONNECTED;
>  		fallthrough;
>  	case TC_PORT_DISCONNECTED:
>  		break;
>  	default:
> -		MISSING_CASE(dig_port->tc_mode);
> +		MISSING_CASE(tc->mode);
>  	}
>  }
> 
> @@ -457,9 +476,10 @@ static void icl_tc_phy_disconnect(struct
> intel_digital_port *dig_port)
>   * ADLP TC PHY handlers
>   * --------------------
>   */
> -static u32 adlp_tc_phy_hpd_live_status(struct intel_digital_port *dig_port)
> +static u32 adlp_tc_phy_hpd_live_status(struct intel_tc_port *tc)
>  {
> -	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> +	struct drm_i915_private *i915 = tc_to_i915(tc);
> +	struct intel_digital_port *dig_port = tc->dig_port;
>  	enum tc_port tc_port = intel_port_to_tc(i915, dig_port->base.port);
>  	u32 isr_bit = i915->display.hotplug.pch_hpd[dig_port->base.hpd_pin];
>  	u32 val, mask = 0;
> @@ -480,7 +500,7 @@ static u32 adlp_tc_phy_hpd_live_status(struct
> intel_digital_port *dig_port)
> 
>  	/* The sink can be connected only in a single mode. */
>  	if (!drm_WARN_ON(&i915->drm, hweight32(mask) > 1))
> -		tc_port_fixup_legacy_flag(dig_port, mask);
> +		tc_port_fixup_legacy_flag(tc, mask);
> 
>  	return mask;
>  }
> @@ -492,28 +512,28 @@ static u32 adlp_tc_phy_hpd_live_status(struct
> intel_digital_port *dig_port)
>   * DP-alt, legacy or nothing). For TBT-alt sinks the PHY is owned by the TBT
>   * subsystem and so switching the ownership to display is not required.
>   */
> -static bool adlp_tc_phy_is_ready(struct intel_digital_port *dig_port)
> +static bool adlp_tc_phy_is_ready(struct intel_tc_port *tc)
>  {
> -	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> -	enum tc_port tc_port = intel_port_to_tc(i915, dig_port->base.port);
> +	struct drm_i915_private *i915 = tc_to_i915(tc);
> +	enum tc_port tc_port = intel_port_to_tc(i915,
> +tc->dig_port->base.port);
>  	u32 val;
> 
>  	val = intel_de_read(i915, TCSS_DDI_STATUS(tc_port));
>  	if (val == 0xffffffff) {
>  		drm_dbg_kms(&i915->drm,
>  			    "Port %s: PHY in TCCOLD, assuming not ready\n",
> -			    dig_port->tc_port_name);
> +			    tc->port_name);
>  		return false;
>  	}
> 
>  	return val & TCSS_DDI_STATUS_READY;
>  }
> 
> -static bool adlp_tc_phy_take_ownership(struct intel_digital_port *dig_port,
> +static bool adlp_tc_phy_take_ownership(struct intel_tc_port *tc,
>  				       bool take)
>  {
> -	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> -	enum port port = dig_port->base.port;
> +	struct drm_i915_private *i915 = tc_to_i915(tc);
> +	enum port port = tc->dig_port->base.port;
> 
>  	intel_de_rmw(i915, DDI_BUF_CTL(port),
> DDI_BUF_CTL_TC_PHY_OWNERSHIP,
>  		     take ? DDI_BUF_CTL_TC_PHY_OWNERSHIP : 0); @@ -521,10
> +541,10 @@ static bool adlp_tc_phy_take_ownership(struct intel_digital_port
> *dig_port,
>  	return true;
>  }
> 
> -static bool adlp_tc_phy_is_owned(struct intel_digital_port *dig_port)
> +static bool adlp_tc_phy_is_owned(struct intel_tc_port *tc)
>  {
> -	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> -	enum port port = dig_port->base.port;
> +	struct drm_i915_private *i915 = tc_to_i915(tc);
> +	enum port port = tc->dig_port->base.port;
>  	u32 val;
> 
>  	val = intel_de_read(i915, DDI_BUF_CTL(port)); @@ -535,73 +555,73
> @@ static bool adlp_tc_phy_is_owned(struct intel_digital_port *dig_port)
>   * Generic TC PHY handlers
>   * -----------------------
>   */
> -static u32 tc_phy_hpd_live_status(struct intel_digital_port *dig_port)
> +static u32 tc_phy_hpd_live_status(struct intel_tc_port *tc)
>  {
> -	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> +	struct drm_i915_private *i915 = tc_to_i915(tc);
> 
>  	if (IS_ALDERLAKE_P(i915))
> -		return adlp_tc_phy_hpd_live_status(dig_port);
> +		return adlp_tc_phy_hpd_live_status(tc);
> 
> -	return icl_tc_phy_hpd_live_status(dig_port);
> +	return icl_tc_phy_hpd_live_status(tc);
>  }
> 
> -static bool tc_phy_is_ready(struct intel_digital_port *dig_port)
> +static bool tc_phy_is_ready(struct intel_tc_port *tc)
>  {
> -	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> +	struct drm_i915_private *i915 = tc_to_i915(tc);
> 
>  	if (IS_ALDERLAKE_P(i915))
> -		return adlp_tc_phy_is_ready(dig_port);
> +		return adlp_tc_phy_is_ready(tc);
> 
> -	return icl_tc_phy_is_ready(dig_port);
> +	return icl_tc_phy_is_ready(tc);
>  }
> 
> -static bool tc_phy_is_owned(struct intel_digital_port *dig_port)
> +static bool tc_phy_is_owned(struct intel_tc_port *tc)
>  {
> -	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> +	struct drm_i915_private *i915 = tc_to_i915(tc);
> 
>  	if (IS_ALDERLAKE_P(i915))
> -		return adlp_tc_phy_is_owned(dig_port);
> +		return adlp_tc_phy_is_owned(tc);
> 
> -	return icl_tc_phy_is_owned(dig_port);
> +	return icl_tc_phy_is_owned(tc);
>  }
> 
> -static bool tc_phy_take_ownership(struct intel_digital_port *dig_port, bool
> take)
> +static bool tc_phy_take_ownership(struct intel_tc_port *tc, bool take)
>  {
> -	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> +	struct drm_i915_private *i915 = tc_to_i915(tc);
> 
>  	if (IS_ALDERLAKE_P(i915))
> -		return adlp_tc_phy_take_ownership(dig_port, take);
> +		return adlp_tc_phy_take_ownership(tc, take);
> 
> -	return icl_tc_phy_take_ownership(dig_port, take);
> +	return icl_tc_phy_take_ownership(tc, take);
>  }
> 
> -static bool tc_phy_is_ready_and_owned(struct intel_digital_port *dig_port,
> +static bool tc_phy_is_ready_and_owned(struct intel_tc_port *tc,
>  				      bool phy_is_ready, bool phy_is_owned)  {
> -	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> +	struct drm_i915_private *i915 = tc_to_i915(tc);
> 
>  	drm_WARN_ON(&i915->drm, phy_is_owned && !phy_is_ready);
> 
>  	return phy_is_ready && phy_is_owned;
>  }
> 
> -static bool tc_phy_is_connected(struct intel_digital_port *dig_port,
> +static bool tc_phy_is_connected(struct intel_tc_port *tc,
>  				enum icl_port_dpll_id port_pll_type)  {
> -	struct intel_encoder *encoder = &dig_port->base;
> +	struct intel_encoder *encoder = &tc->dig_port->base;
>  	struct drm_i915_private *i915 = to_i915(encoder->base.dev);
> -	bool phy_is_ready = tc_phy_is_ready(dig_port);
> -	bool phy_is_owned = tc_phy_is_owned(dig_port);
> +	bool phy_is_ready = tc_phy_is_ready(tc);
> +	bool phy_is_owned = tc_phy_is_owned(tc);
>  	bool is_connected;
> 
> -	if (tc_phy_is_ready_and_owned(dig_port, phy_is_ready,
> phy_is_owned))
> +	if (tc_phy_is_ready_and_owned(tc, phy_is_ready, phy_is_owned))
>  		is_connected = port_pll_type == ICL_PORT_DPLL_MG_PHY;
>  	else
>  		is_connected = port_pll_type == ICL_PORT_DPLL_DEFAULT;
> 
>  	drm_dbg_kms(&i915->drm,
>  		    "Port %s: PHY connected: %s (ready: %s, owned: %s, pll_type:
> %s)\n",
> -		    dig_port->tc_port_name,
> +		    tc->port_name,
>  		    str_yes_no(is_connected),
>  		    str_yes_no(phy_is_ready),
>  		    str_yes_no(phy_is_owned),
> @@ -610,13 +630,13 @@ static bool tc_phy_is_connected(struct
> intel_digital_port *dig_port,
>  	return is_connected;
>  }
> 
> -static void tc_phy_wait_for_ready(struct intel_digital_port *dig_port)
> +static void tc_phy_wait_for_ready(struct intel_tc_port *tc)
>  {
> -	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> +	struct drm_i915_private *i915 = tc_to_i915(tc);
> 
> -	if (wait_for(tc_phy_is_ready(dig_port), 100))
> +	if (wait_for(tc_phy_is_ready(tc), 100))
>  		drm_err(&i915->drm, "Port %s: timeout waiting for PHY
> ready\n",
> -			dig_port->tc_port_name);
> +			tc->port_name);
>  }
> 
>  static enum tc_port_mode
> @@ -629,15 +649,15 @@ hpd_mask_to_tc_mode(u32 live_status_mask)  }
> 
>  static enum tc_port_mode
> -tc_phy_hpd_live_mode(struct intel_digital_port *dig_port)
> +tc_phy_hpd_live_mode(struct intel_tc_port *tc)
>  {
> -	u32 live_status_mask = tc_phy_hpd_live_status(dig_port);
> +	u32 live_status_mask = tc_phy_hpd_live_status(tc);
> 
>  	return hpd_mask_to_tc_mode(live_status_mask);
>  }
> 
>  static enum tc_port_mode
> -get_tc_mode_in_phy_owned_state(struct intel_digital_port *dig_port,
> +get_tc_mode_in_phy_owned_state(struct intel_tc_port *tc,
>  			       enum tc_port_mode live_mode)
>  {
>  	switch (live_mode) {
> @@ -649,7 +669,7 @@ get_tc_mode_in_phy_owned_state(struct
> intel_digital_port *dig_port,
>  		fallthrough;
>  	case TC_PORT_TBT_ALT:
>  	case TC_PORT_DISCONNECTED:
> -		if (dig_port->tc_legacy_port)
> +		if (tc->legacy_port)
>  			return TC_PORT_LEGACY;
>  		else
>  			return TC_PORT_DP_ALT;
> @@ -657,7 +677,7 @@ get_tc_mode_in_phy_owned_state(struct
> intel_digital_port *dig_port,  }
> 
>  static enum tc_port_mode
> -get_tc_mode_in_phy_not_owned_state(struct intel_digital_port *dig_port,
> +get_tc_mode_in_phy_not_owned_state(struct intel_tc_port *tc,
>  				   enum tc_port_mode live_mode)
>  {
>  	switch (live_mode) {
> @@ -670,7 +690,7 @@ get_tc_mode_in_phy_not_owned_state(struct
> intel_digital_port *dig_port,
>  		MISSING_CASE(live_mode);
>  		fallthrough;
>  	case TC_PORT_DISCONNECTED:
> -		if (dig_port->tc_legacy_port)
> +		if (tc->legacy_port)
>  			return TC_PORT_DISCONNECTED;
>  		else
>  			return TC_PORT_TBT_ALT;
> @@ -678,10 +698,10 @@ get_tc_mode_in_phy_not_owned_state(struct
> intel_digital_port *dig_port,  }
> 
>  static enum tc_port_mode
> -tc_phy_get_current_mode(struct intel_digital_port *dig_port)
> +tc_phy_get_current_mode(struct intel_tc_port *tc)
>  {
> -	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> -	enum tc_port_mode live_mode = tc_phy_hpd_live_mode(dig_port);
> +	struct drm_i915_private *i915 = tc_to_i915(tc);
> +	enum tc_port_mode live_mode = tc_phy_hpd_live_mode(tc);
>  	bool phy_is_ready;
>  	bool phy_is_owned;
>  	enum tc_port_mode mode;
> @@ -691,22 +711,22 @@ tc_phy_get_current_mode(struct intel_digital_port
> *dig_port)
>  	 * and system resume whether or not a sink is connected. Wait here for
>  	 * the initialization to get ready.
>  	 */
> -	if (dig_port->tc_legacy_port)
> -		tc_phy_wait_for_ready(dig_port);
> +	if (tc->legacy_port)
> +		tc_phy_wait_for_ready(tc);
> 
> -	phy_is_ready = tc_phy_is_ready(dig_port);
> -	phy_is_owned = tc_phy_is_owned(dig_port);
> +	phy_is_ready = tc_phy_is_ready(tc);
> +	phy_is_owned = tc_phy_is_owned(tc);
> 
> -	if (!tc_phy_is_ready_and_owned(dig_port, phy_is_ready,
> phy_is_owned)) {
> -		mode = get_tc_mode_in_phy_not_owned_state(dig_port,
> live_mode);
> +	if (!tc_phy_is_ready_and_owned(tc, phy_is_ready, phy_is_owned)) {
> +		mode = get_tc_mode_in_phy_not_owned_state(tc, live_mode);
>  	} else {
>  		drm_WARN_ON(&i915->drm, live_mode ==
> TC_PORT_TBT_ALT);
> -		mode = get_tc_mode_in_phy_owned_state(dig_port,
> live_mode);
> +		mode = get_tc_mode_in_phy_owned_state(tc, live_mode);
>  	}
> 
>  	drm_dbg_kms(&i915->drm,
>  		    "Port %s: PHY mode: %s (ready: %s, owned: %s, HPD: %s)\n",
> -		    dig_port->tc_port_name,
> +		    tc->port_name,
>  		    tc_port_mode_name(mode),
>  		    str_yes_no(phy_is_ready),
>  		    str_yes_no(phy_is_owned),
> @@ -715,38 +735,39 @@ tc_phy_get_current_mode(struct intel_digital_port
> *dig_port)
>  	return mode;
>  }
> 
> -static enum tc_port_mode default_tc_mode(struct intel_digital_port *dig_port)
> +static enum tc_port_mode default_tc_mode(struct intel_tc_port *tc)
>  {
> -	if (dig_port->tc_legacy_port)
> +	if (tc->legacy_port)
>  		return TC_PORT_LEGACY;
> 
>  	return TC_PORT_TBT_ALT;
>  }
> 
>  static enum tc_port_mode
> -hpd_mask_to_target_mode(struct intel_digital_port *dig_port, u32
> live_status_mask)
> +hpd_mask_to_target_mode(struct intel_tc_port *tc, u32 live_status_mask)
>  {
>  	enum tc_port_mode mode = hpd_mask_to_tc_mode(live_status_mask);
> 
>  	if (mode != TC_PORT_DISCONNECTED)
>  		return mode;
> 
> -	return default_tc_mode(dig_port);
> +	return default_tc_mode(tc);
>  }
> 
>  static enum tc_port_mode
> -tc_phy_get_target_mode(struct intel_digital_port *dig_port)
> +tc_phy_get_target_mode(struct intel_tc_port *tc)
>  {
> -	u32 live_status_mask = tc_phy_hpd_live_status(dig_port);
> +	u32 live_status_mask = tc_phy_hpd_live_status(tc);
> 
> -	return hpd_mask_to_target_mode(dig_port, live_status_mask);
> +	return hpd_mask_to_target_mode(tc, live_status_mask);
>  }
> 
> -static void intel_tc_port_reset_mode(struct intel_digital_port *dig_port,
> +static void intel_tc_port_reset_mode(struct intel_tc_port *tc,
>  				     int required_lanes, bool force_disconnect)  {
> -	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> -	enum tc_port_mode old_tc_mode = dig_port->tc_mode;
> +	struct drm_i915_private *i915 = tc_to_i915(tc);
> +	struct intel_digital_port *dig_port = tc->dig_port;
> +	enum tc_port_mode old_tc_mode = tc->mode;
> 
>  	intel_display_power_flush_work(i915);
>  	if (!intel_tc_cold_requires_aux_pw(dig_port)) { @@ -758,22 +779,22
> @@ static void intel_tc_port_reset_mode(struct intel_digital_port *dig_port,
>  		drm_WARN_ON(&i915->drm, aux_powered);
>  	}
> 
> -	icl_tc_phy_disconnect(dig_port);
> +	icl_tc_phy_disconnect(tc);
>  	if (!force_disconnect)
> -		icl_tc_phy_connect(dig_port, required_lanes);
> +		icl_tc_phy_connect(tc, required_lanes);
> 
>  	drm_dbg_kms(&i915->drm, "Port %s: TC port mode reset (%s -> %s)\n",
> -		    dig_port->tc_port_name,
> +		    tc->port_name,
>  		    tc_port_mode_name(old_tc_mode),
> -		    tc_port_mode_name(dig_port->tc_mode));
> +		    tc_port_mode_name(tc->mode));
>  }
> 
> -static bool intel_tc_port_needs_reset(struct intel_digital_port *dig_port)
> +static bool intel_tc_port_needs_reset(struct intel_tc_port *tc)
>  {
> -	return tc_phy_get_target_mode(dig_port) != dig_port->tc_mode;
> +	return tc_phy_get_target_mode(tc) != tc->mode;
>  }
> 
> -static void intel_tc_port_update_mode(struct intel_digital_port *dig_port,
> +static void intel_tc_port_update_mode(struct intel_tc_port *tc,
>  				      int required_lanes, bool force_disconnect)  {
>  	enum intel_display_power_domain domain; @@ -782,44 +803,44 @@
> static void intel_tc_port_update_mode(struct intel_digital_port *dig_port,
> 
>  	if (!needs_reset) {
>  		/* Get power domain required to check the hotplug live status.
> */
> -		wref = tc_cold_block(dig_port, &domain);
> -		needs_reset = intel_tc_port_needs_reset(dig_port);
> -		tc_cold_unblock(dig_port, domain, wref);
> +		wref = tc_cold_block(tc, &domain);
> +		needs_reset = intel_tc_port_needs_reset(tc);
> +		tc_cold_unblock(tc, domain, wref);
>  	}
> 
>  	if (!needs_reset)
>  		return;
> 
>  	/* Get power domain required for resetting the mode. */
> -	wref = tc_cold_block_in_mode(dig_port, TC_PORT_DISCONNECTED,
> &domain);
> +	wref = tc_cold_block_in_mode(tc, TC_PORT_DISCONNECTED,
> &domain);
> 
> -	intel_tc_port_reset_mode(dig_port, required_lanes, force_disconnect);
> +	intel_tc_port_reset_mode(tc, required_lanes, force_disconnect);
> 
>  	/* Get power domain matching the new mode after reset. */
> -	tc_cold_unblock(dig_port, dig_port->tc_lock_power_domain,
> -			fetch_and_zero(&dig_port->tc_lock_wakeref));
> -	if (dig_port->tc_mode != TC_PORT_DISCONNECTED)
> -		dig_port->tc_lock_wakeref = tc_cold_block(dig_port,
> -							  &dig_port-
> >tc_lock_power_domain);
> +	tc_cold_unblock(tc, tc->lock_power_domain,
> +			fetch_and_zero(&tc->lock_wakeref));
> +	if (tc->mode != TC_PORT_DISCONNECTED)
> +		tc->lock_wakeref = tc_cold_block(tc, &tc-
> >lock_power_domain);
> 
> -	tc_cold_unblock(dig_port, domain, wref);
> +	tc_cold_unblock(tc, domain, wref);
>  }
> 
> -static void __intel_tc_port_get_link(struct intel_digital_port *dig_port)
> +static void __intel_tc_port_get_link(struct intel_tc_port *tc)
>  {
> -	dig_port->tc_link_refcount++;
> +	tc->link_refcount++;
>  }
> 
> -static void __intel_tc_port_put_link(struct intel_digital_port *dig_port)
> +static void __intel_tc_port_put_link(struct intel_tc_port *tc)
>  {
> -	dig_port->tc_link_refcount--;
> +	tc->link_refcount--;
>  }
> 
> -static bool tc_port_is_enabled(struct intel_digital_port *dig_port)
> +static bool tc_port_is_enabled(struct intel_tc_port *tc)
>  {
> -	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> +	struct drm_i915_private *i915 = tc_to_i915(tc);
> +	struct intel_digital_port *dig_port = tc->dig_port;
> 
> -	assert_tc_port_power_enabled(dig_port);
> +	assert_tc_port_power_enabled(tc);
> 
>  	return intel_de_read(i915, DDI_BUF_CTL(dig_port->base.port)) &
>  	       DDI_BUF_CTL_ENABLE;
> @@ -835,27 +856,28 @@ static bool tc_port_is_enabled(struct
> intel_digital_port *dig_port)  void intel_tc_port_init_mode(struct
> intel_digital_port *dig_port)  {
>  	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> +	struct intel_tc_port *tc = to_tc_port(dig_port);
>  	intel_wakeref_t tc_cold_wref;
>  	enum intel_display_power_domain domain;
>  	bool update_mode = false;
> 
> -	mutex_lock(&dig_port->tc_lock);
> +	mutex_lock(&tc->lock);
> 
> -	drm_WARN_ON(&i915->drm, dig_port->tc_mode !=
> TC_PORT_DISCONNECTED);
> -	drm_WARN_ON(&i915->drm, dig_port->tc_lock_wakeref);
> -	drm_WARN_ON(&i915->drm, dig_port->tc_link_refcount);
> +	drm_WARN_ON(&i915->drm, tc->mode != TC_PORT_DISCONNECTED);
> +	drm_WARN_ON(&i915->drm, tc->lock_wakeref);
> +	drm_WARN_ON(&i915->drm, tc->link_refcount);
> 
> -	tc_cold_wref = tc_cold_block(dig_port, &domain);
> +	tc_cold_wref = tc_cold_block(tc, &domain);
> 
> -	dig_port->tc_mode = tc_phy_get_current_mode(dig_port);
> +	tc->mode = tc_phy_get_current_mode(tc);
>  	/*
>  	 * Save the initial mode for the state check in
>  	 * intel_tc_port_sanitize_mode().
>  	 */
> -	dig_port->tc_init_mode = dig_port->tc_mode;
> -	if (dig_port->tc_mode != TC_PORT_DISCONNECTED)
> -		dig_port->tc_lock_wakeref =
> -			tc_cold_block(dig_port, &dig_port-
> >tc_lock_power_domain);
> +	tc->init_mode = tc->mode;
> +	if (tc->mode != TC_PORT_DISCONNECTED)
> +		tc->lock_wakeref =
> +			tc_cold_block(tc, &tc->lock_power_domain);
> 
>  	/*
>  	 * The PHY needs to be connected for AUX to work during HW readout
> and @@ -868,31 +890,32 @@ void intel_tc_port_init_mode(struct
> intel_digital_port *dig_port)
>  	 * cause a problem as the PHY ownership state is ignored by the
>  	 * IOM/TCSS firmware (only display can own the PHY in that case).
>  	 */
> -	if (!tc_port_is_enabled(dig_port)) {
> +	if (!tc_port_is_enabled(tc)) {
>  		update_mode = true;
> -	} else if (dig_port->tc_mode == TC_PORT_DISCONNECTED) {
> -		drm_WARN_ON(&i915->drm, !dig_port->tc_legacy_port);
> +	} else if (tc->mode == TC_PORT_DISCONNECTED) {
> +		drm_WARN_ON(&i915->drm, !tc->legacy_port);
>  		drm_err(&i915->drm,
>  			"Port %s: PHY disconnected on enabled port,
> connecting it\n",
> -			dig_port->tc_port_name);
> +			tc->port_name);
>  		update_mode = true;
>  	}
> 
>  	if (update_mode)
> -		intel_tc_port_update_mode(dig_port, 1, false);
> +		intel_tc_port_update_mode(tc, 1, false);
> 
> -	/* Prevent changing dig_port->tc_mode until
> intel_tc_port_sanitize_mode() is called. */
> -	__intel_tc_port_get_link(dig_port);
> +	/* Prevent changing tc->mode until intel_tc_port_sanitize_mode() is
> called. */
> +	__intel_tc_port_get_link(tc);
> 
> -	tc_cold_unblock(dig_port, domain, tc_cold_wref);
> +	tc_cold_unblock(tc, domain, tc_cold_wref);
> 
> -	mutex_unlock(&dig_port->tc_lock);
> +	mutex_unlock(&tc->lock);
>  }
> 
> -static bool tc_port_has_active_links(struct intel_digital_port *dig_port,
> +static bool tc_port_has_active_links(struct intel_tc_port *tc,
>  				     const struct intel_crtc_state *crtc_state)  {
> -	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> +	struct drm_i915_private *i915 = tc_to_i915(tc);
> +	struct intel_digital_port *dig_port = tc->dig_port;
>  	enum icl_port_dpll_id pll_type = ICL_PORT_DPLL_DEFAULT;
>  	int active_links = 0;
> 
> @@ -904,10 +927,10 @@ static bool tc_port_has_active_links(struct
> intel_digital_port *dig_port,
>  		active_links = 1;
>  	}
> 
> -	if (active_links && !tc_phy_is_connected(dig_port, pll_type))
> +	if (active_links && !tc_phy_is_connected(tc, pll_type))
>  		drm_err(&i915->drm,
>  			"Port %s: PHY disconnected with %d active link(s)\n",
> -			dig_port->tc_port_name, active_links);
> +			tc->port_name, active_links);
> 
>  	return active_links;
>  }
> @@ -928,35 +951,36 @@ void intel_tc_port_sanitize_mode(struct
> intel_digital_port *dig_port,
>  				 const struct intel_crtc_state *crtc_state)  {
>  	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> +	struct intel_tc_port *tc = to_tc_port(dig_port);
> 
> -	mutex_lock(&dig_port->tc_lock);
> +	mutex_lock(&tc->lock);
> 
> -	drm_WARN_ON(&i915->drm, dig_port->tc_link_refcount != 1);
> -	if (!tc_port_has_active_links(dig_port, crtc_state)) {
> +	drm_WARN_ON(&i915->drm, tc->link_refcount != 1);
> +	if (!tc_port_has_active_links(tc, crtc_state)) {
>  		/*
>  		 * TBT-alt is the default mode in any case the PHY ownership is
> not
>  		 * held (regardless of the sink's connected live state), so
>  		 * we'll just switch to disconnected mode from it here without
>  		 * a note.
>  		 */
> -		if (dig_port->tc_init_mode != TC_PORT_TBT_ALT &&
> -		    dig_port->tc_init_mode != TC_PORT_DISCONNECTED)
> +		if (tc->init_mode != TC_PORT_TBT_ALT &&
> +		    tc->init_mode != TC_PORT_DISCONNECTED)
>  			drm_dbg_kms(&i915->drm,
>  				    "Port %s: PHY left in %s mode on disabled
> port, disconnecting it\n",
> -				    dig_port->tc_port_name,
> -				    tc_port_mode_name(dig_port-
> >tc_init_mode));
> -		icl_tc_phy_disconnect(dig_port);
> -		__intel_tc_port_put_link(dig_port);
> +				    tc->port_name,
> +				    tc_port_mode_name(tc->init_mode));
> +		icl_tc_phy_disconnect(tc);
> +		__intel_tc_port_put_link(tc);
> 
> -		tc_cold_unblock(dig_port, dig_port->tc_lock_power_domain,
> -				fetch_and_zero(&dig_port->tc_lock_wakeref));
> +		tc_cold_unblock(tc, tc->lock_power_domain,
> +				fetch_and_zero(&tc->lock_wakeref));
>  	}
> 
>  	drm_dbg_kms(&i915->drm, "Port %s: sanitize mode (%s)\n",
> -		    dig_port->tc_port_name,
> -		    tc_port_mode_name(dig_port->tc_mode));
> +		    tc->port_name,
> +		    tc_port_mode_name(tc->mode));
> 
> -	mutex_unlock(&dig_port->tc_lock);
> +	mutex_unlock(&tc->lock);
>  }
> 
>  /*
> @@ -973,10 +997,11 @@ bool intel_tc_port_connected_locked(struct
> intel_encoder *encoder)  {
>  	struct intel_digital_port *dig_port = enc_to_dig_port(encoder);
>  	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> +	struct intel_tc_port *tc = to_tc_port(dig_port);
> 
>  	drm_WARN_ON(&i915->drm, !intel_tc_port_ref_held(dig_port));
> 
> -	return tc_phy_hpd_live_status(dig_port) & BIT(dig_port->tc_mode);
> +	return tc_phy_hpd_live_status(tc) & BIT(tc->mode);
>  }
> 
>  bool intel_tc_port_connected(struct intel_encoder *encoder) @@ -991,27
> +1016,27 @@ bool intel_tc_port_connected(struct intel_encoder *encoder)
>  	return is_connected;
>  }
> 
> -static void __intel_tc_port_lock(struct intel_digital_port *dig_port,
> +static void __intel_tc_port_lock(struct intel_tc_port *tc,
>  				 int required_lanes)
>  {
> -	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> +	struct drm_i915_private *i915 = tc_to_i915(tc);
> 
> -	mutex_lock(&dig_port->tc_lock);
> +	mutex_lock(&tc->lock);
> 
> -	cancel_delayed_work(&dig_port->tc_disconnect_phy_work);
> +	cancel_delayed_work(&tc->disconnect_phy_work);
> 
> -	if (!dig_port->tc_link_refcount)
> -		intel_tc_port_update_mode(dig_port, required_lanes,
> +	if (!tc->link_refcount)
> +		intel_tc_port_update_mode(tc, required_lanes,
>  					  false);
> 
> -	drm_WARN_ON(&i915->drm, dig_port->tc_mode ==
> TC_PORT_DISCONNECTED);
> -	drm_WARN_ON(&i915->drm, dig_port->tc_mode != TC_PORT_TBT_ALT
> &&
> -				!tc_phy_is_owned(dig_port));
> +	drm_WARN_ON(&i915->drm, tc->mode == TC_PORT_DISCONNECTED);
> +	drm_WARN_ON(&i915->drm, tc->mode != TC_PORT_TBT_ALT &&
> +				!tc_phy_is_owned(tc));
>  }
> 
>  void intel_tc_port_lock(struct intel_digital_port *dig_port)  {
> -	__intel_tc_port_lock(dig_port, 1);
> +	__intel_tc_port_lock(to_tc_port(dig_port), 1);
>  }
> 
>  /**
> @@ -1024,15 +1049,15 @@ void intel_tc_port_lock(struct intel_digital_port
> *dig_port)
>   */
>  static void intel_tc_port_disconnect_phy_work(struct work_struct *work)  {
> -	struct intel_digital_port *dig_port =
> -		container_of(work, struct intel_digital_port,
> tc_disconnect_phy_work.work);
> +	struct intel_tc_port *tc =
> +		container_of(work, struct intel_tc_port,
> disconnect_phy_work.work);
> 
> -	mutex_lock(&dig_port->tc_lock);
> +	mutex_lock(&tc->lock);
> 
> -	if (!dig_port->tc_link_refcount)
> -		intel_tc_port_update_mode(dig_port, 1, true);
> +	if (!tc->link_refcount)
> +		intel_tc_port_update_mode(tc, 1, true);
> 
> -	mutex_unlock(&dig_port->tc_lock);
> +	mutex_unlock(&tc->lock);
>  }
> 
>  /**
> @@ -1043,36 +1068,44 @@ static void
> intel_tc_port_disconnect_phy_work(struct work_struct *work)
>   */
>  void intel_tc_port_flush_work(struct intel_digital_port *dig_port)  {
> -	flush_delayed_work(&dig_port->tc_disconnect_phy_work);
> +	flush_delayed_work(&to_tc_port(dig_port)->disconnect_phy_work);
>  }
> 
>  void intel_tc_port_unlock(struct intel_digital_port *dig_port)  {
> -	if (!dig_port->tc_link_refcount && dig_port->tc_mode !=
> TC_PORT_DISCONNECTED)
> -		queue_delayed_work(system_unbound_wq, &dig_port-
> >tc_disconnect_phy_work,
> +	struct intel_tc_port *tc = to_tc_port(dig_port);
> +
> +	if (!tc->link_refcount && tc->mode != TC_PORT_DISCONNECTED)
> +		queue_delayed_work(system_unbound_wq, &tc-
> >disconnect_phy_work,
>  				   msecs_to_jiffies(1000));
> 
> -	mutex_unlock(&dig_port->tc_lock);
> +	mutex_unlock(&tc->lock);
>  }
> 
>  bool intel_tc_port_ref_held(struct intel_digital_port *dig_port)  {
> -	return mutex_is_locked(&dig_port->tc_lock) ||
> -	       dig_port->tc_link_refcount;
> +	struct intel_tc_port *tc = to_tc_port(dig_port);
> +
> +	return mutex_is_locked(&tc->lock) ||
> +	       tc->link_refcount;
>  }
> 
>  void intel_tc_port_get_link(struct intel_digital_port *dig_port,
>  			    int required_lanes)
>  {
> -	__intel_tc_port_lock(dig_port, required_lanes);
> -	__intel_tc_port_get_link(dig_port);
> +	struct intel_tc_port *tc = to_tc_port(dig_port);
> +
> +	__intel_tc_port_lock(tc, required_lanes);
> +	__intel_tc_port_get_link(tc);
>  	intel_tc_port_unlock(dig_port);
>  }
> 
>  void intel_tc_port_put_link(struct intel_digital_port *dig_port)  {
> +	struct intel_tc_port *tc = to_tc_port(dig_port);
> +
>  	intel_tc_port_lock(dig_port);
> -	__intel_tc_port_put_link(dig_port);
> +	__intel_tc_port_put_link(tc);
>  	intel_tc_port_unlock(dig_port);
> 
>  	/*
> @@ -1085,7 +1118,7 @@ void intel_tc_port_put_link(struct intel_digital_port
> *dig_port)  }
> 
>  static bool
> -tc_has_modular_fia(struct drm_i915_private *i915, struct intel_digital_port
> *dig_port)
> +tc_has_modular_fia(struct drm_i915_private *i915, struct intel_tc_port
> +*tc)
>  {
>  	enum intel_display_power_domain domain;
>  	intel_wakeref_t wakeref;
> @@ -1094,11 +1127,11 @@ tc_has_modular_fia(struct drm_i915_private *i915,
> struct intel_digital_port *dig
>  	if (!INTEL_INFO(i915)->display.has_modular_fia)
>  		return false;
> 
> -	mutex_lock(&dig_port->tc_lock);
> -	wakeref = tc_cold_block(dig_port, &domain);
> +	mutex_lock(&tc->lock);
> +	wakeref = tc_cold_block(tc, &domain);
>  	val = intel_de_read(i915, PORT_TX_DFLEXDPSP(FIA1));
> -	tc_cold_unblock(dig_port, domain, wakeref);
> -	mutex_unlock(&dig_port->tc_lock);
> +	tc_cold_unblock(tc, domain, wakeref);
> +	mutex_unlock(&tc->lock);
> 
>  	drm_WARN_ON(&i915->drm, val == 0xffffffff);
> 
> @@ -1106,42 +1139,45 @@ tc_has_modular_fia(struct drm_i915_private *i915,
> struct intel_digital_port *dig  }
> 
>  static void
> -tc_port_load_fia_params(struct drm_i915_private *i915, struct
> intel_digital_port *dig_port)
> +tc_port_load_fia_params(struct drm_i915_private *i915, struct
> +intel_tc_port *tc)
>  {
> -	enum port port = dig_port->base.port;
> +	enum port port = tc->dig_port->base.port;
>  	enum tc_port tc_port = intel_port_to_tc(i915, port);
> 
>  	/*
>  	 * Each Modular FIA instance houses 2 TC ports. In SOC that has more
>  	 * than two TC ports, there are multiple instances of Modular FIA.
>  	 */
> -	if (tc_has_modular_fia(i915, dig_port)) {
> -		dig_port->tc_phy_fia = tc_port / 2;
> -		dig_port->tc_phy_fia_idx = tc_port % 2;
> +	if (tc_has_modular_fia(i915, tc)) {
> +		tc->phy_fia = tc_port / 2;
> +		tc->phy_fia_idx = tc_port % 2;
>  	} else {
> -		dig_port->tc_phy_fia = FIA1;
> -		dig_port->tc_phy_fia_idx = tc_port;
> +		tc->phy_fia = FIA1;
> +		tc->phy_fia_idx = tc_port;
>  	}
>  }
> 
>  void intel_tc_port_init(struct intel_digital_port *dig_port, bool is_legacy)  {
>  	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> +	struct intel_tc_port *tc = to_tc_port(dig_port);
>  	enum port port = dig_port->base.port;
>  	enum tc_port tc_port = intel_port_to_tc(i915, port);
> 
>  	if (drm_WARN_ON(&i915->drm, tc_port == TC_PORT_NONE))
>  		return;
> 
> -	snprintf(dig_port->tc_port_name, sizeof(dig_port->tc_port_name),
> +	tc->dig_port = dig_port;
> +
> +	snprintf(tc->port_name, sizeof(tc->port_name),
>  		 "%c/TC#%d", port_name(port), tc_port + 1);
> 
> -	mutex_init(&dig_port->tc_lock);
> -	INIT_DELAYED_WORK(&dig_port->tc_disconnect_phy_work,
> intel_tc_port_disconnect_phy_work);
> -	dig_port->tc_legacy_port = is_legacy;
> -	dig_port->tc_mode = TC_PORT_DISCONNECTED;
> -	dig_port->tc_link_refcount = 0;
> -	tc_port_load_fia_params(i915, dig_port);
> +	mutex_init(&tc->lock);
> +	INIT_DELAYED_WORK(&tc->disconnect_phy_work,
> intel_tc_port_disconnect_phy_work);
> +	tc->legacy_port = is_legacy;
> +	tc->mode = TC_PORT_DISCONNECTED;
> +	tc->link_refcount = 0;
> +	tc_port_load_fia_params(i915, tc);
> 
>  	intel_tc_port_init_mode(dig_port);
>  }
> diff --git a/drivers/gpu/drm/i915/display/intel_tc.h
> b/drivers/gpu/drm/i915/display/intel_tc.h
> index 79667d977508c..cc3a7fd4ac102 100644
> --- a/drivers/gpu/drm/i915/display/intel_tc.h
> +++ b/drivers/gpu/drm/i915/display/intel_tc.h
> @@ -9,10 +9,36 @@
>  #include <linux/mutex.h>
>  #include <linux/types.h>
> 
> +#include "intel_display.h"
> +#include "intel_display_power.h"
> +#include "intel_wakeref.h"
> +
>  struct intel_crtc_state;
>  struct intel_digital_port;
>  struct intel_encoder;
> 
> +enum tc_port_mode {
> +	TC_PORT_DISCONNECTED,
> +	TC_PORT_TBT_ALT,
> +	TC_PORT_DP_ALT,
> +	TC_PORT_LEGACY,
> +};
> +
> +struct intel_tc_port {
> +	struct intel_digital_port *dig_port;
> +	struct mutex lock;	/* protects the TypeC port mode */
> +	intel_wakeref_t lock_wakeref;
> +	enum intel_display_power_domain lock_power_domain;
> +	struct delayed_work disconnect_phy_work;
> +	int link_refcount;
> +	bool legacy_port:1;
> +	char port_name[8];
> +	enum tc_port_mode mode;
> +	enum tc_port_mode init_mode;
> +	enum phy_fia phy_fia;
> +	u8 phy_fia_idx;
> +};
> +
>  bool intel_tc_port_in_tbt_alt_mode(struct intel_digital_port *dig_port);  bool
> intel_tc_port_in_dp_alt_mode(struct intel_digital_port *dig_port);  bool
> intel_tc_port_in_legacy_mode(struct intel_digital_port *dig_port);
> --
> 2.37.1

Re: [Intel-gfx] [PATCH 06/29] drm/i915/tc: Check for TC PHY explicitly in intel_tc_port_fia_max_lane_count()

[Kahola, Mika]

> -----Original Message-----
> From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Imre
> Deak
> Sent: Thursday, March 23, 2023 4:20 PM
> To: intel-gfx@lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH 06/29] drm/i915/tc: Check for TC PHY explicitly in
> intel_tc_port_fia_max_lane_count()
> 
> Check explicitly if the port passed to
> intel_tc_port_fia_max_lane_count() has a TC PHY, instead of relying on the
> default TC mode value set for non-TC PHY ports.
> 

Reviewed-by: Mika Kahola <mika.kahola@intel.com>

> Signed-off-by: Imre Deak <imre.deak@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_tc.c | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_tc.c
> b/drivers/gpu/drm/i915/display/intel_tc.c
> index 70771044a2fe8..48a59a675cd57 100644
> --- a/drivers/gpu/drm/i915/display/intel_tc.c
> +++ b/drivers/gpu/drm/i915/display/intel_tc.c
> @@ -188,10 +188,11 @@ int intel_tc_port_fia_max_lane_count(struct
> intel_digital_port *dig_port)  {
>  	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
>  	struct intel_tc_port *tc = to_tc_port(dig_port);
> +	enum phy phy = intel_port_to_phy(i915, dig_port->base.port);
>  	intel_wakeref_t wakeref;
>  	u32 lane_mask;
> 
> -	if (tc->mode != TC_PORT_DP_ALT)
> +	if (!intel_phy_is_tc(i915, phy) || tc->mode != TC_PORT_DP_ALT)
>  		return 4;
> 
>  	assert_tc_cold_blocked(tc);
> --
> 2.37.1

Re: [Intel-gfx] [PATCH 07/29] drm/i915/tc: Move the intel_tc_port struct declaration to intel_tc.c

[Kahola, Mika]

> -----Original Message-----
> From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Imre
> Deak
> Sent: Thursday, March 23, 2023 4:20 PM
> To: intel-gfx@lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH 07/29] drm/i915/tc: Move the intel_tc_port struct
> declaration to intel_tc.c
> 
> Move the intel_tc_port struct to intel_tc.c for better isolation. This requires
> allocating the struct dynamically.
> 

Reviewed-by: Mika Kahola <mika.kahola@intel.com>

> Signed-off-by: Imre Deak <imre.deak@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_ddi.c      |  7 +--
>  .../drm/i915/display/intel_display_types.h    |  4 +-
>  drivers/gpu/drm/i915/display/intel_tc.c       | 45 +++++++++++++++++--
>  drivers/gpu/drm/i915/display/intel_tc.h       | 30 +------------
>  4 files changed, 49 insertions(+), 37 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c
> b/drivers/gpu/drm/i915/display/intel_ddi.c
> index 73240cf78c8bf..dac3ec8fbbc11 100644
> --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> @@ -3843,7 +3843,7 @@ static void intel_ddi_encoder_destroy(struct
> drm_encoder *encoder)
> 
>  	intel_dp_encoder_flush_work(encoder);
>  	if (intel_phy_is_tc(i915, phy))
> -		intel_tc_port_flush_work(dig_port);
> +		intel_tc_port_cleanup(dig_port);
>  	intel_display_power_flush_work(i915);
> 
>  	drm_encoder_cleanup(encoder);
> @@ -4284,7 +4284,7 @@ static void intel_ddi_encoder_shutdown(struct
> intel_encoder *encoder)
>  	if (!intel_phy_is_tc(i915, phy))
>  		return;
> 
> -	intel_tc_port_flush_work(dig_port);
> +	intel_tc_port_cleanup(dig_port);
>  }
> 
>  #define port_tc_name(port) ((port) - PORT_TC1 + '1') @@ -4541,7 +4541,8 @@
> void intel_ddi_init(struct drm_i915_private *dev_priv, enum port port)
>  				    is_legacy ? "legacy" : "non-legacy");
>  		}
> 
> -		intel_tc_port_init(dig_port, is_legacy);
> +		if (intel_tc_port_init(dig_port, is_legacy) < 0)
> +			goto err;
> 
>  		encoder->update_prepare = intel_ddi_update_prepare;
>  		encoder->update_complete = intel_ddi_update_complete; diff -
> -git a/drivers/gpu/drm/i915/display/intel_display_types.h
> b/drivers/gpu/drm/i915/display/intel_display_types.h
> index 0130c7b7f0232..ce24e58b2a825 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> @@ -54,13 +54,13 @@
>  #include "intel_display_power.h"
>  #include "intel_dpll_mgr.h"
>  #include "intel_wm_types.h"
> -#include "intel_tc.h"
> 
>  struct drm_printer;
>  struct __intel_global_objs_state;
>  struct intel_ddi_buf_trans;
>  struct intel_fbc;
>  struct intel_connector;
> +struct intel_tc_port;
> 
>  /*
>   * Display related stuff
> @@ -1781,7 +1781,7 @@ struct intel_digital_port {
>  	intel_wakeref_t ddi_io_wakeref;
>  	intel_wakeref_t aux_wakeref;
> 
> -	struct intel_tc_port tc;
> +	struct intel_tc_port *tc;
> 
>  	/* protects num_hdcp_streams reference count, hdcp_port_data and
> hdcp_auth_status */
>  	struct mutex hdcp_mutex;
> diff --git a/drivers/gpu/drm/i915/display/intel_tc.c
> b/drivers/gpu/drm/i915/display/intel_tc.c
> index 48a59a675cd57..2a04c5ea44ade 100644
> --- a/drivers/gpu/drm/i915/display/intel_tc.c
> +++ b/drivers/gpu/drm/i915/display/intel_tc.c
> @@ -15,6 +15,28 @@
>  #include "intel_mg_phy_regs.h"
>  #include "intel_tc.h"
> 
> +enum tc_port_mode {
> +	TC_PORT_DISCONNECTED,
> +	TC_PORT_TBT_ALT,
> +	TC_PORT_DP_ALT,
> +	TC_PORT_LEGACY,
> +};
> +
> +struct intel_tc_port {
> +	struct intel_digital_port *dig_port;
> +	struct mutex lock;	/* protects the TypeC port mode */
> +	intel_wakeref_t lock_wakeref;
> +	enum intel_display_power_domain lock_power_domain;
> +	struct delayed_work disconnect_phy_work;
> +	int link_refcount;
> +	bool legacy_port:1;
> +	char port_name[8];
> +	enum tc_port_mode mode;
> +	enum tc_port_mode init_mode;
> +	enum phy_fia phy_fia;
> +	u8 phy_fia_idx;
> +};
> +
>  static u32 tc_phy_hpd_live_status(struct intel_tc_port *tc);  static bool
> tc_phy_is_ready(struct intel_tc_port *tc);  static bool
> tc_phy_take_ownership(struct intel_tc_port *tc, bool take); @@ -36,7 +58,7
> @@ static const char *tc_port_mode_name(enum tc_port_mode mode)
> 
>  static struct intel_tc_port *to_tc_port(struct intel_digital_port *dig_port)  {
> -	return &dig_port->tc;
> +	return dig_port->tc;
>  }
> 
>  static struct drm_i915_private *tc_to_i915(struct intel_tc_port *tc) @@ -
> 1158,16 +1180,21 @@ tc_port_load_fia_params(struct drm_i915_private *i915,
> struct intel_tc_port *tc)
>  	}
>  }
> 
> -void intel_tc_port_init(struct intel_digital_port *dig_port, bool is_legacy)
> +int intel_tc_port_init(struct intel_digital_port *dig_port, bool
> +is_legacy)
>  {
>  	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> -	struct intel_tc_port *tc = to_tc_port(dig_port);
> +	struct intel_tc_port *tc;
>  	enum port port = dig_port->base.port;
>  	enum tc_port tc_port = intel_port_to_tc(i915, port);
> 
>  	if (drm_WARN_ON(&i915->drm, tc_port == TC_PORT_NONE))
> -		return;
> +		return -EINVAL;
> +
> +	tc = kzalloc(sizeof(*tc), GFP_KERNEL);
> +	if (!tc)
> +		return -ENOMEM;
> 
> +	dig_port->tc = tc;
>  	tc->dig_port = dig_port;
> 
>  	snprintf(tc->port_name, sizeof(tc->port_name), @@ -1181,4 +1208,14
> @@ void intel_tc_port_init(struct intel_digital_port *dig_port, bool is_legacy)
>  	tc_port_load_fia_params(i915, tc);
> 
>  	intel_tc_port_init_mode(dig_port);
> +
> +	return 0;
> +}
> +
> +void intel_tc_port_cleanup(struct intel_digital_port *dig_port) {
> +	intel_tc_port_flush_work(dig_port);
> +
> +	kfree(dig_port->tc);
> +	dig_port->tc = NULL;
>  }
> diff --git a/drivers/gpu/drm/i915/display/intel_tc.h
> b/drivers/gpu/drm/i915/display/intel_tc.h
> index cc3a7fd4ac102..dd0810f9ea95e 100644
> --- a/drivers/gpu/drm/i915/display/intel_tc.h
> +++ b/drivers/gpu/drm/i915/display/intel_tc.h
> @@ -6,39 +6,12 @@
>  #ifndef __INTEL_TC_H__
>  #define __INTEL_TC_H__
> 
> -#include <linux/mutex.h>
>  #include <linux/types.h>
> 
> -#include "intel_display.h"
> -#include "intel_display_power.h"
> -#include "intel_wakeref.h"
> -
>  struct intel_crtc_state;
>  struct intel_digital_port;
>  struct intel_encoder;
> 
> -enum tc_port_mode {
> -	TC_PORT_DISCONNECTED,
> -	TC_PORT_TBT_ALT,
> -	TC_PORT_DP_ALT,
> -	TC_PORT_LEGACY,
> -};
> -
> -struct intel_tc_port {
> -	struct intel_digital_port *dig_port;
> -	struct mutex lock;	/* protects the TypeC port mode */
> -	intel_wakeref_t lock_wakeref;
> -	enum intel_display_power_domain lock_power_domain;
> -	struct delayed_work disconnect_phy_work;
> -	int link_refcount;
> -	bool legacy_port:1;
> -	char port_name[8];
> -	enum tc_port_mode mode;
> -	enum tc_port_mode init_mode;
> -	enum phy_fia phy_fia;
> -	u8 phy_fia_idx;
> -};
> -
>  bool intel_tc_port_in_tbt_alt_mode(struct intel_digital_port *dig_port);  bool
> intel_tc_port_in_dp_alt_mode(struct intel_digital_port *dig_port);  bool
> intel_tc_port_in_legacy_mode(struct intel_digital_port *dig_port); @@ -63,7
> +36,8 @@ void intel_tc_port_get_link(struct intel_digital_port *dig_port,  void
> intel_tc_port_put_link(struct intel_digital_port *dig_port);  bool
> intel_tc_port_ref_held(struct intel_digital_port *dig_port);
> 
> -void intel_tc_port_init(struct intel_digital_port *dig_port, bool is_legacy);
> +int intel_tc_port_init(struct intel_digital_port *dig_port, bool
> +is_legacy); void intel_tc_port_cleanup(struct intel_digital_port
> +*dig_port);
> 
>  bool intel_tc_cold_requires_aux_pw(struct intel_digital_port *dig_port);
> 
> --
> 2.37.1

Re: [Intel-gfx] [PATCH 08/29] drm/i915/tc: Add TC PHY hook to get the PHY HPD live status

[Kahola, Mika]

> -----Original Message-----
> From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Imre
> Deak
> Sent: Thursday, March 23, 2023 4:20 PM
> To: intel-gfx@lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH 08/29] drm/i915/tc: Add TC PHY hook to get the PHY
> HPD live status
> 
> Add a table of TC PHY hooks which can be used to call platform specific TC PHY
> handlers, replacing the corresponding if ladders.
> 
> Add the hook to retrieve the PHY's HPD live status. Move the common part fixing
> up the VBT legacy port flag to the generic helper.
> 

Reviewed-by: Mika Kahola <mika.kahola@intel.com>

> Signed-off-by: Imre Deak <imre.deak@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_tc.c | 40 ++++++++++++++++++-------
>  1 file changed, 29 insertions(+), 11 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_tc.c
> b/drivers/gpu/drm/i915/display/intel_tc.c
> index 2a04c5ea44ade..a0508e2173007 100644
> --- a/drivers/gpu/drm/i915/display/intel_tc.c
> +++ b/drivers/gpu/drm/i915/display/intel_tc.c
> @@ -22,8 +22,17 @@ enum tc_port_mode {
>  	TC_PORT_LEGACY,
>  };
> 
> +struct intel_tc_port;
> +
> +struct intel_tc_phy_ops {
> +	u32 (*hpd_live_status)(struct intel_tc_port *tc); };
> +
>  struct intel_tc_port {
>  	struct intel_digital_port *dig_port;
> +
> +	const struct intel_tc_phy_ops *phy_ops;
> +
>  	struct mutex lock;	/* protects the TypeC port mode */
>  	intel_wakeref_t lock_wakeref;
>  	enum intel_display_power_domain lock_power_domain; @@ -329,10
> +338,6 @@ static u32 icl_tc_phy_hpd_live_status(struct intel_tc_port *tc)
>  	if (intel_de_read(i915, SDEISR) & isr_bit)
>  		mask |= BIT(TC_PORT_LEGACY);
> 
> -	/* The sink can be connected only in a single mode. */
> -	if (!drm_WARN_ON_ONCE(&i915->drm, hweight32(mask) > 1))
> -		tc_port_fixup_legacy_flag(tc, mask);
> -
>  	return mask;
>  }
> 
> @@ -495,6 +500,10 @@ static void icl_tc_phy_disconnect(struct intel_tc_port
> *tc)
>  	}
>  }
> 
> +static const struct intel_tc_phy_ops icl_tc_phy_ops = {
> +	.hpd_live_status = icl_tc_phy_hpd_live_status, };
> +
>  /**
>   * ADLP TC PHY handlers
>   * --------------------
> @@ -521,10 +530,6 @@ static u32 adlp_tc_phy_hpd_live_status(struct
> intel_tc_port *tc)
>  	if (intel_de_read(i915, SDEISR) & isr_bit)
>  		mask |= BIT(TC_PORT_LEGACY);
> 
> -	/* The sink can be connected only in a single mode. */
> -	if (!drm_WARN_ON(&i915->drm, hweight32(mask) > 1))
> -		tc_port_fixup_legacy_flag(tc, mask);
> -
>  	return mask;
>  }
> 
> @@ -574,6 +579,10 @@ static bool adlp_tc_phy_is_owned(struct intel_tc_port
> *tc)
>  	return val & DDI_BUF_CTL_TC_PHY_OWNERSHIP;  }
> 
> +static const struct intel_tc_phy_ops adlp_tc_phy_ops = {
> +	.hpd_live_status = adlp_tc_phy_hpd_live_status, };
> +
>  /**
>   * Generic TC PHY handlers
>   * -----------------------
> @@ -581,11 +590,15 @@ static bool adlp_tc_phy_is_owned(struct
> intel_tc_port *tc)  static u32 tc_phy_hpd_live_status(struct intel_tc_port *tc)  {
>  	struct drm_i915_private *i915 = tc_to_i915(tc);
> +	u32 mask;
> 
> -	if (IS_ALDERLAKE_P(i915))
> -		return adlp_tc_phy_hpd_live_status(tc);
> +	mask = tc->phy_ops->hpd_live_status(tc);
> +
> +	/* The sink can be connected only in a single mode. */
> +	if (!drm_WARN_ON_ONCE(&i915->drm, hweight32(mask) > 1))
> +		tc_port_fixup_legacy_flag(tc, mask);
> 
> -	return icl_tc_phy_hpd_live_status(tc);
> +	return mask;
>  }
> 
>  static bool tc_phy_is_ready(struct intel_tc_port *tc) @@ -1197,6 +1210,11 @@
> int intel_tc_port_init(struct intel_digital_port *dig_port, bool is_legacy)
>  	dig_port->tc = tc;
>  	tc->dig_port = dig_port;
> 
> +	if (DISPLAY_VER(i915) >= 13)
> +		tc->phy_ops = &adlp_tc_phy_ops;
> +	else
> +		tc->phy_ops = &icl_tc_phy_ops;
> +
>  	snprintf(tc->port_name, sizeof(tc->port_name),
>  		 "%c/TC#%d", port_name(port), tc_port + 1);
> 
> --
> 2.37.1

Re: [Intel-gfx] [PATCH 09/29] drm/i915/tc: Add TC PHY hooks to get the PHY ready/owned state

[Kahola, Mika]

> -----Original Message-----
> From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Imre
> Deak
> Sent: Thursday, March 23, 2023 4:20 PM
> To: intel-gfx@lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH 09/29] drm/i915/tc: Add TC PHY hooks to get the
> PHY ready/owned state
> 
> Add TC PHY hooks to get the PHY ready/owned state on each platform,
> replacing the corresponding if ladder.
> 

Reviewed-by: Mika Kahola <mika.kahola@intel.com>

> Signed-off-by: Imre Deak <imre.deak@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_tc.c | 20 ++++++++------------
>  1 file changed, 8 insertions(+), 12 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_tc.c
> b/drivers/gpu/drm/i915/display/intel_tc.c
> index a0508e2173007..7d64cb310ca3e 100644
> --- a/drivers/gpu/drm/i915/display/intel_tc.c
> +++ b/drivers/gpu/drm/i915/display/intel_tc.c
> @@ -26,6 +26,8 @@ struct intel_tc_port;
> 
>  struct intel_tc_phy_ops {
>  	u32 (*hpd_live_status)(struct intel_tc_port *tc);
> +	bool (*is_ready)(struct intel_tc_port *tc);
> +	bool (*is_owned)(struct intel_tc_port *tc);
>  };
> 
>  struct intel_tc_port {
> @@ -502,6 +504,8 @@ static void icl_tc_phy_disconnect(struct intel_tc_port
> *tc)
> 
>  static const struct intel_tc_phy_ops icl_tc_phy_ops = {
>  	.hpd_live_status = icl_tc_phy_hpd_live_status,
> +	.is_ready = icl_tc_phy_is_ready,
> +	.is_owned = icl_tc_phy_is_owned,
>  };
> 
>  /**
> @@ -581,6 +585,8 @@ static bool adlp_tc_phy_is_owned(struct intel_tc_port
> *tc)
> 
>  static const struct intel_tc_phy_ops adlp_tc_phy_ops = {
>  	.hpd_live_status = adlp_tc_phy_hpd_live_status,
> +	.is_ready = adlp_tc_phy_is_ready,
> +	.is_owned = adlp_tc_phy_is_owned,
>  };
> 
>  /**
> @@ -603,22 +609,12 @@ static u32 tc_phy_hpd_live_status(struct intel_tc_port
> *tc)
> 
>  static bool tc_phy_is_ready(struct intel_tc_port *tc)  {
> -	struct drm_i915_private *i915 = tc_to_i915(tc);
> -
> -	if (IS_ALDERLAKE_P(i915))
> -		return adlp_tc_phy_is_ready(tc);
> -
> -	return icl_tc_phy_is_ready(tc);
> +	return tc->phy_ops->is_ready(tc);
>  }
> 
>  static bool tc_phy_is_owned(struct intel_tc_port *tc)  {
> -	struct drm_i915_private *i915 = tc_to_i915(tc);
> -
> -	if (IS_ALDERLAKE_P(i915))
> -		return adlp_tc_phy_is_owned(tc);
> -
> -	return icl_tc_phy_is_owned(tc);
> +	return tc->phy_ops->is_owned(tc);
>  }
> 
>  static bool tc_phy_take_ownership(struct intel_tc_port *tc, bool take)
> --
> 2.37.1

Re: [Intel-gfx] [PATCH 10/29] drm/i915/tc: Add TC PHY hook to read out the PHY HW state

[Kahola, Mika]

> -----Original Message-----
> From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Imre
> Deak
> Sent: Thursday, March 23, 2023 4:20 PM
> To: intel-gfx@lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH 10/29] drm/i915/tc: Add TC PHY hook to read out the
> PHY HW state
> 
> Add a TC PHY hook to read out the PHY HW state on each platform, move the
> common parts to the generic helper.
> 

Reviewed-by: Mika Kahola <mika.kahola@intel.com>

> Signed-off-by: Imre Deak <imre.deak@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_tc.c | 34 +++++++++++++++++--------
>  1 file changed, 24 insertions(+), 10 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_tc.c
> b/drivers/gpu/drm/i915/display/intel_tc.c
> index 7d64cb310ca3e..aa39810962592 100644
> --- a/drivers/gpu/drm/i915/display/intel_tc.c
> +++ b/drivers/gpu/drm/i915/display/intel_tc.c
> @@ -28,6 +28,7 @@ struct intel_tc_phy_ops {
>  	u32 (*hpd_live_status)(struct intel_tc_port *tc);
>  	bool (*is_ready)(struct intel_tc_port *tc);
>  	bool (*is_owned)(struct intel_tc_port *tc);
> +	void (*get_hw_state)(struct intel_tc_port *tc);
>  };
> 
>  struct intel_tc_port {
> @@ -51,6 +52,7 @@ struct intel_tc_port {  static u32
> tc_phy_hpd_live_status(struct intel_tc_port *tc);  static bool
> tc_phy_is_ready(struct intel_tc_port *tc);  static bool
> tc_phy_take_ownership(struct intel_tc_port *tc, bool take);
> +static enum tc_port_mode tc_phy_get_current_mode(struct intel_tc_port
> +*tc);
> 
>  static const char *tc_port_mode_name(enum tc_port_mode mode)  { @@ -
> 407,6 +409,20 @@ static bool icl_tc_phy_is_owned(struct intel_tc_port *tc)
>  	return val & DP_PHY_MODE_STATUS_NOT_SAFE(tc->phy_fia_idx);
>  }
> 
> +static void icl_tc_phy_get_hw_state(struct intel_tc_port *tc) {
> +	enum intel_display_power_domain domain;
> +	intel_wakeref_t tc_cold_wref;
> +
> +	tc_cold_wref = tc_cold_block(tc, &domain);
> +
> +	tc->mode = tc_phy_get_current_mode(tc);
> +	if (tc->mode != TC_PORT_DISCONNECTED)
> +		tc->lock_wakeref = tc_cold_block(tc, &tc-
> >lock_power_domain);
> +
> +	tc_cold_unblock(tc, domain, tc_cold_wref); }
> +
>  /*
>   * This function implements the first part of the Connect Flow described by our
>   * specification, Gen11 TypeC Programming chapter. The rest of the flow
> (reading @@ -506,6 +522,7 @@ static const struct intel_tc_phy_ops
> icl_tc_phy_ops = {
>  	.hpd_live_status = icl_tc_phy_hpd_live_status,
>  	.is_ready = icl_tc_phy_is_ready,
>  	.is_owned = icl_tc_phy_is_owned,
> +	.get_hw_state = icl_tc_phy_get_hw_state,
>  };
> 
>  /**
> @@ -587,6 +604,7 @@ static const struct intel_tc_phy_ops adlp_tc_phy_ops = {
>  	.hpd_live_status = adlp_tc_phy_hpd_live_status,
>  	.is_ready = adlp_tc_phy_is_ready,
>  	.is_owned = adlp_tc_phy_is_owned,
> +	.get_hw_state = icl_tc_phy_get_hw_state,
>  };
> 
>  /**
> @@ -617,6 +635,11 @@ static bool tc_phy_is_owned(struct intel_tc_port *tc)
>  	return tc->phy_ops->is_owned(tc);
>  }
> 
> +static void tc_phy_get_hw_state(struct intel_tc_port *tc) {
> +	tc->phy_ops->get_hw_state(tc);
> +}
> +
>  static bool tc_phy_take_ownership(struct intel_tc_port *tc, bool take)  {
>  	struct drm_i915_private *i915 = tc_to_i915(tc); @@ -889,8 +912,6 @@
> void intel_tc_port_init_mode(struct intel_digital_port *dig_port)  {
>  	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
>  	struct intel_tc_port *tc = to_tc_port(dig_port);
> -	intel_wakeref_t tc_cold_wref;
> -	enum intel_display_power_domain domain;
>  	bool update_mode = false;
> 
>  	mutex_lock(&tc->lock);
> @@ -899,17 +920,12 @@ void intel_tc_port_init_mode(struct intel_digital_port
> *dig_port)
>  	drm_WARN_ON(&i915->drm, tc->lock_wakeref);
>  	drm_WARN_ON(&i915->drm, tc->link_refcount);
> 
> -	tc_cold_wref = tc_cold_block(tc, &domain);
> -
> -	tc->mode = tc_phy_get_current_mode(tc);
> +	tc_phy_get_hw_state(tc);
>  	/*
>  	 * Save the initial mode for the state check in
>  	 * intel_tc_port_sanitize_mode().
>  	 */
>  	tc->init_mode = tc->mode;
> -	if (tc->mode != TC_PORT_DISCONNECTED)
> -		tc->lock_wakeref =
> -			tc_cold_block(tc, &tc->lock_power_domain);
> 
>  	/*
>  	 * The PHY needs to be connected for AUX to work during HW readout
> and @@ -938,8 +954,6 @@ void intel_tc_port_init_mode(struct
> intel_digital_port *dig_port)
>  	/* Prevent changing tc->mode until intel_tc_port_sanitize_mode() is
> called. */
>  	__intel_tc_port_get_link(tc);
> 
> -	tc_cold_unblock(tc, domain, tc_cold_wref);
> -
>  	mutex_unlock(&tc->lock);
>  }
> 
> --
> 2.37.1

Re: [Intel-gfx] [PATCH 11/29] drm/i915/tc: Add generic TC PHY connect/disconnect handlers

[Kahola, Mika]

> -----Original Message-----
> From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Imre
> Deak
> Sent: Thursday, March 23, 2023 4:20 PM
> To: intel-gfx@lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH 11/29] drm/i915/tc: Add generic TC PHY
> connect/disconnect handlers
> 
> Add generic handlers to connect/disconnect a PHY.
> 
> Setting the TC mode to the target mode deducted from the HPD state and - if
> connecting to this mode fails - falling back to connecting to the default (TBT)
> mode are common to all platforms; move the logic for this from the ICL specific
> connect / disconnect handlers to the generic ones.
> 

Reviewed-by: Mika Kahola <mika.kahola@intel.com>

> Signed-off-by: Imre Deak <imre.deak@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_tc.c | 65 +++++++++++++++----------
>  1 file changed, 39 insertions(+), 26 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_tc.c
> b/drivers/gpu/drm/i915/display/intel_tc.c
> index aa39810962592..9179f86287ab0 100644
> --- a/drivers/gpu/drm/i915/display/intel_tc.c
> +++ b/drivers/gpu/drm/i915/display/intel_tc.c
> @@ -434,41 +434,35 @@ static void icl_tc_phy_get_hw_state(struct
> intel_tc_port *tc)
>   * connect and disconnect to cleanly transfer ownership with the controller and
>   * set the type-C power state.
>   */
> -static void icl_tc_phy_connect(struct intel_tc_port *tc,
> +static bool icl_tc_phy_connect(struct intel_tc_port *tc,
>  			       int required_lanes)
>  {
>  	struct drm_i915_private *i915 = tc_to_i915(tc);
>  	struct intel_digital_port *dig_port = tc->dig_port;
> -	u32 live_status_mask;
>  	int max_lanes;
> 
> +	if (tc->mode == TC_PORT_TBT_ALT)
> +		return true;
> +
>  	if (!tc_phy_is_ready(tc) &&
>  	    !drm_WARN_ON(&i915->drm, tc->legacy_port)) {
>  		drm_dbg_kms(&i915->drm, "Port %s: PHY not ready\n",
>  			    tc->port_name);
> -		goto out_set_tbt_alt_mode;
> -	}
> -
> -	live_status_mask = tc_phy_hpd_live_status(tc);
> -	if (!(live_status_mask & (BIT(TC_PORT_DP_ALT) |
> BIT(TC_PORT_LEGACY))) &&
> -	    !tc->legacy_port) {
> -		drm_dbg_kms(&i915->drm, "Port %s: PHY ownership not
> required (live status %02x)\n",
> -			    tc->port_name, live_status_mask);
> -		goto out_set_tbt_alt_mode;
> +		return false;
>  	}
> 
>  	if (!tc_phy_take_ownership(tc, true) &&
>  	    !drm_WARN_ON(&i915->drm, tc->legacy_port))
> -		goto out_set_tbt_alt_mode;
> +		return false;
> 
>  	max_lanes = intel_tc_port_fia_max_lane_count(dig_port);
>  	if (tc->legacy_port) {
>  		drm_WARN_ON(&i915->drm, max_lanes != 4);
> -		tc->mode = TC_PORT_LEGACY;
> -
> -		return;
> +		return true;
>  	}
> 
> +	drm_WARN_ON(&i915->drm, tc->mode != TC_PORT_DP_ALT);
> +
>  	/*
>  	 * Now we have to re-check the live state, in case the port recently
>  	 * became disconnected. Not necessary for legacy mode.
> @@ -487,14 +481,12 @@ static void icl_tc_phy_connect(struct intel_tc_port
> *tc,
>  		goto out_release_phy;
>  	}
> 
> -	tc->mode = TC_PORT_DP_ALT;
> -
> -	return;
> +	return true;
> 
>  out_release_phy:
>  	tc_phy_take_ownership(tc, false);
> -out_set_tbt_alt_mode:
> -	tc->mode = TC_PORT_TBT_ALT;
> +
> +	return false;
>  }
> 
>  /*
> @@ -509,9 +501,6 @@ static void icl_tc_phy_disconnect(struct intel_tc_port
> *tc)
>  		tc_phy_take_ownership(tc, false);
>  		fallthrough;
>  	case TC_PORT_TBT_ALT:
> -		tc->mode = TC_PORT_DISCONNECTED;
> -		fallthrough;
> -	case TC_PORT_DISCONNECTED:
>  		break;
>  	default:
>  		MISSING_CASE(tc->mode);
> @@ -817,6 +806,30 @@ tc_phy_get_target_mode(struct intel_tc_port *tc)
>  	return hpd_mask_to_target_mode(tc, live_status_mask);  }
> 
> +static void tc_phy_connect(struct intel_tc_port *tc, int
> +required_lanes) {
> +	struct drm_i915_private *i915 = tc_to_i915(tc);
> +	bool connected;
> +
> +	tc->mode = tc_phy_get_target_mode(tc);
> +
> +	connected = icl_tc_phy_connect(tc, required_lanes);
> +	if (!connected && tc->mode != default_tc_mode(tc)) {
> +		tc->mode = default_tc_mode(tc);
> +		connected = icl_tc_phy_connect(tc, required_lanes);
> +	}
> +
> +	drm_WARN_ON(&i915->drm, !connected);
> +}
> +
> +static void tc_phy_disconnect(struct intel_tc_port *tc) {
> +	if (tc->mode != TC_PORT_DISCONNECTED) {
> +		icl_tc_phy_disconnect(tc);
> +		tc->mode = TC_PORT_DISCONNECTED;
> +	}
> +}
> +
>  static void intel_tc_port_reset_mode(struct intel_tc_port *tc,
>  				     int required_lanes, bool force_disconnect)  {
> @@ -834,9 +847,9 @@ static void intel_tc_port_reset_mode(struct
> intel_tc_port *tc,
>  		drm_WARN_ON(&i915->drm, aux_powered);
>  	}
> 
> -	icl_tc_phy_disconnect(tc);
> +	tc_phy_disconnect(tc);
>  	if (!force_disconnect)
> -		icl_tc_phy_connect(tc, required_lanes);
> +		tc_phy_connect(tc, required_lanes);
> 
>  	drm_dbg_kms(&i915->drm, "Port %s: TC port mode reset (%s -> %s)\n",
>  		    tc->port_name,
> @@ -1015,7 +1028,7 @@ void intel_tc_port_sanitize_mode(struct
> intel_digital_port *dig_port,
>  				    "Port %s: PHY left in %s mode on disabled
> port, disconnecting it\n",
>  				    tc->port_name,
>  				    tc_port_mode_name(tc->init_mode));
> -		icl_tc_phy_disconnect(tc);
> +		tc_phy_disconnect(tc);
>  		__intel_tc_port_put_link(tc);
> 
>  		tc_cold_unblock(tc, tc->lock_power_domain,
> --
> 2.37.1

Re: [Intel-gfx] [PATCH 12/29] drm/i915/tc: Factor out tc_phy_verify_legacy_or_dp_alt_mode()

[Kahola, Mika]

> -----Original Message-----
> From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Imre
> Deak
> Sent: Thursday, March 23, 2023 4:20 PM
> To: intel-gfx@lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH 12/29] drm/i915/tc: Factor out
> tc_phy_verify_legacy_or_dp_alt_mode()
> 
> Factor out a function verifying the PHY connected state in legacy or DP-alt
> mode. This is common to all platforms, which can be reused in platform specific
> connect hooks added in follow-up patches.
> 
> No functional changes.
> 

Reviewed-by: Mika Kahola <mika.kahola@intel.com>

> Signed-off-by: Imre Deak <imre.deak@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_tc.c | 47 +++++++++++++++----------
>  1 file changed, 29 insertions(+), 18 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_tc.c
> b/drivers/gpu/drm/i915/display/intel_tc.c
> index 9179f86287ab0..ee4db9d0eb978 100644
> --- a/drivers/gpu/drm/i915/display/intel_tc.c
> +++ b/drivers/gpu/drm/i915/display/intel_tc.c
> @@ -434,27 +434,13 @@ static void icl_tc_phy_get_hw_state(struct
> intel_tc_port *tc)
>   * connect and disconnect to cleanly transfer ownership with the controller and
>   * set the type-C power state.
>   */
> -static bool icl_tc_phy_connect(struct intel_tc_port *tc,
> -			       int required_lanes)
> +static bool tc_phy_verify_legacy_or_dp_alt_mode(struct intel_tc_port *tc,
> +						int required_lanes)
>  {
>  	struct drm_i915_private *i915 = tc_to_i915(tc);
>  	struct intel_digital_port *dig_port = tc->dig_port;
>  	int max_lanes;
> 
> -	if (tc->mode == TC_PORT_TBT_ALT)
> -		return true;
> -
> -	if (!tc_phy_is_ready(tc) &&
> -	    !drm_WARN_ON(&i915->drm, tc->legacy_port)) {
> -		drm_dbg_kms(&i915->drm, "Port %s: PHY not ready\n",
> -			    tc->port_name);
> -		return false;
> -	}
> -
> -	if (!tc_phy_take_ownership(tc, true) &&
> -	    !drm_WARN_ON(&i915->drm, tc->legacy_port))
> -		return false;
> -
>  	max_lanes = intel_tc_port_fia_max_lane_count(dig_port);
>  	if (tc->legacy_port) {
>  		drm_WARN_ON(&i915->drm, max_lanes != 4); @@ -470,7
> +456,7 @@ static bool icl_tc_phy_connect(struct intel_tc_port *tc,
>  	if (!(tc_phy_hpd_live_status(tc) & BIT(TC_PORT_DP_ALT))) {
>  		drm_dbg_kms(&i915->drm, "Port %s: PHY sudden
> disconnect\n",
>  			    tc->port_name);
> -		goto out_release_phy;
> +		return false;
>  	}
> 
>  	if (max_lanes < required_lanes) {
> @@ -478,9 +464,34 @@ static bool icl_tc_phy_connect(struct intel_tc_port *tc,
>  			    "Port %s: PHY max lanes %d < required lanes %d\n",
>  			    tc->port_name,
>  			    max_lanes, required_lanes);
> -		goto out_release_phy;
> +		return false;
> +	}
> +
> +	return true;
> +}
> +
> +static bool icl_tc_phy_connect(struct intel_tc_port *tc,
> +			       int required_lanes)
> +{
> +	struct drm_i915_private *i915 = tc_to_i915(tc);
> +
> +	if (tc->mode == TC_PORT_TBT_ALT)
> +		return true;
> +
> +	if (!tc_phy_is_ready(tc) &&
> +	    !drm_WARN_ON(&i915->drm, tc->legacy_port)) {
> +		drm_dbg_kms(&i915->drm, "Port %s: PHY not ready\n",
> +			    tc->port_name);
> +		return false;
>  	}
> 
> +	if (!tc_phy_take_ownership(tc, true) &&
> +	    !drm_WARN_ON(&i915->drm, tc->legacy_port))
> +		return false;
> +
> +	if (!tc_phy_verify_legacy_or_dp_alt_mode(tc, required_lanes))
> +		goto out_release_phy;
> +
>  	return true;
> 
>  out_release_phy:
> --
> 2.37.1

Re: [Intel-gfx] [PATCH 13/29] drm/i915/tc: Add TC PHY hooks to connect/disconnect the PHY

[Kahola, Mika]

> -----Original Message-----
> From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Imre
> Deak
> Sent: Thursday, March 23, 2023 4:20 PM
> To: intel-gfx@lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH 13/29] drm/i915/tc: Add TC PHY hooks to
> connect/disconnect the PHY
> 
> Add TC PHY hooks to connect/disconnect the PHY. A follow-up patch will add
> the ADLP specific hooks for these.
> 

Reviewed-by: Mika Kahola <mika.kahola@intel.com>

> Signed-off-by: Imre Deak <imre.deak@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_tc.c | 12 +++++++++---
>  1 file changed, 9 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_tc.c
> b/drivers/gpu/drm/i915/display/intel_tc.c
> index ee4db9d0eb978..e63e9c57e5627 100644
> --- a/drivers/gpu/drm/i915/display/intel_tc.c
> +++ b/drivers/gpu/drm/i915/display/intel_tc.c
> @@ -29,6 +29,8 @@ struct intel_tc_phy_ops {
>  	bool (*is_ready)(struct intel_tc_port *tc);
>  	bool (*is_owned)(struct intel_tc_port *tc);
>  	void (*get_hw_state)(struct intel_tc_port *tc);
> +	bool (*connect)(struct intel_tc_port *tc, int required_lanes);
> +	void (*disconnect)(struct intel_tc_port *tc);
>  };
> 
>  struct intel_tc_port {
> @@ -523,6 +525,8 @@ static const struct intel_tc_phy_ops icl_tc_phy_ops = {
>  	.is_ready = icl_tc_phy_is_ready,
>  	.is_owned = icl_tc_phy_is_owned,
>  	.get_hw_state = icl_tc_phy_get_hw_state,
> +	.connect = icl_tc_phy_connect,
> +	.disconnect = icl_tc_phy_disconnect,
>  };
> 
>  /**
> @@ -605,6 +609,8 @@ static const struct intel_tc_phy_ops adlp_tc_phy_ops = {
>  	.is_ready = adlp_tc_phy_is_ready,
>  	.is_owned = adlp_tc_phy_is_owned,
>  	.get_hw_state = icl_tc_phy_get_hw_state,
> +	.connect = icl_tc_phy_connect,
> +	.disconnect = icl_tc_phy_disconnect,
>  };
> 
>  /**
> @@ -824,10 +830,10 @@ static void tc_phy_connect(struct intel_tc_port *tc,
> int required_lanes)
> 
>  	tc->mode = tc_phy_get_target_mode(tc);
> 
> -	connected = icl_tc_phy_connect(tc, required_lanes);
> +	connected = tc->phy_ops->connect(tc, required_lanes);
>  	if (!connected && tc->mode != default_tc_mode(tc)) {
>  		tc->mode = default_tc_mode(tc);
> -		connected = icl_tc_phy_connect(tc, required_lanes);
> +		connected = tc->phy_ops->connect(tc, required_lanes);
>  	}
> 
>  	drm_WARN_ON(&i915->drm, !connected);
> @@ -836,7 +842,7 @@ static void tc_phy_connect(struct intel_tc_port *tc, int
> required_lanes)  static void tc_phy_disconnect(struct intel_tc_port *tc)  {
>  	if (tc->mode != TC_PORT_DISCONNECTED) {
> -		icl_tc_phy_disconnect(tc);
> +		tc->phy_ops->disconnect(tc);
>  		tc->mode = TC_PORT_DISCONNECTED;
>  	}
>  }
> --
> 2.37.1

Re: [Intel-gfx] [PATCH 14/29] drm/i915/tc: Fix up the legacy VBT flag only in disconnected mode

[Kahola, Mika]

> -----Original Message-----
> From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Imre
> Deak
> Sent: Thursday, March 23, 2023 4:20 PM
> To: intel-gfx@lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH 14/29] drm/i915/tc: Fix up the legacy VBT flag only in
> disconnected mode
> 
> A follow-up patch simplifies the tc_cold_block()/unblock() functions, dropping
> the power domain parameter. For this it must be ensured that the power domain
> - which depends on the actual TC mode and so the VBT legacy port flag - can't
> change while the PHY is in a connected state and accordingly TC-cold is blocked.
> Make this so, by fixing up the VBT legacy flag only in the disconnected TC mode,
> instead of whenever the HPD state is retrieved.
> 

Reviewed-by: Mika Kahola <mika.kahola@intel.com>

> Signed-off-by: Imre Deak <imre.deak@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_tc.c | 13 ++++++++++---
>  1 file changed, 10 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_tc.c
> b/drivers/gpu/drm/i915/display/intel_tc.c
> index e63e9c57e5627..e61daa40356b5 100644
> --- a/drivers/gpu/drm/i915/display/intel_tc.c
> +++ b/drivers/gpu/drm/i915/display/intel_tc.c
> @@ -298,6 +298,11 @@ static void tc_port_fixup_legacy_flag(struct
> intel_tc_port *tc,
>  	struct drm_i915_private *i915 = tc_to_i915(tc);
>  	u32 valid_hpd_mask;
> 
> +	drm_WARN_ON(&i915->drm, tc->mode != TC_PORT_DISCONNECTED);
> +
> +	if (hweight32(live_status_mask) != 1)
> +		return;
> +
>  	if (tc->legacy_port)
>  		valid_hpd_mask = BIT(TC_PORT_LEGACY);
>  	else
> @@ -625,8 +630,7 @@ static u32 tc_phy_hpd_live_status(struct intel_tc_port
> *tc)
>  	mask = tc->phy_ops->hpd_live_status(tc);
> 
>  	/* The sink can be connected only in a single mode. */
> -	if (!drm_WARN_ON_ONCE(&i915->drm, hweight32(mask) > 1))
> -		tc_port_fixup_legacy_flag(tc, mask);
> +	drm_WARN_ON_ONCE(&i915->drm, hweight32(mask) > 1);
> 
>  	return mask;
>  }
> @@ -826,9 +830,12 @@ tc_phy_get_target_mode(struct intel_tc_port *tc)
> static void tc_phy_connect(struct intel_tc_port *tc, int required_lanes)  {
>  	struct drm_i915_private *i915 = tc_to_i915(tc);
> +	u32 live_status_mask = tc_phy_hpd_live_status(tc);
>  	bool connected;
> 
> -	tc->mode = tc_phy_get_target_mode(tc);
> +	tc_port_fixup_legacy_flag(tc, live_status_mask);
> +
> +	tc->mode = hpd_mask_to_target_mode(tc, live_status_mask);
> 
>  	connected = tc->phy_ops->connect(tc, required_lanes);
>  	if (!connected && tc->mode != default_tc_mode(tc)) {
> --
> 2.37.1

Re: [Intel-gfx] [PATCH 15/29] drm/i915/tc: Check TC mode instead of the VBT legacy flag

[Kahola, Mika]

> -----Original Message-----
> From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Imre
> Deak
> Sent: Thursday, March 23, 2023 4:20 PM
> To: intel-gfx@lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH 15/29] drm/i915/tc: Check TC mode instead of the
> VBT legacy flag
> 
> After the previous patch the TC mode in the connect/disconnect functions is
> always in sync with the VBT legacy port flag, so for consistency with the rest of
> the function check the TC mode instead of the VBT flag.
> 

Reviewed-by: Mika Kahola <mika.kahola@intel.com>

> Signed-off-by: Imre Deak <imre.deak@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_tc.c | 15 +++++++--------
>  1 file changed, 7 insertions(+), 8 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_tc.c
> b/drivers/gpu/drm/i915/display/intel_tc.c
> index e61daa40356b5..e8bd54d1582bc 100644
> --- a/drivers/gpu/drm/i915/display/intel_tc.c
> +++ b/drivers/gpu/drm/i915/display/intel_tc.c
> @@ -449,7 +449,7 @@ static bool
> tc_phy_verify_legacy_or_dp_alt_mode(struct intel_tc_port *tc,
>  	int max_lanes;
> 
>  	max_lanes = intel_tc_port_fia_max_lane_count(dig_port);
> -	if (tc->legacy_port) {
> +	if (tc->mode == TC_PORT_LEGACY) {
>  		drm_WARN_ON(&i915->drm, max_lanes != 4);
>  		return true;
>  	}
> @@ -485,16 +485,15 @@ static bool icl_tc_phy_connect(struct intel_tc_port
> *tc,
>  	if (tc->mode == TC_PORT_TBT_ALT)
>  		return true;
> 
> -	if (!tc_phy_is_ready(tc) &&
> -	    !drm_WARN_ON(&i915->drm, tc->legacy_port)) {
> -		drm_dbg_kms(&i915->drm, "Port %s: PHY not ready\n",
> -			    tc->port_name);
> +	if ((!tc_phy_is_ready(tc) ||
> +	     !tc_phy_take_ownership(tc, true)) &&
> +	    !drm_WARN_ON(&i915->drm, tc->mode == TC_PORT_LEGACY)) {
> +		drm_dbg_kms(&i915->drm, "Port %s: can't take PHY ownership
> (ready %s)\n",
> +			    tc->port_name,
> +			    str_yes_no(tc_phy_is_ready(tc)));
>  		return false;
>  	}
> 
> -	if (!tc_phy_take_ownership(tc, true) &&
> -	    !drm_WARN_ON(&i915->drm, tc->legacy_port))
> -		return false;
> 
>  	if (!tc_phy_verify_legacy_or_dp_alt_mode(tc, required_lanes))
>  		goto out_release_phy;
> --
> 2.37.1

Re: [Intel-gfx] [PATCH 16/29] drm/i915/tc: Block/unblock TC-cold in the PHY connect/disconnect hooks

[Kahola, Mika]

> -----Original Message-----
> From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Imre
> Deak
> Sent: Thursday, March 23, 2023 4:20 PM
> To: intel-gfx@lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH 16/29] drm/i915/tc: Block/unblock TC-cold in the
> PHY connect/disconnect hooks
> 
> Move blocking/unblocking the TC-cold power state to the platform specific PHY
> connect / disconnect hooks. This allows for adjusting the connect/disconnect
> sequence as required for each platform.
> 

Reviewed-by: Mika Kahola <mika.kahola@intel.com>

> Signed-off-by: Imre Deak <imre.deak@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_tc.c | 43 ++++++++-----------------
>  1 file changed, 13 insertions(+), 30 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_tc.c
> b/drivers/gpu/drm/i915/display/intel_tc.c
> index e8bd54d1582bc..253ab30c34f7a 100644
> --- a/drivers/gpu/drm/i915/display/intel_tc.c
> +++ b/drivers/gpu/drm/i915/display/intel_tc.c
> @@ -482,6 +482,8 @@ static bool icl_tc_phy_connect(struct intel_tc_port *tc,
> {
>  	struct drm_i915_private *i915 = tc_to_i915(tc);
> 
> +	tc->lock_wakeref = tc_cold_block(tc, &tc->lock_power_domain);
> +
>  	if (tc->mode == TC_PORT_TBT_ALT)
>  		return true;
> 
> @@ -491,7 +493,7 @@ static bool icl_tc_phy_connect(struct intel_tc_port *tc,
>  		drm_dbg_kms(&i915->drm, "Port %s: can't take PHY ownership
> (ready %s)\n",
>  			    tc->port_name,
>  			    str_yes_no(tc_phy_is_ready(tc)));
> -		return false;
> +		goto out_unblock_tc_cold;
>  	}
> 
> 
> @@ -502,6 +504,10 @@ static bool icl_tc_phy_connect(struct intel_tc_port *tc,
> 
>  out_release_phy:
>  	tc_phy_take_ownership(tc, false);
> +out_unblock_tc_cold:
> +	tc_cold_unblock(tc,
> +			tc->lock_power_domain,
> +			fetch_and_zero(&tc->lock_wakeref));
> 
>  	return false;
>  }
> @@ -518,6 +524,9 @@ static void icl_tc_phy_disconnect(struct intel_tc_port
> *tc)
>  		tc_phy_take_ownership(tc, false);
>  		fallthrough;
>  	case TC_PORT_TBT_ALT:
> +		tc_cold_unblock(tc,
> +				tc->lock_power_domain,
> +				fetch_and_zero(&tc->lock_wakeref));
>  		break;
>  	default:
>  		MISSING_CASE(tc->mode);
> @@ -888,32 +897,9 @@ static bool intel_tc_port_needs_reset(struct
> intel_tc_port *tc)  static void intel_tc_port_update_mode(struct intel_tc_port
> *tc,
>  				      int required_lanes, bool force_disconnect)  {
> -	enum intel_display_power_domain domain;
> -	intel_wakeref_t wref;
> -	bool needs_reset = force_disconnect;
> -
> -	if (!needs_reset) {
> -		/* Get power domain required to check the hotplug live status.
> */
> -		wref = tc_cold_block(tc, &domain);
> -		needs_reset = intel_tc_port_needs_reset(tc);
> -		tc_cold_unblock(tc, domain, wref);
> -	}
> -
> -	if (!needs_reset)
> -		return;
> -
> -	/* Get power domain required for resetting the mode. */
> -	wref = tc_cold_block_in_mode(tc, TC_PORT_DISCONNECTED,
> &domain);
> -
> -	intel_tc_port_reset_mode(tc, required_lanes, force_disconnect);
> -
> -	/* Get power domain matching the new mode after reset. */
> -	tc_cold_unblock(tc, tc->lock_power_domain,
> -			fetch_and_zero(&tc->lock_wakeref));
> -	if (tc->mode != TC_PORT_DISCONNECTED)
> -		tc->lock_wakeref = tc_cold_block(tc, &tc-
> >lock_power_domain);
> -
> -	tc_cold_unblock(tc, domain, wref);
> +	if (force_disconnect ||
> +	    intel_tc_port_needs_reset(tc))
> +		intel_tc_port_reset_mode(tc, required_lanes,
> force_disconnect);
>  }
> 
>  static void __intel_tc_port_get_link(struct intel_tc_port *tc) @@ -1053,9
> +1039,6 @@ void intel_tc_port_sanitize_mode(struct intel_digital_port
> *dig_port,
>  				    tc_port_mode_name(tc->init_mode));
>  		tc_phy_disconnect(tc);
>  		__intel_tc_port_put_link(tc);
> -
> -		tc_cold_unblock(tc, tc->lock_power_domain,
> -				fetch_and_zero(&tc->lock_wakeref));
>  	}
> 
>  	drm_dbg_kms(&i915->drm, "Port %s: sanitize mode (%s)\n",
> --
> 2.37.1

Re: [Intel-gfx] [PATCH 17/29] drm/i915/tc: Remove redundant wakeref=0 check from unblock_tc_cold()

[Kahola, Mika]

> -----Original Message-----
> From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Imre
> Deak
> Sent: Thursday, March 23, 2023 4:20 PM
> To: intel-gfx@lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH 17/29] drm/i915/tc: Remove redundant wakeref=0
> check from unblock_tc_cold()
> 
> After the previous patch unblock_tc_cold() will not be called in a disconnected
> mode, so the wakeref passed to it will be always non-zero.
> Remove the redundant check.
> 

Reviewed-by: Mika Kahola <mika.kahola@intel.com>

> Signed-off-by: Imre Deak <imre.deak@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_tc.c | 8 --------
>  1 file changed, 8 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_tc.c
> b/drivers/gpu/drm/i915/display/intel_tc.c
> index 253ab30c34f7a..21c6ef8064883 100644
> --- a/drivers/gpu/drm/i915/display/intel_tc.c
> +++ b/drivers/gpu/drm/i915/display/intel_tc.c
> @@ -150,14 +150,6 @@ tc_cold_unblock(struct intel_tc_port *tc, enum
> intel_display_power_domain domain  {
>  	struct drm_i915_private *i915 = tc_to_i915(tc);
> 
> -	/*
> -	 * wakeref == -1, means some error happened saving save_depot_stack
> but
> -	 * power should still be put down and 0 is a invalid save_depot_stack
> -	 * id so can be used to skip it for non TC legacy ports.
> -	 */
> -	if (wakeref == 0)
> -		return;
> -
>  	intel_display_power_put(i915, domain, wakeref);  }
> 
> --
> 2.37.1

Re: [Intel-gfx] [PATCH 18/29] drm/i915/tc: Drop tc_cold_block()/unblock()'s power domain parameter

[Kahola, Mika]

> -----Original Message-----
> From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Imre
> Deak
> Sent: Thursday, March 23, 2023 4:20 PM
> To: intel-gfx@lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH 18/29] drm/i915/tc: Drop tc_cold_block()/unblock()'s
> power domain parameter
> 
> Simplify tc_cold_block()/unblock() by dropping their power domain parameter.
> The power domain depends on the current TC mode, which - after the previous
> patch - can't change while the PHY is connected, holding a TC-cold-off power
> domain reference. Based on this the domain can be deducted from the current
> TC mode instead of having to pass this as a parameter.
> 
> Blocking TC-cold for the PHY HW readout happens before the current TC mode
> is determined, so here the initial power domain must be still manually passed.
> 
> For debugging still keep track of the domain used for tc_cold_block() and verify
> that it remained the same until tc_cold_unblock().
> 
> While at it rename tc_cold_get_power_domain() to tc_phy_cold_off_domain(),
> reflecting the name of platform specific hook added in the next patch.
> 

Reviewed-by: Mika Kahola <mika.kahola@intel.com>

> Signed-off-by: Imre Deak <imre.deak@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_tc.c | 61 +++++++++++++++----------
>  1 file changed, 37 insertions(+), 24 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_tc.c
> b/drivers/gpu/drm/i915/display/intel_tc.c
> index 21c6ef8064883..943660044e37a 100644
> --- a/drivers/gpu/drm/i915/display/intel_tc.c
> +++ b/drivers/gpu/drm/i915/display/intel_tc.c
> @@ -40,7 +40,9 @@ struct intel_tc_port {
> 
>  	struct mutex lock;	/* protects the TypeC port mode */
>  	intel_wakeref_t lock_wakeref;
> +#if IS_ENABLED(CONFIG_DRM_I915_DEBUG_RUNTIME_PM)
>  	enum intel_display_power_domain lock_power_domain;
> +#endif
>  	struct delayed_work disconnect_phy_work;
>  	int link_refcount;
>  	bool legacy_port:1;
> @@ -116,43 +118,60 @@ bool intel_tc_cold_requires_aux_pw(struct
> intel_digital_port *dig_port)  }
> 
>  static enum intel_display_power_domain
> -tc_cold_get_power_domain(struct intel_tc_port *tc, enum tc_port_mode
> mode)
> +tc_phy_cold_off_domain(struct intel_tc_port *tc)
>  {
>  	struct drm_i915_private *i915 = tc_to_i915(tc);
>  	struct intel_digital_port *dig_port = tc->dig_port;
> 
> -	if (mode == TC_PORT_TBT_ALT ||
> !intel_tc_cold_requires_aux_pw(dig_port))
> +	if (tc->mode == TC_PORT_TBT_ALT ||
> +!intel_tc_cold_requires_aux_pw(dig_port))
>  		return POWER_DOMAIN_TC_COLD_OFF;
> 
>  	return intel_display_power_legacy_aux_domain(i915, dig_port-
> >aux_ch);  }
> 
>  static intel_wakeref_t
> -tc_cold_block_in_mode(struct intel_tc_port *tc, enum tc_port_mode mode,
> -		      enum intel_display_power_domain *domain)
> +__tc_cold_block(struct intel_tc_port *tc, enum
> +intel_display_power_domain *domain)
>  {
>  	struct drm_i915_private *i915 = tc_to_i915(tc);
> 
> -	*domain = tc_cold_get_power_domain(tc, mode);
> +	*domain = tc_phy_cold_off_domain(tc);
> 
>  	return intel_display_power_get(i915, *domain);  }
> 
>  static intel_wakeref_t
> -tc_cold_block(struct intel_tc_port *tc, enum intel_display_power_domain
> *domain)
> +tc_cold_block(struct intel_tc_port *tc)
>  {
> -	return tc_cold_block_in_mode(tc, tc->mode, domain);
> +	enum intel_display_power_domain domain;
> +	intel_wakeref_t wakeref;
> +
> +	wakeref = __tc_cold_block(tc, &domain); #if
> +IS_ENABLED(CONFIG_DRM_I915_DEBUG_RUNTIME_PM)
> +	tc->lock_power_domain = domain;
> +#endif
> +	return wakeref;
>  }
> 
>  static void
> -tc_cold_unblock(struct intel_tc_port *tc, enum intel_display_power_domain
> domain,
> -		intel_wakeref_t wakeref)
> +__tc_cold_unblock(struct intel_tc_port *tc, enum intel_display_power_domain
> domain,
> +		  intel_wakeref_t wakeref)
>  {
>  	struct drm_i915_private *i915 = tc_to_i915(tc);
> 
>  	intel_display_power_put(i915, domain, wakeref);  }
> 
> +static void
> +tc_cold_unblock(struct intel_tc_port *tc, intel_wakeref_t wakeref) {
> +	enum intel_display_power_domain domain =
> tc_phy_cold_off_domain(tc);
> +
> +#if IS_ENABLED(CONFIG_DRM_I915_DEBUG_RUNTIME_PM)
> +	drm_WARN_ON(&tc_to_i915(tc)->drm, tc->lock_power_domain !=
> domain);
> +#endif
> +	__tc_cold_unblock(tc, domain, wakeref); }
> +
>  static void
>  assert_tc_cold_blocked(struct intel_tc_port *tc)  { @@ -160,8 +179,7 @@
> assert_tc_cold_blocked(struct intel_tc_port *tc)
>  	bool enabled;
> 
>  	enabled = intel_display_power_is_enabled(i915,
> -
> tc_cold_get_power_domain(tc,
> -									  tc-
> >mode));
> +						 tc_phy_cold_off_domain(tc));
>  	drm_WARN_ON(&i915->drm, !enabled);
>  }
> 
> @@ -413,13 +431,13 @@ static void icl_tc_phy_get_hw_state(struct
> intel_tc_port *tc)
>  	enum intel_display_power_domain domain;
>  	intel_wakeref_t tc_cold_wref;
> 
> -	tc_cold_wref = tc_cold_block(tc, &domain);
> +	tc_cold_wref = __tc_cold_block(tc, &domain);
> 
>  	tc->mode = tc_phy_get_current_mode(tc);
>  	if (tc->mode != TC_PORT_DISCONNECTED)
> -		tc->lock_wakeref = tc_cold_block(tc, &tc-
> >lock_power_domain);
> +		tc->lock_wakeref = tc_cold_block(tc);
> 
> -	tc_cold_unblock(tc, domain, tc_cold_wref);
> +	__tc_cold_unblock(tc, domain, tc_cold_wref);
>  }
> 
>  /*
> @@ -474,7 +492,7 @@ static bool icl_tc_phy_connect(struct intel_tc_port *tc,
> {
>  	struct drm_i915_private *i915 = tc_to_i915(tc);
> 
> -	tc->lock_wakeref = tc_cold_block(tc, &tc->lock_power_domain);
> +	tc->lock_wakeref = tc_cold_block(tc);
> 
>  	if (tc->mode == TC_PORT_TBT_ALT)
>  		return true;
> @@ -497,9 +515,7 @@ static bool icl_tc_phy_connect(struct intel_tc_port *tc,
>  out_release_phy:
>  	tc_phy_take_ownership(tc, false);
>  out_unblock_tc_cold:
> -	tc_cold_unblock(tc,
> -			tc->lock_power_domain,
> -			fetch_and_zero(&tc->lock_wakeref));
> +	tc_cold_unblock(tc, fetch_and_zero(&tc->lock_wakeref));
> 
>  	return false;
>  }
> @@ -516,9 +532,7 @@ static void icl_tc_phy_disconnect(struct intel_tc_port
> *tc)
>  		tc_phy_take_ownership(tc, false);
>  		fallthrough;
>  	case TC_PORT_TBT_ALT:
> -		tc_cold_unblock(tc,
> -				tc->lock_power_domain,
> -				fetch_and_zero(&tc->lock_wakeref));
> +		tc_cold_unblock(tc, fetch_and_zero(&tc->lock_wakeref));
>  		break;
>  	default:
>  		MISSING_CASE(tc->mode);
> @@ -1177,7 +1191,6 @@ void intel_tc_port_put_link(struct intel_digital_port
> *dig_port)  static bool  tc_has_modular_fia(struct drm_i915_private *i915,
> struct intel_tc_port *tc)  {
> -	enum intel_display_power_domain domain;
>  	intel_wakeref_t wakeref;
>  	u32 val;
> 
> @@ -1185,9 +1198,9 @@ tc_has_modular_fia(struct drm_i915_private *i915,
> struct intel_tc_port *tc)
>  		return false;
> 
>  	mutex_lock(&tc->lock);
> -	wakeref = tc_cold_block(tc, &domain);
> +	wakeref = tc_cold_block(tc);
>  	val = intel_de_read(i915, PORT_TX_DFLEXDPSP(FIA1));
> -	tc_cold_unblock(tc, domain, wakeref);
> +	tc_cold_unblock(tc, wakeref);
>  	mutex_unlock(&tc->lock);
> 
>  	drm_WARN_ON(&i915->drm, val == 0xffffffff);
> --
> 2.37.1

Re: [Intel-gfx] [PATCH 19/29] drm/i915/tc: Add TC PHY hook to get the TC-cold blocking power domain

[Kahola, Mika]

> -----Original Message-----
> From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Imre
> Deak
> Sent: Thursday, March 23, 2023 4:20 PM
> To: intel-gfx@lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH 19/29] drm/i915/tc: Add TC PHY hook to get the TC-
> cold blocking power domain
> 
> Instead of the corresponding if ladder, add a TC PHY hook to get the platform
> and TC mode specific power domain used for blocking the TC-cold power state.
> 

Reviewed-by: Mika Kahola <mika.kahola@intel.com>

> Signed-off-by: Imre Deak <imre.deak@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_tc.c | 73 ++++++++++++++++++++-----
>  1 file changed, 59 insertions(+), 14 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_tc.c
> b/drivers/gpu/drm/i915/display/intel_tc.c
> index 943660044e37a..e68346c5e6036 100644
> --- a/drivers/gpu/drm/i915/display/intel_tc.c
> +++ b/drivers/gpu/drm/i915/display/intel_tc.c
> @@ -25,6 +25,7 @@ enum tc_port_mode {
>  struct intel_tc_port;
> 
>  struct intel_tc_phy_ops {
> +	enum intel_display_power_domain (*cold_off_domain)(struct
> +intel_tc_port *tc);
>  	u32 (*hpd_live_status)(struct intel_tc_port *tc);
>  	bool (*is_ready)(struct intel_tc_port *tc);
>  	bool (*is_owned)(struct intel_tc_port *tc); @@ -53,6 +54,8 @@ struct
> intel_tc_port {
>  	u8 phy_fia_idx;
>  };
> 
> +static enum intel_display_power_domain
> +tc_phy_cold_off_domain(struct intel_tc_port *);
>  static u32 tc_phy_hpd_live_status(struct intel_tc_port *tc);  static bool
> tc_phy_is_ready(struct intel_tc_port *tc);  static bool
> tc_phy_take_ownership(struct intel_tc_port *tc, bool take); @@ -113,20 +116,8
> @@ bool intel_tc_cold_requires_aux_pw(struct intel_digital_port *dig_port)
>  	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
>  	struct intel_tc_port *tc = to_tc_port(dig_port);
> 
> -	return (DISPLAY_VER(i915) == 11 && tc->legacy_port) ||
> -		IS_ALDERLAKE_P(i915);
> -}
> -
> -static enum intel_display_power_domain
> -tc_phy_cold_off_domain(struct intel_tc_port *tc) -{
> -	struct drm_i915_private *i915 = tc_to_i915(tc);
> -	struct intel_digital_port *dig_port = tc->dig_port;
> -
> -	if (tc->mode == TC_PORT_TBT_ALT ||
> !intel_tc_cold_requires_aux_pw(dig_port))
> -		return POWER_DOMAIN_TC_COLD_OFF;
> -
> -	return intel_display_power_legacy_aux_domain(i915, dig_port-
> >aux_ch);
> +	return tc_phy_cold_off_domain(tc) ==
> +	       intel_display_power_legacy_aux_domain(i915, dig_port->aux_ch);
>  }
> 
>  static intel_wakeref_t
> @@ -334,6 +325,18 @@ static void tc_port_fixup_legacy_flag(struct
> intel_tc_port *tc,
>   * ICL TC PHY handlers
>   * -------------------
>   */
> +static enum intel_display_power_domain
> +icl_tc_phy_cold_off_domain(struct intel_tc_port *tc) {
> +	struct drm_i915_private *i915 = tc_to_i915(tc);
> +	struct intel_digital_port *dig_port = tc->dig_port;
> +
> +	if (tc->legacy_port)
> +		return intel_display_power_legacy_aux_domain(i915, dig_port-
> >aux_ch);
> +
> +	return POWER_DOMAIN_TC_COLD_OFF;
> +}
> +
>  static u32 icl_tc_phy_hpd_live_status(struct intel_tc_port *tc)  {
>  	struct drm_i915_private *i915 = tc_to_i915(tc); @@ -540,6 +543,27
> @@ static void icl_tc_phy_disconnect(struct intel_tc_port *tc)  }
> 
>  static const struct intel_tc_phy_ops icl_tc_phy_ops = {
> +	.cold_off_domain = icl_tc_phy_cold_off_domain,
> +	.hpd_live_status = icl_tc_phy_hpd_live_status,
> +	.is_ready = icl_tc_phy_is_ready,
> +	.is_owned = icl_tc_phy_is_owned,
> +	.get_hw_state = icl_tc_phy_get_hw_state,
> +	.connect = icl_tc_phy_connect,
> +	.disconnect = icl_tc_phy_disconnect,
> +};
> +
> +/**
> + * TGL TC PHY handlers
> + * -------------------
> + */
> +static enum intel_display_power_domain
> +tgl_tc_phy_cold_off_domain(struct intel_tc_port *tc) {
> +	return POWER_DOMAIN_TC_COLD_OFF;
> +}
> +
> +static const struct intel_tc_phy_ops tgl_tc_phy_ops = {
> +	.cold_off_domain = tgl_tc_phy_cold_off_domain,
>  	.hpd_live_status = icl_tc_phy_hpd_live_status,
>  	.is_ready = icl_tc_phy_is_ready,
>  	.is_owned = icl_tc_phy_is_owned,
> @@ -552,6 +576,18 @@ static const struct intel_tc_phy_ops icl_tc_phy_ops = {
>   * ADLP TC PHY handlers
>   * --------------------
>   */
> +static enum intel_display_power_domain
> +adlp_tc_phy_cold_off_domain(struct intel_tc_port *tc) {
> +	struct drm_i915_private *i915 = tc_to_i915(tc);
> +	struct intel_digital_port *dig_port = tc->dig_port;
> +
> +	if (tc->mode != TC_PORT_TBT_ALT)
> +		return intel_display_power_legacy_aux_domain(i915, dig_port-
> >aux_ch);
> +
> +	return POWER_DOMAIN_TC_COLD_OFF;
> +}
> +
>  static u32 adlp_tc_phy_hpd_live_status(struct intel_tc_port *tc)  {
>  	struct drm_i915_private *i915 = tc_to_i915(tc); @@ -624,6 +660,7 @@
> static bool adlp_tc_phy_is_owned(struct intel_tc_port *tc)  }
> 
>  static const struct intel_tc_phy_ops adlp_tc_phy_ops = {
> +	.cold_off_domain = adlp_tc_phy_cold_off_domain,
>  	.hpd_live_status = adlp_tc_phy_hpd_live_status,
>  	.is_ready = adlp_tc_phy_is_ready,
>  	.is_owned = adlp_tc_phy_is_owned,
> @@ -636,6 +673,12 @@ static const struct intel_tc_phy_ops adlp_tc_phy_ops =
> {
>   * Generic TC PHY handlers
>   * -----------------------
>   */
> +static enum intel_display_power_domain
> +tc_phy_cold_off_domain(struct intel_tc_port *tc) {
> +	return tc->phy_ops->cold_off_domain(tc); }
> +
>  static u32 tc_phy_hpd_live_status(struct intel_tc_port *tc)  {
>  	struct drm_i915_private *i915 = tc_to_i915(tc); @@ -1246,6 +1289,8
> @@ int intel_tc_port_init(struct intel_digital_port *dig_port, bool is_legacy)
> 
>  	if (DISPLAY_VER(i915) >= 13)
>  		tc->phy_ops = &adlp_tc_phy_ops;
> +	else if (DISPLAY_VER(i915) >= 12)
> +		tc->phy_ops = &tgl_tc_phy_ops;
>  	else
>  		tc->phy_ops = &icl_tc_phy_ops;
> 
> --
> 2.37.1

Re: [Intel-gfx] [PATCH 20/29] drm/i915/tc: Add asserts in TC PHY hooks that the required power is on

[Kahola, Mika]

> -----Original Message-----
> From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Imre
> Deak
> Sent: Thursday, March 23, 2023 7:08 PM
> To: Jani Nikula <jani.nikula@linux.intel.com>
> Cc: intel-gfx@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [PATCH 20/29] drm/i915/tc: Add asserts in TC PHY hooks
> that the required power is on
> 
> On Thu, Mar 23, 2023 at 04:33:54PM +0200, Jani Nikula wrote:
> > On Thu, 23 Mar 2023, Imre Deak <imre.deak@intel.com> wrote:
> > > Add an assert to each TC PHY hook that their required power domain
> > > is enabled.
> > >
> > > While at it add a comment describing the domains used on each
> > > platform and TC mode.
> > >
> > > Signed-off-by: Imre Deak <imre.deak@intel.com>
> > > ---
> > >  drivers/gpu/drm/i915/display/intel_tc.c | 61
> > > +++++++++++++++++++++++++
> > >  1 file changed, 61 insertions(+)
> > >
> > > diff --git a/drivers/gpu/drm/i915/display/intel_tc.c
> > > b/drivers/gpu/drm/i915/display/intel_tc.c
> > > index e68346c5e6036..7bcd93f1f0597 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_tc.c
> > > +++ b/drivers/gpu/drm/i915/display/intel_tc.c
> > > @@ -111,6 +111,46 @@ bool intel_tc_port_in_legacy_mode(struct
> intel_digital_port *dig_port)
> > >  	return intel_tc_port_in_mode(dig_port, TC_PORT_LEGACY);  }
> > >
> > > +/**
> >
> > This also shouldn't be a kernel-doc comment.
> 
> Ok, will change these.

Functionality looks ok to me.

Reviewed-by: Mika Kahola <mika.kahola@intel.com>

> 
> >
> > BR,
> > Jani.
> >
> > > + * The display power domains used for TC ports depending on the
> > > + * platform and TC mode (legacy, DP-alt, TBT):
> > > + *
> > > + * POWER_DOMAIN_DISPLAY_CORE:
> > > + * --------------------------
> > > + * ADLP/all modes:
> > > + *   - TCSS/IOM access for PHY ready state.
> > > + * ADLP+/all modes:
> > > + *   - DE/north-,south-HPD ISR access for HPD live state.
> > > + *
> > > + * POWER_DOMAIN_PORT_DDI_LANES_<port>:
> > > + * -----------------------------------
> > > + * ICL+/all modes:
> > > + *   - DE/DDI_BUF access for port enabled state.
> > > + * ADLP/all modes:
> > > + *   - DE/DDI_BUF access for PHY owned state.
> > > + *
> > > + * POWER_DOMAIN_AUX_USBC<TC port index>:
> > > + * -------------------------------------
> > > + * ICL/legacy mode:
> > > + *   - TCSS/IOM,FIA access for PHY ready, owned and HPD live state
> > > + *   - TCSS/PHY: block TC-cold power state for using the PHY AUX and
> > > + *     main lanes.
> > > + * ADLP/legacy, DP-alt modes:
> > > + *   - TCSS/PHY: block TC-cold power state for using the PHY AUX and
> > > + *     main lanes.
> > > + *
> > > + * POWER_DOMAIN_TC_COLD_OFF:
> > > + * -------------------------
> > > + * TGL/legacy, DP-alt modes:
> > > + *   - TCSS/IOM,FIA access for PHY ready, owned and HPD live state
> > > + *   - TCSS/PHY: block TC-cold power state for using the PHY AUX and
> > > + *     main lanes.
> > > + *
> > > + * ICL, TGL, ADLP/TBT mode:
> > > + *   - TCSS/IOM,FIA access for HPD live state
> > > + *   - TCSS/TBT: block TC-cold power state for using the (TBT DP-IN)
> > > + *     AUX and main lanes.
> > > + */
> > >  bool intel_tc_cold_requires_aux_pw(struct intel_digital_port
> > > *dig_port)  {
> > >  	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> > > @@ -163,6 +203,15 @@ tc_cold_unblock(struct intel_tc_port *tc,
> intel_wakeref_t wakeref)
> > >  	__tc_cold_unblock(tc, domain, wakeref);  }
> > >
> > > +static void
> > > +assert_display_core_power_enabled(struct intel_tc_port *tc) {
> > > +	struct drm_i915_private *i915 = tc_to_i915(tc);
> > > +
> > > +	drm_WARN_ON(&i915->drm,
> > > +		    !intel_display_power_is_enabled(i915,
> > > +POWER_DOMAIN_DISPLAY_CORE)); }
> > > +
> > >  static void
> > >  assert_tc_cold_blocked(struct intel_tc_port *tc)  { @@ -378,6
> > > +427,8 @@ static bool icl_tc_phy_is_ready(struct intel_tc_port *tc)
> > >  	struct drm_i915_private *i915 = tc_to_i915(tc);
> > >  	u32 val;
> > >
> > > +	assert_tc_cold_blocked(tc);
> > > +
> > >  	val = intel_de_read(i915, PORT_TX_DFLEXDPPMS(tc->phy_fia));
> > >  	if (val == 0xffffffff) {
> > >  		drm_dbg_kms(&i915->drm,
> > > @@ -395,6 +446,8 @@ static bool icl_tc_phy_take_ownership(struct
> intel_tc_port *tc,
> > >  	struct drm_i915_private *i915 = tc_to_i915(tc);
> > >  	u32 val;
> > >
> > > +	assert_tc_cold_blocked(tc);
> > > +
> > >  	val = intel_de_read(i915, PORT_TX_DFLEXDPCSSS(tc->phy_fia));
> > >  	if (val == 0xffffffff) {
> > >  		drm_dbg_kms(&i915->drm,
> > > @@ -418,6 +471,8 @@ static bool icl_tc_phy_is_owned(struct intel_tc_port
> *tc)
> > >  	struct drm_i915_private *i915 = tc_to_i915(tc);
> > >  	u32 val;
> > >
> > > +	assert_tc_cold_blocked(tc);
> > > +
> > >  	val = intel_de_read(i915, PORT_TX_DFLEXDPCSSS(tc->phy_fia));
> > >  	if (val == 0xffffffff) {
> > >  		drm_dbg_kms(&i915->drm,
> > > @@ -626,6 +681,8 @@ static bool adlp_tc_phy_is_ready(struct
> intel_tc_port *tc)
> > >  	enum tc_port tc_port = intel_port_to_tc(i915, tc->dig_port->base.port);
> > >  	u32 val;
> > >
> > > +	assert_display_core_power_enabled(tc);
> > > +
> > >  	val = intel_de_read(i915, TCSS_DDI_STATUS(tc_port));
> > >  	if (val == 0xffffffff) {
> > >  		drm_dbg_kms(&i915->drm,
> > > @@ -643,6 +700,8 @@ static bool adlp_tc_phy_take_ownership(struct
> intel_tc_port *tc,
> > >  	struct drm_i915_private *i915 = tc_to_i915(tc);
> > >  	enum port port = tc->dig_port->base.port;
> > >
> > > +	assert_tc_port_power_enabled(tc);
> > > +
> > >  	intel_de_rmw(i915, DDI_BUF_CTL(port),
> DDI_BUF_CTL_TC_PHY_OWNERSHIP,
> > >  		     take ? DDI_BUF_CTL_TC_PHY_OWNERSHIP : 0);
> > >
> > > @@ -655,6 +714,8 @@ static bool adlp_tc_phy_is_owned(struct
> intel_tc_port *tc)
> > >  	enum port port = tc->dig_port->base.port;
> > >  	u32 val;
> > >
> > > +	assert_tc_port_power_enabled(tc);
> > > +
> > >  	val = intel_de_read(i915, DDI_BUF_CTL(port));
> > >  	return val & DDI_BUF_CTL_TC_PHY_OWNERSHIP;  }
> >
> > --
> > Jani Nikula, Intel Open Source Graphics Center

Re: [Intel-gfx] [PATCH 21/29] drm/i915/tc: Add TC PHY hook to init the PHY

[Kahola, Mika]

> -----Original Message-----
> From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Imre
> Deak
> Sent: Thursday, March 23, 2023 4:20 PM
> To: intel-gfx@lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH 21/29] drm/i915/tc: Add TC PHY hook to init the PHY
> 
> Add a hook for platform specific PHY initialization. Move the detection of
> modular FIAs to the TGL handler, skipping this on ADLP+ where the FIAs are
> always modular, not requiring a detection.
> 

Reviewed-by: Mika Kahola <mika.kahola@intel.com>

> Signed-off-by: Imre Deak <imre.deak@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_tc.c  | 96 ++++++++++++++----------
>  drivers/gpu/drm/i915/i915_pci.c          |  3 -
>  drivers/gpu/drm/i915/intel_device_info.h |  1 -
>  3 files changed, 56 insertions(+), 44 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_tc.c
> b/drivers/gpu/drm/i915/display/intel_tc.c
> index 7bcd93f1f0597..8f159ded501f8 100644
> --- a/drivers/gpu/drm/i915/display/intel_tc.c
> +++ b/drivers/gpu/drm/i915/display/intel_tc.c
> @@ -32,6 +32,7 @@ struct intel_tc_phy_ops {
>  	void (*get_hw_state)(struct intel_tc_port *tc);
>  	bool (*connect)(struct intel_tc_port *tc, int required_lanes);
>  	void (*disconnect)(struct intel_tc_port *tc);
> +	void (*init)(struct intel_tc_port *tc);
>  };
> 
>  struct intel_tc_port {
> @@ -370,6 +371,25 @@ static void tc_port_fixup_legacy_flag(struct
> intel_tc_port *tc,
>  	tc->legacy_port = !tc->legacy_port;
>  }
> 
> +static void tc_phy_load_fia_params(struct intel_tc_port *tc, bool
> +modular_fia) {
> +	struct drm_i915_private *i915 = tc_to_i915(tc);
> +	enum port port = tc->dig_port->base.port;
> +	enum tc_port tc_port = intel_port_to_tc(i915, port);
> +
> +	/*
> +	 * Each Modular FIA instance houses 2 TC ports. In SOC that has more
> +	 * than two TC ports, there are multiple instances of Modular FIA.
> +	 */
> +	if (modular_fia) {
> +		tc->phy_fia = tc_port / 2;
> +		tc->phy_fia_idx = tc_port % 2;
> +	} else {
> +		tc->phy_fia = FIA1;
> +		tc->phy_fia_idx = tc_port;
> +	}
> +}
> +
>  /**
>   * ICL TC PHY handlers
>   * -------------------
> @@ -597,6 +617,11 @@ static void icl_tc_phy_disconnect(struct intel_tc_port
> *tc)
>  	}
>  }
> 
> +static void icl_tc_phy_init(struct intel_tc_port *tc) {
> +	tc_phy_load_fia_params(tc, false);
> +}
> +
>  static const struct intel_tc_phy_ops icl_tc_phy_ops = {
>  	.cold_off_domain = icl_tc_phy_cold_off_domain,
>  	.hpd_live_status = icl_tc_phy_hpd_live_status, @@ -605,6 +630,7 @@
> static const struct intel_tc_phy_ops icl_tc_phy_ops = {
>  	.get_hw_state = icl_tc_phy_get_hw_state,
>  	.connect = icl_tc_phy_connect,
>  	.disconnect = icl_tc_phy_disconnect,
> +	.init = icl_tc_phy_init,
>  };
> 
>  /**
> @@ -617,6 +643,20 @@ tgl_tc_phy_cold_off_domain(struct intel_tc_port *tc)
>  	return POWER_DOMAIN_TC_COLD_OFF;
>  }
> 
> +static void tgl_tc_phy_init(struct intel_tc_port *tc) {
> +	struct drm_i915_private *i915 = tc_to_i915(tc);
> +	intel_wakeref_t wakeref;
> +	u32 val;
> +
> +	with_intel_display_power(i915, tc_phy_cold_off_domain(tc), wakeref)
> +		val = intel_de_read(i915, PORT_TX_DFLEXDPSP(FIA1));
> +
> +	drm_WARN_ON(&i915->drm, val == 0xffffffff);
> +
> +	tc_phy_load_fia_params(tc, val & MODULAR_FIA_MASK); }
> +
>  static const struct intel_tc_phy_ops tgl_tc_phy_ops = {
>  	.cold_off_domain = tgl_tc_phy_cold_off_domain,
>  	.hpd_live_status = icl_tc_phy_hpd_live_status, @@ -625,6 +665,7 @@
> static const struct intel_tc_phy_ops tgl_tc_phy_ops = {
>  	.get_hw_state = icl_tc_phy_get_hw_state,
>  	.connect = icl_tc_phy_connect,
>  	.disconnect = icl_tc_phy_disconnect,
> +	.init = tgl_tc_phy_init,
>  };
> 
>  /**
> @@ -720,6 +761,11 @@ static bool adlp_tc_phy_is_owned(struct intel_tc_port
> *tc)
>  	return val & DDI_BUF_CTL_TC_PHY_OWNERSHIP;  }
> 
> +static void adlp_tc_phy_init(struct intel_tc_port *tc) {
> +	tc_phy_load_fia_params(tc, true);
> +}
> +
>  static const struct intel_tc_phy_ops adlp_tc_phy_ops = {
>  	.cold_off_domain = adlp_tc_phy_cold_off_domain,
>  	.hpd_live_status = adlp_tc_phy_hpd_live_status, @@ -728,6 +774,7
> @@ static const struct intel_tc_phy_ops adlp_tc_phy_ops = {
>  	.get_hw_state = icl_tc_phy_get_hw_state,
>  	.connect = icl_tc_phy_connect,
>  	.disconnect = icl_tc_phy_disconnect,
> +	.init = adlp_tc_phy_init,
>  };
> 
>  /**
> @@ -972,6 +1019,13 @@ static void tc_phy_disconnect(struct intel_tc_port
> *tc)
>  	}
>  }
> 
> +static void tc_phy_init(struct intel_tc_port *tc) {
> +	mutex_lock(&tc->lock);
> +	tc->phy_ops->init(tc);
> +	mutex_unlock(&tc->lock);
> +}
> +
>  static void intel_tc_port_reset_mode(struct intel_tc_port *tc,
>  				     int required_lanes, bool force_disconnect)  {
> @@ -1292,45 +1346,6 @@ void intel_tc_port_put_link(struct intel_digital_port
> *dig_port)
>  	intel_tc_port_flush_work(dig_port);
>  }
> 
> -static bool
> -tc_has_modular_fia(struct drm_i915_private *i915, struct intel_tc_port *tc) -{
> -	intel_wakeref_t wakeref;
> -	u32 val;
> -
> -	if (!INTEL_INFO(i915)->display.has_modular_fia)
> -		return false;
> -
> -	mutex_lock(&tc->lock);
> -	wakeref = tc_cold_block(tc);
> -	val = intel_de_read(i915, PORT_TX_DFLEXDPSP(FIA1));
> -	tc_cold_unblock(tc, wakeref);
> -	mutex_unlock(&tc->lock);
> -
> -	drm_WARN_ON(&i915->drm, val == 0xffffffff);
> -
> -	return val & MODULAR_FIA_MASK;
> -}
> -
> -static void
> -tc_port_load_fia_params(struct drm_i915_private *i915, struct intel_tc_port
> *tc) -{
> -	enum port port = tc->dig_port->base.port;
> -	enum tc_port tc_port = intel_port_to_tc(i915, port);
> -
> -	/*
> -	 * Each Modular FIA instance houses 2 TC ports. In SOC that has more
> -	 * than two TC ports, there are multiple instances of Modular FIA.
> -	 */
> -	if (tc_has_modular_fia(i915, tc)) {
> -		tc->phy_fia = tc_port / 2;
> -		tc->phy_fia_idx = tc_port % 2;
> -	} else {
> -		tc->phy_fia = FIA1;
> -		tc->phy_fia_idx = tc_port;
> -	}
> -}
> -
>  int intel_tc_port_init(struct intel_digital_port *dig_port, bool is_legacy)  {
>  	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev); @@
> -1363,7 +1378,8 @@ int intel_tc_port_init(struct intel_digital_port *dig_port,
> bool is_legacy)
>  	tc->legacy_port = is_legacy;
>  	tc->mode = TC_PORT_DISCONNECTED;
>  	tc->link_refcount = 0;
> -	tc_port_load_fia_params(i915, tc);
> +
> +	tc_phy_init(tc);
> 
>  	intel_tc_port_init_mode(dig_port);
> 
> diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
> index a8d942b16223f..bbc4d62e490e5 100644
> --- a/drivers/gpu/drm/i915/i915_pci.c
> +++ b/drivers/gpu/drm/i915/i915_pci.c
> @@ -896,7 +896,6 @@ static const struct intel_device_info jsl_info = {  static
> const struct intel_device_info tgl_info = {
>  	GEN12_FEATURES,
>  	PLATFORM(INTEL_TIGERLAKE),
> -	.display.has_modular_fia = 1,
>  	.__runtime.platform_engine_mask =
>  		BIT(RCS0) | BIT(BCS0) | BIT(VECS0) | BIT(VCS0) | BIT(VCS2),  };
> @@ -996,7 +995,6 @@ static const struct intel_device_info adl_p_info = {
>  			       BIT(TRANSCODER_C) | BIT(TRANSCODER_D) |
>  			       BIT(TRANSCODER_DSI_0) |
> BIT(TRANSCODER_DSI_1),
>  	.display.has_cdclk_crawl = 1,
> -	.display.has_modular_fia = 1,
>  	.display.has_psr_hw_tracking = 0,
>  	.__runtime.platform_engine_mask =
>  		BIT(RCS0) | BIT(BCS0) | BIT(VECS0) | BIT(VCS0) | BIT(VCS2),
> @@ -1143,7 +1141,6 @@ static const struct intel_device_info mtl_info = {
>  	.__runtime.graphics.ip.rel = 70,
>  	.__runtime.media.ip.ver = 13,
>  	PLATFORM(INTEL_METEORLAKE),
> -	.display.has_modular_fia = 1,
>  	.extra_gt_list = xelpmp_extra_gt,
>  	.has_flat_ccs = 0,
>  	.has_gmd_id = 1,
> diff --git a/drivers/gpu/drm/i915/intel_device_info.h
> b/drivers/gpu/drm/i915/intel_device_info.h
> index b30cc8b97c3a5..dd8b17c155669 100644
> --- a/drivers/gpu/drm/i915/intel_device_info.h
> +++ b/drivers/gpu/drm/i915/intel_device_info.h
> @@ -192,7 +192,6 @@ enum intel_ppgtt_type {
>  	func(has_hotplug); \
>  	func(has_hti); \
>  	func(has_ipc); \
> -	func(has_modular_fia); \
>  	func(has_overlay); \
>  	func(has_psr); \
>  	func(has_psr_hw_tracking); \
> --
> 2.37.1

Re: [Intel-gfx] [PATCH 22/29] drm/i915/adlp/tc: Use the DE HPD ISR register for hotplug detection

[Kahola, Mika]

> -----Original Message-----
> From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Imre
> Deak
> Sent: Thursday, March 23, 2023 4:20 PM
> To: intel-gfx@lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH 22/29] drm/i915/adlp/tc: Use the DE HPD ISR
> register for hotplug detection
> 
> The spec says to use the CPU ISR registers for DP-alt/TBT HPD detection on
> ADLP, so do that instead of using the related IOM/TCSS registers.
> 
> Bspec: 55480, 55482, 49212, 49305
> 

Reviewed-by: Mika Kahola <mika.kahola@intel.com>

> Signed-off-by: Imre Deak <imre.deak@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_tc.c | 21 +++++++++------------
>  1 file changed, 9 insertions(+), 12 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_tc.c
> b/drivers/gpu/drm/i915/display/intel_tc.c
> index 8f159ded501f8..3122f7ce8c9a0 100644
> --- a/drivers/gpu/drm/i915/display/intel_tc.c
> +++ b/drivers/gpu/drm/i915/display/intel_tc.c
> @@ -688,22 +688,19 @@ static u32 adlp_tc_phy_hpd_live_status(struct
> intel_tc_port *tc)  {
>  	struct drm_i915_private *i915 = tc_to_i915(tc);
>  	struct intel_digital_port *dig_port = tc->dig_port;
> -	enum tc_port tc_port = intel_port_to_tc(i915, dig_port->base.port);
> -	u32 isr_bit = i915->display.hotplug.pch_hpd[dig_port->base.hpd_pin];
> -	u32 val, mask = 0;
> +	enum hpd_pin hpd_pin = dig_port->base.hpd_pin;
> +	u32 cpu_isr_bits = i915->display.hotplug.hpd[hpd_pin];
> +	u32 pch_isr_bit = i915->display.hotplug.pch_hpd[hpd_pin];
> +	u32 cpu_isr;
> +	u32 mask = 0;
> 
> -	/*
> -	 * On ADL-P HW/FW will wake from TCCOLD to complete the read
> access of
> -	 * registers in IOM. Note that this doesn't apply to PHY and FIA
> -	 * registers.
> -	 */
> -	val = intel_de_read(i915, TCSS_DDI_STATUS(tc_port));
> -	if (val & TCSS_DDI_STATUS_HPD_LIVE_STATUS_ALT)
> +	cpu_isr = intel_de_read(i915, GEN11_DE_HPD_ISR);
> +	if (cpu_isr & (cpu_isr_bits & GEN11_DE_TC_HOTPLUG_MASK))
>  		mask |= BIT(TC_PORT_DP_ALT);
> -	if (val & TCSS_DDI_STATUS_HPD_LIVE_STATUS_TBT)
> +	if (cpu_isr & (cpu_isr_bits & GEN11_DE_TBT_HOTPLUG_MASK))
>  		mask |= BIT(TC_PORT_TBT_ALT);
> 
> -	if (intel_de_read(i915, SDEISR) & isr_bit)
> +	if (intel_de_read(i915, SDEISR) & pch_isr_bit)
>  		mask |= BIT(TC_PORT_LEGACY);
> 
>  	return mask;
> --
> 2.37.1

Re: [Intel-gfx] [PATCH 23/29] drm/i915/tc: Get power ref for reading the HPD live status register

[Kahola, Mika]

> -----Original Message-----
> From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Imre
> Deak
> Sent: Thursday, March 23, 2023 4:20 PM
> To: intel-gfx@lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH 23/29] drm/i915/tc: Get power ref for reading the
> HPD live status register
> 
> Enable the power required for the HPD live status register access instead of
> depending on the caller blocking the TC-cold power state (during HW readout
> and connector probing).
> 
> A follow up patch will remove connecting/disconnecting the PHY around
> connector probing, so querying the HPD status can happen in this case without
> TC-cold being blocked.
> 

Reviewed-by: Mika Kahola <mika.kahola@intel.com>

> Signed-off-by: Imre Deak <imre.deak@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_tc.c | 27 +++++++++++++++++--------
>  1 file changed, 19 insertions(+), 8 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_tc.c
> b/drivers/gpu/drm/i915/display/intel_tc.c
> index 3122f7ce8c9a0..08a23ab081d74 100644
> --- a/drivers/gpu/drm/i915/display/intel_tc.c
> +++ b/drivers/gpu/drm/i915/display/intel_tc.c
> @@ -411,24 +411,29 @@ static u32 icl_tc_phy_hpd_live_status(struct
> intel_tc_port *tc)
>  	struct drm_i915_private *i915 = tc_to_i915(tc);
>  	struct intel_digital_port *dig_port = tc->dig_port;
>  	u32 isr_bit = i915->display.hotplug.pch_hpd[dig_port->base.hpd_pin];
> +	intel_wakeref_t wakeref;
> +	u32 fia_isr;
> +	u32 pch_isr;
>  	u32 mask = 0;
> -	u32 val;
> 
> -	val = intel_de_read(i915, PORT_TX_DFLEXDPSP(tc->phy_fia));
> +	with_intel_display_power(i915, tc_phy_cold_off_domain(tc), wakeref) {
> +		fia_isr = intel_de_read(i915, PORT_TX_DFLEXDPSP(tc-
> >phy_fia));
> +		pch_isr = intel_de_read(i915, SDEISR);
> +	}
> 
> -	if (val == 0xffffffff) {
> +	if (fia_isr == 0xffffffff) {
>  		drm_dbg_kms(&i915->drm,
>  			    "Port %s: PHY in TCCOLD, nothing connected\n",
>  			    tc->port_name);
>  		return mask;
>  	}
> 
> -	if (val & TC_LIVE_STATE_TBT(tc->phy_fia_idx))
> +	if (fia_isr & TC_LIVE_STATE_TBT(tc->phy_fia_idx))
>  		mask |= BIT(TC_PORT_TBT_ALT);
> -	if (val & TC_LIVE_STATE_TC(tc->phy_fia_idx))
> +	if (fia_isr & TC_LIVE_STATE_TC(tc->phy_fia_idx))
>  		mask |= BIT(TC_PORT_DP_ALT);
> 
> -	if (intel_de_read(i915, SDEISR) & isr_bit)
> +	if (pch_isr & isr_bit)
>  		mask |= BIT(TC_PORT_LEGACY);
> 
>  	return mask;
> @@ -691,16 +696,22 @@ static u32 adlp_tc_phy_hpd_live_status(struct
> intel_tc_port *tc)
>  	enum hpd_pin hpd_pin = dig_port->base.hpd_pin;
>  	u32 cpu_isr_bits = i915->display.hotplug.hpd[hpd_pin];
>  	u32 pch_isr_bit = i915->display.hotplug.pch_hpd[hpd_pin];
> +	intel_wakeref_t wakeref;
>  	u32 cpu_isr;
> +	u32 pch_isr;
>  	u32 mask = 0;
> 
> -	cpu_isr = intel_de_read(i915, GEN11_DE_HPD_ISR);
> +	with_intel_display_power(i915, POWER_DOMAIN_DISPLAY_CORE,
> wakeref) {
> +		cpu_isr = intel_de_read(i915, GEN11_DE_HPD_ISR);
> +		pch_isr = intel_de_read(i915, SDEISR);
> +	}
> +
>  	if (cpu_isr & (cpu_isr_bits & GEN11_DE_TC_HOTPLUG_MASK))
>  		mask |= BIT(TC_PORT_DP_ALT);
>  	if (cpu_isr & (cpu_isr_bits & GEN11_DE_TBT_HOTPLUG_MASK))
>  		mask |= BIT(TC_PORT_TBT_ALT);
> 
> -	if (intel_de_read(i915, SDEISR) & pch_isr_bit)
> +	if (pch_isr & pch_isr_bit)
>  		mask |= BIT(TC_PORT_LEGACY);
> 
>  	return mask;
> --
> 2.37.1

Re: [Intel-gfx] [PATCH 24/29] drm/i915/tc: Don't connect the PHY in intel_tc_port_connected()

[Kahola, Mika]

> -----Original Message-----
> From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Imre
> Deak
> Sent: Thursday, March 23, 2023 4:21 PM
> To: intel-gfx@lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH 24/29] drm/i915/tc: Don't connect the PHY in
> intel_tc_port_connected()
> 
> Connecting the PHY for connector probing - also blocking TC-cold - isn't required
> and has some overhead. Taking only the mutex is sufficient, so do that.
> 

Reviewed-by: Mika Kahola <mika.kahola@intel.com>

> Signed-off-by: Imre Deak <imre.deak@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_tc.c | 11 ++++++++---
>  1 file changed, 8 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_tc.c
> b/drivers/gpu/drm/i915/display/intel_tc.c
> index 08a23ab081d74..f202ba324fd0a 100644
> --- a/drivers/gpu/drm/i915/display/intel_tc.c
> +++ b/drivers/gpu/drm/i915/display/intel_tc.c
> @@ -1235,20 +1235,25 @@ bool intel_tc_port_connected_locked(struct
> intel_encoder *encoder)
>  	struct intel_digital_port *dig_port = enc_to_dig_port(encoder);
>  	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
>  	struct intel_tc_port *tc = to_tc_port(dig_port);
> +	u32 mask = ~0;
> 
>  	drm_WARN_ON(&i915->drm, !intel_tc_port_ref_held(dig_port));
> 
> -	return tc_phy_hpd_live_status(tc) & BIT(tc->mode);
> +	if (tc->mode != TC_PORT_DISCONNECTED)
> +		mask = BIT(tc->mode);
> +
> +	return tc_phy_hpd_live_status(tc) & mask;
>  }
> 
>  bool intel_tc_port_connected(struct intel_encoder *encoder)  {
>  	struct intel_digital_port *dig_port = enc_to_dig_port(encoder);
> +	struct intel_tc_port *tc = to_tc_port(dig_port);
>  	bool is_connected;
> 
> -	intel_tc_port_lock(dig_port);
> +	mutex_lock(&tc->lock);
>  	is_connected = intel_tc_port_connected_locked(encoder);
> -	intel_tc_port_unlock(dig_port);
> +	mutex_unlock(&tc->lock);
> 
>  	return is_connected;
>  }
> --
> 2.37.1

Re: [Intel-gfx] [PATCH 25/29] drm/i915/adlp/tc: Align the connect/disconnect PHY sequence with bspec

[Kahola, Mika]

> -----Original Message-----
> From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Imre
> Deak
> Sent: Thursday, March 23, 2023 4:21 PM
> To: intel-gfx@lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH 25/29] drm/i915/adlp/tc: Align the
> connect/disconnect PHY sequence with bspec
> 
> Bspec has updated the TC connect/disconnect sequences, add the required
> platform hooks for these.
> 
> The difference wrt. the old sequence is the order of taking the PHY ownership -
> while holding a port power reference this requires - and blocking the TC-cold
> power state.
> 
> Bspec: 49294
> 

Reviewed-by: Mika Kahola <mika.kahola@intel.com>

> Signed-off-by: Imre Deak <imre.deak@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_tc.c | 111 ++++++++++++++++++++----
>  1 file changed, 94 insertions(+), 17 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_tc.c
> b/drivers/gpu/drm/i915/display/intel_tc.c
> index f202ba324fd0a..36454ec5e8e09 100644
> --- a/drivers/gpu/drm/i915/display/intel_tc.c
> +++ b/drivers/gpu/drm/i915/display/intel_tc.c
> @@ -59,7 +59,6 @@ static enum intel_display_power_domain
> tc_phy_cold_off_domain(struct intel_tc_port *);  static u32
> tc_phy_hpd_live_status(struct intel_tc_port *tc);  static bool
> tc_phy_is_ready(struct intel_tc_port *tc); -static bool
> tc_phy_take_ownership(struct intel_tc_port *tc, bool take);  static enum
> tc_port_mode tc_phy_get_current_mode(struct intel_tc_port *tc);
> 
>  static const char *tc_port_mode_name(enum tc_port_mode mode) @@ -581,7
> +580,7 @@ static bool icl_tc_phy_connect(struct intel_tc_port *tc,
>  		return true;
> 
>  	if ((!tc_phy_is_ready(tc) ||
> -	     !tc_phy_take_ownership(tc, true)) &&
> +	     !icl_tc_phy_take_ownership(tc, true)) &&
>  	    !drm_WARN_ON(&i915->drm, tc->mode == TC_PORT_LEGACY)) {
>  		drm_dbg_kms(&i915->drm, "Port %s: can't take PHY ownership
> (ready %s)\n",
>  			    tc->port_name,
> @@ -596,7 +595,7 @@ static bool icl_tc_phy_connect(struct intel_tc_port *tc,
>  	return true;
> 
>  out_release_phy:
> -	tc_phy_take_ownership(tc, false);
> +	icl_tc_phy_take_ownership(tc, false);
>  out_unblock_tc_cold:
>  	tc_cold_unblock(tc, fetch_and_zero(&tc->lock_wakeref));
> 
> @@ -612,7 +611,7 @@ static void icl_tc_phy_disconnect(struct intel_tc_port
> *tc)
>  	switch (tc->mode) {
>  	case TC_PORT_LEGACY:
>  	case TC_PORT_DP_ALT:
> -		tc_phy_take_ownership(tc, false);
> +		icl_tc_phy_take_ownership(tc, false);
>  		fallthrough;
>  	case TC_PORT_TBT_ALT:
>  		tc_cold_unblock(tc, fetch_and_zero(&tc->lock_wakeref));
> @@ -769,6 +768,94 @@ static bool adlp_tc_phy_is_owned(struct intel_tc_port
> *tc)
>  	return val & DDI_BUF_CTL_TC_PHY_OWNERSHIP;  }
> 
> +static void adlp_tc_phy_get_hw_state(struct intel_tc_port *tc) {
> +	struct drm_i915_private *i915 = tc_to_i915(tc);
> +	enum intel_display_power_domain port_power_domain =
> +		tc_port_power_domain(tc);
> +	intel_wakeref_t port_wakeref;
> +
> +	port_wakeref = intel_display_power_get(i915, port_power_domain);
> +
> +	tc->mode = tc_phy_get_current_mode(tc);
> +	if (tc->mode != TC_PORT_DISCONNECTED)
> +		tc->lock_wakeref = tc_cold_block(tc);
> +
> +	intel_display_power_put(i915, port_power_domain, port_wakeref); }
> +
> +static bool adlp_tc_phy_connect(struct intel_tc_port *tc, int
> +required_lanes) {
> +	struct drm_i915_private *i915 = tc_to_i915(tc);
> +	enum intel_display_power_domain port_power_domain =
> +		tc_port_power_domain(tc);
> +	intel_wakeref_t port_wakeref;
> +
> +	if (tc->mode == TC_PORT_TBT_ALT) {
> +		tc->lock_wakeref = tc_cold_block(tc);
> +		return true;
> +	}
> +
> +	port_wakeref = intel_display_power_get(i915, port_power_domain);
> +
> +	if (!adlp_tc_phy_take_ownership(tc, true) &&
> +	    !drm_WARN_ON(&i915->drm, tc->mode == TC_PORT_LEGACY)) {
> +		drm_dbg_kms(&i915->drm, "Port %s: can't take PHY
> ownership\n",
> +			    tc->port_name);
> +		goto out_put_port_power;
> +	}
> +
> +	if (!tc_phy_is_ready(tc) &&
> +	    !drm_WARN_ON(&i915->drm, tc->mode == TC_PORT_LEGACY)) {
> +		drm_dbg_kms(&i915->drm, "Port %s: PHY not ready\n",
> +			    tc->port_name);
> +		goto out_release_phy;
> +	}
> +
> +	tc->lock_wakeref = tc_cold_block(tc);
> +
> +	if (!tc_phy_verify_legacy_or_dp_alt_mode(tc, required_lanes))
> +		goto out_unblock_tc_cold;
> +
> +	intel_display_power_put(i915, port_power_domain, port_wakeref);
> +
> +	return true;
> +
> +out_unblock_tc_cold:
> +	tc_cold_unblock(tc, fetch_and_zero(&tc->lock_wakeref));
> +out_release_phy:
> +	adlp_tc_phy_take_ownership(tc, false);
> +out_put_port_power:
> +	intel_display_power_put(i915, port_power_domain, port_wakeref);
> +
> +	return false;
> +}
> +
> +static void adlp_tc_phy_disconnect(struct intel_tc_port *tc) {
> +	struct drm_i915_private *i915 = tc_to_i915(tc);
> +	enum intel_display_power_domain port_power_domain =
> +		tc_port_power_domain(tc);
> +	intel_wakeref_t port_wakeref;
> +
> +	port_wakeref = intel_display_power_get(i915, port_power_domain);
> +
> +	tc_cold_unblock(tc, fetch_and_zero(&tc->lock_wakeref));
> +
> +	switch (tc->mode) {
> +	case TC_PORT_LEGACY:
> +	case TC_PORT_DP_ALT:
> +		adlp_tc_phy_take_ownership(tc, false);
> +		fallthrough;
> +	case TC_PORT_TBT_ALT:
> +		break;
> +	default:
> +		MISSING_CASE(tc->mode);
> +	}
> +
> +	intel_display_power_put(i915, port_power_domain, port_wakeref); }
> +
>  static void adlp_tc_phy_init(struct intel_tc_port *tc)  {
>  	tc_phy_load_fia_params(tc, true);
> @@ -779,9 +866,9 @@ static const struct intel_tc_phy_ops adlp_tc_phy_ops = {
>  	.hpd_live_status = adlp_tc_phy_hpd_live_status,
>  	.is_ready = adlp_tc_phy_is_ready,
>  	.is_owned = adlp_tc_phy_is_owned,
> -	.get_hw_state = icl_tc_phy_get_hw_state,
> -	.connect = icl_tc_phy_connect,
> -	.disconnect = icl_tc_phy_disconnect,
> +	.get_hw_state = adlp_tc_phy_get_hw_state,
> +	.connect = adlp_tc_phy_connect,
> +	.disconnect = adlp_tc_phy_disconnect,
>  	.init = adlp_tc_phy_init,
>  };
> 
> @@ -823,16 +910,6 @@ static void tc_phy_get_hw_state(struct intel_tc_port
> *tc)
>  	tc->phy_ops->get_hw_state(tc);
>  }
> 
> -static bool tc_phy_take_ownership(struct intel_tc_port *tc, bool take) -{
> -	struct drm_i915_private *i915 = tc_to_i915(tc);
> -
> -	if (IS_ALDERLAKE_P(i915))
> -		return adlp_tc_phy_take_ownership(tc, take);
> -
> -	return icl_tc_phy_take_ownership(tc, take);
> -}
> -
>  static bool tc_phy_is_ready_and_owned(struct intel_tc_port *tc,
>  				      bool phy_is_ready, bool phy_is_owned)  {
> --
> 2.37.1

Re: [Intel-gfx] [PATCH 26/29] drm/i915: Move shared DPLL disabling into CRTC disable hook

[Kahola, Mika]

> -----Original Message-----
> From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Imre
> Deak
> Sent: Thursday, March 23, 2023 4:21 PM
> To: intel-gfx@lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH 26/29] drm/i915: Move shared DPLL disabling into
> CRTC disable hook
> 
> The spec requires disabling the PLL on TC ports before disconnecting the port's
> PHY. Prepare for that by moving the PLL disabling to the CRTC disable hook,
> while disconnecting the PHY will be moved to the
> post_pll_disable() encoder hook in the next patch.
> 

Reviewed-by: Mika Kahola <mika.kahola@intel.com>

> Signed-off-by: Imre Deak <imre.deak@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_display.c | 5 ++++-
>  1 file changed, 4 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c
> b/drivers/gpu/drm/i915/display/intel_display.c
> index 5a386c7c0bc92..ca024f288ab65 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -1905,6 +1905,8 @@ static void ilk_crtc_disable(struct intel_atomic_state
> *state,
> 
>  	intel_set_cpu_fifo_underrun_reporting(dev_priv, pipe, true);
>  	intel_set_pch_fifo_underrun_reporting(dev_priv, pipe, true);
> +
> +	intel_disable_shared_dpll(old_crtc_state);
>  }
> 
>  static void hsw_crtc_disable(struct intel_atomic_state *state, @@ -1923,6
> +1925,8 @@ static void hsw_crtc_disable(struct intel_atomic_state *state,
>  		intel_encoders_post_disable(state, crtc);
>  	}
> 
> +	intel_disable_shared_dpll(old_crtc_state);
> +
>  	intel_dmc_disable_pipe(i915, crtc->pipe);  }
> 
> @@ -7035,7 +7039,6 @@ static void intel_old_crtc_state_disables(struct
> intel_atomic_state *state,
>  	dev_priv->display.funcs.display->crtc_disable(state, crtc);
>  	crtc->active = false;
>  	intel_fbc_disable(crtc);
> -	intel_disable_shared_dpll(old_crtc_state);
> 
>  	if (!new_crtc_state->hw.active)
>  		intel_initial_watermarks(state, crtc);
> --
> 2.37.1

Re: [Intel-gfx] [PATCH 27/29] drm/i915: Disable DPLLs before disconnecting the TC PHY

[Kahola, Mika]

> -----Original Message-----
> From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Imre
> Deak
> Sent: Thursday, March 23, 2023 4:21 PM
> To: intel-gfx@lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH 27/29] drm/i915: Disable DPLLs before disconnecting
> the TC PHY
> 
> Bspec requires disabling the DPLLs on TC ports before disconnecting the port's
> PHY. Add a post_pll_disable encoder hook and move the call to disconnect the
> port's PHY from the post_disable hook to the new hook.
> 

Reviewed-by: Mika Kahola <mika.kahola@intel.com>

> Signed-off-by: Imre Deak <imre.deak@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_ddi.c     | 15 ++++++++++++---
>  drivers/gpu/drm/i915/display/intel_display.c |  2 ++
> drivers/gpu/drm/i915/display/intel_dp_mst.c  | 15 +++++++++++++++
>  3 files changed, 29 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c
> b/drivers/gpu/drm/i915/display/intel_ddi.c
> index dac3ec8fbbc11..62bd4196dc464 100644
> --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> @@ -2720,9 +2720,6 @@ static void intel_ddi_post_disable(struct
> intel_atomic_state *state,
>  				   const struct drm_connector_state
> *old_conn_state)  {
>  	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
> -	struct intel_digital_port *dig_port = enc_to_dig_port(encoder);
> -	enum phy phy = intel_port_to_phy(dev_priv, encoder->port);
> -	bool is_tc_port = intel_phy_is_tc(dev_priv, phy);
>  	struct intel_crtc *slave_crtc;
> 
>  	if (!intel_crtc_has_type(old_crtc_state, INTEL_OUTPUT_DP_MST)) {
> @@ -2772,6 +2769,17 @@ static void intel_ddi_post_disable(struct
> intel_atomic_state *state,
>  	else
>  		intel_ddi_post_disable_dp(state, encoder, old_crtc_state,
>  					  old_conn_state);
> +}
> +
> +static void intel_ddi_post_pll_disable(struct intel_atomic_state *state,
> +				       struct intel_encoder *encoder,
> +				       const struct intel_crtc_state
> *old_crtc_state,
> +				       const struct drm_connector_state
> *old_conn_state) {
> +	struct drm_i915_private *i915 = to_i915(encoder->base.dev);
> +	struct intel_digital_port *dig_port = enc_to_dig_port(encoder);
> +	enum phy phy = intel_port_to_phy(i915, encoder->port);
> +	bool is_tc_port = intel_phy_is_tc(i915, phy);
> 
>  	main_link_aux_power_domain_put(dig_port, old_crtc_state);
> 
> @@ -4398,6 +4406,7 @@ void intel_ddi_init(struct drm_i915_private *dev_priv,
> enum port port)
>  	encoder->pre_pll_enable = intel_ddi_pre_pll_enable;
>  	encoder->pre_enable = intel_ddi_pre_enable;
>  	encoder->disable = intel_disable_ddi;
> +	encoder->post_pll_disable = intel_ddi_post_pll_disable;
>  	encoder->post_disable = intel_ddi_post_disable;
>  	encoder->update_pipe = intel_ddi_update_pipe;
>  	encoder->get_hw_state = intel_ddi_get_hw_state; diff --git
> a/drivers/gpu/drm/i915/display/intel_display.c
> b/drivers/gpu/drm/i915/display/intel_display.c
> index ca024f288ab65..0e171f66d6983 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -1927,6 +1927,8 @@ static void hsw_crtc_disable(struct
> intel_atomic_state *state,
> 
>  	intel_disable_shared_dpll(old_crtc_state);
> 
> +	intel_encoders_post_pll_disable(state, crtc);
> +
>  	intel_dmc_disable_pipe(i915, crtc->pipe);  }
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c
> b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> index a860cbc5dbea8..23302dc738450 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> @@ -623,6 +623,20 @@ static void intel_mst_post_disable_dp(struct
> intel_atomic_state *state,
>  		    intel_dp->active_mst_links);
>  }
> 
> +static void intel_mst_post_pll_disable_dp(struct intel_atomic_state *state,
> +					  struct intel_encoder *encoder,
> +					  const struct intel_crtc_state
> *old_crtc_state,
> +					  const struct drm_connector_state
> *old_conn_state) {
> +	struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
> +	struct intel_digital_port *dig_port = intel_mst->primary;
> +	struct intel_dp *intel_dp = &dig_port->dp;
> +
> +	if (intel_dp->active_mst_links == 0 &&
> +	    dig_port->base.post_pll_disable)
> +		dig_port->base.post_pll_disable(state, encoder, old_crtc_state,
> +old_conn_state); }
> +
>  static void intel_mst_pre_pll_enable_dp(struct intel_atomic_state *state,
>  					struct intel_encoder *encoder,
>  					const struct intel_crtc_state
> *pipe_config, @@ -1146,6 +1160,7 @@
> intel_dp_create_fake_mst_encoder(struct intel_digital_port *dig_port, enum
> pipe
>  	intel_encoder->compute_config_late =
> intel_dp_mst_compute_config_late;
>  	intel_encoder->disable = intel_mst_disable_dp;
>  	intel_encoder->post_disable = intel_mst_post_disable_dp;
> +	intel_encoder->post_pll_disable = intel_mst_post_pll_disable_dp;
>  	intel_encoder->update_pipe = intel_ddi_update_pipe;
>  	intel_encoder->pre_pll_enable = intel_mst_pre_pll_enable_dp;
>  	intel_encoder->pre_enable = intel_mst_pre_enable_dp;
> --
> 2.37.1

Re: [Intel-gfx] [PATCH 28/29] drm/i915: Remove TC PHY disconnect workaround

[Kahola, Mika]

> -----Original Message-----
> From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Imre
> Deak
> Sent: Thursday, March 23, 2023 4:21 PM
> To: intel-gfx@lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH 28/29] drm/i915: Remove TC PHY disconnect
> workaround
> 
> After the previous patch the workaround for a TC PHY hang issue is not required
> any more, remove it.
> 

Reviewed-by: Mika Kahola <mika.kahola@intel.com>

> Signed-off-by: Imre Deak <imre.deak@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_tc.c | 8 --------
>  1 file changed, 8 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_tc.c
> b/drivers/gpu/drm/i915/display/intel_tc.c
> index 36454ec5e8e09..6dd8208417836 100644
> --- a/drivers/gpu/drm/i915/display/intel_tc.c
> +++ b/drivers/gpu/drm/i915/display/intel_tc.c
> @@ -1426,14 +1426,6 @@ void intel_tc_port_put_link(struct intel_digital_port
> *dig_port)
>  	intel_tc_port_lock(dig_port);
>  	__intel_tc_port_put_link(tc);
>  	intel_tc_port_unlock(dig_port);
> -
> -	/*
> -	 * Disconnecting the PHY after the PHY's PLL gets disabled may
> -	 * hang the system on ADL-P, so disconnect the PHY here synchronously.
> -	 * TODO: remove this once the root cause of the ordering requirement
> -	 * is found/fixed.
> -	 */
> -	intel_tc_port_flush_work(dig_port);
>  }
> 
>  int intel_tc_port_init(struct intel_digital_port *dig_port, bool is_legacy)
> --
> 2.37.1

Re: [Intel-gfx] [PATCH 29/29] drm/i915: Remove the encoder update_prepare()/complete() hooks

[Kahola, Mika]

> -----Original Message-----
> From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Imre
> Deak
> Sent: Thursday, March 23, 2023 4:21 PM
> To: intel-gfx@lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH 29/29] drm/i915: Remove the encoder
> update_prepare()/complete() hooks
> 
> The encoder update_prepare()/complete() hooks were added to hold a TC port
> link reference for all outputs in the atomic state around the whole modeset
> enable sequence - thus locking the ports' TC mode - and set the TBT/DP-alt PLL
> type corresponding to the current TC mode.
> 
> Since nothing depends on the PLL selection before/after then encoder's
> pre_pll_enable/post_pll_disable hooks are called, the above steps can be moved
> to these hooks, so do that and remove the
> update_prepare()/complete() hooks.
> 

Reviewed-by: Mika Kahola <mika.kahola@intel.com>

> Signed-off-by: Imre Deak <imre.deak@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_ddi.c      | 49 +++---------
>  drivers/gpu/drm/i915/display/intel_display.c  | 78 -------------------
>  .../drm/i915/display/intel_display_types.h    |  6 --
>  3 files changed, 12 insertions(+), 121 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c
> b/drivers/gpu/drm/i915/display/intel_ddi.c
> index 62bd4196dc464..dc294717bcdf4 100644
> --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> @@ -3060,39 +3060,6 @@ void intel_ddi_update_pipe(struct
> intel_atomic_state *state,
>  	intel_hdcp_update_pipe(state, encoder, crtc_state, conn_state);  }
> 
> -static void
> -intel_ddi_update_prepare(struct intel_atomic_state *state,
> -			 struct intel_encoder *encoder,
> -			 struct intel_crtc *crtc)
> -{
> -	struct drm_i915_private *i915 = to_i915(state->base.dev);
> -	struct intel_crtc_state *crtc_state =
> -		crtc ? intel_atomic_get_new_crtc_state(state, crtc) : NULL;
> -	int required_lanes = crtc_state ? crtc_state->lane_count : 1;
> -
> -	drm_WARN_ON(state->base.dev, crtc && crtc->active);
> -
> -	intel_tc_port_get_link(enc_to_dig_port(encoder),
> -		               required_lanes);
> -	if (crtc_state && crtc_state->hw.active) {
> -		struct intel_crtc *slave_crtc;
> -
> -		intel_update_active_dpll(state, crtc, encoder);
> -
> -		for_each_intel_crtc_in_pipe_mask(&i915->drm, slave_crtc,
> -
> intel_crtc_bigjoiner_slave_pipes(crtc_state))
> -			intel_update_active_dpll(state, slave_crtc, encoder);
> -	}
> -}
> -
> -static void
> -intel_ddi_update_complete(struct intel_atomic_state *state,
> -			  struct intel_encoder *encoder,
> -			  struct intel_crtc *crtc)
> -{
> -	intel_tc_port_put_link(enc_to_dig_port(encoder));
> -}
> -
>  static void
>  intel_ddi_pre_pll_enable(struct intel_atomic_state *state,
>  			 struct intel_encoder *encoder,
> @@ -3104,9 +3071,20 @@ intel_ddi_pre_pll_enable(struct intel_atomic_state
> *state,
>  	enum phy phy = intel_port_to_phy(dev_priv, encoder->port);
>  	bool is_tc_port = intel_phy_is_tc(dev_priv, phy);
> 
> -	if (is_tc_port)
> +	if (is_tc_port) {
> +		struct intel_crtc *master_crtc =
> +			to_intel_crtc(crtc_state->uapi.crtc);
> +		struct intel_crtc *slave_crtc;
> +
>  		intel_tc_port_get_link(dig_port, crtc_state->lane_count);
> 
> +		intel_update_active_dpll(state, master_crtc, encoder);
> +
> +		for_each_intel_crtc_in_pipe_mask(&dev_priv->drm, slave_crtc,
> +
> intel_crtc_bigjoiner_slave_pipes(crtc_state))
> +			intel_update_active_dpll(state, slave_crtc, encoder);
> +	}
> +
>  	main_link_aux_power_domain_get(dig_port, crtc_state);
> 
>  	if (is_tc_port && !intel_tc_port_in_tbt_alt_mode(dig_port))
> @@ -4552,9 +4530,6 @@ void intel_ddi_init(struct drm_i915_private *dev_priv,
> enum port port)
> 
>  		if (intel_tc_port_init(dig_port, is_legacy) < 0)
>  			goto err;
> -
> -		encoder->update_prepare = intel_ddi_update_prepare;
> -		encoder->update_complete = intel_ddi_update_complete;
>  	}
> 
>  	drm_WARN_ON(&dev_priv->drm, port > PORT_I); diff --git
> a/drivers/gpu/drm/i915/display/intel_display.c
> b/drivers/gpu/drm/i915/display/intel_display.c
> index 0e171f66d6983..cdf2c33cd544d 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -1320,36 +1320,11 @@ static void intel_crtc_disable_planes(struct
> intel_atomic_state *state,
>  	intel_frontbuffer_flip(dev_priv, fb_bits);  }
> 
> -/*
> - * intel_connector_primary_encoder - get the primary encoder for a connector
> - * @connector: connector for which to return the encoder
> - *
> - * Returns the primary encoder for a connector. There is a 1:1 mapping from
> - * all connectors to their encoder, except for DP-MST connectors which have
> - * both a virtual and a primary encoder. These DP-MST primary encoders can be
> - * pointed to by as many DP-MST connectors as there are pipes.
> - */
> -static struct intel_encoder *
> -intel_connector_primary_encoder(struct intel_connector *connector) -{
> -	struct intel_encoder *encoder;
> -
> -	if (connector->mst_port)
> -		return &dp_to_dig_port(connector->mst_port)->base;
> -
> -	encoder = intel_attached_encoder(connector);
> -	drm_WARN_ON(connector->base.dev, !encoder);
> -
> -	return encoder;
> -}
> -
>  static void intel_encoders_update_prepare(struct intel_atomic_state *state)  {
>  	struct drm_i915_private *i915 = to_i915(state->base.dev);
>  	struct intel_crtc_state *new_crtc_state, *old_crtc_state;
>  	struct intel_crtc *crtc;
> -	struct drm_connector_state *new_conn_state;
> -	struct drm_connector *connector;
>  	int i;
> 
>  	/*
> @@ -1365,57 +1340,6 @@ static void intel_encoders_update_prepare(struct
> intel_atomic_state *state)
>  			new_crtc_state->dpll_hw_state = old_crtc_state-
> >dpll_hw_state;
>  		}
>  	}
> -
> -	if (!state->modeset)
> -		return;
> -
> -	for_each_new_connector_in_state(&state->base, connector,
> new_conn_state,
> -					i) {
> -		struct intel_connector *intel_connector;
> -		struct intel_encoder *encoder;
> -		struct intel_crtc *crtc;
> -
> -		if (!intel_connector_needs_modeset(state, connector))
> -			continue;
> -
> -		intel_connector = to_intel_connector(connector);
> -		encoder = intel_connector_primary_encoder(intel_connector);
> -		if (!encoder->update_prepare)
> -			continue;
> -
> -		crtc = new_conn_state->crtc ?
> -			to_intel_crtc(new_conn_state->crtc) : NULL;
> -		encoder->update_prepare(state, encoder, crtc);
> -	}
> -}
> -
> -static void intel_encoders_update_complete(struct intel_atomic_state *state) -
> {
> -	struct drm_connector_state *new_conn_state;
> -	struct drm_connector *connector;
> -	int i;
> -
> -	if (!state->modeset)
> -		return;
> -
> -	for_each_new_connector_in_state(&state->base, connector,
> new_conn_state,
> -					i) {
> -		struct intel_connector *intel_connector;
> -		struct intel_encoder *encoder;
> -		struct intel_crtc *crtc;
> -
> -		if (!intel_connector_needs_modeset(state, connector))
> -			continue;
> -
> -		intel_connector = to_intel_connector(connector);
> -		encoder = intel_connector_primary_encoder(intel_connector);
> -		if (!encoder->update_complete)
> -			continue;
> -
> -		crtc = new_conn_state->crtc ?
> -			to_intel_crtc(new_conn_state->crtc) : NULL;
> -		encoder->update_complete(state, encoder, crtc);
> -	}
>  }
> 
>  static void intel_encoders_pre_pll_enable(struct intel_atomic_state *state, @@
> -7439,8 +7363,6 @@ static void intel_atomic_commit_tail(struct
> intel_atomic_state *state)
>  	/* Now enable the clocks, plane, pipe, and connectors that we set up.
> */
>  	dev_priv->display.funcs.display->commit_modeset_enables(state);
> 
> -	intel_encoders_update_complete(state);
> -
>  	if (state->modeset)
>  		intel_set_cdclk_post_plane_update(state);
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h
> b/drivers/gpu/drm/i915/display/intel_display_types.h
> index ce24e58b2a825..fbdc94ad1d081 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> @@ -170,9 +170,6 @@ struct intel_encoder {
>  	int (*compute_config_late)(struct intel_encoder *,
>  				   struct intel_crtc_state *,
>  				   struct drm_connector_state *);
> -	void (*update_prepare)(struct intel_atomic_state *,
> -			       struct intel_encoder *,
> -			       struct intel_crtc *);
>  	void (*pre_pll_enable)(struct intel_atomic_state *,
>  			       struct intel_encoder *,
>  			       const struct intel_crtc_state *, @@ -185,9 +182,6
> @@ struct intel_encoder {
>  		       struct intel_encoder *,
>  		       const struct intel_crtc_state *,
>  		       const struct drm_connector_state *);
> -	void (*update_complete)(struct intel_atomic_state *,
> -				struct intel_encoder *,
> -				struct intel_crtc *);
>  	void (*disable)(struct intel_atomic_state *,
>  			struct intel_encoder *,
>  			const struct intel_crtc_state *,
> --
> 2.37.1

[Intel-gfx] [PATCH v2 26/29] drm/i915: Move shared DPLL disabling into CRTC disable hook

[Imre Deak]

The spec requires disabling the PLL on TC ports before disconnecting the
port's PHY. Prepare for that by moving the PLL disabling to the CRTC
disable hook, while disconnecting the PHY will be moved to the
post_pll_disable() encoder hook in the next patch.

v2: Move the call from intel_crtc_disable_noatomic() as well.

Reviewed-by: Mika Kahola <mika.kahola@intel.com> # v1
Signed-off-by: Imre Deak <imre.deak@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230323142035.1432621-27-imre.deak@intel.com
---
 drivers/gpu/drm/i915/display/intel_display.c       | 5 ++++-
 drivers/gpu/drm/i915/display/intel_modeset_setup.c | 1 -
 2 files changed, 4 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index b53a1d9693448..1ed584d04c10d 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -1905,6 +1905,8 @@ static void ilk_crtc_disable(struct intel_atomic_state *state,
 
 	intel_set_cpu_fifo_underrun_reporting(dev_priv, pipe, true);
 	intel_set_pch_fifo_underrun_reporting(dev_priv, pipe, true);
+
+	intel_disable_shared_dpll(old_crtc_state);
 }
 
 static void hsw_crtc_disable(struct intel_atomic_state *state,
@@ -1923,6 +1925,8 @@ static void hsw_crtc_disable(struct intel_atomic_state *state,
 		intel_encoders_post_disable(state, crtc);
 	}
 
+	intel_disable_shared_dpll(old_crtc_state);
+
 	intel_dmc_disable_pipe(i915, crtc->pipe);
 }
 
@@ -7041,7 +7045,6 @@ static void intel_old_crtc_state_disables(struct intel_atomic_state *state,
 	dev_priv->display.funcs.display->crtc_disable(state, crtc);
 	crtc->active = false;
 	intel_fbc_disable(crtc);
-	intel_disable_shared_dpll(old_crtc_state);
 
 	if (!new_crtc_state->hw.active)
 		intel_initial_watermarks(state, crtc);
diff --git a/drivers/gpu/drm/i915/display/intel_modeset_setup.c b/drivers/gpu/drm/i915/display/intel_modeset_setup.c
index 4558d02641fe1..134b943f19533 100644
--- a/drivers/gpu/drm/i915/display/intel_modeset_setup.c
+++ b/drivers/gpu/drm/i915/display/intel_modeset_setup.c
@@ -100,7 +100,6 @@ static void intel_crtc_disable_noatomic(struct intel_crtc *crtc,
 
 	intel_fbc_disable(crtc);
 	intel_update_watermarks(i915);
-	intel_disable_shared_dpll(crtc_state);
 
 	intel_display_power_put_all_in_set(i915, &crtc->enabled_power_domains);
 
-- 
2.37.2

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/tc: Align the ADLP TypeC sequences with bspec (rev2)

[Patchwork]

== Series Details ==

Series: drm/i915/tc: Align the ADLP TypeC sequences with bspec (rev2)
URL   : https://patchwork.freedesktop.org/series/115556/
State : warning

== Summary ==

Error: dim checkpatch failed
f150ae6abb0d drm/i915/tc: Group the TC PHY setup/query functions per platform
d3b2402bbd59 drm/i915/tc: Use the adlp prefix for ADLP TC PHY functions
17104bf55736 drm/i915/tc: Rename tc_phy_status_complete() to tc_phy_is_ready()
5f0f541f5002 drm/i915/tc: Use the tc_phy prefix for all TC PHY functions
85c084cfbfa5 drm/i915/tc: Move TC port fields to a new intel_tc_port struct
-:1174: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#1174: FILE: drivers/gpu/drm/i915/display/intel_tc.c:1034:
+	drm_WARN_ON(&i915->drm, tc->mode != TC_PORT_TBT_ALT &&
+				!tc_phy_is_owned(tc));

total: 0 errors, 0 warnings, 1 checks, 1311 lines checked
e56b4a897e02 drm/i915/tc: Check for TC PHY explicitly in intel_tc_port_fia_max_lane_count()
63129624fc1b drm/i915/tc: Move the intel_tc_port struct declaration to intel_tc.c
5b60eefc8902 drm/i915/tc: Add TC PHY hook to get the PHY HPD live status
86b3aba081b1 drm/i915/tc: Add TC PHY hooks to get the PHY ready/owned state
fd17e01184f0 drm/i915/tc: Add TC PHY hook to read out the PHY HW state
8b4ff74805d0 drm/i915/tc: Add generic TC PHY connect/disconnect handlers
1b72bcc2498a drm/i915/tc: Factor out tc_phy_verify_legacy_or_dp_alt_mode()
f57b1bec07e1 drm/i915/tc: Add TC PHY hooks to connect/disconnect the PHY
7e5b5a530c24 drm/i915/tc: Fix up the legacy VBT flag only in disconnected mode
e0b7e27435fb drm/i915/tc: Check TC mode instead of the VBT legacy flag
a1e81259de9c drm/i915/tc: Block/unblock TC-cold in the PHY connect/disconnect hooks
ac96f1a99063 drm/i915/tc: Remove redundant wakeref=0 check from unblock_tc_cold()
609ccb803ea3 drm/i915/tc: Drop tc_cold_block()/unblock()'s power domain parameter
31d3633f6cba drm/i915/tc: Add TC PHY hook to get the TC-cold blocking power domain
b88525569d4e drm/i915/tc: Add asserts in TC PHY hooks that the required power is on
e53fc09f77d1 drm/i915/tc: Add TC PHY hook to init the PHY
66e809ff9d80 drm/i915/adlp/tc: Use the DE HPD ISR register for hotplug detection
2024d3b14de2 drm/i915/tc: Get power ref for reading the HPD live status register
46ab11dccd91 drm/i915/tc: Don't connect the PHY in intel_tc_port_connected()
93a8631602b6 drm/i915/adlp/tc: Align the connect/disconnect PHY sequence with bspec
1af77430eb60 drm/i915: Move shared DPLL disabling into CRTC disable hook
b3510d9a1faf drm/i915: Disable DPLLs before disconnecting the TC PHY
8a1118778c79 drm/i915: Remove TC PHY disconnect workaround
54f026afabd0 drm/i915: Remove the encoder update_prepare()/complete() hooks

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915/tc: Align the ADLP TypeC sequences with bspec (rev2)

[Patchwork]

== Series Details ==

Series: drm/i915/tc: Align the ADLP TypeC sequences with bspec (rev2)
URL   : https://patchwork.freedesktop.org/series/115556/
State : warning

== Summary ==

Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/tc: Align the ADLP TypeC sequences with bspec (rev2)

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 5447 bytes --]

== Series Details ==

Series: drm/i915/tc: Align the ADLP TypeC sequences with bspec (rev2)
URL   : https://patchwork.freedesktop.org/series/115556/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_12946 -> Patchwork_115556v2
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115556v2/index.html

Participating hosts (37 -> 36)
------------------------------

  Missing    (1): fi-snb-2520m 

Known issues
------------

  Here are the changes found in Patchwork_115556v2 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_exec_suspend@basic-s3@smem:
    - bat-rpls-1:         NOTRUN -> [ABORT][1] ([i915#6687] / [i915#7978])
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115556v2/bat-rpls-1/igt@gem_exec_suspend@basic-s3@smem.html

  * igt@i915_pm_rps@basic-api:
    - bat-dg2-11:         [PASS][2] -> [FAIL][3] ([i915#8308])
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12946/bat-dg2-11/igt@i915_pm_rps@basic-api.html
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115556v2/bat-dg2-11/igt@i915_pm_rps@basic-api.html

  * igt@i915_selftest@live@slpc:
    - bat-rpls-1:         NOTRUN -> [DMESG-FAIL][4] ([i915#6367] / [i915#7996])
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115556v2/bat-rpls-1/igt@i915_selftest@live@slpc.html

  * igt@kms_pipe_crc_basic@nonblocking-crc@pipe-d-dp-1:
    - bat-dg2-8:          [PASS][5] -> [FAIL][6] ([i915#7932])
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12946/bat-dg2-8/igt@kms_pipe_crc_basic@nonblocking-crc@pipe-d-dp-1.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115556v2/bat-dg2-8/igt@kms_pipe_crc_basic@nonblocking-crc@pipe-d-dp-1.html

  
#### Possible fixes ####

  * igt@i915_selftest@live@hangcheck:
    - bat-rpls-1:         [INCOMPLETE][7] ([i915#4983]) -> [PASS][8]
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12946/bat-rpls-1/igt@i915_selftest@live@hangcheck.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115556v2/bat-rpls-1/igt@i915_selftest@live@hangcheck.html

  
  [i915#4983]: https://gitlab.freedesktop.org/drm/intel/issues/4983
  [i915#6367]: https://gitlab.freedesktop.org/drm/intel/issues/6367
  [i915#6687]: https://gitlab.freedesktop.org/drm/intel/issues/6687
  [i915#7932]: https://gitlab.freedesktop.org/drm/intel/issues/7932
  [i915#7978]: https://gitlab.freedesktop.org/drm/intel/issues/7978
  [i915#7996]: https://gitlab.freedesktop.org/drm/intel/issues/7996
  [i915#8308]: https://gitlab.freedesktop.org/drm/intel/issues/8308


Build changes
-------------

  * Linux: CI_DRM_12946 -> Patchwork_115556v2

  CI-20190529: 20190529
  CI_DRM_12946: 1a734c75a7bbe1169d90a9fb2b24b0345926a769 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_7230: f0485204004305dd3ee8f8bbbb9c552e53a4e050 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  Patchwork_115556v2: 1a734c75a7bbe1169d90a9fb2b24b0345926a769 @ git://anongit.freedesktop.org/gfx-ci/linux


### Linux commits

3c93475626c2 drm/i915: Remove the encoder update_prepare()/complete() hooks
ca15a7e7a9d4 drm/i915: Remove TC PHY disconnect workaround
4185ab0e6892 drm/i915: Disable DPLLs before disconnecting the TC PHY
fae8d0b1cf92 drm/i915: Move shared DPLL disabling into CRTC disable hook
79a45db7e9dd drm/i915/adlp/tc: Align the connect/disconnect PHY sequence with bspec
78c0f45572dd drm/i915/tc: Don't connect the PHY in intel_tc_port_connected()
9926c7d714e5 drm/i915/tc: Get power ref for reading the HPD live status register
a7d86cff6b3e drm/i915/adlp/tc: Use the DE HPD ISR register for hotplug detection
99081eed7b64 drm/i915/tc: Add TC PHY hook to init the PHY
b44cdebf0cc8 drm/i915/tc: Add asserts in TC PHY hooks that the required power is on
ac10099cf980 drm/i915/tc: Add TC PHY hook to get the TC-cold blocking power domain
4075b8b916fc drm/i915/tc: Drop tc_cold_block()/unblock()'s power domain parameter
4e0ab7beec0b drm/i915/tc: Remove redundant wakeref=0 check from unblock_tc_cold()
503915b10ebc drm/i915/tc: Block/unblock TC-cold in the PHY connect/disconnect hooks
c77b67394815 drm/i915/tc: Check TC mode instead of the VBT legacy flag
046e8c6d8418 drm/i915/tc: Fix up the legacy VBT flag only in disconnected mode
7e61d39c4bf1 drm/i915/tc: Add TC PHY hooks to connect/disconnect the PHY
83233c38655d drm/i915/tc: Factor out tc_phy_verify_legacy_or_dp_alt_mode()
0fcdaddf498c drm/i915/tc: Add generic TC PHY connect/disconnect handlers
997fd5dc34d8 drm/i915/tc: Add TC PHY hook to read out the PHY HW state
8727d89e3eaa drm/i915/tc: Add TC PHY hooks to get the PHY ready/owned state
1de8737356b0 drm/i915/tc: Add TC PHY hook to get the PHY HPD live status
b2d9b3e64cd3 drm/i915/tc: Move the intel_tc_port struct declaration to intel_tc.c
f1e7687a8914 drm/i915/tc: Check for TC PHY explicitly in intel_tc_port_fia_max_lane_count()
80b8c0a77baf drm/i915/tc: Move TC port fields to a new intel_tc_port struct
7ead8c41fc10 drm/i915/tc: Use the tc_phy prefix for all TC PHY functions
c69a8f2d2505 drm/i915/tc: Rename tc_phy_status_complete() to tc_phy_is_ready()
e3969075f318 drm/i915/tc: Use the adlp prefix for ADLP TC PHY functions
c765afd259da drm/i915/tc: Group the TC PHY setup/query functions per platform

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115556v2/index.html

[-- Attachment #2: Type: text/html, Size: 6324 bytes --]

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/tc: Align the ADLP TypeC sequences with bspec (rev2)

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 10032 bytes --]

== Series Details ==

Series: drm/i915/tc: Align the ADLP TypeC sequences with bspec (rev2)
URL   : https://patchwork.freedesktop.org/series/115556/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_12946_full -> Patchwork_115556v2_full
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Participating hosts (7 -> 7)
------------------------------

  No changes in participating hosts

Known issues
------------

  Here are the changes found in Patchwork_115556v2_full that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@kms_ccs@pipe-c-bad-rotation-90-y_tiled_gen12_rc_ccs_cc:
    - shard-glk:          NOTRUN -> [SKIP][1] ([fdo#109271] / [i915#3886]) +1 similar issue
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115556v2/shard-glk5/igt@kms_ccs@pipe-c-bad-rotation-90-y_tiled_gen12_rc_ccs_cc.html

  * igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions:
    - shard-glk:          [PASS][2] -> [FAIL][3] ([i915#2346])
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12946/shard-glk5/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115556v2/shard-glk4/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html

  * igt@kms_frontbuffer_tracking@psr-1p-pri-indfb-multidraw:
    - shard-glk:          NOTRUN -> [SKIP][4] ([fdo#109271]) +31 similar issues
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115556v2/shard-glk5/igt@kms_frontbuffer_tracking@psr-1p-pri-indfb-multidraw.html

  * igt@kms_psr2_sf@overlay-plane-move-continuous-exceed-fully-sf:
    - shard-glk:          NOTRUN -> [SKIP][5] ([fdo#109271] / [i915#658])
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115556v2/shard-glk5/igt@kms_psr2_sf@overlay-plane-move-continuous-exceed-fully-sf.html

  
#### Possible fixes ####

  * {igt@gem_barrier_race@remote-request@rcs0}:
    - shard-glk:          [ABORT][6] ([i915#8211]) -> [PASS][7]
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12946/shard-glk1/igt@gem_barrier_race@remote-request@rcs0.html
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115556v2/shard-glk5/igt@gem_barrier_race@remote-request@rcs0.html

  * igt@gem_eio@reset-stress:
    - {shard-dg1}:        [FAIL][8] ([i915#5784]) -> [PASS][9]
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12946/shard-dg1-14/igt@gem_eio@reset-stress.html
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115556v2/shard-dg1-16/igt@gem_eio@reset-stress.html

  * igt@gem_exec_endless@dispatch@vecs0:
    - {shard-tglu}:       [TIMEOUT][10] ([i915#3778]) -> [PASS][11]
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12946/shard-tglu-6/igt@gem_exec_endless@dispatch@vecs0.html
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115556v2/shard-tglu-5/igt@gem_exec_endless@dispatch@vecs0.html

  * igt@i915_selftest@live@gt_heartbeat:
    - shard-apl:          [DMESG-FAIL][12] ([i915#5334]) -> [PASS][13]
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12946/shard-apl3/igt@i915_selftest@live@gt_heartbeat.html
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115556v2/shard-apl1/igt@i915_selftest@live@gt_heartbeat.html

  * igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size:
    - shard-apl:          [FAIL][14] ([i915#2346]) -> [PASS][15]
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12946/shard-apl1/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115556v2/shard-apl7/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html
    - shard-glk:          [FAIL][16] ([i915#2346]) -> [PASS][17]
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12946/shard-glk2/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115556v2/shard-glk5/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#109283]: https://bugs.freedesktop.org/show_bug.cgi?id=109283
  [fdo#109289]: https://bugs.freedesktop.org/show_bug.cgi?id=109289
  [fdo#109307]: https://bugs.freedesktop.org/show_bug.cgi?id=109307
  [fdo#111825]: https://bugs.freedesktop.org/show_bug.cgi?id=111825
  [fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
  [i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072
  [i915#1397]: https://gitlab.freedesktop.org/drm/intel/issues/1397
  [i915#1839]: https://gitlab.freedesktop.org/drm/intel/issues/1839
  [i915#2346]: https://gitlab.freedesktop.org/drm/intel/issues/2346
  [i915#2433]: https://gitlab.freedesktop.org/drm/intel/issues/2433
  [i915#2437]: https://gitlab.freedesktop.org/drm/intel/issues/2437
  [i915#2527]: https://gitlab.freedesktop.org/drm/intel/issues/2527
  [i915#2575]: https://gitlab.freedesktop.org/drm/intel/issues/2575
  [i915#2587]: https://gitlab.freedesktop.org/drm/intel/issues/2587
  [i915#2672]: https://gitlab.freedesktop.org/drm/intel/issues/2672
  [i915#2705]: https://gitlab.freedesktop.org/drm/intel/issues/2705
  [i915#2842]: https://gitlab.freedesktop.org/drm/intel/issues/2842
  [i915#3063]: https://gitlab.freedesktop.org/drm/intel/issues/3063
  [i915#3281]: https://gitlab.freedesktop.org/drm/intel/issues/3281
  [i915#3282]: https://gitlab.freedesktop.org/drm/intel/issues/3282
  [i915#3297]: https://gitlab.freedesktop.org/drm/intel/issues/3297
  [i915#3299]: https://gitlab.freedesktop.org/drm/intel/issues/3299
  [i915#3359]: https://gitlab.freedesktop.org/drm/intel/issues/3359
  [i915#3458]: https://gitlab.freedesktop.org/drm/intel/issues/3458
  [i915#3539]: https://gitlab.freedesktop.org/drm/intel/issues/3539
  [i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555
  [i915#3638]: https://gitlab.freedesktop.org/drm/intel/issues/3638
  [i915#3689]: https://gitlab.freedesktop.org/drm/intel/issues/3689
  [i915#3708]: https://gitlab.freedesktop.org/drm/intel/issues/3708
  [i915#3778]: https://gitlab.freedesktop.org/drm/intel/issues/3778
  [i915#3840]: https://gitlab.freedesktop.org/drm/intel/issues/3840
  [i915#3886]: https://gitlab.freedesktop.org/drm/intel/issues/3886
  [i915#3952]: https://gitlab.freedesktop.org/drm/intel/issues/3952
  [i915#3989]: https://gitlab.freedesktop.org/drm/intel/issues/3989
  [i915#4077]: https://gitlab.freedesktop.org/drm/intel/issues/4077
  [i915#4078]: https://gitlab.freedesktop.org/drm/intel/issues/4078
  [i915#4079]: https://gitlab.freedesktop.org/drm/intel/issues/4079
  [i915#4083]: https://gitlab.freedesktop.org/drm/intel/issues/4083
  [i915#4103]: https://gitlab.freedesktop.org/drm/intel/issues/4103
  [i915#4212]: https://gitlab.freedesktop.org/drm/intel/issues/4212
  [i915#4213]: https://gitlab.freedesktop.org/drm/intel/issues/4213
  [i915#4270]: https://gitlab.freedesktop.org/drm/intel/issues/4270
  [i915#4391]: https://gitlab.freedesktop.org/drm/intel/issues/4391
  [i915#4538]: https://gitlab.freedesktop.org/drm/intel/issues/4538
  [i915#454]: https://gitlab.freedesktop.org/drm/intel/issues/454
  [i915#4565]: https://gitlab.freedesktop.org/drm/intel/issues/4565
  [i915#4579]: https://gitlab.freedesktop.org/drm/intel/issues/4579
  [i915#4771]: https://gitlab.freedesktop.org/drm/intel/issues/4771
  [i915#4812]: https://gitlab.freedesktop.org/drm/intel/issues/4812
  [i915#4818]: https://gitlab.freedesktop.org/drm/intel/issues/4818
  [i915#4833]: https://gitlab.freedesktop.org/drm/intel/issues/4833
  [i915#4852]: https://gitlab.freedesktop.org/drm/intel/issues/4852
  [i915#4859]: https://gitlab.freedesktop.org/drm/intel/issues/4859
  [i915#4860]: https://gitlab.freedesktop.org/drm/intel/issues/4860
  [i915#4885]: https://gitlab.freedesktop.org/drm/intel/issues/4885
  [i915#5176]: https://gitlab.freedesktop.org/drm/intel/issues/5176
  [i915#5235]: https://gitlab.freedesktop.org/drm/intel/issues/5235
  [i915#5286]: https://gitlab.freedesktop.org/drm/intel/issues/5286
  [i915#5334]: https://gitlab.freedesktop.org/drm/intel/issues/5334
  [i915#5563]: https://gitlab.freedesktop.org/drm/intel/issues/5563
  [i915#5784]: https://gitlab.freedesktop.org/drm/intel/issues/5784
  [i915#6095]: https://gitlab.freedesktop.org/drm/intel/issues/6095
  [i915#6301]: https://gitlab.freedesktop.org/drm/intel/issues/6301
  [i915#6524]: https://gitlab.freedesktop.org/drm/intel/issues/6524
  [i915#658]: https://gitlab.freedesktop.org/drm/intel/issues/658
  [i915#6946]: https://gitlab.freedesktop.org/drm/intel/issues/6946
  [i915#6953]: https://gitlab.freedesktop.org/drm/intel/issues/6953
  [i915#7116]: https://gitlab.freedesktop.org/drm/intel/issues/7116
  [i915#7697]: https://gitlab.freedesktop.org/drm/intel/issues/7697
  [i915#7711]: https://gitlab.freedesktop.org/drm/intel/issues/7711
  [i915#7828]: https://gitlab.freedesktop.org/drm/intel/issues/7828
  [i915#7975]: https://gitlab.freedesktop.org/drm/intel/issues/7975
  [i915#8011]: https://gitlab.freedesktop.org/drm/intel/issues/8011
  [i915#8211]: https://gitlab.freedesktop.org/drm/intel/issues/8211
  [i915#8234]: https://gitlab.freedesktop.org/drm/intel/issues/8234


Build changes
-------------

  * Linux: CI_DRM_12946 -> Patchwork_115556v2

  CI-20190529: 20190529
  CI_DRM_12946: 1a734c75a7bbe1169d90a9fb2b24b0345926a769 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_7230: f0485204004305dd3ee8f8bbbb9c552e53a4e050 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  Patchwork_115556v2: 1a734c75a7bbe1169d90a9fb2b24b0345926a769 @ git://anongit.freedesktop.org/gfx-ci/linux
  piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115556v2/index.html

[-- Attachment #2: Type: text/html, Size: 6519 bytes --]

Re: [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/tc: Align the ADLP TypeC sequences with bspec (rev2)

[Imre Deak]

On Sat, Apr 01, 2023 at 12:02:32AM +0000, Patchwork wrote:
> == Series Details ==
> 
> Series: drm/i915/tc: Align the ADLP TypeC sequences with bspec (rev2)
> URL   : https://patchwork.freedesktop.org/series/115556/
> State : success

Thanks for the review, patchset is pushed to -din.

> 
> == Summary ==
> 
> CI Bug Log - changes from CI_DRM_12946_full -> Patchwork_115556v2_full
> ====================================================
> 
> Summary
> -------
> 
>   **SUCCESS**
> 
>   No regressions found.
> 
>   
> 
> Participating hosts (7 -> 7)
> ------------------------------
> 
>   No changes in participating hosts
> 
> Known issues
> ------------
> 
>   Here are the changes found in Patchwork_115556v2_full that come from known issues:
> 
> ### IGT changes ###
> 
> #### Issues hit ####
> 
>   * igt@kms_ccs@pipe-c-bad-rotation-90-y_tiled_gen12_rc_ccs_cc:
>     - shard-glk:          NOTRUN -> [SKIP][1] ([fdo#109271] / [i915#3886]) +1 similar issue
>    [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115556v2/shard-glk5/igt@kms_ccs@pipe-c-bad-rotation-90-y_tiled_gen12_rc_ccs_cc.html
> 
>   * igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions:
>     - shard-glk:          [PASS][2] -> [FAIL][3] ([i915#2346])
>    [2]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12946/shard-glk5/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html
>    [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115556v2/shard-glk4/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html
> 
>   * igt@kms_frontbuffer_tracking@psr-1p-pri-indfb-multidraw:
>     - shard-glk:          NOTRUN -> [SKIP][4] ([fdo#109271]) +31 similar issues
>    [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115556v2/shard-glk5/igt@kms_frontbuffer_tracking@psr-1p-pri-indfb-multidraw.html
> 
>   * igt@kms_psr2_sf@overlay-plane-move-continuous-exceed-fully-sf:
>     - shard-glk:          NOTRUN -> [SKIP][5] ([fdo#109271] / [i915#658])
>    [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115556v2/shard-glk5/igt@kms_psr2_sf@overlay-plane-move-continuous-exceed-fully-sf.html
> 
>   
> #### Possible fixes ####
> 
>   * {igt@gem_barrier_race@remote-request@rcs0}:
>     - shard-glk:          [ABORT][6] ([i915#8211]) -> [PASS][7]
>    [6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12946/shard-glk1/igt@gem_barrier_race@remote-request@rcs0.html
>    [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115556v2/shard-glk5/igt@gem_barrier_race@remote-request@rcs0.html
> 
>   * igt@gem_eio@reset-stress:
>     - {shard-dg1}:        [FAIL][8] ([i915#5784]) -> [PASS][9]
>    [8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12946/shard-dg1-14/igt@gem_eio@reset-stress.html
>    [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115556v2/shard-dg1-16/igt@gem_eio@reset-stress.html
> 
>   * igt@gem_exec_endless@dispatch@vecs0:
>     - {shard-tglu}:       [TIMEOUT][10] ([i915#3778]) -> [PASS][11]
>    [10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12946/shard-tglu-6/igt@gem_exec_endless@dispatch@vecs0.html
>    [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115556v2/shard-tglu-5/igt@gem_exec_endless@dispatch@vecs0.html
> 
>   * igt@i915_selftest@live@gt_heartbeat:
>     - shard-apl:          [DMESG-FAIL][12] ([i915#5334]) -> [PASS][13]
>    [12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12946/shard-apl3/igt@i915_selftest@live@gt_heartbeat.html
>    [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115556v2/shard-apl1/igt@i915_selftest@live@gt_heartbeat.html
> 
>   * igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size:
>     - shard-apl:          [FAIL][14] ([i915#2346]) -> [PASS][15]
>    [14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12946/shard-apl1/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html
>    [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115556v2/shard-apl7/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html
>     - shard-glk:          [FAIL][16] ([i915#2346]) -> [PASS][17]
>    [16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12946/shard-glk2/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html
>    [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115556v2/shard-glk5/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html
> 
>   
>   {name}: This element is suppressed. This means it is ignored when computing
>           the status of the difference (SUCCESS, WARNING, or FAILURE).
> 
>   [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
>   [fdo#109283]: https://bugs.freedesktop.org/show_bug.cgi?id=109283
>   [fdo#109289]: https://bugs.freedesktop.org/show_bug.cgi?id=109289
>   [fdo#109307]: https://bugs.freedesktop.org/show_bug.cgi?id=109307
>   [fdo#111825]: https://bugs.freedesktop.org/show_bug.cgi?id=111825
>   [fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
>   [i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072
>   [i915#1397]: https://gitlab.freedesktop.org/drm/intel/issues/1397
>   [i915#1839]: https://gitlab.freedesktop.org/drm/intel/issues/1839
>   [i915#2346]: https://gitlab.freedesktop.org/drm/intel/issues/2346
>   [i915#2433]: https://gitlab.freedesktop.org/drm/intel/issues/2433
>   [i915#2437]: https://gitlab.freedesktop.org/drm/intel/issues/2437
>   [i915#2527]: https://gitlab.freedesktop.org/drm/intel/issues/2527
>   [i915#2575]: https://gitlab.freedesktop.org/drm/intel/issues/2575
>   [i915#2587]: https://gitlab.freedesktop.org/drm/intel/issues/2587
>   [i915#2672]: https://gitlab.freedesktop.org/drm/intel/issues/2672
>   [i915#2705]: https://gitlab.freedesktop.org/drm/intel/issues/2705
>   [i915#2842]: https://gitlab.freedesktop.org/drm/intel/issues/2842
>   [i915#3063]: https://gitlab.freedesktop.org/drm/intel/issues/3063
>   [i915#3281]: https://gitlab.freedesktop.org/drm/intel/issues/3281
>   [i915#3282]: https://gitlab.freedesktop.org/drm/intel/issues/3282
>   [i915#3297]: https://gitlab.freedesktop.org/drm/intel/issues/3297
>   [i915#3299]: https://gitlab.freedesktop.org/drm/intel/issues/3299
>   [i915#3359]: https://gitlab.freedesktop.org/drm/intel/issues/3359
>   [i915#3458]: https://gitlab.freedesktop.org/drm/intel/issues/3458
>   [i915#3539]: https://gitlab.freedesktop.org/drm/intel/issues/3539
>   [i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555
>   [i915#3638]: https://gitlab.freedesktop.org/drm/intel/issues/3638
>   [i915#3689]: https://gitlab.freedesktop.org/drm/intel/issues/3689
>   [i915#3708]: https://gitlab.freedesktop.org/drm/intel/issues/3708
>   [i915#3778]: https://gitlab.freedesktop.org/drm/intel/issues/3778
>   [i915#3840]: https://gitlab.freedesktop.org/drm/intel/issues/3840
>   [i915#3886]: https://gitlab.freedesktop.org/drm/intel/issues/3886
>   [i915#3952]: https://gitlab.freedesktop.org/drm/intel/issues/3952
>   [i915#3989]: https://gitlab.freedesktop.org/drm/intel/issues/3989
>   [i915#4077]: https://gitlab.freedesktop.org/drm/intel/issues/4077
>   [i915#4078]: https://gitlab.freedesktop.org/drm/intel/issues/4078
>   [i915#4079]: https://gitlab.freedesktop.org/drm/intel/issues/4079
>   [i915#4083]: https://gitlab.freedesktop.org/drm/intel/issues/4083
>   [i915#4103]: https://gitlab.freedesktop.org/drm/intel/issues/4103
>   [i915#4212]: https://gitlab.freedesktop.org/drm/intel/issues/4212
>   [i915#4213]: https://gitlab.freedesktop.org/drm/intel/issues/4213
>   [i915#4270]: https://gitlab.freedesktop.org/drm/intel/issues/4270
>   [i915#4391]: https://gitlab.freedesktop.org/drm/intel/issues/4391
>   [i915#4538]: https://gitlab.freedesktop.org/drm/intel/issues/4538
>   [i915#454]: https://gitlab.freedesktop.org/drm/intel/issues/454
>   [i915#4565]: https://gitlab.freedesktop.org/drm/intel/issues/4565
>   [i915#4579]: https://gitlab.freedesktop.org/drm/intel/issues/4579
>   [i915#4771]: https://gitlab.freedesktop.org/drm/intel/issues/4771
>   [i915#4812]: https://gitlab.freedesktop.org/drm/intel/issues/4812
>   [i915#4818]: https://gitlab.freedesktop.org/drm/intel/issues/4818
>   [i915#4833]: https://gitlab.freedesktop.org/drm/intel/issues/4833
>   [i915#4852]: https://gitlab.freedesktop.org/drm/intel/issues/4852
>   [i915#4859]: https://gitlab.freedesktop.org/drm/intel/issues/4859
>   [i915#4860]: https://gitlab.freedesktop.org/drm/intel/issues/4860
>   [i915#4885]: https://gitlab.freedesktop.org/drm/intel/issues/4885
>   [i915#5176]: https://gitlab.freedesktop.org/drm/intel/issues/5176
>   [i915#5235]: https://gitlab.freedesktop.org/drm/intel/issues/5235
>   [i915#5286]: https://gitlab.freedesktop.org/drm/intel/issues/5286
>   [i915#5334]: https://gitlab.freedesktop.org/drm/intel/issues/5334
>   [i915#5563]: https://gitlab.freedesktop.org/drm/intel/issues/5563
>   [i915#5784]: https://gitlab.freedesktop.org/drm/intel/issues/5784
>   [i915#6095]: https://gitlab.freedesktop.org/drm/intel/issues/6095
>   [i915#6301]: https://gitlab.freedesktop.org/drm/intel/issues/6301
>   [i915#6524]: https://gitlab.freedesktop.org/drm/intel/issues/6524
>   [i915#658]: https://gitlab.freedesktop.org/drm/intel/issues/658
>   [i915#6946]: https://gitlab.freedesktop.org/drm/intel/issues/6946
>   [i915#6953]: https://gitlab.freedesktop.org/drm/intel/issues/6953
>   [i915#7116]: https://gitlab.freedesktop.org/drm/intel/issues/7116
>   [i915#7697]: https://gitlab.freedesktop.org/drm/intel/issues/7697
>   [i915#7711]: https://gitlab.freedesktop.org/drm/intel/issues/7711
>   [i915#7828]: https://gitlab.freedesktop.org/drm/intel/issues/7828
>   [i915#7975]: https://gitlab.freedesktop.org/drm/intel/issues/7975
>   [i915#8011]: https://gitlab.freedesktop.org/drm/intel/issues/8011
>   [i915#8211]: https://gitlab.freedesktop.org/drm/intel/issues/8211
>   [i915#8234]: https://gitlab.freedesktop.org/drm/intel/issues/8234
> 
> 
> Build changes
> -------------
> 
>   * Linux: CI_DRM_12946 -> Patchwork_115556v2
> 
>   CI-20190529: 20190529
>   CI_DRM_12946: 1a734c75a7bbe1169d90a9fb2b24b0345926a769 @ git://anongit.freedesktop.org/gfx-ci/linux
>   IGT_7230: f0485204004305dd3ee8f8bbbb9c552e53a4e050 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
>   Patchwork_115556v2: 1a734c75a7bbe1169d90a9fb2b24b0345926a769 @ git://anongit.freedesktop.org/gfx-ci/linux
>   piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
> 
> == Logs ==
> 
> For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115556v2/index.html