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From: Pu Wen <puwen@hygon.cn>
To: bp@alien8.de, pbonzini@redhat.com, rkrcmar@redhat.com,
	tglx@linutronix.de, mingo@redhat.com, hpa@zytor.com,
	x86@kernel.org, thomas.lendacky@amd.com
Cc: linux-kernel@vger.kernel.org, linux-arch@vger.kernel.org,
	kvm@vger.kernel.org, Pu Wen <puwen@hygon.cn>
Subject: [PATCH v8 11/16] x86/kvm: Add Hygon Dhyana support to KVM infrastructure
Date: Sun, 23 Sep 2018 17:36:31 +0800	[thread overview]
Message-ID: <654dd12876149fba9561698eaf9fc15d030301f8.1537533369.git.puwen@hygon.cn> (raw)
Message-ID: <20180923093631.zdbcQfT9qYAN47kXSA1iiCx6iwhlS72J1dkXkQhYUG8@z> (raw)
In-Reply-To: <cover.1537533368.git.puwen@hygon.cn>

The Hygon Dhyana CPU has the SVM feature as AMD family 17h does.
So enable the KVM infrastructure support to it.

Signed-off-by: Pu Wen <puwen@hygon.cn>
Reviewed-by: Borislav Petkov <bp@suse.de>
---
 arch/x86/include/asm/kvm_emulate.h |  4 ++++
 arch/x86/include/asm/virtext.h     |  5 +++--
 arch/x86/kvm/emulate.c             | 11 ++++++++++-
 3 files changed, 17 insertions(+), 3 deletions(-)

diff --git a/arch/x86/include/asm/kvm_emulate.h b/arch/x86/include/asm/kvm_emulate.h
index 0f82cd9..93c4bf5 100644
--- a/arch/x86/include/asm/kvm_emulate.h
+++ b/arch/x86/include/asm/kvm_emulate.h
@@ -364,6 +364,10 @@ struct x86_emulate_ctxt {
 #define X86EMUL_CPUID_VENDOR_AMDisbetterI_ecx 0x21726574
 #define X86EMUL_CPUID_VENDOR_AMDisbetterI_edx 0x74656273
 
+#define X86EMUL_CPUID_VENDOR_HygonGenuine_ebx 0x6f677948
+#define X86EMUL_CPUID_VENDOR_HygonGenuine_ecx 0x656e6975
+#define X86EMUL_CPUID_VENDOR_HygonGenuine_edx 0x6e65476e
+
 #define X86EMUL_CPUID_VENDOR_GenuineIntel_ebx 0x756e6547
 #define X86EMUL_CPUID_VENDOR_GenuineIntel_ecx 0x6c65746e
 #define X86EMUL_CPUID_VENDOR_GenuineIntel_edx 0x49656e69
diff --git a/arch/x86/include/asm/virtext.h b/arch/x86/include/asm/virtext.h
index 0116b2e..e05e0d3 100644
--- a/arch/x86/include/asm/virtext.h
+++ b/arch/x86/include/asm/virtext.h
@@ -83,9 +83,10 @@ static inline void cpu_emergency_vmxoff(void)
  */
 static inline int cpu_has_svm(const char **msg)
 {
-	if (boot_cpu_data.x86_vendor != X86_VENDOR_AMD) {
+	if (boot_cpu_data.x86_vendor != X86_VENDOR_AMD &&
+	    boot_cpu_data.x86_vendor != X86_VENDOR_HYGON) {
 		if (msg)
-			*msg = "not amd";
+			*msg = "not amd or hygon";
 		return 0;
 	}
 
diff --git a/arch/x86/kvm/emulate.c b/arch/x86/kvm/emulate.c
index 106482d..34edf19 100644
--- a/arch/x86/kvm/emulate.c
+++ b/arch/x86/kvm/emulate.c
@@ -2711,7 +2711,16 @@ static bool em_syscall_is_enabled(struct x86_emulate_ctxt *ctxt)
 	    edx == X86EMUL_CPUID_VENDOR_AMDisbetterI_edx)
 		return true;
 
-	/* default: (not Intel, not AMD), apply Intel's stricter rules... */
+	/* Hygon ("HygonGenuine") */
+	if (ebx == X86EMUL_CPUID_VENDOR_HygonGenuine_ebx &&
+	    ecx == X86EMUL_CPUID_VENDOR_HygonGenuine_ecx &&
+	    edx == X86EMUL_CPUID_VENDOR_HygonGenuine_edx)
+		return true;
+
+	/*
+	 * default: (not Intel, not AMD, not Hygon), apply Intel's
+	 * stricter rules...
+	 */
 	return false;
 }
 
-- 
2.7.4

  parent reply	other threads:[~2018-09-23 15:33 UTC|newest]

Thread overview: 48+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-09-23  9:30 [PATCH v8 00/16] Add support for Hygon Dhyana Family 18h processor Pu Wen
2018-09-23  9:30 ` Pu Wen
2018-09-23  9:33 ` [PATCH v8 01/16] x86/cpu: Create Hygon Dhyana architecture support file Pu Wen
2018-09-23  9:33   ` Pu Wen
2018-09-23  9:33 ` [PATCH v8 02/16] x86/cpu: Get cache info and setup cache cpumap for Hygon Dhyana Pu Wen
2018-09-23  9:33   ` Pu Wen
2018-09-23  9:34 ` [PATCH v8 03/16] x86/cpu/mtrr: Support TOP_MEM2 and get MTRR number Pu Wen
2018-09-23  9:34   ` Pu Wen
2018-09-23  9:34 ` [PATCH v8 04/16] x86/smpboot: SMP init no delay and not flush caches before sleep Pu Wen
2018-09-23  9:34   ` Pu Wen
2018-09-23  9:34 ` [PATCH v8 05/16] perf/x86: Add Hygon Dhyana support to PMU infrastructure Pu Wen
2018-09-23  9:34   ` Pu Wen
2018-09-23  9:35 ` [PATCH v8 06/16] x86/alternative: Init ideal_nops for Hygon Dhyana Pu Wen
2018-09-23  9:35   ` Pu Wen
2018-09-23  9:35 ` [PATCH v8 07/16] x86/pci: Add Hygon Dhyana support to PCI and north bridge Pu Wen
2018-09-23  9:35   ` Pu Wen
2018-09-23 11:10   ` Borislav Petkov
2018-09-23 11:10     ` Borislav Petkov
2018-09-23 12:54     ` Pu Wen
2018-09-23 12:54       ` Pu Wen
2018-09-24 15:24   ` Borislav Petkov
2018-09-24 15:24     ` Borislav Petkov
2018-09-25 12:27     ` Pu Wen
2018-09-25 12:27       ` Pu Wen
2018-09-25 12:30       ` Borislav Petkov
2018-09-25 12:30         ` Borislav Petkov
2018-09-25 12:57         ` Pu Wen
2018-09-25 12:57           ` Pu Wen
2018-09-25 14:45     ` [PATCH 1/2] x86/amd_nb: Add vendor checking for strict function access Pu Wen
2018-09-25 14:45       ` Pu Wen
2018-09-25 14:46     ` [PATCH 2/2] x86/pci: Add Hygon Dhyana support to PCI and north bridge Pu Wen
2018-09-25 14:46       ` Pu Wen
2018-09-23  9:35 ` [PATCH v8 08/16] x86/apic: Add Hygon Dhyana support to APIC Pu Wen
2018-09-23  9:35   ` Pu Wen
2018-09-23  9:35 ` [PATCH v8 09/16] x86/bugs: Add mitigation to spectre and no meltdown for Hygon Dhyana Pu Wen
2018-09-23  9:35   ` Pu Wen
2018-09-23  9:36 ` [PATCH v8 10/16] x86/mce: Add Hygon Dhyana support to MCE infrastructure Pu Wen
2018-09-23  9:36   ` Pu Wen
2018-09-23  9:36 ` Pu Wen [this message]
2018-09-23  9:36   ` [PATCH v8 11/16] x86/kvm: Add Hygon Dhyana support to KVM infrastructure Pu Wen
2018-09-23  9:36 ` [PATCH v8 12/16] x86/xen: Add Hygon Dhyana support to Xen Pu Wen
2018-09-23  9:36   ` Pu Wen
2018-09-23  9:37 ` [PATCH v8 13/16] ACPI, x86: Add Hygon Dhyana support Pu Wen
2018-09-23  9:37   ` Pu Wen
2018-09-23  9:37 ` [PATCH v8 14/16] cpufreq, " Pu Wen
2018-09-23  9:37   ` Pu Wen
2018-09-23  9:37 ` [PATCH v8 15/16] EDAC, amd64: " Pu Wen
2018-09-23  9:37   ` Pu Wen

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