From: Catalin Marinas <catalin.marinas@arm.com> To: Kristina Martsenko <kristina.martsenko@arm.com> Cc: Ramana Radhakrishnan <ramana.radhakrishnan@foss.arm.com>, "linux-arm-kernel@lists.infradead.org" <linux-arm-kernel@lists.infradead.org>, Mark Rutland <Mark.Rutland@arm.com>, "linux-arch@vger.kernel.org" <linux-arch@vger.kernel.org>, Andrew Jones <drjones@redhat.com>, Jacob Bramley <Jacob.Bramley@arm.com>, Arnd Bergmann <arnd@arndb.de>, Ard Biesheuvel <ard.biesheuvel@linaro.org>, Marc Zyngier <Marc.Zyngier@arm.com>, Adam Wallis <awallis@codeaurora.org>, Suzuki Poulose <Suzuki.Poulose@arm.com>, Will Deacon <Will.Deacon@arm.com>, Christoffer Dall <Christoffer.Dall@arm.com>, "kvmarm@lists.cs.columbia.edu" <kvmarm@lists.cs.columbia.edu>, Amit Kachhap <Amit.Kachhap@arm.com>, Dave P Martin <Dave.Martin@arm.com>, "linux-kernel@vger.kernel.org" <linux-kernel> Subject: Re: [PATCH v5 11/17] arm64: docs: document pointer authentication Date: Fri, 19 Oct 2018 12:35:56 +0100 [thread overview] Message-ID: <20181019113556.ljbdmjo5pdw7muvz@mbp> (raw) In-Reply-To: <7b0de19b-45b9-f4df-25d1-c7e80fab49dc@arm.com> On Tue, Oct 16, 2018 at 05:14:39PM +0100, Kristina Martsenko wrote: > On 05/10/2018 10:04, Ramana Radhakrishnan wrote: > > On 05/10/2018 09:47, Kristina Martsenko wrote: > >> +Virtualization > >> +-------------- > >> + > >> +Pointer authentication is not currently supported in KVM guests. KVM > >> +will mask the feature bits from ID_AA64ISAR1_EL1, and attempted use of > >> +the feature will result in an UNDEFINED exception being injected into > >> +the guest. > > > > However applications using instructions from the hint space will > > continue to work albeit without any protection (as they would just be > > nops) ? > > Mostly, yes. If the guest leaves SCTLR_EL1.EnIA unset (and > EnIB/EnDA/EnDB), then PAC* and AUT* instructions in the HINT space will > execute as NOPs. If the guest sets EnIA, then PAC*/AUT* instructions > will trap and KVM will inject an "Unknown reason" exception into the > guest (which will cause a Linux guest to send a SIGILL to the application). I think that part is fine. If KVM (a fairly recent version with CPUID sanitisation) does not enable ptr auth, the CPUID should not advertise this feature either so the guest kernel should not enable it. For the above instructions in the HINT space, they will just be NOPs. If the guest kernel enables the feature regardless of the CPUID information, it deserves to get an "Unknown reason" exception. > In the latter case we could instead pretend the instruction was a NOP > and not inject an exception, but trapping twice per every function would > probably be terrible for performance. The guest shouldn't be setting > EnIA anyway if ID_AA64ISAR1_EL1 reports that pointer authentication is > not present (because KVM has hidden it). I don't think we should. The SCTLR_EL1 bits are RES0 unless you know that the feature is present via CPUID. > The other special case is the XPACLRI instruction, which is also in the > HINT space. Currently it will trap and KVM will inject an exception into > the guest. We should probably change this to NOP instead, as that's what > applications will expect. Unfortunately there is no EnIA-like control to > make it NOP. Very good catch. Basically if EL2 doesn't know about ptr auth (older distro), EL1 may or may not know but leaves SCTLR_EL1 disabled (based on CPUID), the default HCR_EL2 is to trap (I'm ignoring EL3 as that's like to have ptr auth enabled, being built for the specific HW). So a user app considering XPACLRI a NOP (or inoffensive) will get a SIGILL (injected by the guest kernel following the injection of "Unknown reason" exception by KVM). Ramana, is XPACLRI commonly generated by gcc and expects it to be a NOP? Could we restrict it to only being used at run-time if the corresponding HWCAP is set? This means redefining this instruction as no longer in the NOP space. > One option is for KVM to pretend the instruction was a NOP and return to > the guest. But if XPACLRI gets executed frequently, then the constant > trapping might hurt performance. I don't know how frequently it might > get used, as I don't know of any applications currently using it. From > what I understand, it may be used by userspace stack unwinders. > > (Also worth noting - as far as I can tell there is no easy way for KVM > to know which pointer authentication instruction caused the trap, so we > may have to do something unusual like use "at s12e1r" to read guest > memory and check for XPACLRI.) Indeed, it's not an easy fix. As discussed (in the office), we can't even guarantee that the guest stage 1 translation is stable and points to the actual XPACLRI instruction. > The other option is to turn off trapping entirely. However then on a > big.LITTLE system with mismatched pointer authentication support > instructions will work intermittently on some CPUs but not others. That's another case but let's assume we never see such configurations ;). -- Catalin
WARNING: multiple messages have this Message-ID (diff)
From: Catalin Marinas <catalin.marinas@arm.com> To: Kristina Martsenko <kristina.martsenko@arm.com> Cc: Ramana Radhakrishnan <ramana.radhakrishnan@foss.arm.com>, "linux-arm-kernel@lists.infradead.org" <linux-arm-kernel@lists.infradead.org>, Mark Rutland <Mark.Rutland@arm.com>, "linux-arch@vger.kernel.org" <linux-arch@vger.kernel.org>, Andrew Jones <drjones@redhat.com>, Jacob Bramley <Jacob.Bramley@arm.com>, Arnd Bergmann <arnd@arndb.de>, Ard Biesheuvel <ard.biesheuvel@linaro.org>, Marc Zyngier <Marc.Zyngier@arm.com>, Adam Wallis <awallis@codeaurora.org>, Suzuki Poulose <Suzuki.Poulose@arm.com>, Will Deacon <Will.Deacon@arm.com>, Christoffer Dall <Christoffer.Dall@arm.com>, "kvmarm@lists.cs.columbia.edu" <kvmarm@lists.cs.columbia.edu>, Amit Kachhap <Amit.Kachhap@arm.com>, Dave P Martin <Dave.Martin@arm.com>, "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>, Kees Cook <keescook@chromium.org> Subject: Re: [PATCH v5 11/17] arm64: docs: document pointer authentication Date: Fri, 19 Oct 2018 12:35:56 +0100 [thread overview] Message-ID: <20181019113556.ljbdmjo5pdw7muvz@mbp> (raw) Message-ID: <20181019113556.2qb5Ug33yI91avuwiOJ70qkwi5qdOx2sSNeLAMwHsXE@z> (raw) In-Reply-To: <7b0de19b-45b9-f4df-25d1-c7e80fab49dc@arm.com> On Tue, Oct 16, 2018 at 05:14:39PM +0100, Kristina Martsenko wrote: > On 05/10/2018 10:04, Ramana Radhakrishnan wrote: > > On 05/10/2018 09:47, Kristina Martsenko wrote: > >> +Virtualization > >> +-------------- > >> + > >> +Pointer authentication is not currently supported in KVM guests. KVM > >> +will mask the feature bits from ID_AA64ISAR1_EL1, and attempted use of > >> +the feature will result in an UNDEFINED exception being injected into > >> +the guest. > > > > However applications using instructions from the hint space will > > continue to work albeit without any protection (as they would just be > > nops) ? > > Mostly, yes. If the guest leaves SCTLR_EL1.EnIA unset (and > EnIB/EnDA/EnDB), then PAC* and AUT* instructions in the HINT space will > execute as NOPs. If the guest sets EnIA, then PAC*/AUT* instructions > will trap and KVM will inject an "Unknown reason" exception into the > guest (which will cause a Linux guest to send a SIGILL to the application). I think that part is fine. If KVM (a fairly recent version with CPUID sanitisation) does not enable ptr auth, the CPUID should not advertise this feature either so the guest kernel should not enable it. For the above instructions in the HINT space, they will just be NOPs. If the guest kernel enables the feature regardless of the CPUID information, it deserves to get an "Unknown reason" exception. > In the latter case we could instead pretend the instruction was a NOP > and not inject an exception, but trapping twice per every function would > probably be terrible for performance. The guest shouldn't be setting > EnIA anyway if ID_AA64ISAR1_EL1 reports that pointer authentication is > not present (because KVM has hidden it). I don't think we should. The SCTLR_EL1 bits are RES0 unless you know that the feature is present via CPUID. > The other special case is the XPACLRI instruction, which is also in the > HINT space. Currently it will trap and KVM will inject an exception into > the guest. We should probably change this to NOP instead, as that's what > applications will expect. Unfortunately there is no EnIA-like control to > make it NOP. Very good catch. Basically if EL2 doesn't know about ptr auth (older distro), EL1 may or may not know but leaves SCTLR_EL1 disabled (based on CPUID), the default HCR_EL2 is to trap (I'm ignoring EL3 as that's like to have ptr auth enabled, being built for the specific HW). So a user app considering XPACLRI a NOP (or inoffensive) will get a SIGILL (injected by the guest kernel following the injection of "Unknown reason" exception by KVM). Ramana, is XPACLRI commonly generated by gcc and expects it to be a NOP? Could we restrict it to only being used at run-time if the corresponding HWCAP is set? This means redefining this instruction as no longer in the NOP space. > One option is for KVM to pretend the instruction was a NOP and return to > the guest. But if XPACLRI gets executed frequently, then the constant > trapping might hurt performance. I don't know how frequently it might > get used, as I don't know of any applications currently using it. From > what I understand, it may be used by userspace stack unwinders. > > (Also worth noting - as far as I can tell there is no easy way for KVM > to know which pointer authentication instruction caused the trap, so we > may have to do something unusual like use "at s12e1r" to read guest > memory and check for XPACLRI.) Indeed, it's not an easy fix. As discussed (in the office), we can't even guarantee that the guest stage 1 translation is stable and points to the actual XPACLRI instruction. > The other option is to turn off trapping entirely. However then on a > big.LITTLE system with mismatched pointer authentication support > instructions will work intermittently on some CPUs but not others. That's another case but let's assume we never see such configurations ;). -- Catalin
next prev parent reply other threads:[~2018-10-19 11:35 UTC|newest] Thread overview: 124+ messages / expand[flat|nested] mbox.gz Atom feed top 2018-10-05 8:47 [PATCH 00/17] ARMv8.3 pointer authentication support Kristina Martsenko 2018-10-05 8:47 ` Kristina Martsenko 2018-10-05 8:47 ` [PATCH v5 01/17] arm64: add pointer authentication register bits Kristina Martsenko 2018-10-05 8:47 ` Kristina Martsenko 2018-10-11 16:28 ` Will Deacon 2018-10-11 16:28 ` Will Deacon 2018-10-12 8:53 ` Mark Rutland 2018-10-12 8:53 ` Mark Rutland 2018-10-12 8:56 ` Will Deacon 2018-10-12 8:56 ` Will Deacon 2018-10-12 9:50 ` Mark Rutland 2018-10-12 9:50 ` Mark Rutland 2018-10-05 8:47 ` [PATCH v5 02/17] arm64/kvm: consistently handle host HCR_EL2 flags Kristina Martsenko 2018-10-05 8:47 ` Kristina Martsenko 2018-10-05 8:47 ` [PATCH v5 03/17] arm64/kvm: hide ptrauth from guests Kristina Martsenko 2018-10-05 8:47 ` Kristina Martsenko 2018-10-05 8:47 ` [PATCH v5 04/17] arm64: Don't trap host pointer auth use to EL2 Kristina Martsenko 2018-10-05 8:47 ` Kristina Martsenko 2018-10-05 8:47 ` [PATCH v5 05/17] arm64/cpufeature: detect pointer authentication Kristina Martsenko 2018-10-05 8:47 ` Kristina Martsenko 2018-10-05 8:47 ` [PATCH v5 06/17] asm-generic: mm_hooks: allow hooks to be overridden individually Kristina Martsenko 2018-10-05 8:47 ` Kristina Martsenko 2018-10-05 8:47 ` [PATCH v5 07/17] arm64: add basic pointer authentication support Kristina Martsenko 2018-10-05 8:47 ` Kristina Martsenko 2018-10-11 16:00 ` Suzuki K Poulose 2018-10-11 16:00 ` Suzuki K Poulose 2018-10-19 11:15 ` Catalin Marinas 2018-10-19 11:15 ` Catalin Marinas 2018-10-19 11:24 ` Will Deacon 2018-10-19 11:24 ` Will Deacon 2018-10-19 15:36 ` Kees Cook 2018-10-19 15:36 ` Kees Cook 2018-10-19 15:49 ` Will Deacon 2018-10-19 15:49 ` Will Deacon 2018-10-19 16:05 ` Kees Cook 2018-10-19 16:05 ` Kees Cook 2018-10-19 16:16 ` Will Deacon 2018-10-19 16:16 ` Will Deacon 2018-10-19 15:54 ` Mark Rutland 2018-10-19 15:54 ` Mark Rutland 2018-10-19 16:49 ` Cyrill Gorcunov 2018-10-19 16:49 ` Cyrill Gorcunov 2018-11-14 18:11 ` Will Deacon 2018-11-14 18:11 ` Will Deacon 2018-11-15 10:25 ` Dave Martin 2018-11-15 10:25 ` Dave Martin 2018-10-23 8:36 ` Ramana Radhakrishnan 2018-10-23 8:36 ` Ramana Radhakrishnan 2018-10-23 10:20 ` Will Deacon 2018-10-23 10:20 ` Will Deacon 2018-10-05 8:47 ` [PATCH v5 08/17] arm64: expose user PAC bit positions via ptrace Kristina Martsenko 2018-10-05 8:47 ` Kristina Martsenko 2018-10-05 8:47 ` [PATCH v5 09/17] arm64: perf: strip PAC when unwinding userspace Kristina Martsenko 2018-10-05 8:47 ` Kristina Martsenko 2018-10-05 8:47 ` [PATCH v5 10/17] arm64: enable pointer authentication Kristina Martsenko 2018-10-05 8:47 ` Kristina Martsenko 2018-10-05 8:47 ` [PATCH v5 11/17] arm64: docs: document " Kristina Martsenko 2018-10-05 8:47 ` Kristina Martsenko 2018-10-05 9:04 ` Ramana Radhakrishnan 2018-10-05 9:04 ` Ramana Radhakrishnan 2018-10-16 16:14 ` Kristina Martsenko 2018-10-16 16:14 ` Kristina Martsenko 2018-10-19 11:35 ` Catalin Marinas [this message] 2018-10-19 11:35 ` Catalin Marinas 2018-10-19 11:47 ` Marc Zyngier 2018-10-19 11:47 ` Marc Zyngier 2018-10-19 12:22 ` Will Deacon 2018-10-19 12:22 ` Will Deacon 2018-10-19 14:42 ` Kristina Martsenko 2018-10-19 14:42 ` Kristina Martsenko 2018-10-19 15:10 ` Catalin Marinas 2018-10-19 15:10 ` Catalin Marinas 2018-10-19 17:45 ` Will Deacon 2018-10-19 17:45 ` Will Deacon 2018-11-02 6:02 ` Jon Masters 2018-11-02 6:02 ` Jon Masters 2018-10-24 10:56 ` Ramana Radhakrishnan 2018-10-24 10:56 ` Ramana Radhakrishnan 2018-10-15 22:35 ` Kees Cook 2018-10-15 22:35 ` Kees Cook 2018-11-02 9:46 ` Ramana Radhakrishnan 2018-11-02 9:46 ` Ramana Radhakrishnan 2018-10-05 8:47 ` [RFC 12/17] arm64: move ptrauth keys to thread_info Kristina Martsenko 2018-10-05 8:47 ` Kristina Martsenko 2018-10-19 11:38 ` Catalin Marinas 2018-10-19 11:38 ` Catalin Marinas 2018-10-05 8:47 ` [RFC 13/17] arm64: install user ptrauth keys at kernel exit time Kristina Martsenko 2018-10-05 8:47 ` Kristina Martsenko 2018-10-05 8:47 ` [RFC 14/17] arm64: unwind: strip PAC from kernel addresses Kristina Martsenko 2018-10-05 8:47 ` Kristina Martsenko 2018-10-05 8:47 ` [RFC 15/17] arm64: enable ptrauth earlier Kristina Martsenko 2018-10-05 8:47 ` Kristina Martsenko 2018-10-06 12:51 ` Amit Kachhap 2018-10-06 12:51 ` Amit Kachhap 2018-10-05 8:47 ` [RFC 16/17] arm64: initialize and switch ptrauth kernel keys Kristina Martsenko 2018-10-05 8:47 ` Kristina Martsenko 2018-10-06 12:56 ` Amit Kachhap 2018-10-06 12:56 ` Amit Kachhap 2018-10-05 8:47 ` [RFC 17/17] arm64: compile the kernel with ptrauth -msign-return-address Kristina Martsenko 2018-10-05 8:47 ` Kristina Martsenko 2018-10-05 9:01 ` Ramana Radhakrishnan 2018-10-05 9:01 ` Ramana Radhakrishnan 2018-10-11 14:00 ` Kristina Martsenko 2018-10-11 14:00 ` Kristina Martsenko 2018-10-11 14:23 ` Vladimir Murzin 2018-10-11 14:23 ` Vladimir Murzin 2018-10-15 22:38 ` Kees Cook 2018-10-15 22:38 ` Kees Cook 2018-10-15 22:42 ` [PATCH 00/17] ARMv8.3 pointer authentication support Kees Cook 2018-10-15 22:42 ` Kees Cook 2018-11-13 16:17 ` Kristina Martsenko 2018-11-13 16:17 ` Kristina Martsenko 2018-11-13 23:09 ` Kees Cook 2018-11-13 23:09 ` Kees Cook 2018-11-14 15:54 ` Kristina Martsenko 2018-11-14 15:54 ` Kristina Martsenko 2018-11-14 21:47 ` Mark Rutland 2018-11-14 21:47 ` Mark Rutland 2018-11-14 22:48 ` Kees Cook 2018-11-14 22:48 ` Kees Cook 2018-10-19 12:36 ` Will Deacon 2018-10-19 12:36 ` Will Deacon 2018-10-23 8:39 ` Ramana Radhakrishnan 2018-10-23 8:39 ` Ramana Radhakrishnan
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