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From: Adam Ford <aford173@gmail.com>
To: linux-arm-kernel@lists.infradead.org
Cc: aford@beaconembedded.com, Adam Ford <aford173@gmail.com>,
	Rob Herring <robh+dt@kernel.org>, Shawn Guo <shawnguo@kernel.org>,
	Sascha Hauer <s.hauer@pengutronix.de>,
	Pengutronix Kernel Team <kernel@pengutronix.de>,
	Fabio Estevam <festevam@gmail.com>,
	NXP Linux Team <linux-imx@nxp.com>,
	Lucas Stach <l.stach@pengutronix.de>,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: [PATCH V2 4/9] dt-bindings: soc: add binding for i.MX8MN DISP blk-ctrl
Date: Sat,  9 Oct 2021 11:26:54 -0500	[thread overview]
Message-ID: <20211009162700.1452857-5-aford173@gmail.com> (raw)
In-Reply-To: <20211009162700.1452857-1-aford173@gmail.com>

Add the DT binding for the i.MX8MN DISP blk-ctrl.

Signed-off-by: Adam Ford <aford173@gmail.com>
---
 .../soc/imx/fsl,imx8mn-disp-blk-ctrl.yaml     | 97 +++++++++++++++++++
 1 file changed, 97 insertions(+)

diff --git a/Documentation/devicetree/bindings/soc/imx/fsl,imx8mn-disp-blk-ctrl.yaml b/Documentation/devicetree/bindings/soc/imx/fsl,imx8mn-disp-blk-ctrl.yaml
new file mode 100644
index 000000000000..493b86658ad8
--- /dev/null
+++ b/Documentation/devicetree/bindings/soc/imx/fsl,imx8mn-disp-blk-ctrl.yaml
@@ -0,0 +1,97 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/soc/imx/fsl,imx8mn-disp-blk-ctrl.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: NXP i.MX8MN DISP blk-ctrl
+
+maintainers:
+  - Lucas Stach <l.stach@pengutronix.de>
+
+description:
+  The i.MX8MN DISP blk-ctrl is a top-level peripheral providing access to
+  the NoC and ensuring proper power sequencing of the display and MIPI CSI
+  peripherals located in the DISP domain of the SoC.
+
+properties:
+  compatible:
+    items:
+      - const: fsl,imx8mn-disp-blk-ctrl
+      - const: syscon
+
+  reg:
+    maxItems: 1
+
+  '#power-domain-cells':
+    const: 1
+
+  power-domains:
+    minItems: 5
+    maxItems: 5
+
+  power-domain-names:
+    items:
+      - const: bus
+      - const: isi
+      - const: lcdif
+      - const: mipi-dsi
+      - const: mipi-csi
+
+  clocks:
+    minItems: 11
+    maxItems: 11
+
+  clock-names:
+    items:
+      - const: disp_axi
+      - const: disp_apb
+      - const: disp_axi_root
+      - const: disp_apb_root
+      - const: lcdif-axi
+      - const: lcdif-apb
+      - const: lcdif-pix
+      - const: dsi-pclk
+      - const: dsi-ref
+      - const: csi-aclk
+      - const: csi-pclk
+
+required:
+  - compatible
+  - reg
+  - power-domains
+  - power-domain-names
+  - clocks
+  - clock-names
+
+additionalProperties: false
+
+examples:
+  - |
+    #include <dt-bindings/clock/imx8mm-clock.h>
+    #include <dt-bindings/power/imx8mn-power.h>
+
+    disp_blk_ctl: blk_ctrl@32e28000 {
+      compatible = "fsl,imx8mn-disp-blk-ctrl", "syscon";
+      reg = <0x32e28000 0x100>;
+      power-domains = <&pgc_dispmix>, <&pgc_dispmix>,
+                      <&pgc_dispmix>, <&pgc_mipi>,
+                      <&pgc_mipi>;
+      power-domain-names = "bus", "isi", "lcdif", "mipi-dsi",
+                           "mipi-csi";
+      clocks = <&clk IMX8MN_CLK_DISP_AXI>,
+               <&clk IMX8MN_CLK_DISP_APB>,
+               <&clk IMX8MN_CLK_DISP_AXI_ROOT>,
+               <&clk IMX8MN_CLK_DISP_APB_ROOT>,
+               <&clk IMX8MN_CLK_DISP_AXI_ROOT>,
+               <&clk IMX8MN_CLK_DISP_APB_ROOT>,
+               <&clk IMX8MN_CLK_DISP_PIXEL_ROOT>,
+               <&clk IMX8MN_CLK_DSI_CORE>,
+               <&clk IMX8MN_CLK_DSI_PHY_REF>,
+               <&clk IMX8MN_CLK_CSI1_PHY_REF>,
+               <&clk IMX8MN_CLK_CAMERA_PIXEL_ROOT>;
+       clock-names = "disp_axi", "disp_apb", "disp_axi_root", "disp_apb_root",
+                     "lcdif-axi", "lcdif-apb", "lcdif-pix", "dsi-pclk",
+                     "dsi-ref", "csi-aclk", "csi-pclk";
+       #power-domain-cells = <1>;
+    };
-- 
2.25.1


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  parent reply	other threads:[~2021-10-09 16:30 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-10-09 16:26 [PATCH V2 0/9] arm64: imx8mn: Enable additional power domains and peripherals Adam Ford
2021-10-09 16:26 ` [PATCH V2 1/9] soc: imx: gpcv2: keep i.MX8MN gpumix bus clock enabled Adam Ford
2021-10-09 16:26 ` [PATCH V2 2/9] soc: imx: gpcv2: Add dispmix and mipi domains to imx8mn Adam Ford
2021-10-09 16:26 ` [PATCH V2 3/9] dt-bindings: power: imx8mn: add defines for DISP blk-ctrl domains Adam Ford
2021-10-09 16:26 ` Adam Ford [this message]
2021-10-10 19:31   ` [PATCH V2 4/9] dt-bindings: soc: add binding for i.MX8MN DISP blk-ctrl Rob Herring
2021-10-09 16:26 ` [PATCH V2 5/9] soc: imx: imx8m-blk-ctrl: add " Adam Ford
2021-10-16 21:02   ` Adam Ford
2021-10-09 16:26 ` [PATCH V2 6/9] arm64: dts: imx8mn: add GPC node Adam Ford
2021-10-09 16:26 ` [PATCH V2 7/9] arm64: dts: imx8mn: put USB controller into power-domains Adam Ford
2021-10-09 16:26 ` [PATCH V2 8/9] arm64: dts: imx8mn: add DISP blk-ctrl Adam Ford
2021-10-09 16:26 ` [PATCH V2 9/9] arm64: dts: imx8mn: Enable GPU Adam Ford
2021-10-29 17:22 ` [PATCH V2 0/9] arm64: imx8mn: Enable additional power domains and peripherals Adam Ford

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