From: Anshuman Khandual <anshuman.khandual@arm.com>
To: Will Deacon <will@kernel.org>, Suzuki K Poulose <suzuki.poulose@arm.com>
Cc: mark.rutland@arm.com, catalin.marinas@arm.com,
linux-kernel@vger.kernel.org, james.morse@arm.com,
maz@kernel.org, linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH 5/6] arm64/cpufeature: Drop TraceFilt feature exposure from ID_DFR0 register
Date: Mon, 13 Apr 2020 09:09:52 +0530 [thread overview]
Message-ID: <42122aa6-9cce-c45e-d67f-f672badce675@arm.com> (raw)
In-Reply-To: <20200409125255.GA13078@willie-the-truck>
On 04/09/2020 06:23 PM, Will Deacon wrote:
> On Fri, Mar 20, 2020 at 06:19:21PM +0000, Suzuki K Poulose wrote:
>> On 01/28/2020 12:39 PM, Anshuman Khandual wrote:
>>> ID_DFR0 based TraceFilt feature should not be exposed.
>>
>> ... to guests.
>>
>> Hence lets drop it.
>>
>> Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
>
> Hmm, doesn't dropping cause it to become NONSTRICT? In general, I'd prefer
> that we list all fields in these tables, rather than have implicit behaviour
> in their absence.
Just trying to understand, so we should just leave it unchanged.
ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_LOWER_SAFE, 28, 4, 0)
>
> Will
>
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next prev parent reply other threads:[~2020-04-13 3:40 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-01-28 12:39 [PATCH 0/6] Introduce ID_PFR2 and other CPU feature changes Anshuman Khandual
2020-01-28 12:39 ` [PATCH 1/6] arm64/cpufeature: Introduce ID_PFR2 CPU register Anshuman Khandual
2020-03-20 18:03 ` Suzuki K Poulose
2020-04-09 12:54 ` Will Deacon
2020-04-13 3:32 ` Anshuman Khandual
2020-01-28 12:39 ` [PATCH 2/6] arm64/cpufeature: Add DIT and CSV2 feature bits in ID_PFR0 register Anshuman Khandual
2020-03-20 18:07 ` Suzuki K Poulose
2020-04-02 2:38 ` Anshuman Khandual
2020-04-09 12:55 ` Will Deacon
2020-04-13 3:35 ` Anshuman Khandual
2020-01-28 12:39 ` [PATCH 3/6] arm64/cpufeature: Add remaining feature bits in ID_MMFR4 register Anshuman Khandual
2020-03-20 18:11 ` Suzuki K Poulose
2020-04-02 2:38 ` Anshuman Khandual
2020-01-28 12:39 ` [PATCH 4/6] arm64/cpufeature: Define an explicit ftr_id_isar0[] for ID_ISAR0 register Anshuman Khandual
2020-03-20 18:16 ` Suzuki K Poulose
2020-01-28 12:39 ` [PATCH 5/6] arm64/cpufeature: Drop TraceFilt feature exposure from ID_DFR0 register Anshuman Khandual
2020-03-20 18:19 ` Suzuki K Poulose
2020-04-02 3:00 ` Anshuman Khandual
2020-04-09 12:53 ` Will Deacon
2020-04-13 3:39 ` Anshuman Khandual [this message]
2020-01-28 12:39 ` [PATCH 6/6] arm64/cpufeature: Replace all open bits shift encodings with macros Anshuman Khandual
2020-03-20 18:40 ` Suzuki K Poulose
2020-04-02 2:44 ` Anshuman Khandual
2020-02-14 4:23 ` [PATCH 0/6] Introduce ID_PFR2 and other CPU feature changes Anshuman Khandual
2020-02-14 15:58 ` Peter Maydell
2020-04-02 2:33 ` Anshuman Khandual
2020-03-20 18:49 ` Suzuki K Poulose
2020-04-06 17:09 ` Will Deacon
2020-04-07 8:50 ` Anshuman Khandual
2020-04-09 13:54 ` Will Deacon
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