From: Auger Eric <eric.auger@redhat.com> To: Jean-Philippe Brucker <jean-philippe.brucker@arm.com>, will.deacon@arm.com Cc: mark.rutland@arm.com, devicetree@vger.kernel.org, jacob.jun.pan@linux.intel.com, joro@8bytes.org, linux-kernel@vger.kernel.org, iommu@lists.linux-foundation.org, robh+dt@kernel.org, robin.murphy@arm.com, linux-arm-kernel@lists.infradead.org Subject: Re: [PATCH 3/8] iommu/arm-smmu-v3: Support platform SSID Date: Mon, 8 Jul 2019 09:58:22 +0200 Message-ID: <63d4a71a-8e3f-f663-34bc-6647971b7e4b@redhat.com> (raw) In-Reply-To: <20190610184714.6786-4-jean-philippe.brucker@arm.com> Hi Jean, On 6/10/19 8:47 PM, Jean-Philippe Brucker wrote: > For platform devices that support SubstreamID (SSID), firmware provides > the number of supported SSID bits. Restrict it to what the SMMU supports > and cache it into master->ssid_bits. The commit message may give the impression the master's ssid_bits field only is used for platform devices. > > Signed-off-by: Jean-Philippe Brucker <jean-philippe.brucker@arm.com> > --- > drivers/iommu/arm-smmu-v3.c | 11 +++++++++++ > drivers/iommu/of_iommu.c | 6 +++++- > include/linux/iommu.h | 1 + > 3 files changed, 17 insertions(+), 1 deletion(-) > > diff --git a/drivers/iommu/arm-smmu-v3.c b/drivers/iommu/arm-smmu-v3.c > index 4d5a694f02c2..3254f473e681 100644 > --- a/drivers/iommu/arm-smmu-v3.c > +++ b/drivers/iommu/arm-smmu-v3.c > @@ -604,6 +604,7 @@ struct arm_smmu_master { > struct list_head domain_head; > u32 *sids; > unsigned int num_sids; > + unsigned int ssid_bits; > bool ats_enabled :1; > }; > > @@ -2097,6 +2098,16 @@ static int arm_smmu_add_device(struct device *dev) > } > } > > + master->ssid_bits = min(smmu->ssid_bits, fwspec->num_pasid_bits); In case the device is a PCI device, what is the value taken by fwspec->num_pasid_bits? > + > + /* > + * If the SMMU doesn't support 2-stage CD, limit the linear > + * tables to a reasonable number of contexts, let's say > + * 64kB / sizeof(ctx_desc) = 1024 = 2^10 ctx_desc is 26B so 11bits would be OK > + */ > + if (!(smmu->features & ARM_SMMU_FEAT_2_LVL_CDTAB)) > + master->ssid_bits = min(master->ssid_bits, 10U); > + > group = iommu_group_get_for_dev(dev); > if (!IS_ERR(group)) { > iommu_group_put(group); > diff --git a/drivers/iommu/of_iommu.c b/drivers/iommu/of_iommu.c > index f04a6df65eb8..04f4f6b95d82 100644 > --- a/drivers/iommu/of_iommu.c > +++ b/drivers/iommu/of_iommu.c > @@ -206,8 +206,12 @@ const struct iommu_ops *of_iommu_configure(struct device *dev, > if (err) > break; > } > - } > > + fwspec = dev_iommu_fwspec_get(dev); > + if (!err && fwspec) > + of_property_read_u32(master_np, "pasid-num-bits", > + &fwspec->num_pasid_bits); > + } > > /* > * Two success conditions can be represented by non-negative err here: > diff --git a/include/linux/iommu.h b/include/linux/iommu.h > index 519e40fb23ce..b91df613385f 100644 > --- a/include/linux/iommu.h > +++ b/include/linux/iommu.h > @@ -536,6 +536,7 @@ struct iommu_fwspec { > struct fwnode_handle *iommu_fwnode; > void *iommu_priv; > u32 flags; > + u32 num_pasid_bits; > unsigned int num_ids; > u32 ids[1]; > }; > Thanks Eric _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply index Thread overview: 43+ messages / expand[flat|nested] mbox.gz Atom feed top 2019-06-10 18:47 [PATCH 0/8] iommu: Add auxiliary domain and PASID support to Arm SMMUv3 Jean-Philippe Brucker 2019-06-10 18:47 ` [PATCH 1/8] iommu: Add I/O ASID allocator Jean-Philippe Brucker 2019-06-11 9:36 ` Jonathan Cameron 2019-06-11 14:35 ` Jean-Philippe Brucker 2019-06-11 18:13 ` Jacob Pan 2019-06-18 14:22 ` Jean-Philippe Brucker 2019-06-18 17:05 ` Jacob Pan 2019-06-19 14:26 ` Jean-Philippe Brucker 2019-06-11 12:26 ` Jacob Pan 2019-06-11 14:37 ` Jean-Philippe Brucker 2019-06-11 17:10 ` Jacob Pan 2019-06-12 11:30 ` Jean-Philippe Brucker 2019-06-10 18:47 ` [PATCH 2/8] dt-bindings: document PASID property for IOMMU masters Jean-Philippe Brucker 2019-07-08 7:58 ` Auger Eric 2019-06-10 18:47 ` [PATCH 3/8] iommu/arm-smmu-v3: Support platform SSID Jean-Philippe Brucker 2019-06-11 9:42 ` Jonathan Cameron 2019-06-11 14:35 ` Jean-Philippe Brucker 2019-06-18 18:08 ` Will Deacon 2019-06-19 11:53 ` Jean-Philippe Brucker 2019-07-08 7:58 ` Auger Eric [this message] 2019-09-19 14:51 ` Jean-Philippe Brucker 2019-06-10 18:47 ` [PATCH 4/8] iommu/arm-smmu-v3: Add support for Substream IDs Jean-Philippe Brucker 2019-06-11 10:19 ` Jonathan Cameron 2019-06-11 14:35 ` Jean-Philippe Brucker 2019-06-26 18:00 ` Will Deacon 2019-07-04 9:33 ` Jean-Philippe Brucker 2019-09-19 14:57 ` Jean-Philippe Brucker 2019-07-08 15:31 ` Auger Eric 2019-09-19 15:01 ` Jean-Philippe Brucker 2019-06-10 18:47 ` [PATCH 5/8] iommu/arm-smmu-v3: Add second level of context descriptor table Jean-Philippe Brucker 2019-06-11 10:24 ` Jonathan Cameron 2019-07-08 15:13 ` Auger Eric 2019-06-10 18:47 ` [PATCH 6/8] iommu/arm-smmu-v3: Support auxiliary domains Jean-Philippe Brucker 2019-06-26 17:59 ` Will Deacon 2019-07-05 16:29 ` Jean-Philippe Brucker 2019-09-19 15:06 ` Jean-Philippe Brucker 2019-06-10 18:47 ` [PATCH 7/8] iommu/arm-smmu-v3: Improve add_device() error handling Jean-Philippe Brucker 2019-07-08 7:58 ` Auger Eric 2019-06-10 18:47 ` [PATCH 8/8] iommu/arm-smmu-v3: Add support for PCI PASID Jean-Philippe Brucker 2019-06-11 10:45 ` Jonathan Cameron 2019-06-11 14:35 ` Jean-Philippe Brucker 2019-07-08 7:58 ` Auger Eric 2019-09-19 15:10 ` Jean-Philippe Brucker
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