From: Chen-Yu Tsai <wens@csie.org>
To: Maxime Ripard <maxime.ripard@bootlin.com>
Cc: devicetree <devicetree@vger.kernel.org>,
Sergey Matyukevich <geomatsi@gmail.com>,
Andre Przywara <andre.przywara@arm.com>,
linux-kernel <linux-kernel@vger.kernel.org>,
Emmanuel Vadot <manu@freebsd.org>,
linux-sunxi <linux-sunxi@googlegroups.com>,
Jagan Teki <jagan@amarulasolutions.com>,
Hauke Mehrtens <hauke@hauke-m.de>,
linux-arm-kernel <linux-arm-kernel@lists.infradead.org>,
Icenowy Zheng <icenowy@aosc.io>
Subject: Re: [PATCH 10/10] arm64: dts: allwinner: h5: Add CPU Operating Performance Points table
Date: Wed, 30 Jan 2019 17:41:16 +0800 [thread overview]
Message-ID: <CAGb2v64ZFZty-jeeKmPU8Ecg+rAE6zEm65tedb_ZZTTSXMEPOA@mail.gmail.com> (raw)
In-Reply-To: <20190130092927.x65ihy3je5n6324w@flea>
On Wed, Jan 30, 2019 at 5:29 PM Maxime Ripard <maxime.ripard@bootlin.com> wrote:
>
> On Wed, Jan 30, 2019 at 04:42:03PM +0800, Chen-Yu Tsai wrote:
> > enable-method = "psci";
> > clocks = <&ccu CLK_CPUX>;
> > clock-latency-ns = <244144>; /* 8 32k periods */
> > + operating-points-v2 = <&cpu_opp_table>;
> > + #cooling-cells = <2>;
> > + };
> > + };
> > +
> > + cpu_opp_table: opp_table {
> > + compatible = "operating-points-v2";
> > + opp-shared;
> > +
> > + opp@408000000 {
> > + opp-hz = /bits/ 64 <408000000>;
> > + opp-microvolt = <1000000 1000000 1310000>;
> > + clock-latency-ns = <244144>; /* 8 32k periods */
> > + };
> > +
> > + opp@648000000 {
> > + opp-hz = /bits/ 64 <648000000>;
> > + opp-microvolt = <1040000 1040000 1310000>;
> > + clock-latency-ns = <244144>; /* 8 32k periods */
> > + };
> > +
> > + opp@816000000 {
> > + opp-hz = /bits/ 64 <816000000>;
> > + opp-microvolt = <1080000 1080000 1310000>;
> > + clock-latency-ns = <244144>; /* 8 32k periods */
> > + };
> > +
> > + opp@912000000 {
> > + opp-hz = /bits/ 64 <912000000>;
> > + opp-microvolt = <1120000 1120000 1310000>;
> > + clock-latency-ns = <244144>; /* 8 32k periods */
> > + };
> > +
> > + opp@960000000 {
> > + opp-hz = /bits/ 64 <960000000>;
> > + opp-microvolt = <1160000 1160000 1310000>;
> > + clock-latency-ns = <244144>; /* 8 32k periods */
> > + };
> > +
> > + opp@1008000000 {
> > + opp-hz = /bits/ 64 <1008000000>;
> > + opp-microvolt = <1200000 1200000 1310000>;
> > + clock-latency-ns = <244144>; /* 8 32k periods */
> > + };
> > +
> > + opp@1056000000 {
> > + opp-hz = /bits/ 64 <1056000000>;
> > + opp-microvolt = <1240000 1240000 1310000>;
> > + clock-latency-ns = <244144>; /* 8 32k periods */
> > + };
> > +
> > + opp@1104000000 {
> > + opp-hz = /bits/ 64 <1104000000>;
> > + opp-microvolt = <1260000 1260000 1310000>;
> > + clock-latency-ns = <244144>; /* 8 32k periods */
> > + };
> > +
> > + opp@1152000000 {
> > + opp-hz = /bits/ 64 <1152000000>;
> > + opp-microvolt = <1300000 1300000 1310000>;
> > + clock-latency-ns = <244144>; /* 8 32k periods */
>
> What is the frequency and voltage that U-Boot sets up?
1008 MHz, and whatever voltage the board design defaults to (typically
the higher setting).
> We've had the issue with the A33 that it's started at 1008MHz, with
> the matching voltage, and ramping up the frequency to 1.2GHz on boards
> without PMIC support would increase the frequency but not the voltage,
> resulting in a brownout.
Which is why I added the regulator to all boards before this patch. At
least for Linux, once the regulator supply is described in the device
tree, if the driver is missing, regulator_get_* and thus cpufreq should
fail with -EPROBE_DEFER.
Or we could drop the extra OPPs.
ChenYu
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2019-01-30 9:41 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-01-30 8:41 [PATCH 00/10] arm64: dts: allwinner: h5: Enable CPU DVFS (cpufreq) Chen-Yu Tsai
2019-01-30 8:41 ` [PATCH 01/10] ARM: dts: sunxi: bananapi-m2-plus-v1.2: Fix CPU supply voltages Chen-Yu Tsai
2019-01-30 8:41 ` [PATCH 02/10] ARM: dts: bananapi-m2-plus: Add CPU supply regulator Chen-Yu Tsai
2019-01-30 8:41 ` [PATCH 03/10] arm64: dts: allwinner: h5: Hook up cpu regulator supplies Chen-Yu Tsai
2019-01-30 8:41 ` [PATCH 04/10] arm64: dts: allwinner: h5: nanopi-neo2: Add CPU regulator supply Chen-Yu Tsai
2019-01-30 8:41 ` [PATCH 05/10] arm64: dts: allwinner: h5: orange-pi-zero-plus: " Chen-Yu Tsai
2019-01-30 8:41 ` [PATCH 06/10] arm64: dts: allwinner: h5: orange-pi-zero-plus2: " Chen-Yu Tsai
2019-01-30 8:42 ` [PATCH 07/10] arm64: dts: allwinner: h5: orange-pi-pc2: " Chen-Yu Tsai
2019-01-30 8:42 ` [PATCH 08/10] arm64: dts: allwinner: h5: orange-pi-prime: " Chen-Yu Tsai
2019-01-30 8:42 ` [PATCH 09/10] arm64: dts: allwinner: h5: Add clock to CPU cores Chen-Yu Tsai
2019-01-30 8:42 ` [PATCH 10/10] arm64: dts: allwinner: h5: Add CPU Operating Performance Points table Chen-Yu Tsai
2019-01-30 9:29 ` Maxime Ripard
2019-01-30 9:41 ` Chen-Yu Tsai [this message]
2019-01-30 9:59 ` Maxime Ripard
2019-01-31 3:28 ` Chen-Yu Tsai
2019-09-02 14:03 ` [PATCH 00/10] arm64: dts: allwinner: h5: Enable CPU DVFS (cpufreq) Ondřej Jirman
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=CAGb2v64ZFZty-jeeKmPU8Ecg+rAE6zEm65tedb_ZZTTSXMEPOA@mail.gmail.com \
--to=wens@csie.org \
--cc=andre.przywara@arm.com \
--cc=devicetree@vger.kernel.org \
--cc=geomatsi@gmail.com \
--cc=hauke@hauke-m.de \
--cc=icenowy@aosc.io \
--cc=jagan@amarulasolutions.com \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-sunxi@googlegroups.com \
--cc=manu@freebsd.org \
--cc=maxime.ripard@bootlin.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).