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From: Arnd Bergmann <arnd@kernel.org>
To: "Leizhen (ThunderTown)" <thunder.leizhen@huawei.com>
Cc: devicetree <devicetree@vger.kernel.org>,
	Arnd Bergmann <arnd@arndb.de>,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	Will Deacon <will.deacon@arm.com>,
	linux-kernel <linux-kernel@vger.kernel.org>,
	Haojian Zhuang <haojian.zhuang@gmail.com>,
	Rob Herring <robh+dt@kernel.org>, Wei Xu <xuwei5@hisilicon.com>,
	Russell King <rmk+kernel@arm.linux.org.uk>,
	linux-arm-kernel <linux-arm-kernel@lists.infradead.org>
Subject: Re: [PATCH v5 4/4] ARM: Add support for Hisilicon Kunpeng L3 cache controller
Date: Fri, 29 Jan 2021 09:16:03 +0100	[thread overview]
Message-ID: <CAK8P3a3Hj0Hyc8mVdGYhB7AEuHCYbhGxHnhNk1xWonEmxZOxRw@mail.gmail.com> (raw)
In-Reply-To: <20dac713-25b7-cddf-cc42-69a834487c71@huawei.com>

On Fri, Jan 29, 2021 at 8:23 AM Leizhen (ThunderTown)
<thunder.leizhen@huawei.com> wrote:
> On 2021/1/28 22:24, Arnd Bergmann wrote:
> > On Sat, Jan 16, 2021 at 4:27 AM Zhen Lei <thunder.leizhen@huawei.com> wrote:
> >> diff --git a/arch/arm/mm/Makefile b/arch/arm/mm/Makefile
> >> +
> >> +static void l3cache_maint_common(u32 range, u32 op_type)
> >> +{
> >> +       u32 reg;
> >> +
> >> +       reg = readl(l3_ctrl_base + L3_MAINT_CTRL);
> >> +       reg &= ~(L3_MAINT_RANGE_MASK | L3_MAINT_TYPE_MASK);
> >> +       reg |= range | op_type;
> >> +       reg |= L3_MAINT_STATUS_START;
> >> +       writel(reg, l3_ctrl_base + L3_MAINT_CTRL);
> >
> > Are there contents of L3_MAINT_CTRL that need to be preserved
> > across calls and can not be inferred? A 'readl()' is often expensive,
> > so it might be more efficient if you can avoid that.
>
> Right, this readl() can be replaced with readl_relaxed(). Thanks.
>
> I'll check and correct the readl() and writel() in other places.

What I meant is that if you want to replace them, you should provide
performance numbers that show how much difference this makes
and add comments in the source code explaining how you proved that
the _relaxed() version is actually correct.

> >> +static inline void l3cache_flush_all_nolock(void)
> >> +{
> >> +       l3cache_maint_common(L3_MAINT_RANGE_ALL, L3_MAINT_TYPE_FLUSH);
> >> +}
> >> +
> >> +static void l3cache_flush_all(void)
> >> +{
> >> +       unsigned long flags;
> >> +
> >> +       spin_lock_irqsave(&l3cache_lock, flags);
> >> +       l3cache_flush_all_nolock();
> >> +       spin_unlock_irqrestore(&l3cache_lock, flags);
> >> +}
> >
> > I see that cache-l2x0 uses raw_spin_lock_irqsave() instead of
> > spin_lock_irqsave(), to avoid preemption in the middle of a cache
> > operation. This is probably a good idea here as well.
>
> I don't think there's any essential difference between the two! I don't know
> if the compiler or tool will do anything extra. I checked the git log of the
> l2x0 driver and it used raw_spin_lock_irqsave() at the beginning. Maybe
> there's a description in 2.6. Since you mentioned this potential risk, I'll
> change it to raw_spin_lock_irqsave.

> include/linux/spinlock.h:
> static __always_inline raw_spinlock_t *spinlock_check(spinlock_t *lock)
> {
>         return &lock->rlock;
> }
>
> #define spin_lock_irqsave(lock, flags)                          \
> do {                                                            \
>         raw_spin_lock_irqsave(spinlock_check(lock), flags);     \
> } while (0)

The spin_lock_irqsave() definition is one of the things that differs
with CONFIG_PREEMPT_RT=y, where it uses a mutex instead.

See https://git.kernel.org/pub/scm/linux/kernel/git/rt/linux-rt-devel.git/log/?h=linux-5.11.y-rt-rebase
for the final missing patches including the one that changes the
spinlock definition and some patches that change a few other spin_lock
to raw_spin_lock.

> >> +static int __init l3cache_init(void)
> >> +{
> >> +       u32 reg;
> >> +       struct device_node *node;
> >> +
> >> +       node = of_find_matching_node(NULL, l3cache_ids);
> >> +       if (!node)
> >> +               return -ENODEV;
> >
> > I think the initcall should return '0' to indicate success when running
> > a kernel with this driver built-in on a platform that does not have
> > this device.
>
> I have added "depends on ARCH_KUNPENG50X" for this driver. But it's OK to
> return 0.

Note that the "depends on ARCH_KUNPENG50X" is not relevant here, since
it only prevents you from enabling the driver on kernels that explicitly exclude
the kunpeng platform, but it has no significance to what you are actually
running on. The "multi_v7_defconfig" file should have all actively maintained
armv7 platforms enabled, similar to how common distros ship their kernels.

        Arnd

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  reply	other threads:[~2021-01-29  8:17 UTC|newest]

Thread overview: 23+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-01-16  3:27 [PATCH v5 0/4] ARM: Add support for Hisilicon Kunpeng L3 cache controller Zhen Lei
2021-01-16  3:27 ` [PATCH v5 1/4] ARM: LPAE: Use phys_addr_t instead of unsigned long in outercache hooks Zhen Lei
2021-01-28 14:29   ` Arnd Bergmann
2021-01-16  3:27 ` [PATCH v5 2/4] ARM: hisi: add support for Kunpeng50x SoC Zhen Lei
2021-01-28 14:28   ` Arnd Bergmann
2021-01-29  8:09     ` Leizhen (ThunderTown)
2021-01-16  3:27 ` [PATCH v5 3/4] dt-bindings: arm: hisilicon: Add binding for Kunpeng L3 cache controller Zhen Lei
2021-01-28 14:25   ` Arnd Bergmann
2021-01-16  3:27 ` [PATCH v5 4/4] ARM: Add support for Hisilicon " Zhen Lei
2021-01-28 14:24   ` Arnd Bergmann
2021-01-29  7:23     ` Leizhen (ThunderTown)
2021-01-29  8:16       ` Arnd Bergmann [this message]
2021-01-29 10:26         ` Arnd Bergmann
2021-01-29 10:33           ` Russell King - ARM Linux admin
2021-01-29 10:53             ` Arnd Bergmann
2021-01-29 11:11               ` Russell King - ARM Linux admin
2021-01-30  2:51             ` Leizhen (ThunderTown)
2021-01-29 13:54           ` Leizhen (ThunderTown)
2021-01-30  3:00             ` Leizhen (ThunderTown)
2021-01-29 13:33         ` Leizhen (ThunderTown)
2021-01-29 10:12       ` Russell King - ARM Linux admin
2021-01-29 13:33         ` Leizhen (ThunderTown)
2021-01-28  1:30 ` [PATCH v5 0/4] " Leizhen (ThunderTown)

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