From: Javier Martinez Canillas <javierm@redhat.com>
To: Bjorn Helgaas <helgaas@kernel.org>
Cc: linux-kernel@vger.kernel.org,
Peter Robinson <pbrobinson@gmail.com>,
Shawn Lin <shawn.lin@rock-chips.com>,
Bjorn Helgaas <bhelgaas@google.com>,
Heiko Stuebner <heiko@sntech.de>,
Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
Rob Herring <robh@kernel.org>,
linux-arm-kernel@lists.infradead.org, linux-pci@vger.kernel.org,
linux-rockchip@lists.infradead.org,
Michal Simek <michal.simek@xilinx.com>,
Jingoo Han <jingoohan1@gmail.com>,
Thierry Reding <thierry.reding@gmail.com>,
Jonathan Hunter <jonathanh@nvidia.com>,
linux-tegra@vger.kernel.org
Subject: Re: [PATCH v2] PCI: rockchip: Avoid accessing PCIe registers with clocks gated
Date: Wed, 30 Jun 2021 21:59:58 +0200 [thread overview]
Message-ID: <e7f3bd28-8e5e-362d-11a9-43a60ff79dd2@redhat.com> (raw)
In-Reply-To: <20210630185922.GA4170992@bjorn-Precision-5520>
On 6/30/21 8:59 PM, Bjorn Helgaas wrote:
> [+cc Michal, Jingoo, Thierry, Jonathan]
[snip]
>
> I think the above commit log is perfectly accurate, but all the
> details might suggest that this is something specific to rockchip or
> CONFIG_DEBUG_SHIRQ, which it isn't, and they might obscure the
> fundamental problem, which is actually very simple: we registered IRQ
> handlers before we were ready for them to be called.
>
> I propose the following commit log in the hope that it would help
> other driver authors to make similar fixes:
>
> PCI: rockchip: Register IRQ handlers after device and data are ready
>
> An IRQ handler may be called at any time after it is registered, so
> anything it relies on must be ready before registration.
>
> rockchip_pcie_subsys_irq_handler() and rockchip_pcie_client_irq_handler()
> read registers in the PCIe controller, but we registered them before
> turning on clocks to the controller. If either is called before the clocks
> are turned on, the register reads fail and the machine hangs.
>
> Similarly, rockchip_pcie_legacy_int_handler() uses rockchip->irq_domain,
> but we installed it before initializing irq_domain.
>
> Register IRQ handlers after their data structures are initialized and
> clocks are enabled.
>
> If this is inaccurate or omits something important, let me know. I
> can make any updates locally.
>
I think your description is accurate and agree that the commit message may
be misleading. As you said, this is a general problem and the fact that an
IRQ is shared and CONFIG_DEBUG_SHIRQ fires a spurious interrupt just make
the assumptions in the driver to fall apart.
But maybe you can also add a paragraph that mentions the CONFIG_DEBUG_SHIRQ
option and shared interrupts? That way, other driver authors could know that
by enabling this an underlying problem might be exposed for them to fix.
Best regards,
--
Javier Martinez Canillas
Software Engineer
New Platform Technologies Enablement team
RHEL Engineering
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2021-06-30 20:02 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-06-08 8:04 [PATCH v2] PCI: rockchip: Avoid accessing PCIe registers with clocks gated Javier Martinez Canillas
2021-06-12 22:02 ` Peter Robinson
2021-06-22 10:31 ` Lorenzo Pieralisi
2021-06-24 21:57 ` Bjorn Helgaas
2021-06-24 23:18 ` Robin Murphy
2021-06-24 23:28 ` Bjorn Helgaas
2021-06-24 23:51 ` Robin Murphy
2021-06-24 22:40 ` Bjorn Helgaas
2021-06-25 7:09 ` Javier Martinez Canillas
2021-06-25 14:32 ` Bjorn Helgaas
2021-06-25 18:34 ` Javier Martinez Canillas
2021-06-29 0:38 ` Bjorn Helgaas
2021-06-29 6:17 ` Javier Martinez Canillas
2021-06-29 10:52 ` Robin Murphy
2021-06-29 23:14 ` Bjorn Helgaas
2021-06-30 9:44 ` Robin Murphy
2021-06-30 18:49 ` Bjorn Helgaas
2021-06-30 18:59 ` Bjorn Helgaas
2021-06-30 19:59 ` Javier Martinez Canillas [this message]
2021-06-30 20:30 ` Bjorn Helgaas
2021-06-30 20:46 ` Peter Robinson
2021-06-30 22:09 ` Javier Martinez Canillas
2021-07-01 13:59 ` Bjorn Helgaas
2021-07-01 14:59 ` Javier Martinez Canillas
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=e7f3bd28-8e5e-362d-11a9-43a60ff79dd2@redhat.com \
--to=javierm@redhat.com \
--cc=bhelgaas@google.com \
--cc=heiko@sntech.de \
--cc=helgaas@kernel.org \
--cc=jingoohan1@gmail.com \
--cc=jonathanh@nvidia.com \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-pci@vger.kernel.org \
--cc=linux-rockchip@lists.infradead.org \
--cc=linux-tegra@vger.kernel.org \
--cc=lorenzo.pieralisi@arm.com \
--cc=michal.simek@xilinx.com \
--cc=pbrobinson@gmail.com \
--cc=robh@kernel.org \
--cc=shawn.lin@rock-chips.com \
--cc=thierry.reding@gmail.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).