* [PATCH v2] usb: dwc3: qcom: add URS Host support for sdm845 ACPI boot
@ 2021-01-15 3:50 Shawn Guo
2021-01-15 4:02 ` Bjorn Andersson
` (3 more replies)
0 siblings, 4 replies; 6+ messages in thread
From: Shawn Guo @ 2021-01-15 3:50 UTC (permalink / raw)
To: Bjorn Andersson, Felipe Balbi; +Cc: linux-arm-msm, linux-usb, Shawn Guo
For sdm845 ACPI boot, the URS (USB Role Switch) node in ACPI DSDT table
holds the memory resource, while interrupt resources reside in the child
nodes USB0 and UFN0. It adds USB0 host support by probing URS node,
creating platform device for USB0 node, and then retrieve interrupt
resources from USB0 platform device.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
---
Changes for v2:
- Instead of assuming that USB0 is always the first child of URS0, find
the child using node name.
drivers/usb/dwc3/dwc3-qcom.c | 59 ++++++++++++++++++++++++++++++++++--
1 file changed, 56 insertions(+), 3 deletions(-)
diff --git a/drivers/usb/dwc3/dwc3-qcom.c b/drivers/usb/dwc3/dwc3-qcom.c
index c703d552bbcf..d803ee98c628 100644
--- a/drivers/usb/dwc3/dwc3-qcom.c
+++ b/drivers/usb/dwc3/dwc3-qcom.c
@@ -60,12 +60,14 @@ struct dwc3_acpi_pdata {
int dp_hs_phy_irq_index;
int dm_hs_phy_irq_index;
int ss_phy_irq_index;
+ bool is_urs;
};
struct dwc3_qcom {
struct device *dev;
void __iomem *qscratch_base;
struct platform_device *dwc3;
+ struct platform_device *urs_usb;
struct clk **clks;
int num_clocks;
struct reset_control *resets;
@@ -429,13 +431,15 @@ static void dwc3_qcom_select_utmi_clk(struct dwc3_qcom *qcom)
static int dwc3_qcom_get_irq(struct platform_device *pdev,
const char *name, int num)
{
+ struct dwc3_qcom *qcom = platform_get_drvdata(pdev);
+ struct platform_device *pdev_irq = qcom->urs_usb ? qcom->urs_usb : pdev;
struct device_node *np = pdev->dev.of_node;
int ret;
if (np)
- ret = platform_get_irq_byname(pdev, name);
+ ret = platform_get_irq_byname(pdev_irq, name);
else
- ret = platform_get_irq(pdev, num);
+ ret = platform_get_irq(pdev_irq, num);
return ret;
}
@@ -568,6 +572,8 @@ static int dwc3_qcom_acpi_register_core(struct platform_device *pdev)
struct dwc3_qcom *qcom = platform_get_drvdata(pdev);
struct device *dev = &pdev->dev;
struct resource *res, *child_res = NULL;
+ struct platform_device *pdev_irq = qcom->urs_usb ? qcom->urs_usb :
+ pdev;
int irq;
int ret;
@@ -597,7 +603,7 @@ static int dwc3_qcom_acpi_register_core(struct platform_device *pdev)
child_res[0].end = child_res[0].start +
qcom->acpi_pdata->dwc3_core_base_size;
- irq = platform_get_irq(pdev, 0);
+ irq = platform_get_irq(pdev_irq, 0);
child_res[1].flags = IORESOURCE_IRQ;
child_res[1].start = child_res[1].end = irq;
@@ -651,6 +657,33 @@ static int dwc3_qcom_of_register_core(struct platform_device *pdev)
return 0;
}
+static struct platform_device *
+dwc3_qcom_create_urs_usb_platdev(struct device *dev)
+{
+ struct fwnode_handle *fwh;
+ struct acpi_device *adev;
+ char name[8];
+ int ret;
+ int id;
+
+ /* Figure out device id */
+ ret = sscanf(fwnode_get_name(dev->fwnode), "URS%d", &id);
+ if (!ret)
+ return NULL;
+
+ /* Find the child using name */
+ snprintf(name, sizeof(name), "USB%d", id);
+ fwh = fwnode_get_named_child_node(dev->fwnode, name);
+ if (!fwh)
+ return NULL;
+
+ adev = to_acpi_device_node(fwh);
+ if (!adev)
+ return NULL;
+
+ return acpi_create_platform_device(adev, NULL);
+}
+
static int dwc3_qcom_probe(struct platform_device *pdev)
{
struct device_node *np = pdev->dev.of_node;
@@ -715,6 +748,14 @@ static int dwc3_qcom_probe(struct platform_device *pdev)
qcom->acpi_pdata->qscratch_base_offset;
parent_res->end = parent_res->start +
qcom->acpi_pdata->qscratch_base_size;
+
+ if (qcom->acpi_pdata->is_urs) {
+ qcom->urs_usb = dwc3_qcom_create_urs_usb_platdev(dev);
+ if (!qcom->urs_usb) {
+ dev_err(dev, "failed to create URS USB platdev\n");
+ return -ENODEV;
+ }
+ }
}
qcom->qscratch_base = devm_ioremap_resource(dev, parent_res);
@@ -877,8 +918,20 @@ static const struct dwc3_acpi_pdata sdm845_acpi_pdata = {
.ss_phy_irq_index = 2
};
+static const struct dwc3_acpi_pdata sdm845_acpi_urs_pdata = {
+ .qscratch_base_offset = SDM845_QSCRATCH_BASE_OFFSET,
+ .qscratch_base_size = SDM845_QSCRATCH_SIZE,
+ .dwc3_core_base_size = SDM845_DWC3_CORE_SIZE,
+ .hs_phy_irq_index = 1,
+ .dp_hs_phy_irq_index = 4,
+ .dm_hs_phy_irq_index = 3,
+ .ss_phy_irq_index = 2,
+ .is_urs = true,
+};
+
static const struct acpi_device_id dwc3_qcom_acpi_match[] = {
{ "QCOM2430", (unsigned long)&sdm845_acpi_pdata },
+ { "QCOM0304", (unsigned long)&sdm845_acpi_urs_pdata },
{ },
};
MODULE_DEVICE_TABLE(acpi, dwc3_qcom_acpi_match);
--
2.17.1
^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [PATCH v2] usb: dwc3: qcom: add URS Host support for sdm845 ACPI boot
2021-01-15 3:50 [PATCH v2] usb: dwc3: qcom: add URS Host support for sdm845 ACPI boot Shawn Guo
@ 2021-01-15 4:02 ` Bjorn Andersson
2021-01-15 13:27 ` Felipe Balbi
` (2 subsequent siblings)
3 siblings, 0 replies; 6+ messages in thread
From: Bjorn Andersson @ 2021-01-15 4:02 UTC (permalink / raw)
To: Shawn Guo; +Cc: Felipe Balbi, linux-arm-msm, linux-usb
On Thu 14 Jan 21:50 CST 2021, Shawn Guo wrote:
> For sdm845 ACPI boot, the URS (USB Role Switch) node in ACPI DSDT table
> holds the memory resource, while interrupt resources reside in the child
> nodes USB0 and UFN0. It adds USB0 host support by probing URS node,
> creating platform device for USB0 node, and then retrieve interrupt
> resources from USB0 platform device.
>
This looks reasonable, thanks for updating the search.
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Regards,
Bjorn
> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
> ---
> Changes for v2:
> - Instead of assuming that USB0 is always the first child of URS0, find
> the child using node name.
>
> drivers/usb/dwc3/dwc3-qcom.c | 59 ++++++++++++++++++++++++++++++++++--
> 1 file changed, 56 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/usb/dwc3/dwc3-qcom.c b/drivers/usb/dwc3/dwc3-qcom.c
> index c703d552bbcf..d803ee98c628 100644
> --- a/drivers/usb/dwc3/dwc3-qcom.c
> +++ b/drivers/usb/dwc3/dwc3-qcom.c
> @@ -60,12 +60,14 @@ struct dwc3_acpi_pdata {
> int dp_hs_phy_irq_index;
> int dm_hs_phy_irq_index;
> int ss_phy_irq_index;
> + bool is_urs;
> };
>
> struct dwc3_qcom {
> struct device *dev;
> void __iomem *qscratch_base;
> struct platform_device *dwc3;
> + struct platform_device *urs_usb;
> struct clk **clks;
> int num_clocks;
> struct reset_control *resets;
> @@ -429,13 +431,15 @@ static void dwc3_qcom_select_utmi_clk(struct dwc3_qcom *qcom)
> static int dwc3_qcom_get_irq(struct platform_device *pdev,
> const char *name, int num)
> {
> + struct dwc3_qcom *qcom = platform_get_drvdata(pdev);
> + struct platform_device *pdev_irq = qcom->urs_usb ? qcom->urs_usb : pdev;
> struct device_node *np = pdev->dev.of_node;
> int ret;
>
> if (np)
> - ret = platform_get_irq_byname(pdev, name);
> + ret = platform_get_irq_byname(pdev_irq, name);
> else
> - ret = platform_get_irq(pdev, num);
> + ret = platform_get_irq(pdev_irq, num);
>
> return ret;
> }
> @@ -568,6 +572,8 @@ static int dwc3_qcom_acpi_register_core(struct platform_device *pdev)
> struct dwc3_qcom *qcom = platform_get_drvdata(pdev);
> struct device *dev = &pdev->dev;
> struct resource *res, *child_res = NULL;
> + struct platform_device *pdev_irq = qcom->urs_usb ? qcom->urs_usb :
> + pdev;
> int irq;
> int ret;
>
> @@ -597,7 +603,7 @@ static int dwc3_qcom_acpi_register_core(struct platform_device *pdev)
> child_res[0].end = child_res[0].start +
> qcom->acpi_pdata->dwc3_core_base_size;
>
> - irq = platform_get_irq(pdev, 0);
> + irq = platform_get_irq(pdev_irq, 0);
> child_res[1].flags = IORESOURCE_IRQ;
> child_res[1].start = child_res[1].end = irq;
>
> @@ -651,6 +657,33 @@ static int dwc3_qcom_of_register_core(struct platform_device *pdev)
> return 0;
> }
>
> +static struct platform_device *
> +dwc3_qcom_create_urs_usb_platdev(struct device *dev)
> +{
> + struct fwnode_handle *fwh;
> + struct acpi_device *adev;
> + char name[8];
> + int ret;
> + int id;
> +
> + /* Figure out device id */
> + ret = sscanf(fwnode_get_name(dev->fwnode), "URS%d", &id);
> + if (!ret)
> + return NULL;
> +
> + /* Find the child using name */
> + snprintf(name, sizeof(name), "USB%d", id);
> + fwh = fwnode_get_named_child_node(dev->fwnode, name);
> + if (!fwh)
> + return NULL;
> +
> + adev = to_acpi_device_node(fwh);
> + if (!adev)
> + return NULL;
> +
> + return acpi_create_platform_device(adev, NULL);
> +}
> +
> static int dwc3_qcom_probe(struct platform_device *pdev)
> {
> struct device_node *np = pdev->dev.of_node;
> @@ -715,6 +748,14 @@ static int dwc3_qcom_probe(struct platform_device *pdev)
> qcom->acpi_pdata->qscratch_base_offset;
> parent_res->end = parent_res->start +
> qcom->acpi_pdata->qscratch_base_size;
> +
> + if (qcom->acpi_pdata->is_urs) {
> + qcom->urs_usb = dwc3_qcom_create_urs_usb_platdev(dev);
> + if (!qcom->urs_usb) {
> + dev_err(dev, "failed to create URS USB platdev\n");
> + return -ENODEV;
> + }
> + }
> }
>
> qcom->qscratch_base = devm_ioremap_resource(dev, parent_res);
> @@ -877,8 +918,20 @@ static const struct dwc3_acpi_pdata sdm845_acpi_pdata = {
> .ss_phy_irq_index = 2
> };
>
> +static const struct dwc3_acpi_pdata sdm845_acpi_urs_pdata = {
> + .qscratch_base_offset = SDM845_QSCRATCH_BASE_OFFSET,
> + .qscratch_base_size = SDM845_QSCRATCH_SIZE,
> + .dwc3_core_base_size = SDM845_DWC3_CORE_SIZE,
> + .hs_phy_irq_index = 1,
> + .dp_hs_phy_irq_index = 4,
> + .dm_hs_phy_irq_index = 3,
> + .ss_phy_irq_index = 2,
> + .is_urs = true,
> +};
> +
> static const struct acpi_device_id dwc3_qcom_acpi_match[] = {
> { "QCOM2430", (unsigned long)&sdm845_acpi_pdata },
> + { "QCOM0304", (unsigned long)&sdm845_acpi_urs_pdata },
> { },
> };
> MODULE_DEVICE_TABLE(acpi, dwc3_qcom_acpi_match);
> --
> 2.17.1
>
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH v2] usb: dwc3: qcom: add URS Host support for sdm845 ACPI boot
2021-01-15 3:50 [PATCH v2] usb: dwc3: qcom: add URS Host support for sdm845 ACPI boot Shawn Guo
2021-01-15 4:02 ` Bjorn Andersson
@ 2021-01-15 13:27 ` Felipe Balbi
2021-01-15 14:12 ` Bjorn Andersson
2021-01-18 11:28 ` Felipe Balbi
2021-03-01 19:59 ` patchwork-bot+linux-arm-msm
3 siblings, 1 reply; 6+ messages in thread
From: Felipe Balbi @ 2021-01-15 13:27 UTC (permalink / raw)
To: Shawn Guo, Bjorn Andersson; +Cc: linux-arm-msm, linux-usb, Shawn Guo
[-- Attachment #1: Type: text/plain, Size: 547 bytes --]
Hi,
Shawn Guo <shawn.guo@linaro.org> writes:
> For sdm845 ACPI boot, the URS (USB Role Switch) node in ACPI DSDT table
> holds the memory resource, while interrupt resources reside in the child
> nodes USB0 and UFN0. It adds USB0 host support by probing URS node,
> creating platform device for USB0 node, and then retrieve interrupt
> resources from USB0 platform device.
just so I understand this: the interrupt was listed under a separate
device altogether?
Nothing wrong with the patch itself, but just curious.
--
balbi
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 857 bytes --]
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH v2] usb: dwc3: qcom: add URS Host support for sdm845 ACPI boot
2021-01-15 13:27 ` Felipe Balbi
@ 2021-01-15 14:12 ` Bjorn Andersson
0 siblings, 0 replies; 6+ messages in thread
From: Bjorn Andersson @ 2021-01-15 14:12 UTC (permalink / raw)
To: Felipe Balbi; +Cc: Shawn Guo, linux-arm-msm, linux-usb
On Fri 15 Jan 07:27 CST 2021, Felipe Balbi wrote:
> Hi,
>
> Shawn Guo <shawn.guo@linaro.org> writes:
> > For sdm845 ACPI boot, the URS (USB Role Switch) node in ACPI DSDT table
> > holds the memory resource, while interrupt resources reside in the child
> > nodes USB0 and UFN0. It adds USB0 host support by probing URS node,
> > creating platform device for USB0 node, and then retrieve interrupt
> > resources from USB0 platform device.
>
> just so I understand this: the interrupt was listed under a separate
> device altogether?
>
Correct, this seems to be the standard structure for a role-switching
usb controller, as shown under "ACPI System configuration" at
https://docs.microsoft.com/en-us/windows-hardware/drivers/usbcon/usb-dual-role-driver-stack-architecture
Regards,
Bjorn
> Nothing wrong with the patch itself, but just curious.
>
> --
> balbi
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH v2] usb: dwc3: qcom: add URS Host support for sdm845 ACPI boot
2021-01-15 3:50 [PATCH v2] usb: dwc3: qcom: add URS Host support for sdm845 ACPI boot Shawn Guo
2021-01-15 4:02 ` Bjorn Andersson
2021-01-15 13:27 ` Felipe Balbi
@ 2021-01-18 11:28 ` Felipe Balbi
2021-03-01 19:59 ` patchwork-bot+linux-arm-msm
3 siblings, 0 replies; 6+ messages in thread
From: Felipe Balbi @ 2021-01-18 11:28 UTC (permalink / raw)
To: Shawn Guo, Bjorn Andersson; +Cc: linux-arm-msm, linux-usb, Shawn Guo
[-- Attachment #1: Type: text/plain, Size: 499 bytes --]
Shawn Guo <shawn.guo@linaro.org> writes:
> For sdm845 ACPI boot, the URS (USB Role Switch) node in ACPI DSDT table
> holds the memory resource, while interrupt resources reside in the child
> nodes USB0 and UFN0. It adds USB0 host support by probing URS node,
> creating platform device for USB0 node, and then retrieve interrupt
> resources from USB0 platform device.
>
> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
> ---
Acked-by: Felipe Balbi <balbi@.kernel.org>
--
balbi
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 857 bytes --]
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH v2] usb: dwc3: qcom: add URS Host support for sdm845 ACPI boot
2021-01-15 3:50 [PATCH v2] usb: dwc3: qcom: add URS Host support for sdm845 ACPI boot Shawn Guo
` (2 preceding siblings ...)
2021-01-18 11:28 ` Felipe Balbi
@ 2021-03-01 19:59 ` patchwork-bot+linux-arm-msm
3 siblings, 0 replies; 6+ messages in thread
From: patchwork-bot+linux-arm-msm @ 2021-03-01 19:59 UTC (permalink / raw)
To: Shawn Guo; +Cc: linux-arm-msm
Hello:
This patch was applied to qcom/linux.git (refs/heads/for-next):
On Fri, 15 Jan 2021 11:50:57 +0800 you wrote:
> For sdm845 ACPI boot, the URS (USB Role Switch) node in ACPI DSDT table
> holds the memory resource, while interrupt resources reside in the child
> nodes USB0 and UFN0. It adds USB0 host support by probing URS node,
> creating platform device for USB0 node, and then retrieve interrupt
> resources from USB0 platform device.
>
> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
>
> [...]
Here is the summary with links:
- [v2] usb: dwc3: qcom: add URS Host support for sdm845 ACPI boot
https://git.kernel.org/qcom/c/c25c210f590e
You are awesome, thank you!
--
Deet-doot-dot, I am a bot.
https://korg.docs.kernel.org/patchwork/pwbot.html
^ permalink raw reply [flat|nested] 6+ messages in thread
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2021-01-15 3:50 [PATCH v2] usb: dwc3: qcom: add URS Host support for sdm845 ACPI boot Shawn Guo
2021-01-15 4:02 ` Bjorn Andersson
2021-01-15 13:27 ` Felipe Balbi
2021-01-15 14:12 ` Bjorn Andersson
2021-01-18 11:28 ` Felipe Balbi
2021-03-01 19:59 ` patchwork-bot+linux-arm-msm
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