From: Stephen Boyd <sboyd@kernel.org>
To: Rahul Tanwar <rtanwar@maxlinear.com>,
linux-clk@vger.kernel.org, mturquette@baylibre.com
Cc: linux-kernel@vger.kernel.org, linux-lgm-soc@maxlinear.com,
Rahul Tanwar <rtanwar@maxlinear.com>
Subject: Re: [PATCH RESEND v2 2/5] clk: mxl: Remove unnecessary spinlocks
Date: Wed, 28 Sep 2022 17:16:02 -0700 [thread overview]
Message-ID: <20220929001606.02029C433B5@smtp.kernel.org> (raw)
In-Reply-To: <be8772d962788a3d8a37c1f02abaa9821606a6bb.1663827071.git.rtanwar@maxlinear.com>
Quoting Rahul Tanwar (2022-09-21 23:24:25)
> This driver is now switched from direct readl/writel based register
> access to regmap based register acceess. Regmap already has its own
> lock to serialize the register accesses across multiple cores.
>
> Hence, there is no need for additional spinlocks in the driver.
> Remove all spinlocks which are no longer required.
Can you confirm that the driver doesn't do a read, modify, write (rmw)
sequence where during the modification another CPU can rmw and corrupt
the previous "read"?
next prev parent reply other threads:[~2022-09-29 0:16 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-09-22 6:24 [PATCH RESEND v2 0/5] Modify MxL's CGU clk driver to make it secure boot compatible Rahul Tanwar
2022-09-22 6:24 ` [PATCH RESEND v2 1/5] clk: mxl: Switch from direct readl/writel based IO to regmap based IO Rahul Tanwar
2022-09-29 0:14 ` Stephen Boyd
2022-09-29 5:29 ` Rahul Tanwar
2022-09-22 6:24 ` [PATCH RESEND v2 2/5] clk: mxl: Remove unnecessary spinlocks Rahul Tanwar
2022-09-29 0:16 ` Stephen Boyd [this message]
2022-09-29 5:37 ` Rahul Tanwar
2022-09-22 6:24 ` [PATCH RESEND v2 3/5] clk: mxl: Avoid disabling gate clocks from clk driver Rahul Tanwar
2022-09-29 0:17 ` Stephen Boyd
2022-09-29 5:45 ` Rahul Tanwar
[not found] ` <20220930010123.38984C4347C@smtp.kernel.org>
2022-10-05 9:36 ` Rahul Tanwar
[not found] ` <20221005202037.E7B43C433C1@smtp.kernel.org>
2022-10-11 7:28 ` Rahul Tanwar
[not found] ` <20221011174345.906BAC433D7@smtp.kernel.org>
2022-10-12 9:34 ` Rahul Tanwar
2022-10-11 7:33 ` Rahul Tanwar
2022-10-05 10:52 ` Rahul Tanwar
2022-09-22 6:24 ` [PATCH RESEND v2 4/5] clk: mxl: Add validation for register reads/writes Rahul Tanwar
2022-09-29 0:20 ` Stephen Boyd
2022-09-29 6:10 ` Rahul Tanwar
[not found] ` <20220930010212.7860DC433C1@smtp.kernel.org>
2022-10-05 9:36 ` Rahul Tanwar
2022-10-05 10:52 ` Rahul Tanwar
2022-09-22 6:24 ` [PATCH RESEND v2 5/5] clk: mxl: Add a missing flag to allow parent clock rate change Rahul Tanwar
2022-09-29 0:18 ` Stephen Boyd
2022-09-29 5:46 ` Rahul Tanwar
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