From: Rahul Tanwar <rtanwar@maxlinear.com>
To: Stephen Boyd <sboyd@kernel.org>,
"linux-clk@vger.kernel.org" <linux-clk@vger.kernel.org>,
"mturquette@baylibre.com" <mturquette@baylibre.com>
Cc: "linux-kernel@" <"vger.kernel.org linux-kernel"@vger.kernel.org>,
linux-lgm-soc <linux-lgm-soc@maxlinear.com>,
Yi xin Zhu <yzhu@maxlinear.com>
Subject: Re: [PATCH RESEND v2 3/5] clk: mxl: Avoid disabling gate clocks from clk driver
Date: Wed, 12 Oct 2022 09:34:42 +0000 [thread overview]
Message-ID: <MN2PR19MB369399EDEB4E73307F94E41AB1229@MN2PR19MB3693.namprd19.prod.outlook.com> (raw)
In-Reply-To: 20221011174345.906BAC433D7@smtp.kernel.org
Hi Stephen,
On 12/10/2022 1:43 am, Stephen Boyd wrote:
> This email was sent from outside of MaxLinear.
>
>
> Quoting Rahul Tanwar (2022-10-11 00:28:56)
>>
>> I agree that what you are suggesting is the ideal way to handle such
>> clks. If i understand you correctly, you are suggesting below (please
>> correct me if i am mistaken):
>>
>> 1. Disable/remove such clocks from corresponding driver's devicetree
>> nodes. This will make devm_clk_get() or clk_get() return failure.
>
> No. Don't remove anything from devicetree, simply make the clk provider
> return NULL when the clk_src_get() function pointer is asked for the clk
> index that represents the clks that have no abilities to do anything.
>
>>
>> 2. Modify all drivers which use such clks
>>
>> from:
>>
>> clk = devm_clk_get(...);
>> if (IS_ERR(clk))
>> return -ERROR;
>> clk_prepare_enable(clk);
>> clk_get/set_rate();
>> ...
>>
>> to:
>> clk = devm_clk_get(...);
>> if (!(IS_ERR(clk)) {
>> clk_prepare_enable(clk);
>> clk_get/set_rate();
>> ...
>> } else {
>> // print error info - do nothing, no clk_ops calls
>> }
>
> No. Nothing in the drivers changes. The 'clk' pointer will be NULL, that
> will not make the 'if (IS_ERR(clk))' condition be true, so return -ERROR
> won't happen. Similarly, clk_prepare_enable() will return 0 when called
> with a NULL pointer. Please try it out.
>
>>
>> But the problem that we have is that 80% of the clks that we use fall
>> under this category (around 65 clks). And if we follow this approach,
>> then we will have to make above changes in all of the drivers which use
>> these clks & retest them again. That seems like a overhaul. We already
>> keep a internal driver flag in each clk entry data structure and we
>> already use it in the driver for other types of clks for e.g MUX_CLKs.
>> So using the internal flag to handle this becomes a preferable &
>> existing driver design aligned approach for us.
>>
>
> There isn't an overhaul.
>
After going through the code again together with your comments, now i
understand exactly what you are suggesting. I will make the changes
accordingly in v4. Thanks for your valuable inputs.
Rahul
>
next prev parent reply other threads:[~2022-10-12 9:34 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-09-22 6:24 [PATCH RESEND v2 0/5] Modify MxL's CGU clk driver to make it secure boot compatible Rahul Tanwar
2022-09-22 6:24 ` [PATCH RESEND v2 1/5] clk: mxl: Switch from direct readl/writel based IO to regmap based IO Rahul Tanwar
2022-09-29 0:14 ` Stephen Boyd
2022-09-29 5:29 ` Rahul Tanwar
2022-09-22 6:24 ` [PATCH RESEND v2 2/5] clk: mxl: Remove unnecessary spinlocks Rahul Tanwar
2022-09-29 0:16 ` Stephen Boyd
2022-09-29 5:37 ` Rahul Tanwar
2022-09-22 6:24 ` [PATCH RESEND v2 3/5] clk: mxl: Avoid disabling gate clocks from clk driver Rahul Tanwar
2022-09-29 0:17 ` Stephen Boyd
2022-09-29 5:45 ` Rahul Tanwar
[not found] ` <20220930010123.38984C4347C@smtp.kernel.org>
2022-10-05 9:36 ` Rahul Tanwar
[not found] ` <20221005202037.E7B43C433C1@smtp.kernel.org>
2022-10-11 7:28 ` Rahul Tanwar
[not found] ` <20221011174345.906BAC433D7@smtp.kernel.org>
2022-10-12 9:34 ` Rahul Tanwar [this message]
2022-10-11 7:33 ` Rahul Tanwar
2022-10-05 10:52 ` Rahul Tanwar
2022-09-22 6:24 ` [PATCH RESEND v2 4/5] clk: mxl: Add validation for register reads/writes Rahul Tanwar
2022-09-29 0:20 ` Stephen Boyd
2022-09-29 6:10 ` Rahul Tanwar
[not found] ` <20220930010212.7860DC433C1@smtp.kernel.org>
2022-10-05 9:36 ` Rahul Tanwar
2022-10-05 10:52 ` Rahul Tanwar
2022-09-22 6:24 ` [PATCH RESEND v2 5/5] clk: mxl: Add a missing flag to allow parent clock rate change Rahul Tanwar
2022-09-29 0:18 ` Stephen Boyd
2022-09-29 5:46 ` Rahul Tanwar
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