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From: Mark Brown <broonie-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
To: Laxman Dewangan <ldewangan-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
Cc: Peter De Schrijver
	<pdeschrijver-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>,
	linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	linux-clk-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	mturquette-rdvid1DuHRBWk0Htik3J/w@public.gmane.org,
	sboyd-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org,
	robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org,
	mark.rutland-5wv7dgnIgG8@public.gmane.org,
	devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	lgirdwood-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org,
	linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
Subject: Re: [PATCH v3 01/11] regulator: core: add API to get voltage constraints
Date: Thu, 8 Feb 2018 14:58:34 +0000	[thread overview]
Message-ID: <20180208145834.GA27520@sirena.org.uk> (raw)
In-Reply-To: <86cd40ac-d255-f4b9-87cb-0cd34efba7d8-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>

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On Thu, Feb 08, 2018 at 03:34:56PM +0530, Laxman Dewangan wrote:

> I added this API in downstream for the purpose of finding whether rail
> output can be changed or not(fixed) based on constraints.
> If min and max is same then it can not change. I used this information to
> set the pad voltage of SOC automatically.

That's a reasonable thing to want to know.  The way the API wants you to
ask that question at the minute is to check if you can set the voltages
you might want to set and then if there's only one possible voltage you
can conclude that change is not possible.  I appreciate that that's a
bit of a long way round to do it, the thinking was to try to keep the
client drivers more robust in cases you can change the voltage but not
to all the values the driver wants.  I'd consider relaxing that and
having a direct API to ask about variability (just as a boolean) since
it does occur to me that this can be a useful speedup during init but I
need to think.

> I dont know other usage when I added this API. May be Peter is needed here.

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  parent reply	other threads:[~2018-02-08 14:58 UTC|newest]

Thread overview: 45+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-02-06 16:34 [PATCH v3 00/11] Tegra210 DFLL implementation Peter De Schrijver
     [not found] ` <1517934852-23255-1-git-send-email-pdeschrijver-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2018-02-06 16:34   ` [PATCH v3 01/11] regulator: core: add API to get voltage constraints Peter De Schrijver
2018-02-06 16:35     ` Mark Brown
     [not found]       ` <20180206163544.GI5681-GFdadSzt00ze9xe1eoZjHA@public.gmane.org>
2018-02-07  8:47         ` Peter De Schrijver
2018-02-07 10:43           ` Mark Brown
     [not found]             ` <20180207104351.GA6003-GFdadSzt00ze9xe1eoZjHA@public.gmane.org>
2018-02-07 12:37               ` Peter De Schrijver
     [not found]                 ` <20180207123750.GA5850-Rysk9IDjsxmJz7etNGeUX8VPkgjIgRvpAL8bYrjMMd8@public.gmane.org>
2018-02-07 14:18                   ` Mark Brown
2018-02-07 14:32                     ` Peter De Schrijver
     [not found]                       ` <20180207143213.GB5850-Rysk9IDjsxmJz7etNGeUX8VPkgjIgRvpAL8bYrjMMd8@public.gmane.org>
2018-02-07 15:01                         ` Mark Brown
2018-02-07 15:20                           ` Peter De Schrijver
     [not found]                             ` <20180207152045.GC5850-Rysk9IDjsxmJz7etNGeUX8VPkgjIgRvpAL8bYrjMMd8@public.gmane.org>
2018-02-07 15:37                               ` Mark Brown
     [not found]                                 ` <20180207153711.GE6003-GFdadSzt00ze9xe1eoZjHA@public.gmane.org>
2018-02-08 10:04                                   ` Laxman Dewangan
     [not found]                                     ` <86cd40ac-d255-f4b9-87cb-0cd34efba7d8-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2018-02-08 14:58                                       ` Mark Brown [this message]
2018-02-06 16:34   ` [PATCH v3 02/11] clk: tegra: retrieve regulator info from framework Peter De Schrijver
2018-03-08 22:26     ` Jon Hunter
2018-02-06 16:34   ` [PATCH v3 03/11] clk: tegra: dfll registration for multiple SoCs Peter De Schrijver
2018-03-08 22:15     ` Jon Hunter
2018-02-06 16:34   ` [PATCH v3 04/11] clk: tegra: add CVB tables for Tegra210 CPU DFLL Peter De Schrijver
2018-03-08 22:28     ` Jon Hunter
2018-02-06 16:34   ` [PATCH v3 05/11] clk: tegra: prepare dfll driver for PWM regulator Peter De Schrijver
2018-03-08 22:50     ` Jon Hunter
2018-03-12  9:14       ` Peter De Schrijver
2018-03-12 11:08         ` Jon Hunter
2018-03-13  9:03           ` Peter De Schrijver
2018-03-13 10:07             ` Jon Hunter
2018-02-06 16:34   ` [PATCH v3 07/11] dt-bindings: tegra: Update DFLL binding " Peter De Schrijver
     [not found]     ` <1517934852-23255-8-git-send-email-pdeschrijver-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2018-02-09 23:19       ` Rob Herring
2018-03-08 23:21     ` Jon Hunter
2018-03-12  9:10       ` Peter De Schrijver
2018-02-06 16:34   ` [PATCH v3 09/11] cpufreq: tegra124-cpufreq: extend to support Tegra210 Peter De Schrijver
2018-03-08 23:25     ` Jon Hunter
2018-03-09  8:14       ` Peter De Schrijver
2018-03-12 10:14         ` Jon Hunter
2018-03-13  9:28           ` Peter De Schrijver
2018-03-09  9:11     ` Viresh Kumar
2018-03-12 12:15     ` Jon Hunter
2018-03-13  9:51       ` Peter De Schrijver
2018-03-13 10:20         ` Jon Hunter
2018-02-06 16:34   ` [PATCH v3 10/11] arm64: dts: tegra: Add Tegra210 DFLL definition Peter De Schrijver
2018-02-06 16:34   ` [PATCH v3 11/11] arm64: dts: nvidia: Tegra210 CPU clock definition Peter De Schrijver
2018-02-06 16:34 ` [PATCH v3 06/11] clk: tegra: dfll: support PWM regulator control Peter De Schrijver
2018-03-08 23:15   ` Jon Hunter
2018-03-09  8:12     ` Peter De Schrijver
2018-02-06 16:34 ` [PATCH v3 08/11] clk: tegra: build clk-dfll.c for Tegra124 and Tegra210 Peter De Schrijver
2018-03-08 23:22   ` Jon Hunter

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