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From: Jon Hunter <jonathanh@nvidia.com>
To: Peter De Schrijver <pdeschrijver@nvidia.com>,
	linux-tegra@vger.kernel.org, linux-clk@vger.kernel.org,
	mturquette@baylibre.com, sboyd@codeaurora.org,
	robh+dt@kernel.org, mark.rutland@arm.com,
	devicetree@vger.kernel.org, lgirdwood@gmail.com,
	broonie@kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v3 09/11] cpufreq: tegra124-cpufreq: extend to support Tegra210
Date: Thu, 8 Mar 2018 23:25:04 +0000	[thread overview]
Message-ID: <b7a25613-44b4-5e63-e8c7-91ce2b7cb56e@nvidia.com> (raw)
In-Reply-To: <1517934852-23255-10-git-send-email-pdeschrijver@nvidia.com>


On 06/02/18 16:34, Peter De Schrijver wrote:
> Tegra210 has a very similar CPU clocking scheme than Tegra124. So add
> support in this driver. Also allow for the case where the CPU voltage is
> controlled directly by the DFLL rather than by a separate regulator object.
> 
> Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
> ---
>  drivers/cpufreq/tegra124-cpufreq.c | 15 ++++++++-------
>  1 file changed, 8 insertions(+), 7 deletions(-)
> 
> diff --git a/drivers/cpufreq/tegra124-cpufreq.c b/drivers/cpufreq/tegra124-cpufreq.c
> index 4353025..f8e01a8 100644
> --- a/drivers/cpufreq/tegra124-cpufreq.c
> +++ b/drivers/cpufreq/tegra124-cpufreq.c
> @@ -64,7 +64,8 @@ static void tegra124_cpu_switch_to_pllx(struct tegra124_cpufreq_priv *priv)
>  {
>  	clk_set_parent(priv->cpu_clk, priv->pllp_clk);
>  	clk_disable_unprepare(priv->dfll_clk);
> -	regulator_sync_voltage(priv->vdd_cpu_reg);
> +	if (priv->vdd_cpu_reg)
> +		regulator_sync_voltage(priv->vdd_cpu_reg);
>  	clk_set_parent(priv->cpu_clk, priv->pllx_clk);
>  }
>  
> @@ -89,10 +90,10 @@ static int tegra124_cpufreq_probe(struct platform_device *pdev)
>  		return -ENODEV;
>  
>  	priv->vdd_cpu_reg = regulator_get(cpu_dev, "vdd-cpu");
> -	if (IS_ERR(priv->vdd_cpu_reg)) {
> -		ret = PTR_ERR(priv->vdd_cpu_reg);
> -		goto out_put_np;
> -	}
> +	if (IS_ERR(priv->vdd_cpu_reg) != -EPROBE_DEFER)
> +		priv->vdd_cpu_reg = NULL;
> +	else
> +		return -EPROBE_DEFER;

I am still not sure that we should rely on the fact that the regulator
is not present in DT to imply that we do not need it. I think that we
should be checking if we are using I2C mode here.

Cheers
Jon

-- 
nvpublic

  reply	other threads:[~2018-03-08 23:25 UTC|newest]

Thread overview: 45+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-02-06 16:34 [PATCH v3 00/11] Tegra210 DFLL implementation Peter De Schrijver
     [not found] ` <1517934852-23255-1-git-send-email-pdeschrijver-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2018-02-06 16:34   ` [PATCH v3 01/11] regulator: core: add API to get voltage constraints Peter De Schrijver
2018-02-06 16:35     ` Mark Brown
     [not found]       ` <20180206163544.GI5681-GFdadSzt00ze9xe1eoZjHA@public.gmane.org>
2018-02-07  8:47         ` Peter De Schrijver
2018-02-07 10:43           ` Mark Brown
     [not found]             ` <20180207104351.GA6003-GFdadSzt00ze9xe1eoZjHA@public.gmane.org>
2018-02-07 12:37               ` Peter De Schrijver
     [not found]                 ` <20180207123750.GA5850-Rysk9IDjsxmJz7etNGeUX8VPkgjIgRvpAL8bYrjMMd8@public.gmane.org>
2018-02-07 14:18                   ` Mark Brown
2018-02-07 14:32                     ` Peter De Schrijver
     [not found]                       ` <20180207143213.GB5850-Rysk9IDjsxmJz7etNGeUX8VPkgjIgRvpAL8bYrjMMd8@public.gmane.org>
2018-02-07 15:01                         ` Mark Brown
2018-02-07 15:20                           ` Peter De Schrijver
     [not found]                             ` <20180207152045.GC5850-Rysk9IDjsxmJz7etNGeUX8VPkgjIgRvpAL8bYrjMMd8@public.gmane.org>
2018-02-07 15:37                               ` Mark Brown
     [not found]                                 ` <20180207153711.GE6003-GFdadSzt00ze9xe1eoZjHA@public.gmane.org>
2018-02-08 10:04                                   ` Laxman Dewangan
     [not found]                                     ` <86cd40ac-d255-f4b9-87cb-0cd34efba7d8-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2018-02-08 14:58                                       ` Mark Brown
2018-02-06 16:34   ` [PATCH v3 02/11] clk: tegra: retrieve regulator info from framework Peter De Schrijver
2018-03-08 22:26     ` Jon Hunter
2018-02-06 16:34   ` [PATCH v3 03/11] clk: tegra: dfll registration for multiple SoCs Peter De Schrijver
2018-03-08 22:15     ` Jon Hunter
2018-02-06 16:34   ` [PATCH v3 04/11] clk: tegra: add CVB tables for Tegra210 CPU DFLL Peter De Schrijver
2018-03-08 22:28     ` Jon Hunter
2018-02-06 16:34   ` [PATCH v3 05/11] clk: tegra: prepare dfll driver for PWM regulator Peter De Schrijver
2018-03-08 22:50     ` Jon Hunter
2018-03-12  9:14       ` Peter De Schrijver
2018-03-12 11:08         ` Jon Hunter
2018-03-13  9:03           ` Peter De Schrijver
2018-03-13 10:07             ` Jon Hunter
2018-02-06 16:34   ` [PATCH v3 07/11] dt-bindings: tegra: Update DFLL binding " Peter De Schrijver
     [not found]     ` <1517934852-23255-8-git-send-email-pdeschrijver-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2018-02-09 23:19       ` Rob Herring
2018-03-08 23:21     ` Jon Hunter
2018-03-12  9:10       ` Peter De Schrijver
2018-02-06 16:34   ` [PATCH v3 09/11] cpufreq: tegra124-cpufreq: extend to support Tegra210 Peter De Schrijver
2018-03-08 23:25     ` Jon Hunter [this message]
2018-03-09  8:14       ` Peter De Schrijver
2018-03-12 10:14         ` Jon Hunter
2018-03-13  9:28           ` Peter De Schrijver
2018-03-09  9:11     ` Viresh Kumar
2018-03-12 12:15     ` Jon Hunter
2018-03-13  9:51       ` Peter De Schrijver
2018-03-13 10:20         ` Jon Hunter
2018-02-06 16:34   ` [PATCH v3 10/11] arm64: dts: tegra: Add Tegra210 DFLL definition Peter De Schrijver
2018-02-06 16:34   ` [PATCH v3 11/11] arm64: dts: nvidia: Tegra210 CPU clock definition Peter De Schrijver
2018-02-06 16:34 ` [PATCH v3 06/11] clk: tegra: dfll: support PWM regulator control Peter De Schrijver
2018-03-08 23:15   ` Jon Hunter
2018-03-09  8:12     ` Peter De Schrijver
2018-02-06 16:34 ` [PATCH v3 08/11] clk: tegra: build clk-dfll.c for Tegra124 and Tegra210 Peter De Schrijver
2018-03-08 23:22   ` Jon Hunter

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