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From: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
To: Rob Herring <robh@kernel.org>
Cc: vijayakannan.ayyathurai@intel.com, daniel.lezcano@linaro.org,
	tglx@linutronix.de, devicetree@vger.kernel.org,
	mgross@linux.intel.com, wan.ahmad.zainie.wan.mohamad@intel.com,
	lakshmi.bai.raja.subramanian@intel.com
Subject: Re: [PATCH v1 1/2] dt-bindings: timer: Add bindings for Intel Keem Bay SoC timer
Date: Tue, 8 Dec 2020 20:12:24 +0200	[thread overview]
Message-ID: <20201208181224.GM4077@smile.fi.intel.com> (raw)
In-Reply-To: <20201208161247.GA2620425@robh.at.kernel.org>

On Tue, Dec 08, 2020 at 10:12:47AM -0600, Rob Herring wrote:
> On Thu, Nov 26, 2020 at 06:34:08PM +0800, vijayakannan.ayyathurai@intel.com wrote:
> > From: Vijayakannan Ayyathurai <vijayakannan.ayyathurai@intel.com>
> > 
> > Add Device Tree bindings for the Timer IP, which used as clocksource and
> > clockevent in the Intel Keem Bay SoC.

...

> > +examples:
> > +  - |
> > +    #include <dt-bindings/interrupt-controller/arm-gic.h>
> > +    #include <dt-bindings/interrupt-controller/irq.h>
> > +    #define KEEM_BAY_A53_TIM
> > +
> > +    timer@20330010 {
> > +        compatible = "intel,keembay-timer";
> > +        reg = <0x20330010 0xc>,
> > +              <0x20331000 0xc>;
> > +        interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
> > +        clocks = <&scmi_clk KEEM_BAY_A53_TIM>;
> > +    };
> > +
> > +    counter@203300e8 {
> > +        compatible = "intel,keembay-counter";
> > +        reg = <0x203300e8 0xc>,
> > +              <0x20331000 0xc>;
> 
> You have overlapping reg regions here. Don't do that. Define the DT 
> in terms of the h/w, not how you want to split things for Linux.
> 
> It looks like a single h/w block providing multiple functions.

Actually a good catch.

Perhaps it needs to have a parent device that provides three resources (one
common and one per each of two functions) and in the driver it should consume
them accordingly. Though I'm not an expert in DT, does it sound correct from
your perspective?

> > +        clocks = <&scmi_clk KEEM_BAY_A53_TIM>;
> > +    };

-- 
With Best Regards,
Andy Shevchenko



  reply	other threads:[~2020-12-08 18:13 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-11-26 10:34 [PATCH v1 0/2] Add drivers for Intel Keem Bay SoC timer block vijayakannan.ayyathurai
2020-11-26 10:34 ` [PATCH v1 1/2] dt-bindings: timer: Add bindings for Intel Keem Bay SoC timer vijayakannan.ayyathurai
2020-12-08 16:12   ` Rob Herring
2020-12-08 18:12     ` Andy Shevchenko [this message]
2020-12-16 19:16       ` Ayyathurai, Vijayakannan
2020-11-26 10:34 ` [PATCH v1 2/2] clocksource: Add Intel Keem Bay Timer Support vijayakannan.ayyathurai
2020-12-03 18:09   ` Daniel Lezcano
2020-12-03 18:09   ` Daniel Lezcano
2020-12-04  4:09     ` Ayyathurai, Vijayakannan

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