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* [PATCH] EDAC/mce_amd: Decode Cache Level "L0" Error Code
@ 2023-04-10 20:33 Yazen Ghannam
  2023-04-10 20:47 ` Borislav Petkov
  0 siblings, 1 reply; 3+ messages in thread
From: Yazen Ghannam @ 2023-04-10 20:33 UTC (permalink / raw)
  To: bp, linux-edac; +Cc: linux-kernel, avadhut.naik, Yazen Ghannam

The "L0" cache level is listed as "reserved" in legacy documentation.
This has now been defined as "Core" in current documentation for
Zen-based systems.

Update the cache level strings to include this new definition.

Signed-off-by: Yazen Ghannam <yazen.ghannam@amd.com>
---
 drivers/edac/mce_amd.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/edac/mce_amd.c b/drivers/edac/mce_amd.c
index cc5c63feb26a..1d1b9da3b9bd 100644
--- a/drivers/edac/mce_amd.c
+++ b/drivers/edac/mce_amd.c
@@ -37,7 +37,7 @@ EXPORT_SYMBOL_GPL(amd_unregister_ecc_decoder);
 static const char * const tt_msgs[] = { "INSN", "DATA", "GEN", "RESV" };
 
 /* cache level */
-static const char * const ll_msgs[] = { "RESV", "L1", "L2", "L3/GEN" };
+static const char * const ll_msgs[] = { "CORE", "L1", "L2", "L3/GEN" };
 
 /* memory transaction type */
 static const char * const rrrr_msgs[] = {
-- 
2.34.1


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2023-04-10 20:33 [PATCH] EDAC/mce_amd: Decode Cache Level "L0" Error Code Yazen Ghannam
2023-04-10 20:47 ` Borislav Petkov
2023-04-10 20:53   ` Yazen Ghannam

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