From: "Ghannam, Yazen" <Yazen.Ghannam@amd.com>
To: Borislav Petkov <bp@alien8.de>
Cc: "linux-edac@vger.kernel.org" <linux-edac@vger.kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: RE: [PATCH 2/8] EDAC/amd64: Support more than two controllers for chip selects handling
Date: Thu, 13 Jun 2019 20:58:16 +0000 [thread overview]
Message-ID: <SN6PR12MB263987AAB225A09527C4D736F8EF0@SN6PR12MB2639.namprd12.prod.outlook.com> (raw)
In-Reply-To: <20190613141715.GD11598@zn.tnic>
> -----Original Message-----
> From: Borislav Petkov <bp@alien8.de>
> Sent: Thursday, June 13, 2019 9:17 AM
> To: Ghannam, Yazen <Yazen.Ghannam@amd.com>
> Cc: linux-edac@vger.kernel.org; linux-kernel@vger.kernel.org
> Subject: Re: [PATCH 2/8] EDAC/amd64: Support more than two controllers for chip selects handling
>
> On Fri, May 31, 2019 at 11:45:12PM +0000, Ghannam, Yazen wrote:
> > diff --git a/drivers/edac/amd64_edac.c b/drivers/edac/amd64_edac.c
> > index 9fa2f205f05c..dd60cf5a3d96 100644
> > --- a/drivers/edac/amd64_edac.c
> > +++ b/drivers/edac/amd64_edac.c
> > @@ -943,91 +943,101 @@ static void prep_chip_selects(struct amd64_pvt *pvt)
> > pvt->csels[0].b_cnt = pvt->csels[1].b_cnt = 4;
> > pvt->csels[0].m_cnt = pvt->csels[1].m_cnt = 2;
> > } else if (pvt->fam >= 0x17) {
> > - pvt->csels[0].b_cnt = pvt->csels[1].b_cnt = 4;
> > - pvt->csels[0].m_cnt = pvt->csels[1].m_cnt = 2;
> > + int umc;
> > +
> > + for_each_umc(umc) {
> > + pvt->csels[umc].b_cnt = 4;
> > + pvt->csels[umc].m_cnt = 2;
> > + }
> > +
>
> What is the purpose of the previous commit if you're changing it here in
> the next one?
>
The first patch is meant as a fix for existing systems, and this patch is to add new functionality.
I can merge them together if you think that's more appropriate.
Thanks,
Yazen
next prev parent reply other threads:[~2019-06-13 20:58 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-05-31 23:45 [PATCH 0/8] AMD64 EDAC fixes for v5.2 Ghannam, Yazen
2019-05-31 23:45 ` [PATCH 1/8] EDAC/amd64: Fix number of DIMMs and Chip Select bases/masks on Family17h Ghannam, Yazen
2019-06-13 13:58 ` Borislav Petkov
2019-06-13 21:00 ` Ghannam, Yazen
2019-06-17 13:37 ` Borislav Petkov
2019-05-31 23:45 ` [PATCH 2/8] EDAC/amd64: Support more than two controllers for chip selects handling Ghannam, Yazen
2019-06-13 14:17 ` Borislav Petkov
2019-06-13 20:58 ` Ghannam, Yazen [this message]
2019-06-13 22:22 ` Borislav Petkov
2019-06-14 14:14 ` Ghannam, Yazen
2019-05-31 23:45 ` [PATCH 3/8] EDAC/amd64: Recognize DRAM device type with EDAC_CTL_CAP Ghannam, Yazen
2019-05-31 23:45 ` [PATCH 5/8] EDAC/amd64: Find Chip Select memory size using Address Mask Ghannam, Yazen
2019-05-31 23:45 ` [PATCH 4/8] EDAC/amd64: Initialize DIMM info for systems with more than two channels Ghannam, Yazen
2019-05-31 23:45 ` [PATCH 7/8] EDAC/amd64: Cache secondary Chip Select registers Ghannam, Yazen
2019-05-31 23:45 ` [PATCH 6/8] EDAC/amd64: Decode syndrome before translating address Ghannam, Yazen
2019-05-31 23:45 ` [PATCH 8/8] EDAC/amd64: Support Asymmetric Dual-Rank DIMMs Ghannam, Yazen
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=SN6PR12MB263987AAB225A09527C4D736F8EF0@SN6PR12MB2639.namprd12.prod.outlook.com \
--to=yazen.ghannam@amd.com \
--cc=bp@alien8.de \
--cc=linux-edac@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).