From: matthew.gerlach@linux.intel.com
To: hao.wu@intel.com, yilun.xu@intel.com, russell.h.weight@intel.com,
basheer.ahmed.muddebihal@intel.com, trix@redhat.com,
mdf@kernel.org, linux-fpga@vger.kernel.org,
linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org,
tianfei.zhang@intel.com, corbet@lwn.net,
gregkh@linuxfoundation.org, linux-serial@vger.kernel.org,
jirislaby@kernel.org, geert+renesas@glider.be,
andriy.shevchenko@linux.intel.com,
niklas.soderlund+renesas@ragnatech.se, macro@orcam.me.uk,
johan@kernel.org, lukas@wunner.de
Cc: Matthew Gerlach <matthew.gerlach@intel.com>
Subject: [PATCH v3 0/4] Enhance definition of DFH and use enhancements for uart driver
Date: Tue, 4 Oct 2022 07:37:14 -0700 [thread overview]
Message-ID: <20221004143718.1076710-1-matthew.gerlach@linux.intel.com> (raw)
From: Matthew Gerlach <matthew.gerlach@intel.com>
This patchset enhances the definition of the Device Feature Header (DFH) used by
the Device Feature List (DFL) bus and then uses the new enhancements in a uart
driver.
Patch 1 updates the DFL documentation to provide the motivation behind the
enhancements to the definition of the DFH.
Patch 2 adds the definitions for DFHv1.
Patch 3 adds basic support DFHv1. It provides a generic mechanism for
describing MSIX interrupts used by a particular feature instance, and
it gets the location and size of the feature's register set from DFHv1.
Patch 4 adds a DFL uart driver that makes use of the new features of DFHv1.
Basheer Ahmed Muddebihal (1):
fpga: dfl: Add DFHv1 Register Definitions
Matthew Gerlach (3):
Documentation: fpga: dfl: Add documentation for DFHv1
fpga: dfl: add basic support for DFHv1
tty: serial: 8250: add DFL bus driver for Altera 16550.
Documentation/fpga/dfl.rst | 49 ++++++++
drivers/fpga/dfl.c | 150 +++++++++++++++++-------
drivers/fpga/dfl.h | 36 +++++-
drivers/tty/serial/8250/8250_dfl.c | 177 +++++++++++++++++++++++++++++
drivers/tty/serial/8250/Kconfig | 9 ++
drivers/tty/serial/8250/Makefile | 1 +
include/linux/dfl.h | 33 +++++-
7 files changed, 414 insertions(+), 41 deletions(-)
create mode 100644 drivers/tty/serial/8250/8250_dfl.c
--
2.25.1
next reply other threads:[~2022-10-04 14:39 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-10-04 14:37 matthew.gerlach [this message]
2022-10-04 14:37 ` [PATCH v3 1/4] Documentation: fpga: dfl: Add documentation for DFHv1 matthew.gerlach
2022-10-05 11:05 ` Ilpo Järvinen
2022-10-10 17:34 ` matthew.gerlach
2022-10-04 14:37 ` [PATCH v3 2/4] fpga: dfl: Add DFHv1 Register Definitions matthew.gerlach
2022-10-04 14:55 ` Andy Shevchenko
2022-10-04 14:37 ` [PATCH v3 3/4] fpga: dfl: add basic support for DFHv1 matthew.gerlach
2022-10-04 15:11 ` Andy Shevchenko
2022-10-06 9:47 ` Xu Yilun
2022-10-10 15:34 ` matthew.gerlach
2022-10-05 10:30 ` Ilpo Järvinen
2022-10-07 18:35 ` matthew.gerlach
2022-10-06 9:27 ` Xu Yilun
2022-10-10 16:58 ` matthew.gerlach
2022-10-11 6:28 ` Xu Yilun
2022-10-12 0:31 ` matthew.gerlach
2022-10-04 14:37 ` [PATCH v3 4/4] tty: serial: 8250: add DFL bus driver for Altera 16550 matthew.gerlach
2022-10-04 15:31 ` Andy Shevchenko
2022-10-06 17:00 ` matthew.gerlach
2022-10-06 17:44 ` Andy Shevchenko
2022-10-06 22:24 ` matthew.gerlach
2022-10-07 9:15 ` Andy Shevchenko
2022-10-07 15:10 ` matthew.gerlach
2022-10-07 15:28 ` Andy Shevchenko
2022-10-05 10:47 ` Ilpo Järvinen
2022-10-06 21:47 ` matthew.gerlach
2022-10-10 14:53 ` Marco Pagani
2022-10-10 19:42 ` matthew.gerlach
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