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From: Sebastian Ott via iommu <iommu@lists.linux-foundation.org>
To: Joerg Roedel <joro@8bytes.org>, <iommu@lists.linux-foundation.org>
Cc: Benjamin Serebrin <serebrin@amazon.com>,
	Filippo Sironi <sironi@amazon.de>,
	Sebastian Ott <sebott@amazon.de>
Subject: [PATCH 2/3] iommu/amd: Restrict aperture for domains to conform with IVRS
Date: Fri, 5 Jun 2020 16:56:54 +0200	[thread overview]
Message-ID: <20200605145655.13639-3-sebott@amazon.de> (raw)
In-Reply-To: <20200605145655.13639-1-sebott@amazon.de>

The IVRS ACPI table specifies maximum address sizes for I/O virtual
addresses. When allocating new protection domains that perform
translation, propagate these limits as the domain's geometry / aperture.

Based on prior work by Marius Hillenbrand.

Signed-off-by: Sebastian Ott <sebott@amazon.de>
---
 drivers/iommu/amd_iommu.c | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/drivers/iommu/amd_iommu.c b/drivers/iommu/amd_iommu.c
index fb4a44550c4a..d2e79e27778e 100644
--- a/drivers/iommu/amd_iommu.c
+++ b/drivers/iommu/amd_iommu.c
@@ -2460,6 +2460,7 @@ static struct protection_domain *protection_domain_alloc(void)
 
 static struct iommu_domain *amd_iommu_domain_alloc(unsigned type)
 {
+	dma_addr_t max_va = DMA_BIT_MASK(amd_iommu_ivrs_va_size);
 	struct protection_domain *pdomain;
 	u64 *pt_root, root;
 
@@ -2477,11 +2478,6 @@ static struct iommu_domain *amd_iommu_domain_alloc(unsigned type)
 
 		root = amd_iommu_domain_encode_pgtable(pt_root, PAGE_MODE_3_LEVEL);
 		atomic64_set(&pdomain->pt_root, root);
-
-		pdomain->domain.geometry.aperture_start = 0;
-		pdomain->domain.geometry.aperture_end   = ~0ULL;
-		pdomain->domain.geometry.force_aperture = true;
-
 		break;
 	case IOMMU_DOMAIN_DMA:
 		pdomain = dma_ops_domain_alloc();
@@ -2501,6 +2497,10 @@ static struct iommu_domain *amd_iommu_domain_alloc(unsigned type)
 		return NULL;
 	}
 
+	pdomain->domain.geometry.aperture_start = 0;
+	pdomain->domain.geometry.aperture_end   = max_va;
+	pdomain->domain.geometry.force_aperture = true;
+
 	return &pdomain->domain;
 }
 
-- 
2.17.1




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  parent reply	other threads:[~2020-06-05 18:00 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-06-05 14:56 [PATCH 0/3] iommu/amd: I/O VA address limits Sebastian Ott via iommu
2020-06-05 14:56 ` [PATCH 1/3] iommu/amd: Parse supported address sizes from IVRS Sebastian Ott via iommu
2020-06-05 14:56 ` Sebastian Ott via iommu [this message]
2020-06-05 14:56 ` [PATCH 3/3] iommu/amd: Actually enforce geometry aperture Sebastian Ott via iommu
2020-06-30  9:30   ` Joerg Roedel
2020-06-30 22:46     ` [PATCH v2 0/3] iommu/amd: I/O VA address limits Sebastian Ott via iommu
2020-06-30 22:46       ` [PATCH v2 1/3] iommu/amd: Parse supported address sizes from IVRS Sebastian Ott via iommu
2020-06-30 22:46       ` [PATCH v2 2/3] iommu/amd: Restrict aperture for domains to conform with IVRS Sebastian Ott via iommu
2020-06-30 22:46       ` [PATCH v2 3/3] iommu/amd: Actually enforce geometry aperture Sebastian Ott via iommu
2020-07-10 12:31       ` [PATCH v2 0/3] iommu/amd: I/O VA address limits Joerg Roedel
2020-07-17  9:20         ` Sebastian Ott via iommu
2020-07-17  9:47           ` Robin Murphy
2020-07-17 13:22             ` Sironi, Filippo via iommu
2020-07-17 14:36               ` Robin Murphy
2020-07-17 15:15                 ` Sironi, Filippo via iommu
2020-07-22 12:19                   ` joro
2020-07-22 12:34                     ` Sironi, Filippo via iommu
2020-07-22 14:00                       ` joro
2020-06-24 16:09 ` [PATCH " Sebastian Ott via iommu

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