From: Auger Eric <eric.auger@redhat.com>
To: Keqian Zhu <zhukeqian1@huawei.com>,
eric.auger.pro@gmail.com, iommu@lists.linux-foundation.org,
linux-kernel@vger.kernel.org, kvm@vger.kernel.org,
kvmarm@lists.cs.columbia.edu, will@kernel.org, joro@8bytes.org,
maz@kernel.org, robin.murphy@arm.com, alex.williamson@redhat.com
Cc: jean-philippe@linaro.org, vivek.gautam@arm.com, zhangfei.gao@linaro.org
Subject: Re: [PATCH v13 03/15] iommu/arm-smmu-v3: Maintain a SID->device structure
Date: Mon, 1 Feb 2021 18:19:52 +0100 [thread overview]
Message-ID: <c457b450-8755-308e-7c7a-abe23b33d0d6@redhat.com> (raw)
In-Reply-To: <a5cc1635-b69b-50a6-404a-5bf667296669@huawei.com>
Hi Keqian,
On 2/1/21 1:26 PM, Keqian Zhu wrote:
> Hi Eric,
>
> On 2020/11/18 19:21, Eric Auger wrote:
>> From: Jean-Philippe Brucker <jean-philippe@linaro.org>
>>
>> When handling faults from the event or PRI queue, we need to find the
>> struct device associated to a SID. Add a rb_tree to keep track of SIDs.
>>
>> Signed-off-by: Jean-Philippe Brucker <jean-philippe@linaro.org>
> [...]
>
>> }
>>
>> +static int arm_smmu_insert_master(struct arm_smmu_device *smmu,
>> + struct arm_smmu_master *master)
>> +{
>> + int i;
>> + int ret = 0;
>> + struct arm_smmu_stream *new_stream, *cur_stream;
>> + struct rb_node **new_node, *parent_node = NULL;
>> + struct iommu_fwspec *fwspec = dev_iommu_fwspec_get(master->dev);
>> +
>> + master->streams = kcalloc(fwspec->num_ids,
>> + sizeof(struct arm_smmu_stream), GFP_KERNEL);
>> + if (!master->streams)
>> + return -ENOMEM;
>> + master->num_streams = fwspec->num_ids;
> This is not roll-backed when fail.
>
>> +
>> + mutex_lock(&smmu->streams_mutex);
>> + for (i = 0; i < fwspec->num_ids && !ret; i++) {
> Check ret at here, makes it hard to decide the start index of rollback.
>
> If we fail at here, then start index is (i-2).
> If we fail in the loop, then start index is (i-1).
>
>> + u32 sid = fwspec->ids[i];
>> +
>> + new_stream = &master->streams[i];
>> + new_stream->id = sid;
>> + new_stream->master = master;
>> +
>> + /*
>> + * Check the SIDs are in range of the SMMU and our stream table
>> + */
>> + if (!arm_smmu_sid_in_range(smmu, sid)) {
>> + ret = -ERANGE;
>> + break;
>> + }
>> +
>> + /* Ensure l2 strtab is initialised */
>> + if (smmu->features & ARM_SMMU_FEAT_2_LVL_STRTAB) {
>> + ret = arm_smmu_init_l2_strtab(smmu, sid);
>> + if (ret)
>> + break;
>> + }
>> +
>> + /* Insert into SID tree */
>> + new_node = &(smmu->streams.rb_node);
>> + while (*new_node) {
>> + cur_stream = rb_entry(*new_node, struct arm_smmu_stream,
>> + node);
>> + parent_node = *new_node;
>> + if (cur_stream->id > new_stream->id) {
>> + new_node = &((*new_node)->rb_left);
>> + } else if (cur_stream->id < new_stream->id) {
>> + new_node = &((*new_node)->rb_right);
>> + } else {
>> + dev_warn(master->dev,
>> + "stream %u already in tree\n",
>> + cur_stream->id);
>> + ret = -EINVAL;
>> + break;
>> + }
>> + }
>> +
>> + if (!ret) {
>> + rb_link_node(&new_stream->node, parent_node, new_node);
>> + rb_insert_color(&new_stream->node, &smmu->streams);
>> + }
>> + }
>> +
>> + if (ret) {
>> + for (; i > 0; i--)
> should be (i >= 0)?
> And the start index seems not correct.
>
>> + rb_erase(&master->streams[i].node, &smmu->streams);
>> + kfree(master->streams);
>> + }
>> + mutex_unlock(&smmu->streams_mutex);
>> +
>> + return ret;
>> +}
>> +
>> +static void arm_smmu_remove_master(struct arm_smmu_master *master)
>> +{
>> + int i;
>> + struct arm_smmu_device *smmu = master->smmu;
>> + struct iommu_fwspec *fwspec = dev_iommu_fwspec_get(master->dev);
>> +
>> + if (!smmu || !master->streams)
>> + return;
>> +
>> + mutex_lock(&smmu->streams_mutex);
>> + for (i = 0; i < fwspec->num_ids; i++)
>> + rb_erase(&master->streams[i].node, &smmu->streams);
>> + mutex_unlock(&smmu->streams_mutex);
>> +
>> + kfree(master->streams);
>> +}
>> +
>> static struct iommu_ops arm_smmu_ops;
>>
>> static struct iommu_device *arm_smmu_probe_device(struct device *dev)
>> {
>> - int i, ret;
>> + int ret;
>> struct arm_smmu_device *smmu;
>> struct arm_smmu_master *master;
>> struct iommu_fwspec *fwspec = dev_iommu_fwspec_get(dev);
>> @@ -2331,27 +2447,12 @@ static struct iommu_device *arm_smmu_probe_device(struct device *dev)
>>
>> master->dev = dev;
>> master->smmu = smmu;
>> - master->sids = fwspec->ids;
>> - master->num_sids = fwspec->num_ids;
>> INIT_LIST_HEAD(&master->bonds);
>> dev_iommu_priv_set(dev, master);
>>
>> - /* Check the SIDs are in range of the SMMU and our stream table */
>> - for (i = 0; i < master->num_sids; i++) {
>> - u32 sid = master->sids[i];
>> -
>> - if (!arm_smmu_sid_in_range(smmu, sid)) {
>> - ret = -ERANGE;
>> - goto err_free_master;
>> - }
>> -
>> - /* Ensure l2 strtab is initialised */
>> - if (smmu->features & ARM_SMMU_FEAT_2_LVL_STRTAB) {
>> - ret = arm_smmu_init_l2_strtab(smmu, sid);
>> - if (ret)
>> - goto err_free_master;
>> - }
>> - }
>> + ret = arm_smmu_insert_master(smmu, master);
>> + if (ret)
>> + goto err_free_master;
>>
>> master->ssid_bits = min(smmu->ssid_bits, fwspec->num_pasid_bits);
>>
>> @@ -2389,6 +2490,7 @@ static void arm_smmu_release_device(struct device *dev)
>> WARN_ON(arm_smmu_master_sva_enabled(master));
>> arm_smmu_detach_dev(master);
>> arm_smmu_disable_pasid(master);
>> + arm_smmu_remove_master(master);
>> kfree(master);
>
> Thanks,
> Keqian
>
Thank you for the review. Jean will address this issues in his own
series and on my end I will rebase on this latter.
Best Regards
Eric
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next prev parent reply other threads:[~2021-02-01 17:20 UTC|newest]
Thread overview: 59+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-11-18 11:21 [PATCH v13 00/15] SMMUv3 Nested Stage Setup (IOMMU part) Eric Auger
2020-11-18 11:21 ` [PATCH v13 01/15] iommu: Introduce attach/detach_pasid_table API Eric Auger
2020-11-18 16:19 ` Jacob Pan
2020-11-19 17:02 ` Auger Eric
2021-02-01 11:27 ` Keqian Zhu
2021-02-01 17:18 ` Auger Eric
2020-11-18 11:21 ` [PATCH v13 02/15] iommu: Introduce bind/unbind_guest_msi Eric Auger
2021-02-01 11:52 ` Keqian Zhu
2021-02-12 8:55 ` Auger Eric
2021-02-18 8:43 ` Keqian Zhu
2021-02-18 10:35 ` Auger Eric
2020-11-18 11:21 ` [PATCH v13 03/15] iommu/arm-smmu-v3: Maintain a SID->device structure Eric Auger
2021-02-01 12:26 ` Keqian Zhu
2021-02-01 15:15 ` Jean-Philippe Brucker
2021-02-02 6:39 ` Keqian Zhu
2021-02-01 17:19 ` Auger Eric [this message]
2021-02-02 7:20 ` Keqian Zhu
2020-11-18 11:21 ` [PATCH v13 04/15] iommu/smmuv3: Allow s1 and s2 configs to coexist Eric Auger
2021-02-01 12:35 ` Keqian Zhu
2020-11-18 11:21 ` [PATCH v13 05/15] iommu/smmuv3: Get prepared for nested stage support Eric Auger
2020-11-19 3:59 ` kernel test robot
2020-12-03 12:32 ` Kunkun Jiang
2020-12-03 13:01 ` Auger Eric
2020-12-03 13:23 ` Kunkun Jiang
2020-12-09 14:26 ` Shameerali Kolothum Thodi
2021-02-02 7:14 ` Keqian Zhu
2021-02-11 17:36 ` Auger Eric
2020-11-18 11:21 ` [PATCH v13 06/15] iommu/smmuv3: Implement attach/detach_pasid_table Eric Auger
2021-02-02 8:03 ` Keqian Zhu
2021-02-11 17:35 ` Auger Eric
2020-11-18 11:21 ` [PATCH v13 07/15] iommu/smmuv3: Allow stage 1 invalidation with unmanaged ASIDs Eric Auger
2020-12-01 13:33 ` Xingang Wang
2020-12-01 13:58 ` Auger Eric
2020-12-02 12:59 ` Wang Xingang
2020-12-03 18:42 ` Shameerali Kolothum Thodi
2020-12-04 9:53 ` Jean-Philippe Brucker
2020-12-04 10:20 ` Shameerali Kolothum Thodi
2020-12-04 10:23 ` Auger Eric
2021-01-14 16:58 ` Auger Eric
2021-01-14 17:09 ` Shameerali Kolothum Thodi
2021-01-14 17:33 ` Jean-Philippe Brucker
2021-01-14 18:00 ` Auger Eric
2021-02-15 13:17 ` Auger Eric
2020-11-18 11:21 ` [PATCH v13 08/15] iommu/smmuv3: Implement cache_invalidate Eric Auger
2021-01-16 2:24 ` chenxiang (M)
2020-11-18 11:21 ` [PATCH v13 09/15] dma-iommu: Implement NESTED_MSI cookie Eric Auger
2020-11-18 11:21 ` [PATCH v13 10/15] iommu/smmuv3: Nested mode single MSI doorbell per domain enforcement Eric Auger
2020-11-18 11:21 ` [PATCH v13 11/15] iommu/smmuv3: Enforce incompatibility between nested mode and HW MSI regions Eric Auger
2020-11-18 11:21 ` [PATCH v13 12/15] iommu/smmuv3: Implement bind/unbind_guest_msi Eric Auger
2020-11-18 11:21 ` [PATCH v13 13/15] iommu/smmuv3: Report non recoverable faults Eric Auger
2020-11-18 11:21 ` [PATCH v13 14/15] iommu/smmuv3: Accept configs with more than one context descriptor Eric Auger
2020-11-18 11:21 ` [PATCH v13 15/15] iommu/smmuv3: Add PASID cache invalidation per PASID Eric Auger
2021-01-08 17:05 ` [PATCH v13 00/15] SMMUv3 Nested Stage Setup (IOMMU part) Shameerali Kolothum Thodi
2021-01-13 15:37 ` Auger Eric
2021-02-21 18:21 ` Auger Eric
2021-02-22 8:56 ` Shameerali Kolothum Thodi
2021-03-15 18:04 ` Krishna Reddy
2021-03-16 8:22 ` Auger Eric
2021-03-16 18:10 ` Krishna Reddy
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