From: Auger Eric <eric.auger@redhat.com>
To: Shameerali Kolothum Thodi <shameerali.kolothum.thodi@huawei.com>,
wangxingang <wangxingang5@huawei.com>
Cc: Xieyingtai <xieyingtai@huawei.com>,
"jean-philippe@linaro.org" <jean-philippe@linaro.org>,
"alex.williamson@redhat.com" <alex.williamson@redhat.com>,
"kvm@vger.kernel.org" <kvm@vger.kernel.org>,
"maz@kernel.org" <maz@kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"vivek.gautam@arm.com" <vivek.gautam@arm.com>,
"iommu@lists.linux-foundation.org"
<iommu@lists.linux-foundation.org>,
qubingbing <qubingbing@hisilicon.com>,
"Zengtao \(B\)" <prime.zeng@hisilicon.com>,
"zhangfei.gao@linaro.org" <zhangfei.gao@linaro.org>,
"eric.auger.pro@gmail.com" <eric.auger.pro@gmail.com>,
"will@kernel.org" <will@kernel.org>,
"kvmarm@lists.cs.columbia.edu" <kvmarm@lists.cs.columbia.edu>,
"robin.murphy@arm.com" <robin.murphy@arm.com>
Subject: Re: [PATCH v13 07/15] iommu/smmuv3: Allow stage 1 invalidation with unmanaged ASIDs
Date: Mon, 15 Feb 2021 14:17:09 +0100 [thread overview]
Message-ID: <dae77da3-527a-9737-fe2b-c4a0af081321@redhat.com> (raw)
In-Reply-To: <e10ad90dc5144c0d9df98a9a078091af@huawei.com>
Hi Shameer,
On 12/3/20 7:42 PM, Shameerali Kolothum Thodi wrote:
> Hi Eric,
>
>> -----Original Message-----
>> From: kvmarm-bounces@lists.cs.columbia.edu
>> [mailto:kvmarm-bounces@lists.cs.columbia.edu] On Behalf Of Auger Eric
>> Sent: 01 December 2020 13:59
>> To: wangxingang <wangxingang5@huawei.com>
>> Cc: Xieyingtai <xieyingtai@huawei.com>; jean-philippe@linaro.org;
>> kvm@vger.kernel.org; maz@kernel.org; joro@8bytes.org; will@kernel.org;
>> iommu@lists.linux-foundation.org; linux-kernel@vger.kernel.org;
>> vivek.gautam@arm.com; alex.williamson@redhat.com;
>> zhangfei.gao@linaro.org; robin.murphy@arm.com;
>> kvmarm@lists.cs.columbia.edu; eric.auger.pro@gmail.com
>> Subject: Re: [PATCH v13 07/15] iommu/smmuv3: Allow stage 1 invalidation with
>> unmanaged ASIDs
>>
>> Hi Xingang,
>>
>> On 12/1/20 2:33 PM, Xingang Wang wrote:
>>> Hi Eric
>>>
>>> On Wed, 18 Nov 2020 12:21:43, Eric Auger wrote:
>>>> @@ -1710,7 +1710,11 @@ static void arm_smmu_tlb_inv_context(void
>> *cookie)
>>>> * insertion to guarantee those are observed before the TLBI. Do be
>>>> * careful, 007.
>>>> */
>>>> - if (smmu_domain->stage == ARM_SMMU_DOMAIN_S1) {
>>>> + if (ext_asid >= 0) { /* guest stage 1 invalidation */
>>>> + cmd.opcode = CMDQ_OP_TLBI_NH_ASID;
>>>> + cmd.tlbi.asid = ext_asid;
>>>> + cmd.tlbi.vmid = smmu_domain->s2_cfg.vmid;
>>>> + } else if (smmu_domain->stage == ARM_SMMU_DOMAIN_S1) {
>>>
>>> Found a problem here, the cmd for guest stage 1 invalidation is built,
>>> but it is not delivered to smmu.
>>>
>>
>> Thank you for the report. I will fix that soon. With that fixed, have
>> you been able to run vSVA on top of the series. Do you need other stuff
>> to be fixed at SMMU level?
>
> I am seeing another issue with this series. This is when you have the vSMMU
> in non-strict mode(iommu.strict=0). Any network pass-through dev with iperf run
> will be enough to reproduce the issue. It may randomly stop/hang.
>
> It looks like the .flush_iotlb_all from guest is not propagated down to the host
> correctly. I have a temp hack to fix this in Qemu wherein CMDQ_OP_TLBI_NH_ASID
> will result in a CACHE_INVALIDATE with IOMMU_INV_GRANU_PASID flag and archid
> set.
Thank you for the analysis. Indeed the NH_ASID was not properly handled
as asid info was not passed down. I fixed domain invalidation and added
asid based invalidation.
Thanks
Eric
>
> Please take a look and let me know.
>
> As I am going to respin soon, please let me
>> know what is the best branch to rebase to alleviate your integration.
>
> Please find the latest kernel and Qemu branch with vSVA support added here,
>
> https://github.com/hisilicon/kernel-dev/tree/5.10-rc4-2stage-v13-vsva
> https://github.com/hisilicon/qemu/tree/v5.2.0-rc1-2stage-rfcv7-vsva
>
> I have done some basic minimum vSVA tests on a HiSilicon D06 board with
> a zip dev that supports STALL. All looks good so far apart from the issues
> that have been already reported/discussed.
>
> The kernel branch is actually a rebase of sva/uacce related patches from a
> Linaro branch here,
>
> https://github.com/Linaro/linux-kernel-uadk/tree/uacce-devel-5.10
>
> I think going forward it will be good(if possible) to respin your series on top of
> a sva branch with STALL/PRI support added.
>
> Hi Jean/zhangfei,
> Is it possible to have a branch with minimum required SVA/UACCE related patches
> that are already public and can be a "stable" candidate for future respin of Eric's series?
> Please share your thoughts.
>
> Thanks,
> Shameer
>
>> Best Regards
>>
>> Eric
>>
>> _______________________________________________
>> kvmarm mailing list
>> kvmarm@lists.cs.columbia.edu
>> https://lists.cs.columbia.edu/mailman/listinfo/kvmarm
>
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next prev parent reply other threads:[~2021-02-15 13:17 UTC|newest]
Thread overview: 60+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-11-18 11:21 [PATCH v13 00/15] SMMUv3 Nested Stage Setup (IOMMU part) Eric Auger
2020-11-18 11:21 ` [PATCH v13 01/15] iommu: Introduce attach/detach_pasid_table API Eric Auger
2020-11-18 16:19 ` Jacob Pan
2020-11-19 17:02 ` Auger Eric
2021-02-01 11:27 ` Keqian Zhu
2021-02-01 17:18 ` Auger Eric
2020-11-18 11:21 ` [PATCH v13 02/15] iommu: Introduce bind/unbind_guest_msi Eric Auger
2021-02-01 11:52 ` Keqian Zhu
2021-02-12 8:55 ` Auger Eric
2021-02-18 8:43 ` Keqian Zhu
2021-02-18 10:35 ` Auger Eric
2020-11-18 11:21 ` [PATCH v13 03/15] iommu/arm-smmu-v3: Maintain a SID->device structure Eric Auger
2021-02-01 12:26 ` Keqian Zhu
2021-02-01 15:15 ` Jean-Philippe Brucker
2021-02-02 6:39 ` Keqian Zhu
2021-02-01 17:19 ` Auger Eric
2021-02-02 7:20 ` Keqian Zhu
2020-11-18 11:21 ` [PATCH v13 04/15] iommu/smmuv3: Allow s1 and s2 configs to coexist Eric Auger
2021-02-01 12:35 ` Keqian Zhu
2020-11-18 11:21 ` [PATCH v13 05/15] iommu/smmuv3: Get prepared for nested stage support Eric Auger
2020-11-19 3:59 ` kernel test robot
2020-12-03 12:32 ` Kunkun Jiang
2020-12-03 13:01 ` Auger Eric
2020-12-03 13:23 ` Kunkun Jiang
2020-12-09 14:26 ` Shameerali Kolothum Thodi
2021-02-02 7:14 ` Keqian Zhu
2021-02-11 17:36 ` Auger Eric
2020-11-18 11:21 ` [PATCH v13 06/15] iommu/smmuv3: Implement attach/detach_pasid_table Eric Auger
2021-02-02 8:03 ` Keqian Zhu
2021-02-11 17:35 ` Auger Eric
2020-11-18 11:21 ` [PATCH v13 07/15] iommu/smmuv3: Allow stage 1 invalidation with unmanaged ASIDs Eric Auger
2020-12-01 13:33 ` Xingang Wang
2020-12-01 13:58 ` Auger Eric
2020-12-02 12:59 ` Wang Xingang
2020-12-03 18:42 ` Shameerali Kolothum Thodi
2020-12-04 9:53 ` Jean-Philippe Brucker
2020-12-04 10:20 ` Shameerali Kolothum Thodi
2020-12-04 10:23 ` Auger Eric
2021-01-14 16:58 ` Auger Eric
2021-01-14 17:09 ` Shameerali Kolothum Thodi
2021-01-14 17:33 ` Jean-Philippe Brucker
2021-01-14 18:00 ` Auger Eric
2021-02-15 13:17 ` Auger Eric [this message]
2020-11-18 11:21 ` [PATCH v13 08/15] iommu/smmuv3: Implement cache_invalidate Eric Auger
2021-01-16 2:24 ` chenxiang (M)
2020-11-18 11:21 ` [PATCH v13 09/15] dma-iommu: Implement NESTED_MSI cookie Eric Auger
2020-11-18 11:21 ` [PATCH v13 10/15] iommu/smmuv3: Nested mode single MSI doorbell per domain enforcement Eric Auger
2020-11-18 11:21 ` [PATCH v13 11/15] iommu/smmuv3: Enforce incompatibility between nested mode and HW MSI regions Eric Auger
2020-11-18 11:21 ` [PATCH v13 12/15] iommu/smmuv3: Implement bind/unbind_guest_msi Eric Auger
2020-11-18 11:21 ` [PATCH v13 13/15] iommu/smmuv3: Report non recoverable faults Eric Auger
2020-11-18 11:21 ` [PATCH v13 14/15] iommu/smmuv3: Accept configs with more than one context descriptor Eric Auger
2020-11-18 11:21 ` [PATCH v13 15/15] iommu/smmuv3: Add PASID cache invalidation per PASID Eric Auger
2021-01-08 17:05 ` [PATCH v13 00/15] SMMUv3 Nested Stage Setup (IOMMU part) Shameerali Kolothum Thodi
2021-01-13 15:37 ` Auger Eric
2021-02-21 18:21 ` Auger Eric
2021-02-22 8:56 ` Shameerali Kolothum Thodi
2021-03-15 18:04 ` Krishna Reddy
2021-03-16 8:22 ` Auger Eric
2021-03-16 18:10 ` Krishna Reddy
2020-12-01 12:54 [PATCH v13 07/15] iommu/smmuv3: Allow stage 1 invalidation with unmanaged ASIDs wangxingang
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