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From: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
To: "Mani, Rajmohan" <rajmohan.mani@intel.com>
Cc: Tomasz Figa <tfiga@chromium.org>,
	"Zhi, Yong" <yong.zhi@intel.com>,
	Linux Media Mailing List <linux-media@vger.kernel.org>,
	Sakari Ailus <sakari.ailus@linux.intel.com>,
	Mauro Carvalho Chehab <mchehab@kernel.org>,
	Hans Verkuil <hans.verkuil@cisco.com>,
	"'Zheng, Jian Xu'" <jian.xu.zheng@intel.com>,
	"Hu, Jerry W" <jerry.w.hu@intel.com>,
	"Toivonen, Tuukka" <tuukka.toivonen@intel.com>,
	"Qiu, Tian Shu" <tian.shu.qiu@intel.com>,
	"Cao, Bingbu" <bingbu.cao@intel.com>,
	Jacopo Mondi <jacopo@jmondi.org>
Subject: Re: [PATCH v7 00/16] Intel IPU3 ImgU patchset
Date: Wed, 09 Jan 2019 01:34:00 +0200	[thread overview]
Message-ID: <4929983.L9RZQDNQcv@avalon> (raw)
In-Reply-To: <6F87890CF0F5204F892DEA1EF0D77A599B31FAF4@fmsmsx122.amr.corp.intel.com>

Hi Raj,

(CC'ing Jacopo Mondi)

On Saturday, 5 January 2019 04:26:16 EET Mani, Rajmohan wrote:
> >> On Tuesday, 11 December 2018 15:43:53 EET Laurent Pinchart wrote:
> >>> On Tuesday, 11 December 2018 15:34:49 EET Laurent Pinchart wrote:
> >>>> On Wednesday, 5 December 2018 02:30:46 EET Mani, Rajmohan wrote:
> >>>> 
> >>>> [snip]
> >>>> 
> >>>>> I can see a couple of steps missing in the script below.
> >>>>> (https://lists.libcamera.org/pipermail/libcamera-devel/2018-Nove
> >>>>> mber/000040.html)
> >>>>> 
> >>>>> From patch 02 of this v7 series "doc-rst: Add Intel IPU3
> >>>>> documentation", under section "Configuring ImgU V4L2 subdev for
> >>>>> image processing"...
> >>>>> 
> >>>>> 1. The pipe mode needs to be configured for the V4L2 subdev.
> >>>>> 
> >>>>> Also the pipe mode of the corresponding V4L2 subdev should be
> >>>>> set as desired (e.g 0 for video mode or 1 for still mode)
> >>>>> through the control id 0x009819a1 as below.
> >>>>> 
> >>>>> e.g v4l2n -d /dev/v4l-subdev7 --ctrl=0x009819A1=1
> >>>> 
> >>>> I assume the control takes a valid default value ? It's better to
> >>>> set it explicitly anyway, so I'll do so.
> >>>> 
> >>>>> 2. ImgU pipeline needs to be configured for image processing as
> >>>>> below.
> >>>>> 
> >>>>> RAW bayer frames go through the following ISP pipeline HW blocks
> >>>>> to have the processed image output to the DDR memory.
> >>>>> 
> >>>>> RAW bayer frame -> Input Feeder -> Bayer Down Scaling (BDS) ->
> >>>>> Geometric Distortion Correction (GDC) -> DDR
> >>>>> 
> >>>>> The ImgU V4L2 subdev has to be configured with the supported
> >>>>> resolutions in all the above HW blocks, for a given input
> >>>>> resolution.
> >>>>> 
> >>>>> For a given supported resolution for an input frame, the Input
> >>>>> Feeder, Bayer Down Scaling and GDC blocks should be configured
> >>>>> with the supported resolutions. This information can be obtained
> >>>>> by looking at the following IPU3 ISP configuration table for
> >>>>> ov5670 sensor.
> >>>>> 
> >>>>> https://chromium.googlesource.com/chromiumos/overlays/board-over
> >>>>> lays/+/master/baseboard-poppy/media-libs/cros-camera-hal-configs-
> >>>>> poppy/files/gcss/graph_settings_ov5670.xml
> >>>>> 
> >>>>> For the ov5670 example, for an input frame with a resolution of
> >>>>> 2592x1944 (which is input to the ImgU subdev pad 0), the
> >>>>> corresponding resolutions for input feeder, BDS and GDC are
> >>>>> 2592x1944, 2592x1944 and
> >>>>> 2560x1920 respectively.
> >>>> 
> >>>> How is the GDC output resolution computed from the input
> >>>> resolution ? Does the GDC always consume 32 columns and 22 lines ?
> >>>> 
> >>>>> The following steps prepare the ImgU ISP pipeline for the image
> >>>>> processing.
> >>>>> 
> >>>>> 1. The ImgU V4L2 subdev data format should be set by using the
> >>>>> VIDIOC_SUBDEV_S_FMT on pad 0, using the GDC width and height
> >>>>> obtained above.
> >>>> 
> >>>> If I understand things correctly, the GDC resolution is the
> >>>> pipeline output resolution. Why is it configured on pad 0 ?
> >>>> 
> >>>>> 2. The ImgU V4L2 subdev cropping should be set by using the
> >>>>> VIDIOC_SUBDEV_S_SELECTION on pad 0, with V4L2_SEL_TGT_CROP as
> >>>>> the target, using the input feeder height and width.
> >>>>> 
> >>>>> 3. The ImgU V4L2 subdev composing should be set by using the
> >>>>> VIDIOC_SUBDEV_S_SELECTION on pad 0, with
> >>>>> V4L2_SEL_TGT_COMPOSE as the target, using the BDS height and width.
> >>>>> 
> >>>>> Once these 2 steps are done, the raw bayer frames can be input
> >>>>> to the ImgU V4L2 subdev for processing.
> >>>> 
> >>>> Do I need to capture from both the output and viewfinder nodes ?
> >>>> How are they related to the IF -> BDS -> GDC pipeline, are they
> >>>> both fed from the GDC output ? If so, how does the viewfinder
> >>>> scaler fit in that picture ?
> >>>> 
> >>>> I have tried the above configuration with the IPU3 v8 driver, and
> >>>> while the kernel doesn't crash, no images get processed. The
> >>>> userspace processes wait forever for buffers to be ready. I then
> >>>> configured pad 2 to 2560x1920 and pad 3 to 1920x1080, and managed
> >>>> to capture images \o/
> >>>> 
> >>>> There's one problem though: during capture, or very soon after it,
> >>>> the machine locks up completely. I suspect a memory corruption, as
> >>>> when it doesn't log immediately commands such as dmesg will not
> >>>> produce any output and just block, until the system freezes soon
> >>>> after (especially when moving the mouse).
> >>>> 
> >>>> I would still call this an improvement to some extent, but there's
> >>>> definitely room for more improvements :-)
> >>>> 
> >>>> To reproduce the issue, you can run the ipu3-process.sh script
> >>>> (attached to this e-mail) with the following arguments:
> >>>> 
> >>>> $ ipu3-process.sh --out 2560x1920 frame-2592x1944.cio2
> >> 
> >> This should have read
> >> 
> >> $ ipu3-process.sh --out 2560x1920 --vf 1920x1080 frame-2592x1944.cio2
> >> 
> >> Without the --vf argument no images are processed.
> >> 
> >> It seems that the Intel mail server blocked the mail that contained the
> >> script. You can find a copy at http://paste.debian.net/hidden/fd5bb8df/.
> 
> Here's what I have so far.
> 
> I made the following two changes to get image capture and processing
> working with the above script. I can see the output and vf ppm files to come
> out well.
> 
> 1. Remove the "# Set formats" inside the configure_pipeline() from the
> above script and used a simple application (which I invoked from your
> script) to set pad 0 of the "ipu3-imgu 0" V4L2 subdev with these 3 sub
> steps.
> 
> a. Set the data format using VIDIOC_SUBDEV_S_FMT on pad 0
> GDC width and height (2560x1920)
> 
> b. Set cropping using VIDIOC_SUBDEV_S_SELECTION on pad 0
> with V4L2_SEL_TGT_CROP as target, using the input feeder width
> and height (2592x1944)
> 
> c. Set composing using VIDIOC_SUBDEV_S_SELECTION on pad 0
> with V4L2_SEL_TGT_COMPOSE as the target, using
> BDS width and height (2592x1944)

This is exactly what the first media-ctl -V call just below the "Set formats" 
comment does.

> 2. Modify yavta app to ignore the error (on "3A stat" node) from
> cap_get_buf_type(), so all 4 nodes can be running at the same time.

I don't get that error with the latest yavta version.

> Can you advise why the " # Set formats" part of configure_pipeline()
> in your script is not achieving the same results as the above 3 sub steps?

I tried removing the three media-ctl -V lines that configure format on pads 2, 
3 and 4. The crash then didn't occur when running the script. However, after 
rebooting the system and retrying the exact same sequence of operation, the 
driver crashed again, and I haven't been able to process images without 
crashing since then.

The driver is clearly very sensitive to how formats and selection rectangles 
are configured, and crashes when userspace doesn't operate exactly as 
expected. This should all be fixed, likely by rewriting the format and 
selection rectangle configuration code, especially given that it doesn't 
comply with how V4L2 configures scaling on subdevs.

We can discuss this issue with Sakari to decide on how the code should be 
architectured. How long do you think it would then take to implement the 
solution ?

> Per Bingbu, the driver might be lacking some implementation around this.
> 
> >>>>> 1. The ImgU V4L2 subdev data format should be set by using the
> >>>>> VIDIOC_SUBDEV_S_FMT on pad 0, using the GDC width and height
> >>>>> obtained above.
> >>>>> 2. The ImgU V4L2 subdev cropping should be set by using the
> >>>>> VIDIOC_SUBDEV_S_SELECTION on pad 0, with V4L2_SEL_TGT_CROP as
> >>>>> the target, using the input feeder height and width.
> >>>>> 3. The ImgU V4L2 subdev composing should be set by using the
> >>>>> VIDIOC_SUBDEV_S_SELECTION on pad 0, with V4L2_SEL_TGT_COMPOSE
> >>>>> as the target, using the BDS height and width.
> > 
> > Sorry for the delay. I got interrupted with some other work.
> > I will have a look at this and get back soon.

-- 
Regards,

Laurent Pinchart




  parent reply	other threads:[~2019-01-08 23:32 UTC|newest]

Thread overview: 123+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-10-29 22:22 [PATCH v7 00/16] Intel IPU3 ImgU patchset Yong Zhi
2018-10-29 22:22 ` [PATCH v7 01/16] v4l: Add Intel IPU3 meta buffer formats Yong Zhi
2018-11-02 12:59   ` Mauro Carvalho Chehab
2018-11-02 13:05     ` Mauro Carvalho Chehab
2018-11-29 19:16   ` Laurent Pinchart
2018-11-29 23:12     ` Zhi, Yong
2018-10-29 22:22 ` [PATCH v7 02/16] doc-rst: Add Intel IPU3 documentation Yong Zhi
2018-11-29 22:50   ` Laurent Pinchart
2018-12-13  9:38     ` Sakari Ailus
2018-12-13 10:41       ` Laurent Pinchart
2018-12-13 10:50         ` Sakari Ailus
2018-12-13  9:38     ` [PATCH 1/1] staging/ipu3-imgu: Address documentation comments Sakari Ailus
2018-10-29 22:22 ` [PATCH v7 03/16] v4l: Add Intel IPU3 meta data uAPI Yong Zhi
2018-11-02 13:02   ` Sakari Ailus
2018-11-16 22:37     ` Zhi, Yong
     [not found]       ` <20181129224548.qwbkau6suipt2veq@kekkonen.localdomain>
2018-11-29 23:06         ` Zhi, Yong
2018-11-29 23:06           ` Zhi, Yong
2018-12-01 20:57           ` Sakari Ailus
2018-12-01 20:57             ` Sakari Ailus
2018-11-02 13:49   ` Mauro Carvalho Chehab
2018-11-02 14:04     ` Tomasz Figa
2018-11-06 23:27       ` Mani, Rajmohan
2018-11-15 10:52         ` Hans Verkuil
2018-11-29  0:41           ` Mani, Rajmohan
2018-11-06 18:25     ` Zhi, Yong
2018-11-15 12:51   ` Hans Verkuil
2018-11-21 18:45     ` Zhi, Yong
2018-10-29 22:22 ` [PATCH v7 04/16] intel-ipu3: abi: Add register definitions and enum Yong Zhi
2018-10-29 22:22 ` [PATCH v7 05/16] intel-ipu3: abi: Add structs Yong Zhi
2018-11-05  8:27   ` Sakari Ailus
2018-11-05 19:05     ` Mani, Rajmohan
2018-11-06  8:04       ` Sakari Ailus
2018-11-06 23:31         ` Mani, Rajmohan
2018-10-29 22:23 ` [PATCH v7 06/16] intel-ipu3: mmu: Implement driver Yong Zhi
2018-11-05 11:55   ` Sakari Ailus
2018-11-06  5:50     ` Zhi, Yong
2018-11-06  5:56       ` Tomasz Figa
2018-10-29 22:23 ` [PATCH v7 07/16] intel-ipu3: Implement DMA mapping functions Yong Zhi
2018-10-29 22:23 ` [PATCH v7 08/16] intel-ipu3: css: Add dma buff pool utility functions Yong Zhi
2018-11-08 15:36   ` Sakari Ailus
2018-11-09 23:16     ` Zhi, Yong
2018-11-12  9:21       ` Sakari Ailus
2018-10-29 22:23 ` [PATCH v7 09/16] intel-ipu3: css: Add support for firmware management Yong Zhi
2018-11-28 22:22   ` Sakari Ailus
2018-10-29 22:23 ` [PATCH v7 11/16] intel-ipu3: css: Compute and program ccs Yong Zhi
2018-10-29 22:23 ` [PATCH v7 12/16] intel-ipu3: css: Initialize css hardware Yong Zhi
2018-11-09 12:06   ` Sakari Ailus
2018-10-29 22:23 ` [PATCH v7 13/16] intel-ipu3: Add css pipeline programming Yong Zhi
2018-10-29 22:23 ` [PATCH v7 14/16] intel-ipu3: Add v4l2 driver based on media framework Yong Zhi
2018-11-09 12:36   ` Sakari Ailus
2018-11-09 23:26     ` Zhi, Yong
2018-11-15 12:51   ` Hans Verkuil
2018-11-15 16:09     ` Zhi, Yong
2018-10-29 22:23 ` [PATCH v7 15/16] intel-ipu3: Add imgu top level pci device driver Yong Zhi
2018-11-09 12:54   ` Sakari Ailus
2018-11-12 22:16     ` Zhi, Yong
2018-10-29 22:23 ` [PATCH v7 16/16] intel-ipu3: Add dual pipe support Yong Zhi
2018-11-01 12:03 ` [PATCH v7 00/16] Intel IPU3 ImgU patchset Sakari Ailus
2018-11-07  4:16   ` Bing Bu Cao
2018-11-09  1:28     ` Zhi, Yong
2018-11-09 11:28       ` Sakari Ailus
2018-11-09 10:09     ` Sakari Ailus
2018-11-12  4:31       ` Bing Bu Cao
2018-11-13 10:31         ` Sakari Ailus
2018-11-13 11:04           ` Bing Bu Cao
2018-11-13 21:58             ` Sakari Ailus
2018-11-14  7:02               ` Bing Bu Cao
2018-11-29 23:09       ` Laurent Pinchart
2018-11-30 13:37         ` Sakari Ailus
2018-11-29 23:07     ` Laurent Pinchart
2018-12-03  9:51       ` Sakari Ailus
2018-12-03 12:34         ` Laurent Pinchart
2018-11-14  0:25 ` jacopo mondi
2018-11-14  7:40   ` Sakari Ailus
2018-11-18  0:12     ` jacopo mondi
2018-11-29 14:43 ` Laurent Pinchart
2018-11-29 19:51   ` Tomasz Figa
2018-11-29 22:54     ` Laurent Pinchart
2018-11-29 22:58       ` Mani, Rajmohan
2018-12-04 16:07       ` Mani, Rajmohan
2018-12-04 16:42         ` Laurent Pinchart
2018-12-04 16:53           ` Mani, Rajmohan
2018-12-05  0:30           ` Mani, Rajmohan
2018-12-11 13:34             ` Laurent Pinchart
2018-12-11 13:43               ` Laurent Pinchart
2018-12-11 14:20                 ` Laurent Pinchart
2018-12-16  7:26                   ` Laurent Pinchart
2018-12-20 22:25                     ` Laurent Pinchart
2018-12-21  3:04                       ` Tomasz Figa
2019-01-08  6:54                         ` Tomasz Figa
2019-01-09 16:40                           ` Jacopo Mondi
2019-01-09 17:00                             ` Mani, Rajmohan
2019-01-09 17:25                               ` Jacopo Mondi
2019-01-09 18:01                                 ` Mani, Rajmohan
2019-01-09 18:20                                   ` Jacopo Mondi
2019-01-09 18:36                                     ` Mani, Rajmohan
2019-01-10  8:19                                       ` Jacopo Mondi
2019-01-12  2:06                                         ` Mani, Rajmohan
2019-01-12  2:30                                     ` Mani, Rajmohan
2019-01-12 15:10                                       ` Laurent Pinchart
     [not found]                                         ` <6F87890CF0F5204F892DEA1EF0D77A599B323499@fmsmsx122.amr.corp.intel.com>
2019-01-21  5:41                                           ` Tomasz Figa
2019-01-21  8:07                                             ` Laurent Pinchart
2019-01-22 16:21                                               ` Mani, Rajmohan
     [not found]                   ` <6F87890CF0F5204F892DEA1EF0D77A599B31FAF4@fmsmsx122.amr.corp.intel.com>
2019-01-08 23:34                     ` Laurent Pinchart [this message]
2018-12-12  4:55                 ` Bingbu Cao
2018-12-13 22:24                   ` Laurent Pinchart
2018-12-14  2:53                     ` Bingbu Cao
2018-12-17  3:14                     ` Bingbu Cao
2018-12-26 11:03                       ` Laurent Pinchart
2019-01-02  2:38                         ` Bingbu Cao
2019-01-02  8:20                           ` Laurent Pinchart
2019-01-02 20:26                             ` Sakari Ailus
2019-01-28 10:09                               ` Jacopo Mondi
2019-01-29  8:56                                 ` Tomasz Figa
2019-02-01 10:04                                   ` Jacopo Mondi
2019-02-05  6:01                                     ` Tomasz Figa
2019-03-23 13:02                           ` Jacopo Mondi
2019-03-25  3:45                             ` Bingbu Cao
2019-03-25  4:06                               ` Laurent Pinchart
2019-03-25  8:11                                 ` Jacopo Mondi
2019-03-25 10:07                                   ` Bingbu Cao
2019-03-26 11:16                                     ` Jacopo Mondi
2019-04-08  6:35                                       ` Bingbu Cao

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