linux-media.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
From: Bingbu Cao <bingbu.cao@linux.intel.com>
To: Jacopo Mondi <jacopo@jmondi.org>,
	Laurent Pinchart <laurent.pinchart@ideasonboard.com>,
	Tomasz Figa <tfiga@chromium.org>
Cc: "Mani, Rajmohan" <rajmohan.mani@intel.com>,
	"Zhi, Yong" <yong.zhi@intel.com>,
	Linux Media Mailing List <linux-media@vger.kernel.org>,
	Sakari Ailus <sakari.ailus@linux.intel.com>,
	Mauro Carvalho Chehab <mchehab@kernel.org>,
	Hans Verkuil <hans.verkuil@cisco.com>,
	"Qiu, Tian Shu" <tian.shu.qiu@intel.com>,
	"Hu, Jerry W" <jerry.w.hu@intel.com>,
	"Toivonen, Tuukka" <tuukka.toivonen@intel.com>,
	"Qiu, Tian Shu" <tian.shu.qiu@intel.com>,
	"Cao, Bingbu" <bingbu.cao@intel.com>,
	libcamera-devel@lists.libcamera.org
Subject: Re: [PATCH v7 00/16] Intel IPU3 ImgU patchset
Date: Mon, 25 Mar 2019 11:45:58 +0800	[thread overview]
Message-ID: <ad0fa0d9-b89b-1c6e-9085-fe361832e9e1@linux.intel.com> (raw)
In-Reply-To: <20190323130221.xr4bvraqnfjdfezk@uno.localdomain>



On 3/23/19 9:02 PM, Jacopo Mondi wrote:
> Hello,
>    sorry for resurrecting the thread.
> 
> The development of libcamera has IPU3 devices as first target, and
> we're now at the point where some clarifications are required.
> I'll re-use this email, as some of points were already stated here
> and, as they've become pressing for libcamera development, I would like
> to have them clarified here on the list.
> 
> On Wed, Jan 02, 2019 at 10:38:33AM +0800, Bingbu Cao wrote:
>>
>> On 12/26/2018 07:03 PM, Laurent Pinchart wrote:
>>> Hello Bingbu,
>>>
> 
> [snip]
> 
>>>>>>>>> 2. ImgU pipeline needs to be configured for image processing as below.
>>>>>>>>>
>>>>>>>>> RAW bayer frames go through the following ISP pipeline HW blocks to
>>>>>>>>> have the processed image output to the DDR memory.
>>>>>>>>>
>>>>>>>>> RAW bayer frame -> Input Feeder -> Bayer Down Scaling (BDS) ->
>>>>>>>>> Geometric Distortion Correction (GDC) -> DDR
>>>>>>>>>
>>>>>>>>> The ImgU V4L2 subdev has to be configured with the supported
>>>>>>>>> resolutions in all the above HW blocks, for a given input resolution.
>>>>>>>>>
>>>>>>>>> For a given supported resolution for an input frame, the Input Feeder,
>>>>>>>>> Bayer Down Scaling and GDC blocks should be configured with the
>>>>>>>>> supported resolutions. This information can be obtained by looking at
>>>>>>>>> the following IPU3 ISP configuration table for ov5670 sensor.
>>>>>>>>>
>>>>>>>>> https://chromium.googlesource.com/chromiumos/overlays/board-overlays/+
>>>>>>>>> /master/baseboard-poppy/media-libs/cros-camera-hal-configs-poppy/
>>>>>>>>> files/gcss/graph_settings_ov5670.xml
>>>>>>>>>
>>>>>>>>> For the ov5670 example, for an input frame with a resolution of
>>>>>>>>> 2592x1944 (which is input to the ImgU subdev pad 0), the corresponding
>>>>>>>>> resolutions for input feeder, BDS and GDC are 2592x1944, 2592x1944 and
>>>>>>>>> 2560x1920 respectively.
>>>>>>>> How is the GDC output resolution computed from the input resolution ?
>>>>>>>> Does the GDC always consume 32 columns and 22 lines ?
>>>>>> All the intermediate resolutions in the pipeline are determined by the
>>>>>> actual use case, in other word determined by the IMGU input
>>>>>> resolution(sensor output) and the final output and viewfinder resolution.
>>>>>> BDS mainly do Bayer downscaling, it has limitation that the downscaling
>>>>>> factor must be a value a integer multiple of 1/32.
>>>>>> GDC output depends on the input and width should be x8 and height x4
>>>>>> alignment.
>>>>> Thank you for the information. This will need to be captured in the
>>>>> documentation, along with information related to how each block in the
>>>>> hardware pipeline interacts with the image size. It should be possible for
>>>>> a developer to compute the output and viewfinder resolutions based on the
>>>>> parameters of the image processing algorithms just with the information
>>>>> contained in the driver documentation.
> 
> In libcamera development we're now at the point of having to calculate
> the sizes to apply to all intermediate pipeline stages based on the
> following informations:
> 
> 1) Main output resolution
> 2) Secondary output resolution (optional)
> 3) Image sensor's available resolutions
> 
> Right now that informations are captured in the xml file you linked
> here above, but we need a programmatic way to do the calculation,
> without going through an XML file, that refers to two specific sensors
> only.
> 
> As Laurent said here, this should come as part of the documentation
> for driver users and would unblock libcamera IPU3 support
> development.
> 
> Could you provide documentation on how to calculate each
> intermediate step resolutions?
All the intermediate step resolutions are generated by the specific tool
with sensor input and outputs resolutions.

The tool try to keep maximum fov and has the knowledge of all the
limitations of each intermediate hardware components(mainly BDS and GDC).

Currently, there is not a very simple calculation to get the
intermediate resolutions.
Let's take some effort to try find a programmatic way to do calculation
instead of the tool.

> 
>>>>>
> 
> [snip]
> 
>>>>>>>>> 3. The ImgU V4L2 subdev composing should be set by using the
>>>>>>>>> VIDIOC_SUBDEV_S_SELECTION on pad 0, with V4L2_SEL_TGT_COMPOSE as the
>>>>>>>>> target, using the BDS height and width.
>>>>>>>>>
>>>>>>>>> Once these 2 steps are done, the raw bayer frames can be input to the
>>>>>>>>> ImgU V4L2 subdev for processing.
>>>>>>>> Do I need to capture from both the output and viewfinder nodes ? How
>>>>>>>> are they related to the IF -> BDS -> GDC pipeline, are they both fed
>>>>>>>> from the GDC output ? If so, how does the viewfinder scaler fit in that
>>>>>>>> picture ?
>>>>>> The output capture should be set, the viewfinder can be disabled.
>>>>>> The IF and BDS are seen as crop and compose of the imgu input video
>>>>>> device. The GDC is seen as the subdev sink pad and OUTPUT/VF are source
>>>>>> pads.
> 
> This is another point that we would like to have clarified:
> 1) which outputs are mandatory and which one are not
> 2) which operations are mandatory on un-used outputs
> 3) does the 'ipu_pipe_mode' control impact this
> 
> As you mentioned here, "output" seems to be mandatory, while
> "viewfinder" and "stat" are optional. We have tried using the "output"
> video node only but the system hangs to an un-recoverable state.
Yes, main output is mandatory, 'vf' and 'stat' are optional.

> 
> What I have noticed is instead that the viewfinder and stat nodes
> needs to be:
> 1) Linked to the respective "ImgU" subdevice pads
> 2) Format configured
> 3) Memory reserved
> 4) video device nodes started
> 
> It it not required to queue/dequeue buffers from viewfinder and stat,
> but steps 1-4 have to be performed.
> 
> Can you confirm this is intended?

viewfinder and stats are enabled when the link for respective subdev
pads enabled, and then driver can use these input conditions to find the
binary to run.

> Could you please list all the steps that have to be applied to the
> ImgU's capture video nodes, and which ones are mandatory and which ones
> are optional, for the following use cases:
> 1) Main output capture only
> 2) Main + secondary output capture
> 3) Secondary capture only.
I think the 3) is not supported.

The steps are:
1). link necessary the respective subdevices
input --> imgu -->output
            |  -->vf
            |  -->3a stats

2). set all the formats for input, output and intermediate resolutions.
3). start stream

The ipu pipe_mode will not impact the whole pipe behavior. It just ask
firmware to run different processing to generate same format outputs.

> 
> Thanks
>    j
> 

  reply	other threads:[~2019-03-25  3:39 UTC|newest]

Thread overview: 123+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-10-29 22:22 [PATCH v7 00/16] Intel IPU3 ImgU patchset Yong Zhi
2018-10-29 22:22 ` [PATCH v7 01/16] v4l: Add Intel IPU3 meta buffer formats Yong Zhi
2018-11-02 12:59   ` Mauro Carvalho Chehab
2018-11-02 13:05     ` Mauro Carvalho Chehab
2018-11-29 19:16   ` Laurent Pinchart
2018-11-29 23:12     ` Zhi, Yong
2018-10-29 22:22 ` [PATCH v7 02/16] doc-rst: Add Intel IPU3 documentation Yong Zhi
2018-11-29 22:50   ` Laurent Pinchart
2018-12-13  9:38     ` Sakari Ailus
2018-12-13 10:41       ` Laurent Pinchart
2018-12-13 10:50         ` Sakari Ailus
2018-12-13  9:38     ` [PATCH 1/1] staging/ipu3-imgu: Address documentation comments Sakari Ailus
2018-10-29 22:22 ` [PATCH v7 03/16] v4l: Add Intel IPU3 meta data uAPI Yong Zhi
2018-11-02 13:02   ` Sakari Ailus
2018-11-16 22:37     ` Zhi, Yong
     [not found]       ` <20181129224548.qwbkau6suipt2veq@kekkonen.localdomain>
2018-11-29 23:06         ` Zhi, Yong
2018-11-29 23:06           ` Zhi, Yong
2018-12-01 20:57           ` Sakari Ailus
2018-12-01 20:57             ` Sakari Ailus
2018-11-02 13:49   ` Mauro Carvalho Chehab
2018-11-02 14:04     ` Tomasz Figa
2018-11-06 23:27       ` Mani, Rajmohan
2018-11-15 10:52         ` Hans Verkuil
2018-11-29  0:41           ` Mani, Rajmohan
2018-11-06 18:25     ` Zhi, Yong
2018-11-15 12:51   ` Hans Verkuil
2018-11-21 18:45     ` Zhi, Yong
2018-10-29 22:22 ` [PATCH v7 04/16] intel-ipu3: abi: Add register definitions and enum Yong Zhi
2018-10-29 22:22 ` [PATCH v7 05/16] intel-ipu3: abi: Add structs Yong Zhi
2018-11-05  8:27   ` Sakari Ailus
2018-11-05 19:05     ` Mani, Rajmohan
2018-11-06  8:04       ` Sakari Ailus
2018-11-06 23:31         ` Mani, Rajmohan
2018-10-29 22:23 ` [PATCH v7 06/16] intel-ipu3: mmu: Implement driver Yong Zhi
2018-11-05 11:55   ` Sakari Ailus
2018-11-06  5:50     ` Zhi, Yong
2018-11-06  5:56       ` Tomasz Figa
2018-10-29 22:23 ` [PATCH v7 07/16] intel-ipu3: Implement DMA mapping functions Yong Zhi
2018-10-29 22:23 ` [PATCH v7 08/16] intel-ipu3: css: Add dma buff pool utility functions Yong Zhi
2018-11-08 15:36   ` Sakari Ailus
2018-11-09 23:16     ` Zhi, Yong
2018-11-12  9:21       ` Sakari Ailus
2018-10-29 22:23 ` [PATCH v7 09/16] intel-ipu3: css: Add support for firmware management Yong Zhi
2018-11-28 22:22   ` Sakari Ailus
2018-10-29 22:23 ` [PATCH v7 11/16] intel-ipu3: css: Compute and program ccs Yong Zhi
2018-10-29 22:23 ` [PATCH v7 12/16] intel-ipu3: css: Initialize css hardware Yong Zhi
2018-11-09 12:06   ` Sakari Ailus
2018-10-29 22:23 ` [PATCH v7 13/16] intel-ipu3: Add css pipeline programming Yong Zhi
2018-10-29 22:23 ` [PATCH v7 14/16] intel-ipu3: Add v4l2 driver based on media framework Yong Zhi
2018-11-09 12:36   ` Sakari Ailus
2018-11-09 23:26     ` Zhi, Yong
2018-11-15 12:51   ` Hans Verkuil
2018-11-15 16:09     ` Zhi, Yong
2018-10-29 22:23 ` [PATCH v7 15/16] intel-ipu3: Add imgu top level pci device driver Yong Zhi
2018-11-09 12:54   ` Sakari Ailus
2018-11-12 22:16     ` Zhi, Yong
2018-10-29 22:23 ` [PATCH v7 16/16] intel-ipu3: Add dual pipe support Yong Zhi
2018-11-01 12:03 ` [PATCH v7 00/16] Intel IPU3 ImgU patchset Sakari Ailus
2018-11-07  4:16   ` Bing Bu Cao
2018-11-09  1:28     ` Zhi, Yong
2018-11-09 11:28       ` Sakari Ailus
2018-11-09 10:09     ` Sakari Ailus
2018-11-12  4:31       ` Bing Bu Cao
2018-11-13 10:31         ` Sakari Ailus
2018-11-13 11:04           ` Bing Bu Cao
2018-11-13 21:58             ` Sakari Ailus
2018-11-14  7:02               ` Bing Bu Cao
2018-11-29 23:09       ` Laurent Pinchart
2018-11-30 13:37         ` Sakari Ailus
2018-11-29 23:07     ` Laurent Pinchart
2018-12-03  9:51       ` Sakari Ailus
2018-12-03 12:34         ` Laurent Pinchart
2018-11-14  0:25 ` jacopo mondi
2018-11-14  7:40   ` Sakari Ailus
2018-11-18  0:12     ` jacopo mondi
2018-11-29 14:43 ` Laurent Pinchart
2018-11-29 19:51   ` Tomasz Figa
2018-11-29 22:54     ` Laurent Pinchart
2018-11-29 22:58       ` Mani, Rajmohan
2018-12-04 16:07       ` Mani, Rajmohan
2018-12-04 16:42         ` Laurent Pinchart
2018-12-04 16:53           ` Mani, Rajmohan
2018-12-05  0:30           ` Mani, Rajmohan
2018-12-11 13:34             ` Laurent Pinchart
2018-12-11 13:43               ` Laurent Pinchart
2018-12-11 14:20                 ` Laurent Pinchart
2018-12-16  7:26                   ` Laurent Pinchart
2018-12-20 22:25                     ` Laurent Pinchart
2018-12-21  3:04                       ` Tomasz Figa
2019-01-08  6:54                         ` Tomasz Figa
2019-01-09 16:40                           ` Jacopo Mondi
2019-01-09 17:00                             ` Mani, Rajmohan
2019-01-09 17:25                               ` Jacopo Mondi
2019-01-09 18:01                                 ` Mani, Rajmohan
2019-01-09 18:20                                   ` Jacopo Mondi
2019-01-09 18:36                                     ` Mani, Rajmohan
2019-01-10  8:19                                       ` Jacopo Mondi
2019-01-12  2:06                                         ` Mani, Rajmohan
2019-01-12  2:30                                     ` Mani, Rajmohan
2019-01-12 15:10                                       ` Laurent Pinchart
     [not found]                                         ` <6F87890CF0F5204F892DEA1EF0D77A599B323499@fmsmsx122.amr.corp.intel.com>
2019-01-21  5:41                                           ` Tomasz Figa
2019-01-21  8:07                                             ` Laurent Pinchart
2019-01-22 16:21                                               ` Mani, Rajmohan
     [not found]                   ` <6F87890CF0F5204F892DEA1EF0D77A599B31FAF4@fmsmsx122.amr.corp.intel.com>
2019-01-08 23:34                     ` Laurent Pinchart
2018-12-12  4:55                 ` Bingbu Cao
2018-12-13 22:24                   ` Laurent Pinchart
2018-12-14  2:53                     ` Bingbu Cao
2018-12-17  3:14                     ` Bingbu Cao
2018-12-26 11:03                       ` Laurent Pinchart
2019-01-02  2:38                         ` Bingbu Cao
2019-01-02  8:20                           ` Laurent Pinchart
2019-01-02 20:26                             ` Sakari Ailus
2019-01-28 10:09                               ` Jacopo Mondi
2019-01-29  8:56                                 ` Tomasz Figa
2019-02-01 10:04                                   ` Jacopo Mondi
2019-02-05  6:01                                     ` Tomasz Figa
2019-03-23 13:02                           ` Jacopo Mondi
2019-03-25  3:45                             ` Bingbu Cao [this message]
2019-03-25  4:06                               ` Laurent Pinchart
2019-03-25  8:11                                 ` Jacopo Mondi
2019-03-25 10:07                                   ` Bingbu Cao
2019-03-26 11:16                                     ` Jacopo Mondi
2019-04-08  6:35                                       ` Bingbu Cao

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=ad0fa0d9-b89b-1c6e-9085-fe361832e9e1@linux.intel.com \
    --to=bingbu.cao@linux.intel.com \
    --cc=bingbu.cao@intel.com \
    --cc=hans.verkuil@cisco.com \
    --cc=jacopo@jmondi.org \
    --cc=jerry.w.hu@intel.com \
    --cc=laurent.pinchart@ideasonboard.com \
    --cc=libcamera-devel@lists.libcamera.org \
    --cc=linux-media@vger.kernel.org \
    --cc=mchehab@kernel.org \
    --cc=rajmohan.mani@intel.com \
    --cc=sakari.ailus@linux.intel.com \
    --cc=tfiga@chromium.org \
    --cc=tian.shu.qiu@intel.com \
    --cc=tuukka.toivonen@intel.com \
    --cc=yong.zhi@intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).