From: Huacai Chen <chenhc@lemote.com>
To: Thomas Bogendoerfer <tsbogend@alpha.franken.de>,
Thomas Gleixner <tglx@linutronix.de>,
Jason Cooper <jason@lakedaemon.net>,
Marc Zyngier <maz@kernel.org>, Rob Herring <robh+dt@kernel.org>
Cc: linux-mips@vger.kernel.org, Fuxin Zhang <zhangfx@lemote.com>,
Huacai Chen <chenhuacai@gmail.com>,
Jiaxun Yang <jiaxun.yang@flygoat.com>,
Huacai Chen <chenhc@lemote.com>
Subject: [PATCH 3/5] irqchip: loongson-liointc: Fix misuse of gc->mask_cache
Date: Wed, 29 Jul 2020 13:22:08 +0800 [thread overview]
Message-ID: <1596000130-8689-3-git-send-email-chenhc@lemote.com> (raw)
In-Reply-To: <1596000130-8689-1-git-send-email-chenhc@lemote.com>
In gc->mask_cache bits, 1 means enabled and 0 means disabled, but in the
loongson-liointc driver mask_cache is misused by reverting its meaning.
This patch fix the bug and update the comments as well.
Signed-off-by: Huacai Chen <chenhc@lemote.com>
---
drivers/irqchip/irq-loongson-liointc.c | 10 +++++-----
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/irqchip/irq-loongson-liointc.c b/drivers/irqchip/irq-loongson-liointc.c
index 63b6147..08165c5 100644
--- a/drivers/irqchip/irq-loongson-liointc.c
+++ b/drivers/irqchip/irq-loongson-liointc.c
@@ -60,7 +60,7 @@ static void liointc_chained_handle_irq(struct irq_desc *desc)
if (!pending) {
/* Always blame LPC IRQ if we have that bug */
if (handler->priv->has_lpc_irq_errata &&
- (handler->parent_int_map & ~gc->mask_cache &
+ (handler->parent_int_map & gc->mask_cache &
BIT(LIOINTC_ERRATA_IRQ)))
pending = BIT(LIOINTC_ERRATA_IRQ);
else
@@ -131,11 +131,11 @@ static void liointc_resume(struct irq_chip_generic *gc)
irq_gc_lock_irqsave(gc, flags);
/* Disable all at first */
writel(0xffffffff, gc->reg_base + LIOINTC_REG_INTC_DISABLE);
- /* Revert map cache */
+ /* Restore map cache */
for (i = 0; i < LIOINTC_CHIP_IRQ; i++)
writeb(priv->map_cache[i], gc->reg_base + i);
- /* Revert mask cache */
- writel(~gc->mask_cache, gc->reg_base + LIOINTC_REG_INTC_ENABLE);
+ /* Restore mask cache */
+ writel(gc->mask_cache, gc->reg_base + LIOINTC_REG_INTC_ENABLE);
irq_gc_unlock_irqrestore(gc, flags);
}
@@ -243,7 +243,7 @@ int __init liointc_of_init(struct device_node *node,
ct->chip.irq_mask_ack = irq_gc_mask_disable_reg;
ct->chip.irq_set_type = liointc_set_type;
- gc->mask_cache = 0xffffffff;
+ gc->mask_cache = 0;
priv->gc = gc;
for (i = 0; i < LIOINTC_NUM_PARENT; i++) {
--
2.7.0
next prev parent reply other threads:[~2020-07-29 5:21 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-07-29 5:22 [PATCH 1/5] dt-bindings: interrupt-controller: Update Loongson HTVEC description Huacai Chen
2020-07-29 5:22 ` [PATCH 2/5] MIPS: DTS: Fix number of msi vectors for Loongson64G Huacai Chen
2020-07-29 5:22 ` Huacai Chen [this message]
2020-07-29 5:26 ` [PATCH 3/5] irqchip: loongson-liointc: Fix misuse of gc->mask_cache Jiaxun Yang
2020-07-29 15:04 ` Marc Zyngier
2020-07-30 1:16 ` Huacai Chen
2020-07-29 5:22 ` [PATCH 4/5] irqchip: loongson-htvec: Support 8 groups of HT vectors Huacai Chen
2020-07-29 5:27 ` Jiaxun Yang
2020-07-29 5:22 ` [PATCH 5/5] irqchip: loongson-pch-pic: Fix the misused irq flow handler Huacai Chen
2020-07-29 5:33 ` Jiaxun Yang
2020-07-29 5:25 ` [PATCH 1/5] dt-bindings: interrupt-controller: Update Loongson HTVEC description Jiaxun Yang
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