Re: [PATCH 4/5] irqchip: loongson-htvec: Support 8 groups of HT vectors

From: Jiaxun Yang <jiaxun.yang@flygoat.com>
To: Huacai Chen <chenhc@lemote.com>,
	Thomas Bogendoerfer <tsbogend@alpha.franken.de>,
	Thomas Gleixner <tglx@linutronix.de>,
	Jason Cooper <jason@lakedaemon.net>,
	Marc Zyngier <maz@kernel.org>, Rob Herring <robh+dt@kernel.org>
Cc: linux-mips@vger.kernel.org, Fuxin Zhang <zhangfx@lemote.com>,
	Huacai Chen <chenhuacai@gmail.com>
Subject: Re: [PATCH 4/5] irqchip: loongson-htvec: Support 8 groups of HT vectors
Date: Wed, 29 Jul 2020 13:27:14 +0800	[thread overview]
Message-ID: <4b7f46ac-2136-be28-1e86-c7e3476b7260@flygoat.com> (raw)
In-Reply-To: <1596000130-8689-4-git-send-email-chenhc@lemote.com>


在 2020/7/29 13:22, Huacai Chen 写道:
> The original version can only used by old Loongson-3 which only use 4
> groups of HT vectors. Now Loongson-3A R4 can use 8 groups, so improve
> the driver to support all 8 groups.

Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com>

>
> Signed-off-by: Huacai Chen <chenhc@lemote.com>
> ---
>   drivers/irqchip/irq-loongson-htvec.c | 22 ++++++++++------------
>   1 file changed, 10 insertions(+), 12 deletions(-)
>
> diff --git a/drivers/irqchip/irq-loongson-htvec.c b/drivers/irqchip/irq-loongson-htvec.c
> index 1ece933..e7722fa 100644
> --- a/drivers/irqchip/irq-loongson-htvec.c
> +++ b/drivers/irqchip/irq-loongson-htvec.c
> @@ -19,15 +19,14 @@
>   
>   /* Registers */
>   #define HTVEC_EN_OFF		0x20
> -#define HTVEC_MAX_PARENT_IRQ	4
> +#define HTVEC_MAX_PARENT_IRQ	8
>   
>   #define VEC_COUNT_PER_REG	32
> -#define VEC_REG_COUNT		4
> -#define VEC_COUNT		(VEC_COUNT_PER_REG * VEC_REG_COUNT)
>   #define VEC_REG_IDX(irq_id)	((irq_id) / VEC_COUNT_PER_REG)
>   #define VEC_REG_BIT(irq_id)	((irq_id) % VEC_COUNT_PER_REG)
>   
>   struct htvec {
> +	int			num_parents;
>   	void __iomem		*base;
>   	struct irq_domain	*htvec_domain;
>   	raw_spinlock_t		htvec_lock;
> @@ -43,7 +42,7 @@ static void htvec_irq_dispatch(struct irq_desc *desc)
>   
>   	chained_irq_enter(chip, desc);
>   
> -	for (i = 0; i < VEC_REG_COUNT; i++) {
> +	for (i = 0; i < priv->num_parents; i++) {
>   		pending = readl(priv->base + 4 * i);
>   		while (pending) {
>   			int bit = __ffs(pending);
> @@ -147,7 +146,7 @@ static void htvec_reset(struct htvec *priv)
>   	u32 idx;
>   
>   	/* Clear IRQ cause registers, mask all interrupts */
> -	for (idx = 0; idx < VEC_REG_COUNT; idx++) {
> +	for (idx = 0; idx < priv->num_parents; idx++) {
>   		writel_relaxed(0x0, priv->base + HTVEC_EN_OFF + 4 * idx);
>   		writel_relaxed(0xFFFFFFFF, priv->base);
>   	}
> @@ -157,7 +156,7 @@ static int htvec_of_init(struct device_node *node,
>   				struct device_node *parent)
>   {
>   	struct htvec *priv;
> -	int err, parent_irq[4], num_parents = 0, i;
> +	int err, parent_irq[8], i;
>   
>   	priv = kzalloc(sizeof(*priv), GFP_KERNEL);
>   	if (!priv)
> @@ -176,19 +175,18 @@ static int htvec_of_init(struct device_node *node,
>   		if (parent_irq[i] <= 0)
>   			break;
>   
> -		num_parents++;
> +		priv->num_parents++;
>   	}
>   
> -	if (!num_parents) {
> +	if (!priv->num_parents) {
>   		pr_err("Failed to get parent irqs\n");
>   		err = -ENODEV;
>   		goto iounmap_base;
>   	}
>   
>   	priv->htvec_domain = irq_domain_create_linear(of_node_to_fwnode(node),
> -						      VEC_COUNT,
> -						      &htvec_domain_ops,
> -						      priv);
> +					(VEC_COUNT_PER_REG * priv->num_parents),
> +					&htvec_domain_ops, priv);
>   	if (!priv->htvec_domain) {
>   		pr_err("Failed to create IRQ domain\n");
>   		err = -ENOMEM;
> @@ -197,7 +195,7 @@ static int htvec_of_init(struct device_node *node,
>   
>   	htvec_reset(priv);
>   
> -	for (i = 0; i < num_parents; i++)
> +	for (i = 0; i < priv->num_parents; i++)
>   		irq_set_chained_handler_and_data(parent_irq[i],
>   						 htvec_irq_dispatch, priv);
>