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From: Paul Burton <paul.burton@imgtec.com>
To: Ralf Baechle <ralf@linux-mips.org>, <linux-mips@linux-mips.org>
Cc: Thomas Gleixner <tglx@linutronix.de>,
	Marc Zyngier <marc.zyngier@arm.com>,
	Jason Cooper <jason@lakedaemon.net>,
	Paul Burton <paul.burton@imgtec.com>
Subject: [PATCH 0/5] MIPS/irqchip: Use IPI IRQ domains for CPU interrupt controller IPIs
Date: Thu, 30 Mar 2017 12:06:08 -0700	[thread overview]
Message-ID: <20170330190614.14844-1-paul.burton@imgtec.com> (raw)

This series introduces support for IPI IRQ domains to the CPU interrupt
controller driver, allowing IPIs to function in the same way as those
provided by the MIPS GIC as far as platform/board code is concerned.

Doing this allows us to avoid duplicating code across platforms, avoid
having to handle cases where IPI domains are or aren't in use depending
upon the interrupt controller, and strengthen a sanity check for cases
where IPI IRQ domains are supported.

Applies atop v4.11-rc4.


Paul Burton (5):
  irqchip: mips-cpu: Replace magic 0x100 with IE_SW0
  irqchip: mips-cpu: Prepare for non-legacy IRQ domains
  irqchip: mips-cpu: Introduce IPI IRQ domain support
  MIPS: smp-mt: Use CPU interrupt controller IPI IRQ domain support
  MIPS: Stengthen IPI IRQ domain sanity check

 arch/mips/kernel/smp-mt.c       |  49 ++------------
 arch/mips/kernel/smp.c          |  20 +++---
 arch/mips/lantiq/irq.c          |  52 --------------
 arch/mips/mti-malta/malta-int.c |  83 ++---------------------
 drivers/irqchip/Kconfig         |   2 +
 drivers/irqchip/irq-mips-cpu.c  | 146 +++++++++++++++++++++++++++++++++++-----
 6 files changed, 151 insertions(+), 201 deletions(-)

-- 
2.12.1

WARNING: multiple messages have this Message-ID (diff)
From: Paul Burton <paul.burton@imgtec.com>
To: Ralf Baechle <ralf@linux-mips.org>, linux-mips@linux-mips.org
Cc: Thomas Gleixner <tglx@linutronix.de>,
	Marc Zyngier <marc.zyngier@arm.com>,
	Jason Cooper <jason@lakedaemon.net>,
	Paul Burton <paul.burton@imgtec.com>
Subject: [PATCH 0/5] MIPS/irqchip: Use IPI IRQ domains for CPU interrupt controller IPIs
Date: Thu, 30 Mar 2017 12:06:08 -0700	[thread overview]
Message-ID: <20170330190614.14844-1-paul.burton@imgtec.com> (raw)
Message-ID: <20170330190608.6PCjA-V76E-FjAefooYQQaWqDanwAP6HnO78yWdxlaE@z> (raw)

This series introduces support for IPI IRQ domains to the CPU interrupt
controller driver, allowing IPIs to function in the same way as those
provided by the MIPS GIC as far as platform/board code is concerned.

Doing this allows us to avoid duplicating code across platforms, avoid
having to handle cases where IPI domains are or aren't in use depending
upon the interrupt controller, and strengthen a sanity check for cases
where IPI IRQ domains are supported.

Applies atop v4.11-rc4.


Paul Burton (5):
  irqchip: mips-cpu: Replace magic 0x100 with IE_SW0
  irqchip: mips-cpu: Prepare for non-legacy IRQ domains
  irqchip: mips-cpu: Introduce IPI IRQ domain support
  MIPS: smp-mt: Use CPU interrupt controller IPI IRQ domain support
  MIPS: Stengthen IPI IRQ domain sanity check

 arch/mips/kernel/smp-mt.c       |  49 ++------------
 arch/mips/kernel/smp.c          |  20 +++---
 arch/mips/lantiq/irq.c          |  52 --------------
 arch/mips/mti-malta/malta-int.c |  83 ++---------------------
 drivers/irqchip/Kconfig         |   2 +
 drivers/irqchip/irq-mips-cpu.c  | 146 +++++++++++++++++++++++++++++++++++-----
 6 files changed, 151 insertions(+), 201 deletions(-)

-- 
2.12.1

             reply	other threads:[~2017-03-30 19:06 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-03-30 19:06 Paul Burton [this message]
2017-03-30 19:06 ` [PATCH 0/5] MIPS/irqchip: Use IPI IRQ domains for CPU interrupt controller IPIs Paul Burton
2017-03-30 19:06 ` [PATCH 1/5] irqchip: mips-cpu: Replace magic 0x100 with IE_SW0 Paul Burton
2017-03-30 19:06   ` Paul Burton
2017-03-30 19:06 ` [PATCH 2/5] irqchip: mips-cpu: Prepare for non-legacy IRQ domains Paul Burton
2017-03-30 19:06   ` Paul Burton
2017-03-30 19:06 ` [PATCH 3/5] irqchip: mips-cpu: Introduce IPI IRQ domain support Paul Burton
2017-03-30 19:06   ` Paul Burton
2017-03-30 19:06 ` [PATCH 4/5] MIPS: smp-mt: Use CPU interrupt controller " Paul Burton
2017-03-30 19:06   ` Paul Burton
2017-03-30 19:06 ` [PATCH 5/5] MIPS: Stengthen IPI IRQ domain sanity check Paul Burton
2017-03-30 19:06   ` Paul Burton
2017-03-31  9:02 ` [PATCH 0/5] MIPS/irqchip: Use IPI IRQ domains for CPU interrupt controller IPIs Thomas Gleixner
2017-04-12 21:14   ` Ralf Baechle
2017-03-31 21:31 ` Joshua Kinard

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