* [PATCH 0/5] mtd: spi-nor: write protection at power-up
@ 2019-07-17 8:47 Tudor.Ambarus
2019-07-17 8:48 ` [PATCH 1/5] mtd: spi-nor: fix description for int (*flash_is_locked)() Tudor.Ambarus
` (4 more replies)
0 siblings, 5 replies; 14+ messages in thread
From: Tudor.Ambarus @ 2019-07-17 8:47 UTC (permalink / raw)
To: vigneshr, marek.vasut
Cc: Tudor.Ambarus, richard, linux-kernel, Nicolas.Ferre,
boris.brezillon, linux-mtd, miquel.raynal, computersforpeace,
dwmw2
From: Tudor Ambarus <tudor.ambarus@microchip.com>
There is no functional change intended for the first 2 patches.
Patch 3 adds support for the Global Block Unlock command: a single
command cycle that unlocks the entire memory array.
Patch 4 unlocks the global block protection on sst26vf064b. This is
identical with what other nor flashes are doing by clearing the
block protection bits from the status register: disable the write
protection after a power-on reset cycle.
Patch 5 adds a Kconfig option to disable the write protection at
power-up. This permits users to choose if they want the write
protection at power-up enabled or not. Backward compatibility imposes
to disable the write protection at power-up, so the Kconfig option is
selected by default.
Tudor Ambarus (5):
mtd: spi-nor: fix description for int (*flash_is_locked)()
mtd: spi-nor: group the code about the write protection at power-up
mtd: spi-nor: add Global Block Unlock support
mtd: spi-nor: unlock global block protection on sst26vf064b
mtd: spi-nor: add Kconfig option to disable write protection at
power-up
drivers/mtd/spi-nor/Kconfig | 8 ++++++
drivers/mtd/spi-nor/spi-nor.c | 66 ++++++++++++++++++++++++++++++++-----------
include/linux/mtd/spi-nor.h | 9 +++---
3 files changed, 62 insertions(+), 21 deletions(-)
--
2.9.5
______________________________________________________
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http://lists.infradead.org/mailman/listinfo/linux-mtd/
^ permalink raw reply [flat|nested] 14+ messages in thread
* [PATCH 1/5] mtd: spi-nor: fix description for int (*flash_is_locked)()
2019-07-17 8:47 [PATCH 0/5] mtd: spi-nor: write protection at power-up Tudor.Ambarus
@ 2019-07-17 8:48 ` Tudor.Ambarus
2019-08-05 5:34 ` Vignesh Raghavendra
2019-07-17 8:48 ` [PATCH 2/5] mtd: spi-nor: group the code about the write protection at power-up Tudor.Ambarus
` (3 subsequent siblings)
4 siblings, 1 reply; 14+ messages in thread
From: Tudor.Ambarus @ 2019-07-17 8:48 UTC (permalink / raw)
To: vigneshr, marek.vasut
Cc: Tudor.Ambarus, richard, linux-kernel, Nicolas.Ferre,
boris.brezillon, linux-mtd, miquel.raynal, computersforpeace,
dwmw2
From: Tudor Ambarus <tudor.ambarus@microchip.com>
The description was interleaved.
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
---
include/linux/mtd/spi-nor.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/linux/mtd/spi-nor.h b/include/linux/mtd/spi-nor.h
index 9f57cdfcc93d..c4c2c5971284 100644
--- a/include/linux/mtd/spi-nor.h
+++ b/include/linux/mtd/spi-nor.h
@@ -372,10 +372,10 @@ struct flash_info;
* @flash_lock: [FLASH-SPECIFIC] lock a region of the SPI NOR
* @flash_unlock: [FLASH-SPECIFIC] unlock a region of the SPI NOR
* @flash_is_locked: [FLASH-SPECIFIC] check if a region of the SPI NOR is
+ * completely locked
* @quad_enable: [FLASH-SPECIFIC] enables SPI NOR quad mode
* @clear_sr_bp: [FLASH-SPECIFIC] clears the Block Protection Bits from
* the SPI NOR Status Register.
- * completely locked
* @priv: the private data
*/
struct spi_nor {
--
2.9.5
______________________________________________________
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http://lists.infradead.org/mailman/listinfo/linux-mtd/
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH 2/5] mtd: spi-nor: group the code about the write protection at power-up
2019-07-17 8:47 [PATCH 0/5] mtd: spi-nor: write protection at power-up Tudor.Ambarus
2019-07-17 8:48 ` [PATCH 1/5] mtd: spi-nor: fix description for int (*flash_is_locked)() Tudor.Ambarus
@ 2019-07-17 8:48 ` Tudor.Ambarus
2019-08-05 5:44 ` Vignesh Raghavendra
2019-07-17 8:48 ` [PATCH 3/5] mtd: spi-nor: add Global Block Unlock support Tudor.Ambarus
` (2 subsequent siblings)
4 siblings, 1 reply; 14+ messages in thread
From: Tudor.Ambarus @ 2019-07-17 8:48 UTC (permalink / raw)
To: vigneshr, marek.vasut
Cc: Tudor.Ambarus, richard, linux-kernel, Nicolas.Ferre,
boris.brezillon, linux-mtd, miquel.raynal, computersforpeace,
dwmw2
From: Tudor Ambarus <tudor.ambarus@microchip.com>
The write protection at power-up logic was split across functions
because of a dependency to spansion_quad_enable(). Group the code
in spi_nor_init() as the pointer to spansion_quad_enable() can be
retrieved from nor->quad_enable.
While touching this code, rename nor->clear_sr_bp() to
nor->disable_write_protection() to better indicate its scope: it
disables the default write protection after a power-on reset cycle.
No functional change intended.
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
---
drivers/mtd/spi-nor/spi-nor.c | 39 ++++++++++++++++++++++++---------------
include/linux/mtd/spi-nor.h | 6 +++---
2 files changed, 27 insertions(+), 18 deletions(-)
diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c
index 03cc788511d5..e9e441f91b68 100644
--- a/drivers/mtd/spi-nor/spi-nor.c
+++ b/drivers/mtd/spi-nor/spi-nor.c
@@ -3780,8 +3780,6 @@ static int spi_nor_init_params(struct spi_nor *nor,
default:
/* Kept only for backward compatibility purpose. */
params->quad_enable = spansion_quad_enable;
- if (nor->clear_sr_bp)
- nor->clear_sr_bp = spi_nor_spansion_clear_sr_bp;
break;
}
@@ -4034,11 +4032,32 @@ static int spi_nor_init(struct spi_nor *nor)
{
int err;
- if (nor->clear_sr_bp) {
- err = nor->clear_sr_bp(nor);
+ /*
+ * Atmel, SST, Intel/Numonyx, and others serial NOR tend to power up
+ * with the software protection bits set.
+ */
+ if (JEDEC_MFR(nor->info) == SNOR_MFR_ATMEL ||
+ JEDEC_MFR(nor->info) == SNOR_MFR_INTEL ||
+ JEDEC_MFR(nor->info) == SNOR_MFR_SST ||
+ nor->info->flags & SPI_NOR_HAS_LOCK) {
+ nor->disable_write_protection = spi_nor_clear_sr_bp;
+
+ /*
+ * In case of spansion flashes, when the configuration register
+ * Quad Enable bit is one, only the the Write Status (01h)
+ * command with two data bytes may be used to clear the block
+ * protection bits.
+ */
+ if (nor->quad_enable == spansion_quad_enable)
+ nor->disable_write_protection =
+ spi_nor_spansion_clear_sr_bp;
+ }
+
+ if (nor->disable_write_protection) {
+ err = nor->disable_write_protection(nor);
if (err) {
dev_err(nor->dev,
- "fail to clear block protection bits\n");
+ "failed to unlock the flash at init\n");
return err;
}
}
@@ -4165,16 +4184,6 @@ int spi_nor_scan(struct spi_nor *nor, const char *name,
if (info->flags & SPI_S3AN)
nor->flags |= SNOR_F_READY_XSR_RDY;
- /*
- * Atmel, SST, Intel/Numonyx, and others serial NOR tend to power up
- * with the software protection bits set.
- */
- if (JEDEC_MFR(nor->info) == SNOR_MFR_ATMEL ||
- JEDEC_MFR(nor->info) == SNOR_MFR_INTEL ||
- JEDEC_MFR(nor->info) == SNOR_MFR_SST ||
- nor->info->flags & SPI_NOR_HAS_LOCK)
- nor->clear_sr_bp = spi_nor_clear_sr_bp;
-
/* Parse the Serial Flash Discoverable Parameters table. */
ret = spi_nor_init_params(nor, ¶ms);
if (ret)
diff --git a/include/linux/mtd/spi-nor.h b/include/linux/mtd/spi-nor.h
index c4c2c5971284..6c3273760700 100644
--- a/include/linux/mtd/spi-nor.h
+++ b/include/linux/mtd/spi-nor.h
@@ -374,8 +374,8 @@ struct flash_info;
* @flash_is_locked: [FLASH-SPECIFIC] check if a region of the SPI NOR is
* completely locked
* @quad_enable: [FLASH-SPECIFIC] enables SPI NOR quad mode
- * @clear_sr_bp: [FLASH-SPECIFIC] clears the Block Protection Bits from
- * the SPI NOR Status Register.
+ * @disable_write_protection: [FLASH-SPECIFIC] disable write protection during
+ * power-up
* @priv: the private data
*/
struct spi_nor {
@@ -412,7 +412,7 @@ struct spi_nor {
int (*flash_unlock)(struct spi_nor *nor, loff_t ofs, uint64_t len);
int (*flash_is_locked)(struct spi_nor *nor, loff_t ofs, uint64_t len);
int (*quad_enable)(struct spi_nor *nor);
- int (*clear_sr_bp)(struct spi_nor *nor);
+ int (*disable_write_protection)(struct spi_nor *nor);
void *priv;
};
--
2.9.5
______________________________________________________
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http://lists.infradead.org/mailman/listinfo/linux-mtd/
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH 3/5] mtd: spi-nor: add Global Block Unlock support
2019-07-17 8:47 [PATCH 0/5] mtd: spi-nor: write protection at power-up Tudor.Ambarus
2019-07-17 8:48 ` [PATCH 1/5] mtd: spi-nor: fix description for int (*flash_is_locked)() Tudor.Ambarus
2019-07-17 8:48 ` [PATCH 2/5] mtd: spi-nor: group the code about the write protection at power-up Tudor.Ambarus
@ 2019-07-17 8:48 ` Tudor.Ambarus
2019-08-05 6:18 ` Vignesh Raghavendra
2019-07-17 8:48 ` [PATCH 4/5] mtd: spi-nor: unlock global block protection on sst26vf064b Tudor.Ambarus
2019-07-17 8:48 ` [PATCH 5/5] mtd: spi-nor: add Kconfig option to disable write protection at power-up Tudor.Ambarus
4 siblings, 1 reply; 14+ messages in thread
From: Tudor.Ambarus @ 2019-07-17 8:48 UTC (permalink / raw)
To: vigneshr, marek.vasut
Cc: Tudor.Ambarus, richard, linux-kernel, Nicolas.Ferre,
boris.brezillon, linux-mtd, miquel.raynal, computersforpeace,
dwmw2
From: Tudor Ambarus <tudor.ambarus@microchip.com>
To avoid inadvertent writes during power-up, some flashes are
write-protected by default after a power-on reset cycle.
A Global Block-Protection Unlock command offers a single
command cycle that unlocks the entire memory array. This is
identical with what other nor flashes are doing by clearing
the block protection bits from the status register: disable
the write protection after a power-on reset cycle.
We can't determine this purely by manufacturer type and it's not
autodetectable by anything like SFDP, so make a new flag for it:
UNLOCK_GLOBAL_BLOCK.
Note that the Global Block Unlock command has different names
depending on the manufacturer, but always the same command value:
0x98. Macronix's MX25U12835F names it Gang Block Unlock,
Winbound's W25Q128FV names it Global Block Unlock and
Microchip's SST26VF064B names it Global Block Protection Unlock.
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
---
drivers/mtd/spi-nor/spi-nor.c | 21 ++++++++++++++++++++-
include/linux/mtd/spi-nor.h | 1 +
2 files changed, 21 insertions(+), 1 deletion(-)
diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c
index e9e441f91b68..767e2e6eb1b8 100644
--- a/drivers/mtd/spi-nor/spi-nor.c
+++ b/drivers/mtd/spi-nor/spi-nor.c
@@ -250,7 +250,7 @@ struct flash_info {
u16 page_size;
u16 addr_width;
- u16 flags;
+ u32 flags;
#define SECT_4K BIT(0) /* SPINOR_OP_BE_4K works uniformly */
#define SPI_NOR_NO_ERASE BIT(1) /* No erase command needed */
#define SST_WRITE BIT(2) /* use SST byte programming */
@@ -279,6 +279,7 @@ struct flash_info {
#define SPI_NOR_SKIP_SFDP BIT(13) /* Skip parsing of SFDP tables */
#define USE_CLSR BIT(14) /* use CLSR command */
#define SPI_NOR_OCTAL_READ BIT(15) /* Flash supports Octal Read */
+#define UNLOCK_GLOBAL_BLOCK BIT(16) /* Unlock global block protection */
/* Part specific fixup hooks. */
const struct spi_nor_fixups *fixups;
@@ -1725,6 +1726,20 @@ static int spi_nor_spansion_clear_sr_bp(struct spi_nor *nor)
return spi_nor_clear_sr_bp(nor);
}
+static int spi_nor_unlock_global_block_protection(struct spi_nor *nor)
+{
+ int ret;
+
+ write_enable(nor);
+
+ ret = nor->write_reg(nor, SPINOR_OP_ULBPR, NULL, 0);
+ if (ret < 0) {
+ dev_err(nor->dev, "error %d on ULBPR\n", ret);
+ return ret;
+ }
+ return spi_nor_wait_till_ready(nor);
+}
+
/* Used when the "_ext_id" is two bytes at most */
#define INFO(_jedec_id, _ext_id, _sector_size, _n_sectors, _flags) \
.id = { \
@@ -4053,6 +4068,10 @@ static int spi_nor_init(struct spi_nor *nor)
spi_nor_spansion_clear_sr_bp;
}
+ if (nor->info->flags & UNLOCK_GLOBAL_BLOCK)
+ nor->disable_write_protection =
+ spi_nor_unlock_global_block_protection;
+
if (nor->disable_write_protection) {
err = nor->disable_write_protection(nor);
if (err) {
diff --git a/include/linux/mtd/spi-nor.h b/include/linux/mtd/spi-nor.h
index 6c3273760700..84d279fd287e 100644
--- a/include/linux/mtd/spi-nor.h
+++ b/include/linux/mtd/spi-nor.h
@@ -65,6 +65,7 @@
#define SPINOR_OP_CLFSR 0x50 /* Clear flag status register */
#define SPINOR_OP_RDEAR 0xc8 /* Read Extended Address Register */
#define SPINOR_OP_WREAR 0xc5 /* Write Extended Address Register */
+#define SPINOR_OP_ULBPR 0x98 /* Global Block Unlock Protection */
/* 4-byte address opcodes - used on Spansion and some Macronix flashes. */
#define SPINOR_OP_READ_4B 0x13 /* Read data bytes (low frequency) */
--
2.9.5
______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH 4/5] mtd: spi-nor: unlock global block protection on sst26vf064b
2019-07-17 8:47 [PATCH 0/5] mtd: spi-nor: write protection at power-up Tudor.Ambarus
` (2 preceding siblings ...)
2019-07-17 8:48 ` [PATCH 3/5] mtd: spi-nor: add Global Block Unlock support Tudor.Ambarus
@ 2019-07-17 8:48 ` Tudor.Ambarus
2019-07-17 8:48 ` [PATCH 5/5] mtd: spi-nor: add Kconfig option to disable write protection at power-up Tudor.Ambarus
4 siblings, 0 replies; 14+ messages in thread
From: Tudor.Ambarus @ 2019-07-17 8:48 UTC (permalink / raw)
To: vigneshr, marek.vasut
Cc: Tudor.Ambarus, richard, linux-kernel, Nicolas.Ferre,
boris.brezillon, linux-mtd, miquel.raynal, computersforpeace,
dwmw2
From: Tudor Ambarus <tudor.ambarus@microchip.com>
To avoid inadvertent writes during power-up, sst26vf064b is
write-protected by default after a power-on reset cycle.
Unlock the serial flash memory by using the Global Block Protection
Unlock command - it offers a single command cycle that unlocks
the entire memory array.
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
---
drivers/mtd/spi-nor/spi-nor.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c
index 767e2e6eb1b8..ffb53740031c 100644
--- a/drivers/mtd/spi-nor/spi-nor.c
+++ b/drivers/mtd/spi-nor/spi-nor.c
@@ -2075,7 +2075,9 @@ static const struct flash_info spi_nor_ids[] = {
{ "sst25wf040b", INFO(0x621613, 0, 64 * 1024, 8, SECT_4K) },
{ "sst25wf040", INFO(0xbf2504, 0, 64 * 1024, 8, SECT_4K | SST_WRITE) },
{ "sst25wf080", INFO(0xbf2505, 0, 64 * 1024, 16, SECT_4K | SST_WRITE) },
- { "sst26vf064b", INFO(0xbf2643, 0, 64 * 1024, 128, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
+ { "sst26vf064b", INFO(0xbf2643, 0, 64 * 1024, 128,
+ SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
+ UNLOCK_GLOBAL_BLOCK) },
/* ST Microelectronics -- newer production may have feature updates */
{ "m25p05", INFO(0x202010, 0, 32 * 1024, 2, 0) },
--
2.9.5
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^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH 5/5] mtd: spi-nor: add Kconfig option to disable write protection at power-up
2019-07-17 8:47 [PATCH 0/5] mtd: spi-nor: write protection at power-up Tudor.Ambarus
` (3 preceding siblings ...)
2019-07-17 8:48 ` [PATCH 4/5] mtd: spi-nor: unlock global block protection on sst26vf064b Tudor.Ambarus
@ 2019-07-17 8:48 ` Tudor.Ambarus
2019-07-17 11:15 ` Tudor.Ambarus
4 siblings, 1 reply; 14+ messages in thread
From: Tudor.Ambarus @ 2019-07-17 8:48 UTC (permalink / raw)
To: vigneshr, marek.vasut
Cc: Tudor.Ambarus, richard, linux-kernel, Nicolas.Ferre,
boris.brezillon, linux-mtd, miquel.raynal, computersforpeace,
dwmw2
From: Tudor Ambarus <tudor.ambarus@microchip.com>
Some spi-nor flashes come write protected by default after a
power-on sequence to avoid destructing commands (erase, write)
during power-up.
Backward compatibility imposes to disable the write protection
at power-up by default. Add a Kconfig option to let the user
benefit of the power-up write protection.
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
---
drivers/mtd/spi-nor/Kconfig | 8 ++++++++
drivers/mtd/spi-nor/spi-nor.c | 2 ++
2 files changed, 10 insertions(+)
diff --git a/drivers/mtd/spi-nor/Kconfig b/drivers/mtd/spi-nor/Kconfig
index 6de83277ce8b..b550e10657f1 100644
--- a/drivers/mtd/spi-nor/Kconfig
+++ b/drivers/mtd/spi-nor/Kconfig
@@ -22,6 +22,14 @@ config MTD_SPI_NOR_USE_4K_SECTORS
Please note that some tools/drivers/filesystems may not work with
4096 B erase size (e.g. UBIFS requires 15 KiB as a minimum).
+config MTD_SPI_NOR_DISABLE_POWER_UP_WRITE_PROTECTION
+ bool "Disable write protection during power-up"
+ default y
+ help
+ Some spi-nor flashes are write protected by default after a power-on
+ reset cycle, in order to avoid inadvertend writes during power-up.
+ Disable the write protection during power-up.
+
config SPI_ASPEED_SMC
tristate "Aspeed flash controllers in SPI mode"
depends on ARCH_ASPEED || COMPILE_TEST
diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c
index ffb53740031c..e5627fa6b1cd 100644
--- a/drivers/mtd/spi-nor/spi-nor.c
+++ b/drivers/mtd/spi-nor/spi-nor.c
@@ -4049,6 +4049,7 @@ static int spi_nor_init(struct spi_nor *nor)
{
int err;
+#ifdef CONFIG_MTD_SPI_NOR_DISABLE_POWER_UP_WRITE_PROTECTION
/*
* Atmel, SST, Intel/Numonyx, and others serial NOR tend to power up
* with the software protection bits set.
@@ -4082,6 +4083,7 @@ static int spi_nor_init(struct spi_nor *nor)
return err;
}
}
+#endif
if (nor->quad_enable) {
err = nor->quad_enable(nor);
--
2.9.5
______________________________________________________
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http://lists.infradead.org/mailman/listinfo/linux-mtd/
^ permalink raw reply related [flat|nested] 14+ messages in thread
* Re: [PATCH 5/5] mtd: spi-nor: add Kconfig option to disable write protection at power-up
2019-07-17 8:48 ` [PATCH 5/5] mtd: spi-nor: add Kconfig option to disable write protection at power-up Tudor.Ambarus
@ 2019-07-17 11:15 ` Tudor.Ambarus
2019-07-17 11:30 ` [PATCH v2 " Tudor.Ambarus
0 siblings, 1 reply; 14+ messages in thread
From: Tudor.Ambarus @ 2019-07-17 11:15 UTC (permalink / raw)
To: vigneshr, marek.vasut
Cc: richard, linux-kernel, Nicolas.Ferre, boris.brezillon, linux-mtd,
miquel.raynal, computersforpeace, dwmw2
On 07/17/2019 11:48 AM, Tudor Ambarus - M18064 wrote:
> From: Tudor Ambarus <tudor.ambarus@microchip.com>
>
> Some spi-nor flashes come write protected by default after a
> power-on sequence to avoid destructing commands (erase, write)
> during power-up.
>
> Backward compatibility imposes to disable the write protection
> at power-up by default. Add a Kconfig option to let the user
> benefit of the power-up write protection.
>
> Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
> ---
> drivers/mtd/spi-nor/Kconfig | 8 ++++++++
> drivers/mtd/spi-nor/spi-nor.c | 2 ++
> 2 files changed, 10 insertions(+)
I'll have to mark spi_nor_spansion_clear_sr_bp() and
spi_nor_unlock_global_block_protection() definitions as __maybe_unused.
drivers/mtd/spi-nor/spi-nor.c:1729:12: warning:
‘spi_nor_unlock_global_block_protection’ defined but not used [-Wunused-function]
static int spi_nor_unlock_global_block_protection(struct spi_nor *nor)
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/mtd/spi-nor/spi-nor.c:1687:12: warning: ‘spi_nor_spansion_clear_sr_bp’
defined but not used [-Wunused-function]
static int spi_nor_spansion_clear_sr_bp(struct spi_nor *nor)
^~~~~~~~~~~~~~~~~~~~~~~~~~~~
______________________________________________________
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^ permalink raw reply [flat|nested] 14+ messages in thread
* [PATCH v2 5/5] mtd: spi-nor: add Kconfig option to disable write protection at power-up
2019-07-17 11:15 ` Tudor.Ambarus
@ 2019-07-17 11:30 ` Tudor.Ambarus
2019-08-07 16:24 ` Vignesh Raghavendra
0 siblings, 1 reply; 14+ messages in thread
From: Tudor.Ambarus @ 2019-07-17 11:30 UTC (permalink / raw)
To: vigneshr, marek.vasut
Cc: Tudor.Ambarus, richard, linux-kernel, Nicolas.Ferre,
boris.brezillon, linux-mtd, miquel.raynal, computersforpeace,
dwmw2
From: Tudor Ambarus <tudor.ambarus@microchip.com>
Some spi-nor flashes come write protected by default after a
power-on sequence to avoid destructing commands (erase, write)
during power-up.
Backward compatibility imposes to disable the write protection
at power-up by default. Add a Kconfig option to let the user
benefit of the power-up write protection.
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
---
v2: mark spi_nor_spansion_clear_sr_bp() and
spi_nor_unlock_global_block_protection() definitions as __maybe_unused,
to avoid -Wunused-function warnings when
MTD_SPI_NOR_DISABLE_POWER_UP_WRITE_PROTECTION is not selected.
drivers/mtd/spi-nor/Kconfig | 8 ++++++++
drivers/mtd/spi-nor/spi-nor.c | 7 +++++--
2 files changed, 13 insertions(+), 2 deletions(-)
diff --git a/drivers/mtd/spi-nor/Kconfig b/drivers/mtd/spi-nor/Kconfig
index 6de83277ce8b..b550e10657f1 100644
--- a/drivers/mtd/spi-nor/Kconfig
+++ b/drivers/mtd/spi-nor/Kconfig
@@ -22,6 +22,14 @@ config MTD_SPI_NOR_USE_4K_SECTORS
Please note that some tools/drivers/filesystems may not work with
4096 B erase size (e.g. UBIFS requires 15 KiB as a minimum).
+config MTD_SPI_NOR_DISABLE_POWER_UP_WRITE_PROTECTION
+ bool "Disable write protection during power-up"
+ default y
+ help
+ Some spi-nor flashes are write protected by default after a power-on
+ reset cycle, in order to avoid inadvertend writes during power-up.
+ Disable the write protection during power-up.
+
config SPI_ASPEED_SMC
tristate "Aspeed flash controllers in SPI mode"
depends on ARCH_ASPEED || COMPILE_TEST
diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c
index ffb53740031c..9b948295ef27 100644
--- a/drivers/mtd/spi-nor/spi-nor.c
+++ b/drivers/mtd/spi-nor/spi-nor.c
@@ -1684,7 +1684,7 @@ static int spi_nor_clear_sr_bp(struct spi_nor *nor)
*
* Return: 0 on success, -errno otherwise.
*/
-static int spi_nor_spansion_clear_sr_bp(struct spi_nor *nor)
+static int __maybe_unused spi_nor_spansion_clear_sr_bp(struct spi_nor *nor)
{
int ret;
u8 mask = SR_BP2 | SR_BP1 | SR_BP0;
@@ -1726,7 +1726,8 @@ static int spi_nor_spansion_clear_sr_bp(struct spi_nor *nor)
return spi_nor_clear_sr_bp(nor);
}
-static int spi_nor_unlock_global_block_protection(struct spi_nor *nor)
+static int __maybe_unused
+spi_nor_unlock_global_block_protection(struct spi_nor *nor)
{
int ret;
@@ -4049,6 +4050,7 @@ static int spi_nor_init(struct spi_nor *nor)
{
int err;
+#ifdef CONFIG_MTD_SPI_NOR_DISABLE_POWER_UP_WRITE_PROTECTION
/*
* Atmel, SST, Intel/Numonyx, and others serial NOR tend to power up
* with the software protection bits set.
@@ -4082,6 +4084,7 @@ static int spi_nor_init(struct spi_nor *nor)
return err;
}
}
+#endif
if (nor->quad_enable) {
err = nor->quad_enable(nor);
--
2.9.5
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^ permalink raw reply related [flat|nested] 14+ messages in thread
* Re: [PATCH 1/5] mtd: spi-nor: fix description for int (*flash_is_locked)()
2019-07-17 8:48 ` [PATCH 1/5] mtd: spi-nor: fix description for int (*flash_is_locked)() Tudor.Ambarus
@ 2019-08-05 5:34 ` Vignesh Raghavendra
2019-08-12 11:24 ` Tudor.Ambarus
0 siblings, 1 reply; 14+ messages in thread
From: Vignesh Raghavendra @ 2019-08-05 5:34 UTC (permalink / raw)
To: Tudor.Ambarus, marek.vasut
Cc: richard, linux-kernel, Nicolas.Ferre, boris.brezillon, linux-mtd,
miquel.raynal, computersforpeace, dwmw2
On 17/07/19 2:18 PM, Tudor.Ambarus@microchip.com wrote:
> From: Tudor Ambarus <tudor.ambarus@microchip.com>
>
> The description was interleaved.
>
> Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Reviewed-by: Vignesh Raghavendra <vigneshr@ti.com>
> ---
> include/linux/mtd/spi-nor.h | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/include/linux/mtd/spi-nor.h b/include/linux/mtd/spi-nor.h
> index 9f57cdfcc93d..c4c2c5971284 100644
> --- a/include/linux/mtd/spi-nor.h
> +++ b/include/linux/mtd/spi-nor.h
> @@ -372,10 +372,10 @@ struct flash_info;
> * @flash_lock: [FLASH-SPECIFIC] lock a region of the SPI NOR
> * @flash_unlock: [FLASH-SPECIFIC] unlock a region of the SPI NOR
> * @flash_is_locked: [FLASH-SPECIFIC] check if a region of the SPI NOR is
> + * completely locked
> * @quad_enable: [FLASH-SPECIFIC] enables SPI NOR quad mode
> * @clear_sr_bp: [FLASH-SPECIFIC] clears the Block Protection Bits from
> * the SPI NOR Status Register.
> - * completely locked
> * @priv: the private data
> */
> struct spi_nor {
>
--
Regards
Vignesh
______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH 2/5] mtd: spi-nor: group the code about the write protection at power-up
2019-07-17 8:48 ` [PATCH 2/5] mtd: spi-nor: group the code about the write protection at power-up Tudor.Ambarus
@ 2019-08-05 5:44 ` Vignesh Raghavendra
2019-08-05 6:30 ` Tudor.Ambarus
0 siblings, 1 reply; 14+ messages in thread
From: Vignesh Raghavendra @ 2019-08-05 5:44 UTC (permalink / raw)
To: Tudor.Ambarus, marek.vasut
Cc: richard, linux-kernel, Nicolas.Ferre, boris.brezillon, linux-mtd,
miquel.raynal, computersforpeace, dwmw2
On 17/07/19 2:18 PM, Tudor.Ambarus@microchip.com wrote:
> From: Tudor Ambarus <tudor.ambarus@microchip.com>
>
> The write protection at power-up logic was split across functions
> because of a dependency to spansion_quad_enable(). Group the code
> in spi_nor_init() as the pointer to spansion_quad_enable() can be
> retrieved from nor->quad_enable.
>
> While touching this code, rename nor->clear_sr_bp() to
> nor->disable_write_protection() to better indicate its scope: it
> disables the default write protection after a power-on reset cycle.
I prefer this function to be renamed to nor->disable_block_protection()
so as to avoid being confused with write protect signal input to the flash.
Regards
Vignesh
>
> No functional change intended.
>
> Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
> ---
> drivers/mtd/spi-nor/spi-nor.c | 39 ++++++++++++++++++++++++---------------
> include/linux/mtd/spi-nor.h | 6 +++---
> 2 files changed, 27 insertions(+), 18 deletions(-)
>
> diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c
> index 03cc788511d5..e9e441f91b68 100644
> --- a/drivers/mtd/spi-nor/spi-nor.c
> +++ b/drivers/mtd/spi-nor/spi-nor.c
> @@ -3780,8 +3780,6 @@ static int spi_nor_init_params(struct spi_nor *nor,
> default:
> /* Kept only for backward compatibility purpose. */
> params->quad_enable = spansion_quad_enable;
> - if (nor->clear_sr_bp)
> - nor->clear_sr_bp = spi_nor_spansion_clear_sr_bp;
> break;
> }
>
> @@ -4034,11 +4032,32 @@ static int spi_nor_init(struct spi_nor *nor)
> {
> int err;
>
> - if (nor->clear_sr_bp) {
> - err = nor->clear_sr_bp(nor);
> + /*
> + * Atmel, SST, Intel/Numonyx, and others serial NOR tend to power up
> + * with the software protection bits set.
> + */
> + if (JEDEC_MFR(nor->info) == SNOR_MFR_ATMEL ||
> + JEDEC_MFR(nor->info) == SNOR_MFR_INTEL ||
> + JEDEC_MFR(nor->info) == SNOR_MFR_SST ||
> + nor->info->flags & SPI_NOR_HAS_LOCK) {
> + nor->disable_write_protection = spi_nor_clear_sr_bp;
> +
> + /*
> + * In case of spansion flashes, when the configuration register
> + * Quad Enable bit is one, only the the Write Status (01h)
> + * command with two data bytes may be used to clear the block
> + * protection bits.
> + */
> + if (nor->quad_enable == spansion_quad_enable)
> + nor->disable_write_protection =
> + spi_nor_spansion_clear_sr_bp;
> + }
> +
> + if (nor->disable_write_protection) {
> + err = nor->disable_write_protection(nor);
> if (err) {
> dev_err(nor->dev,
> - "fail to clear block protection bits\n");
> + "failed to unlock the flash at init\n");
> return err;
> }
> }
> @@ -4165,16 +4184,6 @@ int spi_nor_scan(struct spi_nor *nor, const char *name,
> if (info->flags & SPI_S3AN)
> nor->flags |= SNOR_F_READY_XSR_RDY;
>
> - /*
> - * Atmel, SST, Intel/Numonyx, and others serial NOR tend to power up
> - * with the software protection bits set.
> - */
> - if (JEDEC_MFR(nor->info) == SNOR_MFR_ATMEL ||
> - JEDEC_MFR(nor->info) == SNOR_MFR_INTEL ||
> - JEDEC_MFR(nor->info) == SNOR_MFR_SST ||
> - nor->info->flags & SPI_NOR_HAS_LOCK)
> - nor->clear_sr_bp = spi_nor_clear_sr_bp;
> -
> /* Parse the Serial Flash Discoverable Parameters table. */
> ret = spi_nor_init_params(nor, ¶ms);
> if (ret)
> diff --git a/include/linux/mtd/spi-nor.h b/include/linux/mtd/spi-nor.h
> index c4c2c5971284..6c3273760700 100644
> --- a/include/linux/mtd/spi-nor.h
> +++ b/include/linux/mtd/spi-nor.h
> @@ -374,8 +374,8 @@ struct flash_info;
> * @flash_is_locked: [FLASH-SPECIFIC] check if a region of the SPI NOR is
> * completely locked
> * @quad_enable: [FLASH-SPECIFIC] enables SPI NOR quad mode
> - * @clear_sr_bp: [FLASH-SPECIFIC] clears the Block Protection Bits from
> - * the SPI NOR Status Register.
> + * @disable_write_protection: [FLASH-SPECIFIC] disable write protection during
> + * power-up
> * @priv: the private data
> */
> struct spi_nor {
> @@ -412,7 +412,7 @@ struct spi_nor {
> int (*flash_unlock)(struct spi_nor *nor, loff_t ofs, uint64_t len);
> int (*flash_is_locked)(struct spi_nor *nor, loff_t ofs, uint64_t len);
> int (*quad_enable)(struct spi_nor *nor);
> - int (*clear_sr_bp)(struct spi_nor *nor);
> + int (*disable_write_protection)(struct spi_nor *nor);
>
> void *priv;
> };
>
--
Regards
Vignesh
______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH 3/5] mtd: spi-nor: add Global Block Unlock support
2019-07-17 8:48 ` [PATCH 3/5] mtd: spi-nor: add Global Block Unlock support Tudor.Ambarus
@ 2019-08-05 6:18 ` Vignesh Raghavendra
0 siblings, 0 replies; 14+ messages in thread
From: Vignesh Raghavendra @ 2019-08-05 6:18 UTC (permalink / raw)
To: Tudor.Ambarus, marek.vasut
Cc: richard, linux-kernel, Nicolas.Ferre, boris.brezillon, linux-mtd,
miquel.raynal, computersforpeace, dwmw2
On 17/07/19 2:18 PM, Tudor.Ambarus@microchip.com wrote:
> From: Tudor Ambarus <tudor.ambarus@microchip.com>
>
> To avoid inadvertent writes during power-up, some flashes are
> write-protected by default after a power-on reset cycle.
> A Global Block-Protection Unlock command offers a single
> command cycle that unlocks the entire memory array. This is
> identical with what other nor flashes are doing by clearing
> the block protection bits from the status register: disable
> the write protection after a power-on reset cycle.
>
> We can't determine this purely by manufacturer type and it's not
> autodetectable by anything like SFDP, so make a new flag for it:
> UNLOCK_GLOBAL_BLOCK.
>
> Note that the Global Block Unlock command has different names
> depending on the manufacturer, but always the same command value:
> 0x98. Macronix's MX25U12835F names it Gang Block Unlock,
> Winbound's W25Q128FV names it Global Block Unlock and
> Microchip's SST26VF064B names it Global Block Protection Unlock.
>
> Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Reviewed-by: Vignesh Raghavendra <vigneshr@ti.com>
> ---
> drivers/mtd/spi-nor/spi-nor.c | 21 ++++++++++++++++++++-
> include/linux/mtd/spi-nor.h | 1 +
> 2 files changed, 21 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c
> index e9e441f91b68..767e2e6eb1b8 100644
> --- a/drivers/mtd/spi-nor/spi-nor.c
> +++ b/drivers/mtd/spi-nor/spi-nor.c
> @@ -250,7 +250,7 @@ struct flash_info {
> u16 page_size;
> u16 addr_width;
>
> - u16 flags;
> + u32 flags;
> #define SECT_4K BIT(0) /* SPINOR_OP_BE_4K works uniformly */
> #define SPI_NOR_NO_ERASE BIT(1) /* No erase command needed */
> #define SST_WRITE BIT(2) /* use SST byte programming */
> @@ -279,6 +279,7 @@ struct flash_info {
> #define SPI_NOR_SKIP_SFDP BIT(13) /* Skip parsing of SFDP tables */
> #define USE_CLSR BIT(14) /* use CLSR command */
> #define SPI_NOR_OCTAL_READ BIT(15) /* Flash supports Octal Read */
> +#define UNLOCK_GLOBAL_BLOCK BIT(16) /* Unlock global block protection */
>
> /* Part specific fixup hooks. */
> const struct spi_nor_fixups *fixups;
> @@ -1725,6 +1726,20 @@ static int spi_nor_spansion_clear_sr_bp(struct spi_nor *nor)
> return spi_nor_clear_sr_bp(nor);
> }
>
> +static int spi_nor_unlock_global_block_protection(struct spi_nor *nor)
> +{
> + int ret;
> +
> + write_enable(nor);
> +
> + ret = nor->write_reg(nor, SPINOR_OP_ULBPR, NULL, 0);
> + if (ret < 0) {
> + dev_err(nor->dev, "error %d on ULBPR\n", ret);
> + return ret;
> + }
> + return spi_nor_wait_till_ready(nor);
> +}
> +
> /* Used when the "_ext_id" is two bytes at most */
> #define INFO(_jedec_id, _ext_id, _sector_size, _n_sectors, _flags) \
> .id = { \
> @@ -4053,6 +4068,10 @@ static int spi_nor_init(struct spi_nor *nor)
> spi_nor_spansion_clear_sr_bp;
> }
>
> + if (nor->info->flags & UNLOCK_GLOBAL_BLOCK)
> + nor->disable_write_protection =
> + spi_nor_unlock_global_block_protection;
> +
> if (nor->disable_write_protection) {
> err = nor->disable_write_protection(nor);
> if (err) {
> diff --git a/include/linux/mtd/spi-nor.h b/include/linux/mtd/spi-nor.h
> index 6c3273760700..84d279fd287e 100644
> --- a/include/linux/mtd/spi-nor.h
> +++ b/include/linux/mtd/spi-nor.h
> @@ -65,6 +65,7 @@
> #define SPINOR_OP_CLFSR 0x50 /* Clear flag status register */
> #define SPINOR_OP_RDEAR 0xc8 /* Read Extended Address Register */
> #define SPINOR_OP_WREAR 0xc5 /* Write Extended Address Register */
> +#define SPINOR_OP_ULBPR 0x98 /* Global Block Unlock Protection */
>
> /* 4-byte address opcodes - used on Spansion and some Macronix flashes. */
> #define SPINOR_OP_READ_4B 0x13 /* Read data bytes (low frequency) */
>
--
Regards
Vignesh
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http://lists.infradead.org/mailman/listinfo/linux-mtd/
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH 2/5] mtd: spi-nor: group the code about the write protection at power-up
2019-08-05 5:44 ` Vignesh Raghavendra
@ 2019-08-05 6:30 ` Tudor.Ambarus
0 siblings, 0 replies; 14+ messages in thread
From: Tudor.Ambarus @ 2019-08-05 6:30 UTC (permalink / raw)
To: vigneshr, marek.vasut
Cc: richard, linux-kernel, Nicolas.Ferre, boris.brezillon, linux-mtd,
miquel.raynal, computersforpeace, dwmw2
On 08/05/2019 08:44 AM, Vignesh Raghavendra wrote:
>> From: Tudor Ambarus <tudor.ambarus@microchip.com>
>>
>> The write protection at power-up logic was split across functions
>> because of a dependency to spansion_quad_enable(). Group the code
>> in spi_nor_init() as the pointer to spansion_quad_enable() can be
>> retrieved from nor->quad_enable.
>>
>> While touching this code, rename nor->clear_sr_bp() to
>> nor->disable_write_protection() to better indicate its scope: it
>> disables the default write protection after a power-on reset cycle.
> I prefer this function to be renamed to nor->disable_block_protection()
> so as to avoid being confused with write protect signal input to the flash.
You're right, I'll rename it.
Thanks,
ta
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^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH v2 5/5] mtd: spi-nor: add Kconfig option to disable write protection at power-up
2019-07-17 11:30 ` [PATCH v2 " Tudor.Ambarus
@ 2019-08-07 16:24 ` Vignesh Raghavendra
0 siblings, 0 replies; 14+ messages in thread
From: Vignesh Raghavendra @ 2019-08-07 16:24 UTC (permalink / raw)
To: Tudor.Ambarus, marek.vasut
Cc: richard, linux-kernel, Nicolas.Ferre, boris.brezillon, linux-mtd,
miquel.raynal, computersforpeace, dwmw2
Hi Tudor
On 17-Jul-19 5:00 PM, Tudor.Ambarus@microchip.com wrote:
> From: Tudor Ambarus <tudor.ambarus@microchip.com>
[...]
>
> drivers/mtd/spi-nor/Kconfig | 8 ++++++++
> drivers/mtd/spi-nor/spi-nor.c | 7 +++++--
> 2 files changed, 13 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/mtd/spi-nor/Kconfig b/drivers/mtd/spi-nor/Kconfig
> index 6de83277ce8b..b550e10657f1 100644
> --- a/drivers/mtd/spi-nor/Kconfig
> +++ b/drivers/mtd/spi-nor/Kconfig
> @@ -22,6 +22,14 @@ config MTD_SPI_NOR_USE_4K_SECTORS
> Please note that some tools/drivers/filesystems may not work with
> 4096 B erase size (e.g. UBIFS requires 15 KiB as a minimum).
>
> +config MTD_SPI_NOR_DISABLE_POWER_UP_WRITE_PROTECTION
> + bool "Disable write protection during power-up"
> + default y
> + help
> + Some spi-nor flashes are write protected by default after a power-on
> + reset cycle, in order to avoid inadvertend writes during power-up.
> + Disable the write protection during power-up.
> +
Hmm, how about setting MTD_POWERUP_LOCK flag in mtd->flags whenever
flash powers up with WP enabled? User can disable WP by declaring
partitions rw or keep partitions locked with ro. MTD core takes care of
calling mtd->unlock() depending up on the rw/ro flag as part of
add_mtd_device()
We could probably enhance spi_nor_unlock() to use
spi_nor_unlock_global_block_protection() when asked to unlock entire flash.
Kconfig option does not scale well for multi-platform build. There would
not be a way to have WP enabled on one platform but disabled on other.
Regards
Vignesh
> config SPI_ASPEED_SMC
> tristate "Aspeed flash controllers in SPI mode"
> depends on ARCH_ASPEED || COMPILE_TEST
> diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c
> index ffb53740031c..9b948295ef27 100644
> --- a/drivers/mtd/spi-nor/spi-nor.c
> +++ b/drivers/mtd/spi-nor/spi-nor.c
> @@ -1684,7 +1684,7 @@ static int spi_nor_clear_sr_bp(struct spi_nor *nor)
> *
> * Return: 0 on success, -errno otherwise.
> */
> -static int spi_nor_spansion_clear_sr_bp(struct spi_nor *nor)
> +static int __maybe_unused spi_nor_spansion_clear_sr_bp(struct spi_nor *nor)
> {
> int ret;
> u8 mask = SR_BP2 | SR_BP1 | SR_BP0;
> @@ -1726,7 +1726,8 @@ static int spi_nor_spansion_clear_sr_bp(struct spi_nor *nor)
> return spi_nor_clear_sr_bp(nor);
> }
>
> -static int spi_nor_unlock_global_block_protection(struct spi_nor *nor)
> +static int __maybe_unused
> +spi_nor_unlock_global_block_protection(struct spi_nor *nor)
> {
> int ret;
>
> @@ -4049,6 +4050,7 @@ static int spi_nor_init(struct spi_nor *nor)
> {
> int err;
>
> +#ifdef CONFIG_MTD_SPI_NOR_DISABLE_POWER_UP_WRITE_PROTECTION
> /*
> * Atmel, SST, Intel/Numonyx, and others serial NOR tend to power up
> * with the software protection bits set.
> @@ -4082,6 +4084,7 @@ static int spi_nor_init(struct spi_nor *nor)
> return err;
> }
> }
> +#endif
>
> if (nor->quad_enable) {
> err = nor->quad_enable(nor);
>
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^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH 1/5] mtd: spi-nor: fix description for int (*flash_is_locked)()
2019-08-05 5:34 ` Vignesh Raghavendra
@ 2019-08-12 11:24 ` Tudor.Ambarus
0 siblings, 0 replies; 14+ messages in thread
From: Tudor.Ambarus @ 2019-08-12 11:24 UTC (permalink / raw)
To: vigneshr, marek.vasut
Cc: richard, linux-kernel, Nicolas.Ferre, boris.brezillon, linux-mtd,
miquel.raynal, computersforpeace, dwmw2
On 08/05/2019 08:34 AM, Vignesh Raghavendra wrote:
> External E-Mail
>
>
>
> On 17/07/19 2:18 PM, Tudor.Ambarus@microchip.com wrote:
>> From: Tudor Ambarus <tudor.ambarus@microchip.com>
>>
>> The description was interleaved.
>>
>> Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
>
> Reviewed-by: Vignesh Raghavendra <vigneshr@ti.com>
>
Applied to https://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux.git,
spi-nor/next branch.
Thanks,
ta
______________________________________________________
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^ permalink raw reply [flat|nested] 14+ messages in thread
end of thread, other threads:[~2019-08-12 11:25 UTC | newest]
Thread overview: 14+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2019-07-17 8:47 [PATCH 0/5] mtd: spi-nor: write protection at power-up Tudor.Ambarus
2019-07-17 8:48 ` [PATCH 1/5] mtd: spi-nor: fix description for int (*flash_is_locked)() Tudor.Ambarus
2019-08-05 5:34 ` Vignesh Raghavendra
2019-08-12 11:24 ` Tudor.Ambarus
2019-07-17 8:48 ` [PATCH 2/5] mtd: spi-nor: group the code about the write protection at power-up Tudor.Ambarus
2019-08-05 5:44 ` Vignesh Raghavendra
2019-08-05 6:30 ` Tudor.Ambarus
2019-07-17 8:48 ` [PATCH 3/5] mtd: spi-nor: add Global Block Unlock support Tudor.Ambarus
2019-08-05 6:18 ` Vignesh Raghavendra
2019-07-17 8:48 ` [PATCH 4/5] mtd: spi-nor: unlock global block protection on sst26vf064b Tudor.Ambarus
2019-07-17 8:48 ` [PATCH 5/5] mtd: spi-nor: add Kconfig option to disable write protection at power-up Tudor.Ambarus
2019-07-17 11:15 ` Tudor.Ambarus
2019-07-17 11:30 ` [PATCH v2 " Tudor.Ambarus
2019-08-07 16:24 ` Vignesh Raghavendra
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