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* [PATCH] mtd: spi-nor: Add support for en25qh64
@ 2018-12-27 15:03 Roger Pueyo Centelles
  2019-01-10 17:21 ` Tudor.Ambarus
  0 siblings, 1 reply; 6+ messages in thread
From: Roger Pueyo Centelles @ 2018-12-27 15:03 UTC (permalink / raw)
  To: linux-mtd; +Cc: marek.vasut, Roger Pueyo Centelles

The Eon EN25QH64 is a 64 Mbit SPI NOR flash memory chip found
on recent wireless routers. Its 32, 128 and 256 Mbit siblings
are alredy supported.

Tested on a COMFAST CF-E120A v3 board.

Signed-off-by: Roger Pueyo Centelles <roger.pueyo@guifi.net>
---
 drivers/mtd/spi-nor/spi-nor.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c
index 6e13bbd1aaa5..4bb6f4d203dc 100644
--- a/drivers/mtd/spi-nor/spi-nor.c
+++ b/drivers/mtd/spi-nor/spi-nor.c
@@ -1741,6 +1741,7 @@ static const struct flash_info spi_nor_ids[] = {
 	{ "en25p64",    INFO(0x1c2017, 0, 64 * 1024,  128, 0) },
 	{ "en25q64",    INFO(0x1c3017, 0, 64 * 1024,  128, SECT_4K) },
 	{ "en25qh32",   INFO(0x1c7016, 0, 64 * 1024,   64, 0) },
+	{ "en25qh64",   INFO(0x1c7017, 0, 64 * 1024,  128, 0) },
 	{ "en25qh128",  INFO(0x1c7018, 0, 64 * 1024,  256, 0) },
 	{ "en25qh256",  INFO(0x1c7019, 0, 64 * 1024,  512, 0) },
 	{ "en25s64",	INFO(0x1c3817, 0, 64 * 1024,  128, SECT_4K) },
-- 
2.19.2

^ permalink raw reply related	[flat|nested] 6+ messages in thread
* Re: [PATCH] mtd: spi-nor: Add support for en25qh64
  2018-12-27 15:03 [PATCH] mtd: spi-nor: Add support for en25qh64 Roger Pueyo Centelles
@ 2019-01-10 17:21 ` Tudor.Ambarus
  2019-01-30 14:36   ` Roger Pueyo Centelles | Guifi.net
  0 siblings, 1 reply; 6+ messages in thread
From: Tudor.Ambarus @ 2019-01-10 17:21 UTC (permalink / raw)
  To: roger.pueyo, linux-mtd; +Cc: marek.vasut

Hi, Roger,

On 12/27/2018 05:03 PM, Roger Pueyo Centelles wrote:
> The Eon EN25QH64 is a 64 Mbit SPI NOR flash memory chip found
> on recent wireless routers. Its 32, 128 and 256 Mbit siblings
> are alredy supported.

s/alredy/already

> 
> Tested on a COMFAST CF-E120A v3 board.
> 
> Signed-off-by: Roger Pueyo Centelles <roger.pueyo@guifi.net>
> ---
>  drivers/mtd/spi-nor/spi-nor.c | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c
> index 6e13bbd1aaa5..4bb6f4d203dc 100644
> --- a/drivers/mtd/spi-nor/spi-nor.c
> +++ b/drivers/mtd/spi-nor/spi-nor.c
> @@ -1741,6 +1741,7 @@ static const struct flash_info spi_nor_ids[] = {
>  	{ "en25p64",    INFO(0x1c2017, 0, 64 * 1024,  128, 0) },
>  	{ "en25q64",    INFO(0x1c3017, 0, 64 * 1024,  128, SECT_4K) },
>  	{ "en25qh32",   INFO(0x1c7016, 0, 64 * 1024,   64, 0) },
> +	{ "en25qh64",   INFO(0x1c7017, 0, 64 * 1024,  128, 0) },

The flash supports 4KiB erase type, so you'll have to set SECT_4K. One can use
larger sectors, when available, by disabling CONFIG_MTD_SPI_NOR_USE_4K_SECTORS.

Also, the flash supports SPINOR_OP_READ_1_1_2, so it's better to set
SPI_NOR_DUAL_READ in order to trigger the bfpt parsing. Note that at bfpt
parsing, SPINOR_OP_PP_1_4_4 will be enabled and the reads should be done with
the ebh command. Please test if these assumptions are valid, and if correct,
submit a new patch.

Cheers,
ta

^ permalink raw reply	[flat|nested] 6+ messages in thread
* Re: [PATCH] mtd: spi-nor: Add support for en25qh64
  2019-01-10 17:21 ` Tudor.Ambarus
@ 2019-01-30 14:36   ` Roger Pueyo Centelles | Guifi.net
  2019-01-30 16:09     ` Tudor.Ambarus
  0 siblings, 1 reply; 6+ messages in thread
From: Roger Pueyo Centelles | Guifi.net @ 2019-01-30 14:36 UTC (permalink / raw)
  To: Tudor.Ambarus, linux-mtd; +Cc: marek.vasut


[-- Attachment #1.1.1: Type: text/plain, Size: 1910 bytes --]

Hi Tudor,

El 10/1/19 a les 18:21, Tudor.Ambarus@microchip.com ha escrit:
> Hi, Roger,
>
> On 12/27/2018 05:03 PM, Roger Pueyo Centelles wrote:
>> The Eon EN25QH64 is a 64 Mbit SPI NOR flash memory chip found
>> on recent wireless routers. Its 32, 128 and 256 Mbit siblings
>> are alredy supported.
> s/alredy/already
>
>> Tested on a COMFAST CF-E120A v3 board.
>>
>> Signed-off-by: Roger Pueyo Centelles <roger.pueyo@guifi.net>
>> ---
>>  drivers/mtd/spi-nor/spi-nor.c | 1 +
>>  1 file changed, 1 insertion(+)
>>
>> diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c
>> index 6e13bbd1aaa5..4bb6f4d203dc 100644
>> --- a/drivers/mtd/spi-nor/spi-nor.c
>> +++ b/drivers/mtd/spi-nor/spi-nor.c
>> @@ -1741,6 +1741,7 @@ static const struct flash_info spi_nor_ids[] = {
>>  	{ "en25p64",    INFO(0x1c2017, 0, 64 * 1024,  128, 0) },
>>  	{ "en25q64",    INFO(0x1c3017, 0, 64 * 1024,  128, SECT_4K) },
>>  	{ "en25qh32",   INFO(0x1c7016, 0, 64 * 1024,   64, 0) },
>> +	{ "en25qh64",   INFO(0x1c7017, 0, 64 * 1024,  128, 0) },
> The flash supports 4KiB erase type, so you'll have to set SECT_4K. One can use
> larger sectors, when available, by disabling CONFIG_MTD_SPI_NOR_USE_4K_SECTORS.

You're right, I'm setting it.

>
> Also, the flash supports SPINOR_OP_READ_1_1_2, so it's better to set
> SPI_NOR_DUAL_READ in order to trigger the bfpt parsing. Note that at bfpt
> parsing, SPINOR_OP_PP_1_4_4 will be enabled and the reads should be done with
> the ebh command. Please test if these assumptions are valid, and if correct,
> submit a new patch.

Do you mean that I just have to add SPI_NOR_DUAL_READ, and not
SPI_NOR_QUAD_READ also? The chip's datasheet [1] says it supports both
DUAL and QUAD modes; I tried setting both flags, and it works fine.

Cheers,

Roger

[1] http://www.bdtic.com/datasheet/EON/EN25QH64.pdf

>
> Cheers,
> ta


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______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/

^ permalink raw reply	[flat|nested] 6+ messages in thread
* Re: [PATCH] mtd: spi-nor: Add support for en25qh64
  2019-01-30 14:36   ` Roger Pueyo Centelles | Guifi.net
@ 2019-01-30 16:09     ` Tudor.Ambarus
  2019-02-07 19:09       ` [PATCH v1] " Roger Pueyo Centelles
  0 siblings, 1 reply; 6+ messages in thread
From: Tudor.Ambarus @ 2019-01-30 16:09 UTC (permalink / raw)
  To: roger.pueyo, linux-mtd; +Cc: marek.vasut

Hi, Roger,

On 01/30/2019 04:36 PM, Roger Pueyo Centelles | Guifi.net wrote:
> Hi Tudor,
> 
> El 10/1/19 a les 18:21, Tudor.Ambarus@microchip.com ha escrit:
>> Hi, Roger,
>>
>> On 12/27/2018 05:03 PM, Roger Pueyo Centelles wrote:
>>> The Eon EN25QH64 is a 64 Mbit SPI NOR flash memory chip found
>>> on recent wireless routers. Its 32, 128 and 256 Mbit siblings
>>> are alredy supported.
>> s/alredy/already
>>
>>> Tested on a COMFAST CF-E120A v3 board.
>>>
>>> Signed-off-by: Roger Pueyo Centelles <roger.pueyo@guifi.net>
>>> ---
>>>  drivers/mtd/spi-nor/spi-nor.c | 1 +
>>>  1 file changed, 1 insertion(+)
>>>
>>> diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c
>>> index 6e13bbd1aaa5..4bb6f4d203dc 100644
>>> --- a/drivers/mtd/spi-nor/spi-nor.c
>>> +++ b/drivers/mtd/spi-nor/spi-nor.c
>>> @@ -1741,6 +1741,7 @@ static const struct flash_info spi_nor_ids[] = {
>>>  	{ "en25p64",    INFO(0x1c2017, 0, 64 * 1024,  128, 0) },
>>>  	{ "en25q64",    INFO(0x1c3017, 0, 64 * 1024,  128, SECT_4K) },
>>>  	{ "en25qh32",   INFO(0x1c7016, 0, 64 * 1024,   64, 0) },
>>> +	{ "en25qh64",   INFO(0x1c7017, 0, 64 * 1024,  128, 0) },
>> The flash supports 4KiB erase type, so you'll have to set SECT_4K. One can use
>> larger sectors, when available, by disabling CONFIG_MTD_SPI_NOR_USE_4K_SECTORS.
> 
> You're right, I'm setting it.
> 
>>
>> Also, the flash supports SPINOR_OP_READ_1_1_2, so it's better to set
>> SPI_NOR_DUAL_READ in order to trigger the bfpt parsing. Note that at bfpt
>> parsing, SPINOR_OP_PP_1_4_4 will be enabled and the reads should be done with
>> the ebh command. Please test if these assumptions are valid, and if correct,
>> submit a new patch.
> 
> Do you mean that I just have to add SPI_NOR_DUAL_READ, and not
> SPI_NOR_QUAD_READ also? The chip's datasheet [1] says it supports both

yes, just SPI_NOR_DUAL_READ.

> DUAL and QUAD modes; I tried setting both flags, and it works fine.

The flash supports SPINOR_OP_READ_1_4_4 (0xeb), but it doesn't support
SPINOR_OP_READ_1_1_4 (0x6b). In  spi_nor_init_params(), when SPI_NOR_QUAD_READ
is set, we assume that SNOR_HWCAPS_READ_1_1_4 is supported. If for whatever
reason the parsing of sfdp fails, your flash will wrongly advertise that
SNOR_HWCAPS_READ_1_1_4 is supported.

You'll have to set SECT_4K and SPI_NOR_DUAL_READ. The latter triggers the bfpt
parsing which will enable SPINOR_OP_PP_1_4_4.

Cheers,
ta
______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/

^ permalink raw reply	[flat|nested] 6+ messages in thread
* [PATCH v1] mtd: spi-nor: Add support for en25qh64
  2019-01-30 16:09     ` Tudor.Ambarus
@ 2019-02-07 19:09       ` Roger Pueyo Centelles
  2019-02-08  9:39         ` Tudor.Ambarus
  0 siblings, 1 reply; 6+ messages in thread
From: Roger Pueyo Centelles @ 2019-02-07 19:09 UTC (permalink / raw)
  To: linux-mtd, Tudor.Ambarus; +Cc: marek.vasut, Roger Pueyo Centelles

The Eon EN25QH64 is a 64 Mbit SPI NOR flash memory chip found
on recent wireless routers. Its 32, 128 and 256 Mbit siblings
are already supported.

Tested on a COMFAST CF-E120A v3 router board.

Signed-off-by: Roger Pueyo Centelles <roger.pueyo@guifi.net>
---
 drivers/mtd/spi-nor/spi-nor.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c
index 6e13bbd1aaa5..33b2d0158a96 100644
--- a/drivers/mtd/spi-nor/spi-nor.c
+++ b/drivers/mtd/spi-nor/spi-nor.c
@@ -1741,6 +1741,8 @@ static const struct flash_info spi_nor_ids[] = {
 	{ "en25p64",    INFO(0x1c2017, 0, 64 * 1024,  128, 0) },
 	{ "en25q64",    INFO(0x1c3017, 0, 64 * 1024,  128, SECT_4K) },
 	{ "en25qh32",   INFO(0x1c7016, 0, 64 * 1024,   64, 0) },
+	{ "en25qh64",   INFO(0x1c7017, 0, 64 * 1024,  128,
+			SECT_4K | SPI_NOR_DUAL_READ) },
 	{ "en25qh128",  INFO(0x1c7018, 0, 64 * 1024,  256, 0) },
 	{ "en25qh256",  INFO(0x1c7019, 0, 64 * 1024,  512, 0) },
 	{ "en25s64",	INFO(0x1c3817, 0, 64 * 1024,  128, SECT_4K) },
-- 
2.20.1


______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/

^ permalink raw reply related	[flat|nested] 6+ messages in thread
* Re: [PATCH v1] mtd: spi-nor: Add support for en25qh64
  2019-02-07 19:09       ` [PATCH v1] " Roger Pueyo Centelles
@ 2019-02-08  9:39         ` Tudor.Ambarus
  0 siblings, 0 replies; 6+ messages in thread
From: Tudor.Ambarus @ 2019-02-08  9:39 UTC (permalink / raw)
  To: roger.pueyo, linux-mtd; +Cc: marek.vasut



On 02/07/2019 09:09 PM, Roger Pueyo Centelles wrote:
> The Eon EN25QH64 is a 64 Mbit SPI NOR flash memory chip found
> on recent wireless routers. Its 32, 128 and 256 Mbit siblings
> are already supported.
> 
> Tested on a COMFAST CF-E120A v3 router board.
> 
> Signed-off-by: Roger Pueyo Centelles <roger.pueyo@guifi.net>

Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com>

> ---

next time please add a change log here, to spare us of reading the email thread
again.

Thanks, Roger!
ta

>  drivers/mtd/spi-nor/spi-nor.c | 2 ++
>  1 file changed, 2 insertions(+)
> 
> diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c
> index 6e13bbd1aaa5..33b2d0158a96 100644
> --- a/drivers/mtd/spi-nor/spi-nor.c
> +++ b/drivers/mtd/spi-nor/spi-nor.c
> @@ -1741,6 +1741,8 @@ static const struct flash_info spi_nor_ids[] = {
>  	{ "en25p64",    INFO(0x1c2017, 0, 64 * 1024,  128, 0) },
>  	{ "en25q64",    INFO(0x1c3017, 0, 64 * 1024,  128, SECT_4K) },
>  	{ "en25qh32",   INFO(0x1c7016, 0, 64 * 1024,   64, 0) },
> +	{ "en25qh64",   INFO(0x1c7017, 0, 64 * 1024,  128,
> +			SECT_4K | SPI_NOR_DUAL_READ) },
>  	{ "en25qh128",  INFO(0x1c7018, 0, 64 * 1024,  256, 0) },
>  	{ "en25qh256",  INFO(0x1c7019, 0, 64 * 1024,  512, 0) },
>  	{ "en25s64",	INFO(0x1c3817, 0, 64 * 1024,  128, SECT_4K) },
> 
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http://lists.infradead.org/mailman/listinfo/linux-mtd/

^ permalink raw reply	[flat|nested] 6+ messages in thread
end of thread, other threads:[~2019-02-08  9:39 UTC | newest]

Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2018-12-27 15:03 [PATCH] mtd: spi-nor: Add support for en25qh64 Roger Pueyo Centelles
2019-01-10 17:21 ` Tudor.Ambarus
2019-01-30 14:36   ` Roger Pueyo Centelles | Guifi.net
2019-01-30 16:09     ` Tudor.Ambarus
2019-02-07 19:09       ` [PATCH v1] " Roger Pueyo Centelles
2019-02-08  9:39         ` Tudor.Ambarus

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